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    At93c46d TH B Atmel

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    atorresh090675
    The document describes a serial EEPROM chip with 1024 bits of memory organized as 128x8 or 64x16. It has a three-wire serial interface and supports low voltage operation from 1.8V to 5.5V. The chip is available in various small package types and has high reliability with a long data retention time.

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    © All Rights Reserved
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    At93c46d TH B Atmel

    Uploaded by

    atorresh090675
    50 views6 pages
    The document describes a serial EEPROM chip with 1024 bits of memory organized as 128x8 or 64x16. It has a three-wire serial interface and supports low voltage operation from 1.8V to 5.5V. The chip is available in various small package types and has high reliability with a long data retention time.

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    At93c46d Th b Atmel

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    At93c46d Th b Atmel

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    The document describes a serial EEPROM chip with 1024 bits of memory organized as 128x8 or 64x16. It has a three-wire serial interface and supports low voltage operation from 1.8V to 5.5V. The chip is available in various small package types and has high reliability with a long data retention time.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    50 views6 pages

    At93c46d TH B Atmel

    Uploaded by

    atorresh090675
    The document describes a serial EEPROM chip with 1024 bits of memory organized as 128x8 or 64x16. It has a three-wire serial interface and supports low voltage operation from 1.8V to 5.5V. The chip is available in various small package types and has high reliability with a long data retention time.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 6

    Features

    Low-voltage and Standard-voltage Operation


    1.8 (VCC = 1.8V to 5.5V)

    User-selectable Internal Organization


    1K: 128 x 8 or 64 x 16
    Three-wire Serial Interface
    2 MHz Clock Rate (5V)
    Self-timed Write Cycle (5 ms max)
    High Reliability
    Endurance: 1 Million Write Cycles
    Data Retention: 100 Years
    8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-MAP (MLP 2x3), 8-lead
    TSSOP and 8-ball dBGA2 Packages
    Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers

    Three-wire
    Serial
    EEPROM
    1K (128 x 8 or 64 x 16)

    Description
    The AT93C46D provides 1024 bits of serial electrically erasable programmable readonly memory (EEPROM), organized as 64 words of 16 bits each (when the ORG pin is
    connected to VCC), and 128 words of 8 bits each (when the ORG pin is tied to
    ground). The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The AT93C46D is
    available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin miniMAP (MLP 2x3), 8-lead TSSOP, and 8-lead dBGA2 packages.
    The AT93C46D is enabled through the Chip Select pin (CS) and accessed via a
    three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
    Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the
    data is clocked out serially on the DO pin. The Write cycle is completely self-timed,
    and no separate Erase cycle is required before Write. The Write cycle is only enabled
    when the part is in the Erase/Write Enable state. When CS is brought high following
    the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
    The AT93C46D is available in 1.8 (1.8V to 5.5V) version.
    Table 0-1.

    Pin Configurations

    Pin Name

    Function

    CS

    Chip Select

    SK

    Serial Data Clock

    DI

    Serial Data Input

    DO

    Serial Data Output

    GND

    Ground

    VCC

    Power Supply

    ORG

    Internal Organization

    NC

    No Connect

    8-lead SOIC
    CS
    SK
    DI
    DO

    1
    2
    3
    4

    8
    7
    6
    5

    8-lead dBGA2
    VCC
    NC
    ORG
    GND

    VCC
    NC
    ORG
    GND

    CS
    SK
    D1
    D0

    Bottom View
    8-lead PDIP
    CS
    SK
    DI
    DO

    1
    2
    3
    4

    8
    7
    6
    5

    8-lead Ultra Thin mini-MAP (MLP 2x3)


    VCC
    NC
    ORG
    GND

    VCC
    NC
    ORG
    GND

    CS
    SK
    3 DI
    4 DO

    6
    5

    Bottom View
    8-lead TSSOP
    CS
    SK
    DI
    DO

    1
    2
    3
    4

    8
    7
    6
    5

    VCC
    NC
    ORG
    GND

    AT93C46D

    1. Absolute Maximum Ratings*


    Operating Temperature......................................55C to +125C
    Storage Temperature .........................................65C to +150C
    Voltage on Any Pin
    with Respect to Ground ........................................ 1.0V to +7.0V
    Maximum Operating Voltage .......................................... 6.25V

    *NOTICE:

    Stresses beyond those listed under Absolute


    Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and
    functional operation of the device at these or any
    other conditions beyond those indicated in the
    operational sections of this specification is not
    implied. Exposure to absolute maximum rating
    conditions for extended periods may affect
    device reliability

    DC Output Current........................................................ 5.0 mA

    Figure 1-1.

    Notes:

    Block Diagram

    1. When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the
    application does not load the input beyond the capability of the internal 1 Meg ohm pullup, then
    the x 16 organization is selected.
    2. For the AT93C46D, if the x 16 organization is the mode of choice and pin 6 (ORG) is left
    unconnected, Atmel recommends using AT93C46E device. For more details, see the
    AT93C46E datasheet.

    AT93C46D

    AT93C46D
    Table 1-1.
    Pin Capacitance(1)
    Applicable over recommended operating range from TA = 25C, f = 1.0 MHz, VCC = +1.8V (unless otherwise noted)
    Symbol

    Test Conditions

    COUT
    CIN
    Note:

    Max

    Units

    Conditions

    Output Capacitance (DO)

    pF

    VOUT = 0V

    Input Capacitance (CS, SK, DI)

    pF

    VIN = 0V

    1. This parameter is characterized and is not 100% tested.

    Table 1-2.
    DC Characteristics
    Applicable over recommended operating range from: TAI = 40C to +85C, VCC = +1.8V to +5.5V (unless otherwise noted)
    Symbol

    Parameter

    VCC1

    Supply Voltage

    VCC2

    Test Condition

    Min

    Typ

    Max

    Unit

    1.8

    5.5

    Supply Voltage

    2.7

    5.5

    VCC3

    Supply Voltage

    4.5

    5.5

    ICC

    Supply Current

    ISB1

    Standby Current

    ISB2

    READ at 1.0 MHz

    0.5

    2.0

    mA

    WRITE at 1.0 MHz

    0.5

    2.0

    mA

    VCC = 1.8V

    CS = 0V

    0.4

    1.0

    Standby Current

    VCC = 2.7V

    CS = 0V

    6.0

    10.0

    ISB3

    Standby Current

    VCC = 5.0V

    CS = 0V

    10.0

    15.0

    IIL

    Input Leakage

    VIN = 0V to VCC

    0.1

    1.0

    Output Leakage

    VIN = 0V to VCC

    0.1

    1.0

    IOL
    VIL1

    (1)

    Input Low Voltage

    VIH1(1)

    Input High Voltage

    VIL2(1)

    Input Low Voltage

    (1)

    VIH2

    Input High Voltage

    VOL1

    Output Low Voltage

    VOH1

    Output High Voltage

    VOL2

    Output Low Voltage

    VOH2

    Output High Voltage

    Note:

    VCC = 5.0V

    2.7V VCC 5.5V


    1.8V VCC 2.7V
    2.7V VCC 5.5V
    1.8V VCC 2.7V

    0.6

    0.8

    2.0

    VCC + 1

    0.6

    VCC x 0.3

    VCC x 0.7

    VCC + 1

    IOL = 2.1 mA
    IOH = 0.4 mA

    0.4
    2.4

    IOL = 0.15 mA
    IOH = 100 A

    V
    V

    0.2
    VCC 0.2

    V
    V

    1. VIL min and VIH max are reference only and are not tested.

    Table 1-3.
    AC Characteristics
    Applicable over recommended operating range from TAI = 40C to + 85C, VCC = +2.7V to +5.5V,
    CL = 1 TTL Gate and 100 pF (unless otherwise noted)
    Symbol

    Parameter

    Test Condition

    fSK

    SK Clock
    Frequency

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    0
    0
    0

    tSKH

    SK High Time

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    250
    250
    1000

    ns

    tSKL

    SK Low Time

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    250
    250
    1000

    ns

    tCS

    Minimum CS
    Low Time

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    250
    250
    1000

    ns

    tCSS

    CS Setup Time

    Relative to SK

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    50
    50
    200

    ns

    tDIS

    DI Setup Time

    Relative to SK

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    100
    100
    400

    ns

    tCSH

    CS Hold Time

    Relative to SK

    ns

    tDIH

    DI Hold Time

    Relative to SK

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    100
    100
    400

    ns

    tPD1

    Output Delay to 1

    AC Test

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    250
    250
    1000

    ns

    tPD0

    Output Delay to 0

    AC Test

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    250
    250
    1000

    ns

    tSV

    CS to Status Valid

    AC Test

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    250
    250
    1000

    ns

    tDF

    CS to DO in High
    Impedance

    AC Test
    CS = VIL

    4.5V VCC 5.5V


    2.7V VCC 5.5V
    1.8V VCC 5.5V

    100
    150
    400

    ns

    ms

    tWP

    Write Cycle Time

    Endurance

    Note:

    (1)

    5.0V, 25C

    1. This parameter is ensured by characterization.

    AT93C46D

    Min

    1.8V VCC 5.5V

    0.1
    1M

    Typ

    Max

    Units

    2
    1
    0.25

    MHz

    Write Cycles

    AT93C46D
    4. AT93C46D Ordering Information
    Ordering Code
    AT93C46D-PU (Bulk form only)

    Voltage

    Package

    1.8

    8P3

    (1)

    (NiPdAu Lead finish)

    1.8

    8S1

    (2)

    (NiPdAu Lead finish)

    1.8

    8S1

    AT93C46DN-SH-B
    AT93C46DN-SH-T

    AT93C46D-TH-B(1) (NiPdAu Lead finish)

    1.8

    8A2

    AT93C46D-TH-T(2) (NiPdAu Lead finish)

    1.8

    8A2

    AT93C46DY6-YH-T(2) (NiPdAu Lead finish)

    1.8

    8Y6

    (2)

    1.8

    8U3-1

    1.8

    Die Sale

    AT93C46DU3-UU-T
    AT93C46D-W-11(3)
    Notes:

    Operation Range

    Lead-free/Halogen-free/
    Industrial Temperature
    (40C to 85C)

    Industrial
    (40C to 85C)

    1. -B denotes bulk
    2. -T denotes tape and reel. SOIC = 4K per reel. TSSOP, Ultra Thin Mini MAP, and dBGA2 = 5K per reel.
    3. Available in tape and reel, and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request.
    Please contact Serial Interface Marketing.

    Package Type
    8P3

    8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)

    8S1

    8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)

    8A2

    8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)

    8U3-1

    8-ball, Die Ball Grid Array Package (dBGA2)

    8Y6

    8-lead, 2.00 mm x 3.00 mm Body, 0.50mm Pitch, Ultra-Thin Mini-MAO, Dual No Lead Package. (DFN), (MLP 2x3mm)
    Options

    1.8

    Low Voltage (1.8V to 5.5V)

    11

    AT93C46D
    8A2 - TSSOP
    3

    2 1

    Pin 1 indicator
    this corner

    E1

    L1

    N
    L

    Top View

    End View
    COMMON DIMENSIONS
    (Unit of Measure = mm)
    SYMBOL

    MIN

    NOM

    MAX

    NOTE

    2.90

    3.00

    3.10

    2, 5

    4.40

    4.50

    3, 5

    E
    E1

    e
    D

    A2

    6.40 BSC
    4.30

    1.20

    A2

    0.80

    1.00

    1.05

    0.19

    0.30

    Side View

    0.65 BSC
    0.45

    L1
    Notes:

    0.60

    0.75

    1.00 REF

    1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances,
    datums, etc.
    2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed
    0.15 mm (0.006 in) per side.
    3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm
    (0.010 in) per side.
    4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the
    b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between
    protrusion and adjacent lead is 0.07 mm.
    5. Dimension D and E1 to be determined at Datum Plane H.

    2325 Orchard Parkway


    San Jose, CA 95131

    TITLE
    8A2, 8-lead, 4.4 mm Body, Plastic
    Thin Shrink Small Outline Package (TSSOP)

    DRAWING NO.
    8A2

    REV.
    B

    17

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