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PDC Model Question Paper

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MR15

MALLA REDDY ENGINEERING COLLEGE (AUTONOMOUS)


(Affiliated to JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD, HYDERABAD)

Maisammaguda, Dhulapally (Post. Via Kompally) , Secunderabad 500100.

B. Tech-IV SEMESTER REGULAR END EXAMINATIONS


MODEL QUESTION PAPER
Subject: PULSE AND DIGITAL CIRCUITS
Branch: ECE
Time: 3 Hours
Max.Marks:60
PART A
Answer All Questions
5X2M =
10Marks
1. Explain condition of RC circuit to work as differentiation?
2. Define non linear wave shaping ?
3. What is Schmitt Trigger ,write an expression for UTP and LTP?
4. What do you mean by synchronization ? how many types of synchronization are there?
5. How do sampling gates differ from logic gates ?what are the advantages and disadvantages of
uni directional diode gate ?
PART B

Answer Any 5 out of 8 Questions

5X10M = 50Marks

1.a) Explain the function of High Pass RC circuit as differentiator. Obtain the expression for %
tilt with a neat sketch.
b) Draw the RC Low pass circuit and explain its working with step voltage input.
2 a) For the circuit shown below, the input voltage Vi is a sinusoidal voltage of peak-to-peak
value of 100volts applied to a two level clipper. Assume the diodes to be ideal. Sketch one cycle
of output voltage. Determine the maximum diode current.

b) Write in detail about switching times of a transistor

3. What is a Monostable multivibrator? With the help of a neat circuit diagram explain the
principle of operation of a Monostable multi and derive an expression for pulse width.
4.a) With the aid of a neat circuit diagram and suitable waveforms, explain the operation of a
transistor Boot strap time-base generator. Suggest a method to reduce the recovery time of
the same.
(b) Explain the synchronization of a sweep circuit with symmetrical signals?
5.a) Explain the working of a two diode sampling gate. Derive the expressions for
i) Gain

ii) (VC) min

iii) (Vn) min

b) Compare all logic families


6 a) Explain the principle of operation of compensated attenuator and derive the condition for
the Compensation.
b) Draw the circuit diagram of emitter coupled clipper. Draw its transfer characteristics
indicating all intercepts, slopes and voltage levels. Derive with necessary equations?
7. a) A fixed bias binary uses npn Si transistor with hfe(min) = 20. The circuit parameters are:
Vcc = 12V, Vbb = 3V, Rc = 1K, R1 = 5 K and R2 = 10 K. find the stable state currents
and voltages if Vce(sat) = 0V and Vbe(sat) = 0V. Also verify that one transistor is cutoff and
other is in saturation.
b) Explain the principle of operation of Transistor constant current time base generator, with a
neat circuit. Mention its limitations.
8. Write short notes on any two of the following
a) RL circuits and its response for step input
b) Clamping circuit theorem
c) TTL Nand gate

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