Hysteresis Due To Trap Charges in 2deg (Or Graphene) Fets
Hysteresis Due To Trap Charges in 2deg (Or Graphene) Fets
Hysteresis Due To Trap Charges in 2deg (Or Graphene) Fets
charges in 2DEG
(or graphene) FETs
Metal Gate
Buffer layer
Interface
2DEG interface
Trapping effects in FET
transistors
Gate lag
Current
Dispersion
Richardsons law
= 2
2 3
=
3 2 8 2
2. Surface traps
2 = Trapped
position
Results
The induced channel charge is proportional to the amount of the
trapped charge . The carrier mobility in the channel remains
unchanged for relatively small variation of the carrier density in the
channel.
The trapped charge, therefore, is directly proportional to the
difference between the steady state current and the transient
current.
In reality there is a trap band so there are different levels of traps so
at switching of gate potential at different depths will show the
different recovery time of the current as the tunnelling probability will
increase with more reduction in gate potential hence more filling of
trap levels and different trap levels do have different emiision rates so
transient curve might not show the exponential curve , as now the
band levels will have different emission rates , hence the transient
curve wont be exponential.
As the depth and duration of the filling pulse increases the slow
dynamics becomes more pronounced.
Channel current transient after a 500 ns gate filling pulse. The current is
normalized to the steady state value. The insets show the difference between
the steady state and the transient current for the shallow ( = 3 V) and the
deep ( = 10 V) filling pulses.
Pool Frenkel Effect
1 2
3
= 1 2
= 0
= (0)exp( )
+
( = )
Bulk Trapping
= gate width,
2 = 2DEG no.density of states , which will be affected by
the amount of
= electron velocity in channel
CONCLUSION
Emission rate/Capture rate for particular level is same .
Emission rate for different levels are different.
Trapping depends on the amount of pulse time and depth of
pulse, as it will traps of more levels will be exposed for different
time.
Hysteresis will be there if proper gate bias and applied fields are
not chosen and that will be different for different types of
devices.
At higher fields more emission rate due to poole frenkell effect.
Impact ionization effect shows kink effect.
Memory effect on change in gate bias.
REFERENCES
Nam Kim.