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Lecture 04

Programming The 8086

In Assembly Language

ECEg 4501 Microcomputers & Interfacing Daniel D. DECE

 In This Lecture AAiT

The Microcomputer (programmers View)

Basics of programming

8086 Addressing Modes

8086 Instruction Set Overview

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Programmers View
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Control &
status Address Memory
Microprocessor - RAM
SRAM
DRAM
Bus - ROM
Data PROM
Interface
EPROM
Address/data logic EEPROM

Serial Parallel
Keypad Display HDD
Port port
I/O Devices

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 Programmers View
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The figure shows the complete microcomputer board:

 Microprocessor (8086, 8088,)

 Semiconductor memory (RAM, ROM,)
 I/O devices and their controllers
 Bus interface Logic
made of gates, buffers, decoders, muxs

The details of interfacing these different devices with the

microprocessor will be discussed in the interfacing section
in chapters 5 and 6.

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 Basics AAiT

There are three language levels that can be used to write

a program for a microcomputer.

1. Machine Language
This are the binary codes for the instructions you want
the microcomputer to execute.

It is hard or impossible for a programmer to write code

in machine language, b/c it requires memorizing all the
instructions in binary form and sooner the program will
get out of control!
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2. Assembly Language
Assembly language uses two, three, or four letter
mnemonics to represent each instruction type.

The letters in an assembly language mnemonic are

usually initials or a short form of the English word(s) for
the operation performed by the instruction.
e.g., the mnemonic for subtract is SUB, XOR for
Exclusive OR , etc.
Assembly language program has to be translated to
machine language so that it can be loaded into memory
and run This is done by the assembler
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3. High Level Languages

These languages use program statements which are
even more English-like than those of assembly language.
e.g. BASIC, C, C++, Java, ...

Each high-level statement may represent many machine

code instructions.

An interpreter (compiler) program is used to translate

higher-level language statements to machine codes,
which can be loaded into memory and executed.

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To run a program, a microcomputer must have the

program stored in binary form in successive memory
locations.

This binary data is an encoded form of the instruction

mnemonics in the users code. The assembler is
responsible to convert the mnemonics into binary form.

A decoder in the CPU interprets the binary instruction

and passes control to the execution process.

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 Addressing Modes
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The addressing modes describe the types of operands

and the way they are accessed for executing an
instruction.

The addressing mode depends upon the operands and

suggests how the effective address may be computed
for locating the operand, if it lies in memory.

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According to the flow of instruction execution, the

instructions may be categorized as:

I. Sequential control flow instructions and

II. Control transfer instructions.

Sequential control flow instructions are the instructions,

which after execution, transfer control to the next
instruction appearing immediately after it in the
sequence of the program.

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For example:
Arithmetic, logical, data transfer and processor control
instructions are sequential control flow instructions.

The control transfer instructions, on the other hand,

transfer control to some predefined address or the
address somehow specified in the instruction,
For example:
INT, CALL, RET and JUMP instructions fall under this
category.

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The following eight addressing modes are for sequential

control transfer instructions:

1. Immediate
immediate data is a part of instruction, and appears in
the form of successive byte(s).

e.g. MOV AX, 0005H

Here, 0005H is the immediate data. The immediate

data may be 8-bit or 16-bit in size.

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2. Direct
In the direct addressing mode, a 16-bit memory
address (offset) is directly specified in the instruction
as a part of it.

e.g. MOV AX, [5000H]

Here, data resides in a memory location in the data

segment, whose effective address may be computed
using 5000H as the offset address and content of DS
as segment address.
(The effective address, here, is (DS<<4)+5000H.)
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3. Register
In register addressing mode, the data is stored in a
register and it is referred using the particular register.
All the registers, except IP, may be used in this mode.

e.g. MOV BX, AX

This instruction transfers data in the AX register to the

BX register. There is no need to access the main
memory.

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4. Register Indirect
Sometimes, the address of the memory location,
which contains data or operand, is determined in an
indirect way, using the offset registers.
the offset address of data is in either BX, SI or DI
registers. The default segment is either DS or ES.

e.g. MOV AX, [BX]

Here, data is present in a memory location in DS

whose offset address is in BX.
The effective address is given as DS<<4 + [BX].
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5. Indexed
offset of the operand is stored in one of the index
registers. DS and ES are the default segments for index
registers SI and DI respectively.
This mode is a special case of the above discussed
register indirect addressing mode.

e.g. MOV AX, [SI]

Here, data is available at an offset address stored in SI

in DS. The effective address, in this case, is computed
as DS<<4 + [SI].
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6. Register Relative
the data is available at an effective address formed by
adding an 8-bit or 16-bit displacement with the
content of any one of the registers.
BX, BP, SI and DI in the default segment (DS or ES).

e.g. MOV AX, 50H [BX]

Here, the effective address is given as:

DS<<4 + [BX] + 50H

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7. Based Indexed
The effective address of data is formed by adding
content of a base register (BX or BP) to the content of
an index register (SI or DI).
The default segment register may be ES or DS.

e.g. MOV AX, [BX] [SI]

Here, BX is the base register and SI is the index

register.
The effective address is computed as:
DS<<4 + [BX] + [SI]
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8. Relative Based Indexed

The effective address is formed by adding an 8 or
16-bit displacement with the sum of contents of any
One of the base registers (BX or BP) and any one of
The index registers (SI or DI), in a default segment.

e.g. MOV AX, 50H [BX] [SI]

Here, 50H is an immediate displacement, BX is a base

register and SI is an index register.
The effective Address is computed as:
DS<<4 + [BX]+ [SI] + 50H
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For the control transfer instructions, the addressing

modes depend on:
I. whether the destination location is within the same
segment or a different one.

II. The method of passing the destination address to

the processor.

there are two addressing modes for the control transfer

Instructions:
intersegment and intrasegment addressing modes.

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Intersegment: Control is transferred to a sub-program located in

a segment different from the current one

Intrasegment Control is transferred to a sub-program in the

same segment
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1. Intrasegment Direct
the address to which the control is to be transferred
appears directly in the instruction as an immediate
displacement value.
the displacement is computed relative to the content
of the instruction pointer IP.

In case of jump instruction, if the signed displacement (d)

Is 8 bits (i.e. -128< d < 127), it is called short jump and
if it is of 16 bits (i.e. -32768 < d < 32767), it is termed as
long jump.

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1. Intrasegment Indirect
The displacement to which the control is to be
transferred is found as the content of a register or a
memory location.

This addressing mode may be used in unconditional

branch instructions.

e.g. JMP BX, JMP [BX]

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1. Intersegment direct
This addressing mode provides a means of branching
from one code segment to another code segment.

Here, the CS and IP of the destination address are

directly specified in the instruction.

e.g. CALL SINE_CALC

SINE_CALC = the physical address of the subroutine that

calculates the sine of a number

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1. Intersegment Indirect
The control is transferred to the location whose address
may be referred using any of the addressing modes,
Except immediate mode.
Then, the new segment address is loaded to CS and the
offset is loaded to IP.

e.g. CALL [BX]

New values for CS and IP are fetched from four memory

locations in DS. The new value for CS is fetched from [BX]
and [BX + 1]; the new IP from [BX + 2] and [BX + 3].

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The 8086 instructions can be grouped in to six

categories

1. Data transfer instructions

2. Arithmetic instructions
3. Bit manipulation instructions
4. String instructions
5. Program execution transfer instructions
6. Processor control instructions

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1. Data transfer instructions

Used to transfer data from source operand to
destination operand.

All the store, move, load, exchange, input and output

instructions belong to this category.
I. General-Purpose Byte or Word Transfer Instructions:
MOV Copy byte or word from source to destination.
PUSH Copy specified word to top of stack.
POP Copy word from top of stack to specified location.
XCHG Exchange bytes or exchange words.
XLAT Translate a byte in AL using a table in memory.

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II. Simple I/O port transfer instruction

IN Copy a byte or word from specified port to accumulator.
OUT Copy a byte or word from accumulator to specified port.
III. Special address transfer instructions
LEA Load effective address of operand into specified register.
LDS Load DS and other specified register from memory.
LES Load ES and other specified register from memory.
IV. Flag transfer instructions
LAHF Load AH with the low byte of the flag register.
SAHF Store AH register to low byte of flag register.
PUSHF Copy flag register to top of stack.
POPF Copy word at top of stack to flag register.

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2. Arithmetic instructions
I. Addition Instructions:
ADD Add byte to byte or word to word
ADC Add byte + byte + carry or word + word + carry.
INC Increment specified byte or specified word by 1.
AAA ASCII adjust after addition.
DAA Decimal (BCD) adjust after addition.
II. Subtraction Instructions:
SUB Subtract byte from byte or word from word.
SBB Subtract with borrow
DEC Decrement specified byte or specified word by 1.
NEG Invert each bit of a specified byte or word and add 1
(form 2's complement).

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CMP Compare two specified bytes or two specified words.

AAS ASCII adjust after subtraction.
DAS Decimal (BCD) adjust after subtraction.
III. Multiplication Instructions:
MUL Multiply two unsigned bytes or words
IMUL Multiply two signed bytes or words.
AAM ASCII adjust after multiplication.
II. Division Instructions:
DIV Divide unsigned word by byte or double word by word.
IDIV Divide signed word by byte or double word by word.
AAD ASCII adjust before division.
CBW Fill upper byte of word with copies of sign bit of lower byte.
CWD Fill upper word of double word with sign bit of lower word.

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3. Bit manipulation instructions

I. Logical Instructions:
NOT Invert each bit of a byte or word.
AND AND each corresponding bits in the given bytes or words
OR OR each corresponding bits in the given bytes or words
XOR Exclusive OR each corres. bits in the given bytes or words
TEST AND operands to update flags w/o changing operands.
II. Shift Instructions:
SHL/SAL Shift bits of word or byte left, put zero in LSB.
SHR Shift bits of word or byte right, put zero in MSB.
SAR Shift bits of word or byte right, copy old MSB into
new MSB.

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III. Rotate Instructions:

ROL Rotate bits of byte or word left, MSB to LSB and to CF.
ROR Rotate bits of byte or word right, LSB to MSB and to CF.
RCL Rotate bits of byte or word left, MSB to CF and CF to LSB.
RCR Rotate bits of byte or word right, LSB to CF and CF to MSB.

CF Byte/word
RCL

CF Byte/word
RCR

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4. String instructions
A string is a series of bytes or a series of words in sequential
memory locations. It often consists of ASCII character codes.

REP Repeat following instruction until CX = 0. (prefix)

REPE/REPZ Repeat instruc?on un?l CX = 0 or ZF 1. (prefix)
REPNE/REPNZ Repeat until CX = 0 or ZF = 1. (prefix)
MOVS/MOVSB/MOVSW Move byte or word from one string to another.
COMPS/COMPSB/COMPSW Compare two string bytes or words.
SCAS/SCASB/SCASW Scan a string. Compare a string byte with a byte
in AL or a string word with a word in AX.
LODS/LODSB/LODSW Load string byte into AL or string word into AX.
STOS/STOSB/STOSW Store byte from AL or word from AX into string.

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5. Program execution transfer instructions

These instructions are used to tell the 8086 to start
fetching instructions from some new address, rather than
continuing in sequence.

I. Unconditional transfer instructions

CALL Call a procedure (subroutine), save return address on
stack.
RET Return from procedure to calling program.
JMP Go to specified address to get next instruction.

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II. Conditional transfer Instructions:

JA/JNBE Jump if above/jump if not below or equal.
JAE/JNB Jump if above or equal/jump if not below.
JB/JNAE Jump if below/jump if not above or equal.
JBE/JNA Jump if below or equal/jump if not above.
JC Jump if carry flag CF = 1.
JE/JZ Jump if equal/jump if zero flag ZF = 1.
JG/JNLE Jump if greater/jump if not less than or equal.
JGE/JNL Jump if greater than or equal/ Jump if not less than.
JL/JNGE Jump if less than/jump if not greater than or-equal.
JLE/JNG Jump if less than or equal/jump if not greater than.
JNC Jump if no carry (CF = 0).
JNE/JNZ Jump if not equal/jump if not zero (ZF = 0).

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JNO Jump if no overflow (overflow flag OF = 0).

JNP/JPO Jump if not parity/jump if parity odd (PF = 0).
JNS Jump if not sign (sign flag SF= 0).
JO Jump if overflow flag OF = 1.
JP/JPE Jump if parity/jump if parity even (PF = 1).
JS Jump if sign (SF = 1)
III. Iteration control Instructions:
LOOP Loop through a sequence of instructions until CX = 0.
LOOPE/LOOPZ Loop through a sequence of instructions while ZF =1
and CX 0.
LOOPNE/LOOPNZ Loop through a sequence of instructions while
ZF = 0 and CX 0.
JCXZ Jump to specified address if CX = 0.

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IV. Interrupt Instructions:

INT Interrupt program execution, call interrupt service routine
INTO Interrupt program execution if OF = 1.
IRET Return from interrupt service routine to main program.

6. Processor Control Instructions

I. Flag Instructions:
STC Set carry flag CF to 1.
CLC Clear carry flag CF to 0.
CMC Complement the state of the carry flag CF.
STD Set direction flag DF to 1 (decrement string pointers).
CLD Clear direction flag DF to 0.
STI Set interrupt enable flag to 1 (enable INTR input).
CLI Clear interrupt enable flag to 0 (disable INTR input).

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II. External hardware synchronization Instructions:

HLT Halt (do nothing) until interrupt or reset.
WAIT Wait (do nothing) until signal on the TEST pin is low.
ESC Escape to external coprocessor such as 8087 or 8089
LOCK An instruction prefix. Prevents another processor from
taking the bus.
III. No operation Instructions:
NOP No action except fetch and decode.

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 Summary AAiT

Generally, there are 121 different instructions, but a few of

them are enough to write full functional programs.

 Understanding the Instructions well helps write fast

and compact programs.

 Dividing the instructions in to different groups helps learn

them quickly.

 Generally, we can divide 8086 instructions in to six

categories.

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1. Data transfer instructions

Store, move, load, exchange, in/out, push/pop
2. Arithmetic instructions
Add, subtract, multiply, divide, negate, compare
3. Bit manipulation instructions
logical (AND, OR,), shift, rotate
4. String instructions
move, copy, compare, repeat
5. Program execution transfer instructions
Jump, call, return, loop, interrupt
6. Processor control instructions
Set/clear flags, halt, wait, escape, lock, NOP

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The data operands or subroutine addresses for the

instruction operations can be obtained from memory,
registers or from the instruction itself.

 The 8086 has special addressing modes to determine

where the operand data or subroutine address is located

 For sequential control flow instructions the location of the

data operand can be determined in eight different ways.

 For control transfer instructions the memory address to

which the control is to be transferred is determined in four
different ways.

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A. Sequential control flow instructions

1. Immediate MOV AX, 240H

2. Direct MOV AX, [4000H]
3. Register MOV AX, BX
4. Register Indirect MOV AX, [BX]
5. Register Relative MOV AX, 30H[BX]
6. Indexed MOV AX, [SI]
7. Based Indexed MOV AX, [BX] [SI]
8. Relative Based Indexed MOV AX, 40H[BX] [SI]

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B. Control transfer instructions

Intrasegment Intersegment

Direct Indirect Direct indirect

JMP d JMP [BX] CALL Refresh CALL [BX]

(-128 <d> 128) short CS = [BX+1] : [BX]

(-32678 <d> 32678) long IP = [BX+3]:[BX+1]

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