Gokaraju Rangaraju Institute of Engineering and Technology

Department of Computer Science and Engineering

Year/Semester : II / II Academic year: 2015-16

SUB:CO Tutorial Sheet: UNIT II-1

SHORT ANSWER QUESTIONS

1. A computer uses a memory unit with 256k words of 32 bits each. A binary instruction code is
stored in one word of memory. The instruction has four parts: an indirect bit,an opreation code,a
register code part to specify one of 64 registers,and an address part.

2. How many bits are there in the operation code,the register code part,and the address part?

3. Draw the instruction word format and indicate the number of bits in each part

4. How many bits are there in the data and address inputs of the memory

5. What is thedifference between a direct and an indirect address instruction? How many references
to memory are needed for each type of instruction to bring an operand in to a processor register?
6. The content of AC in the basic computer is hexa decimal A937 and the initial value of E is 1
.Determine the contents of AC ,E,PC,AR,IR in hexa decimal after the execution of the CLA
instruction.Repeat 11 more times ,starting from each one of the register reference
instrutions.The initial value of PC is hexa decimal is 021
7. A digital computer has a memory unit with a capacity of 16384 words,40 bits per word. The
instruction code format consists of 6 bits for theoperation part and 14 bits for the address part.
Two instructions are packed in one memory word and a 40 bit instruction register IR is available
in the control unit. Formulate procedure for fetching and executing instructions for this
computer Read 40-bit double instruction from memory to IR and then increment PC.
8. The operations to be performed with a flip flop F are specified by the following register transfer
statements
xT3: F <- 1
 yT1: F <- 0
zT2: F <- F`
wT5: F <- G
Other wise ,the content of F must not change.Draw the logic diagram showing the connections
of the gates that form the control functions and the inputs of flip flop F. Use a JK flip flop and
minimize the no. of gates.

9. An output program resides in memory starting from address 2300.It is executed after computer
recognises an interrupt when FGO becomes a 1( while IEN=1)
a)what instruction must be placed at address 1

b)what must be the last two instructions of the output program

10. Explain about Bus.

LONG ANSWER QUESTIONS

1. List and explain various computer registers with required diagram

2. Write and explain basic computer instructions

3. Draw and explain flowchart for interrupt cycle of basic computer

4. Draw and explain the control unit of basic computer

5. Draw and explain flowchart for instruction cycle of basic computer

 Gokaraju Rangaraju Institute of Engineering and Technology
Department of Computer Science and Engineering
Year/Semester : II / II Academic year: 2015-16

SUB: CO Tutorial Sheet:UNIT II-1

SHORT ANSWER QUESTIONS

1. A computer uses a memory unit with 256k words of 32 bits each. A binary
instruction code is stored in one word of memory. The instruction has four parts:
an indirect bit,an opreation code,a register code part to specify one of 64
registers,and an address part.

256 K = 28 210 = 218

64 = 26

2. How many bits are there in the operation code,the register code part,and the
address part?

Address: 18 bits
Register code: 6 bits
Indirect
bit: 1 bit
25 bits
32 25 = 7 bits for opcode.

3. Draw the instruction word format and indicate the number of bits in each part

1 7 6 18 = 32 bits
 I opcode Register Address
4. How many bits are there in the data and address inputs of the memory
Data; 32 bits; address: 18 bits.
5. What is thedifference between a direct and an indirect address instruction? How
many references to memory are needed for each type of instruction to bring an
operand in to a processor register?
A direct address instruction needs two references to memory:
(1) Read instruction;
(2) Read operand.
An indirect address instruction needs three references to memory:
Read instruction; (2) Read effective address; (3) Read operand.
6. The content of AC in the basic computer is hexa decimal A937 and the initial value
of E is 1 .Determine the contents of AC ,E,PC,AR,IR in hexa decimal after the
execution of the CLA instruction.Repeat 11 more times ,starting from each one of
the register reference instrutions.The initial value of PC is hexa decimal is 021

E AC PC AR IR
Initial 1 A937 021
CLA 1 0000 022 800 7800
CLE 0 A937 022 400 7400
CMA 1 56C8 022 200 7200
CME 0 A937 022 100 7100
CIR 1 D49B 022 080 7080
CIL 1 526F 022 040 7040
INC 1 A938 022 020 7020
SPA 1 A937 022 010 7010
SNA 1 A937 023 008 7008
SZA 1 A937 022 004 7004
SZE 1 A937 022 002 7002
HLT 1 A937 022 001 7001
7. A digital computer has a memory unit with a capacity of 16384 words,40 bits per
word. The instruction code format consists of 6 bits for theoperation part and 14
bits for the address part. Two instructions are packed in one memory word and a
40 bit instruction register IR is available in the control unit. Formulate procedure
for fetching and executing instructions for this computer Read 40-bit double
instruction from memory to IR and then increment PC.

Decode opcode 1.
Execute instruction 1 using address 1.
Decode opcode 2.
Execute instruction 2 using address 2.
Go back to step 1.

8. The operations to be performed with a flip flop F are specified by the following
register transfer statements
xT3: F <- 1
yT1: F <- 0
zT2: F <- F`
wT5: F <- G
Other wise ,the content of F must not change.Draw the logic diagram showing the
connections of the gates that form the control functions and the inputs of flip flop F.
Use a JK flip flop and minimize the no. of gates.
JF = xT3 + Zt2 + wT5G KF = yT1 + zT2 + wT5G'
9. An output program resides in memory starting from address 2300.It is executed
after computer recognises an interrupt when FGO becomes a 1( while IEN=1)
a)what instruction must be placed at address 1
BUN 2300
b)what must be the last two instructions of the output program
ION
BUN 0 I (Branch indirect with address 0)

10. Explain about Bus.

Ans: Bus is a group of lines that serves as a connecting path for several devices. In
addition to the lines that carry the data , the bus must have the lines for address and
control purposes.

LONG ANSWER QUESTIONS

1. List and explain various computer registers with required diagram

Ans: Computer instructions are normally stored in consecutive memory locations and are
executed sequentially one at a time. The control reads an instruction from a specific address in
memory and executes it. It then continues reading the next instructions in sequence and
executed it, and so on. This type of instruction sequencing needs a counter to calculate the
address of the next instruction after execution of the current instruction is completed.
The computer needs processor registers for manipulating data and a register for holding
a memory address. The memory unit has a capacity of 4096 words and each word contains 16
bits. Twelve bits of an instruction word are needed to specify the address of the operand. The
data register (DR) holds the operand read from memory. The accumulator (AC) register is a
general-purpose register. The instruction read from memory is placed in instruction register
(IR). The temporary register (TR) is used for holding temporary data during the processing.

Register number of Register name Function

symbol bits
DR 16 Data register Holds memory operand
AR 12 Address register Holds address for memory
AC 16 Accumulator Processor register
IR 16 Instruction register Holds instruction code
PC 12 Program counter Holds address of instruction
TR 16 Temporary register Holds temporary data

INPR 8 Input register Holds input character

OUTR 8 Output register Holds output character

The memory address register (AR) has 12 bits since this is the width of a memory
address. The program counter (PC) also has 12 bits and it holds the address of the next
instruction to be read from memory after the current instruction is executed. The PC goes
through a counting sequence and causes the computer to read sequential instructions previously
stored in memory. Instructions words are read and executed in sequence unless a branch
instruction is encountered. The address part of a branch instruction is transferred to PC to
become the address of the next instruction. To read an instruction , the content of PC is taken as
 the address for memory and a memory read cycle is initiated. PC is then incremented by one, so
it holds the address of the next instruction in sequence.

2. Write and explain basic computer instructions

Computer instructions are the basic components of a machine language program. They
are also known as macrooperations, since each one is comprised of a sequences of
microoperations.

Each instruction initiates a sequence of microoperations that fetch operands from

registers or memory, possibly perform arithmetic, logic, or shift operations, and store results in
registers or memory.

Instructions are encoded as binary instruction codes. Each instruction code contains of
a operation code, or opcode, which designates the overall purpose of the instruction (e.g. add,
subtract, move, input, etc.). The number of bits allocated for the opcode determined how many
different instructions the architecture supports.

In addition to the opcode, many instructions also contain one or more operands, which
indicate where in registers or memory the data required for the operation is located. For
example, and add instruction requires two operands, and a not instruction requires one.

15 12 11 65 0
+-----------------------------------+
| Opcode | Operand | Operand |
+-----------------------------------+

The opcode and operands are most often encoded as unsigned binary numbers in order
to minimize the number of bits used to store them. For example, a 4-bit opcode encoded as a
binary number could represent up to 16 different operations.

The control unit is responsible for decoding the opcode and operand bits in the
instruction register, and then generating the control signals necessary to drive all other hardware
in the CPU to perform the sequence of microoperations that comprise the instruction.
Figure 5.1. CPU Block Diagram

3. Draw and explain flowchart for interrupt cycle of basic computer

Interrupt:
An alternative to the programmed controlled procedure is to let the external device inform
the computer when it (the data) is ready to transfer.
Here the computer does not check the flags instead when a flag is set the computer is
momentarily interrupted from proceeding with the current program and is informed to the
fact that a flag has been set.
The computer deviates momentarily from what it is doing to take care of the input or output
transfer.
Once it is over it returns back to the current program to continue, what it is doing before the
interrupt.

For this The interrupt enable flip flop IEN is used, to set (1) ION instruction is used to clear
(0) IOF instruction is used.
When the interrupt flip flop R = 0 the computer goes to intruction cycle. During the
execution phase of the instruction cycle IEN is checked by the control. If it is 0, it indicates
that the programmer does not want to use the interrupt, so control continues with the next
cycle.

If IEN is 1, control checks the flag bits.

If both flags are 0, it indicates that neither the input nor output registers are ready for transfer
of information. So the control continues with the next instruction cycle.
If either flags is set to 1, R is set to 1. At the end of the execute phase, control checks the
value of R if it is 1, it goes to an interrupt cycle instead of instruction cycle.
The interrupt cycle is a hardware implementation of a branch and save return address
operation.
The return address available in PC is stored in a specific location (CPU register, memory
stack..) where it can found later when the program returns to the instruction at which it was
interrupted.
Example:
When an interrupt occurs and R is set to 1 while the control is executing the instruction at
address 255. At this time, the return address 256 is in PC.
The programmer has previously placed an input-output service program in memory starting
from address 1120 and a BUN 1120 instruction at address 1.
 Now The content of PC (256) is stored in memory location 0, PC is set to 1, and R is cleared
to 0. The instruction is read from memory at address 1. The branch instruction at address 1
causes the program to transfer to the input-output service program at address 1120.

This program checks the flags, determines which flag is set, and then transfers the required
input or output information. Once this is done, the program returns to the location where it
was interrupted.

Interrupt Cycle:
The interrupt cycle is initiated after the last execute phase if the interrupt flip-flop R is
equal to 1. This flip-flop is set to 1 if IEN = 1 and either FGI or FGO are equal to 1.
The interrupt cycle stores the return address (available in PC) into memory location 0, branches
to memory location 1, and clears IEN, R, and SC to 0. This can be done with the following
sequence of microoperations:
RT0: AR 0, TR PC
RT1: M[AR] TR, PC 0
RT2: PC PC + 1, IEN 0, R 0, SC 0

During the first timing signal AR is cleared to 0, and the content of PC is transferred to
the temporary register TR. With the second timing signal, the return address is stored in memory
at location 0 and PC is cleared to 0. The third timing signal increments PC to 1, clears IEN and
R, and control goes back to T0 by clearing SC to 0. The beginning of the next instruction cycle
 has the condition R'T0 and the content of PC is equal to 1 . The control then goes through an
instruction cycle that fetches and executes the BUN instruction in location 1.

4. Draw and explain the control unit of basic computer

Ans: The clock pluses do not change the state of a register unless the register is enabled by a
control signal. The control signals are generated in the control unit and provide control inputs
for the multiplexers in the common bus, control inputs in the processor registers, and
microperations for the accumulator.

There are two types of control organisation. Hardwired control and micro-programmed
control.
1. Hardwired control has the advantage that it can be optimized to produce a fast mode of
operation. But any design modification needed to physical change in the circuit.
2. In micro programmed organisation the control information is stored in a control memory.
The control memory is programmed to initiate the required sequence of micro operations. In the
micro programmed control any required changes can be done by updating the micro program in
control memory.
RF:155 Control unit (Hardwired) of basic computer.
The control unit consists of two decoders, a sequence counter, and a number of control logic
gates.
An instruction read from memory is placed in the instruction register (IR).
The instruction register is divided into three parts: the I bit, the operation code, and bits 0
through 11.
The operation code in bits 12 through 14 are decoded with a 3 x 8 decoder.
The eight outputs of the decoder are designated by the symbols D0 through D7.
The subscripted decimal number is equivalent to the binary value of the corresponding
operation code.
Bit 15 of the instruction is transferred to a flip-flop designated by the symbol I. Bits 0 through
11 are applied to the control logic gates.
 The 4-bit sequence counter can count in binary from 0 through 15. The outputs of the
counter are decoded into 16 timing signals T0 through T15.

5. Draw and explain flowchart for instruction cycle of basic computer

 A program residing in the memory unit of the computer consists of a sequence of
instructions. The program is executed in the computer by going through a cycle for each
instruction. Each instruction cycle is in turn subdivided into a sequence of sub cycles or
phases. The basic computer each instruction cycle consists of the following phases.
1. Fetch an instruction from memory
2. Decode the instruction
3. Read the effective address from memory if the instruction has an indirect address.
4. Execute the instruction.

Fetch and Decode:

1. Initially the register PC is loaded with the address of the first instruction in the program.
2. The sequence counter SC is cleared to 0, providing a decoded timing signal T0.
3. After each clock cycle SC is incremented and timing signals go through T0,T1,T2 and so
on..
T0: AR <-- PC
T0: since only AR is connected to the address inputs of memory, it is necessary to transfer
the address from PC to AR during T0.
T1 : IR <-- M[AR], PC PC +1
T1: The instruction read from memory is then placed in the instruction register IR with the
clock transition associated with timing signal T1. PC is incremented by one to prepare it for
the address of the next instruction in the program.
Note: Only three bits of the instruction are used for the operation code, means the maximum
of 8 distinct operations. The decoder outputs are 0000 0001 (D0), to 1000 0000 (D7).
T2: D0,.D7 decode IR(12-14), AR IR(0-11), I IR(15)
T2: The operation code in IR is decoded,
i). The indirect bit is transferred to flip flop I, and
ii). the address part of the instruction is transferred to AR.
iii).The SC is incremented after each clock pulse to produce the sequence T0, T1 and T2.