Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                

Capacitance Multiplier

Download as pdf or txt
Download as pdf or txt
You are on page 1of 5

INTRODUCTION

A capacitance multiplier is designed to make a capacitor function like a capacitor that is much
larger.

Capacitor multipliers make low frequency filter and long duration timing circuits possible that
would be impractical with actual capacitors. Another application is in DC power supplies
where very low ripple voltage (under load) is of paramount importance, such as in class A
amplifiers. Note this this is not a voltage regulator. The output voltage will track the input
voltage (- dropout voltage).

Basic Capacitance Multiplier


The basic capacitance multiplier circuit is essentially a simple emitter follower with a capacitor
on the base and a feed resistor from the input to the base to turn the transistor on. The circuit is
shown in Fig.1. A capacitor from the base to ground provides the smoothing.

Fig. 1 Transistor capacitance multiplier circuit

The effect of placing the transistor in the circuit is that it effectively multiplies the capacitance
on the base by the current gain of the transistor, i.e. by . So, Ceq = *C1
Generally, the output voltage is about 0.65V less than the base voltage, because of the VBE of
the transistor and around 2 - 3 V less than Vin when a load is applied.
The ripple and noise levels on the output can be reduced to very low levels by increasing the
values of R1 and C1, and mainly at low frequencies. On the downside, large values of R1 and
C1 leads to sluggish response, because of the large time constant of R1 and C1.
Modified capacitance multiplier

Fig. 2 Transistor capacitance multiplier circuit with potential divider


The drawback of the circuit is that in its basic form, there is very little voltage drop across the
series pass transistor, and noise reduction is not as high as it may be. To overcome this, some
people place a resistor across the capacitor and this provides a potential divider reducing the
voltage at the base and increasing the voltage drop across the transistor. This enables it to
provide better noise reduction, although it does increase power dissipation and reduces the
voltage at Vout.
Op-amp capacitance multiplier
An easy circuit using an operational amplifier is given below.

Fig. 3 Transistor capacitance multiplier circuit with potential divider

In this circuit, the capacitance of capacitor C1 is multiplied by the ratio of resistances, i.e. the
circuit gain and the effective capacitance C = C1 * R1 / R2
OTA-BASED INTEGRABLE VOLTAGE/CURRENT-CONTROLLED IDEAL C-
MULTIPLIER
The operational amplifier (OA)-based capacitance multipliers (C-multipliers) have the
drawback of requiring large resistance spread for realizing large C-multiplying factors. A large
R-spread also becomes impractical to use from the viewpoint of IC fabrication.

The operational transconductance amplifier (OTA) is an amplifier whose differential input


voltage produces an output current. Thus, it is a voltage controlled current source (VCCS).
There is usually an additional input for a current to control the amplifier's transconductance.
The OTA is similar to a standard operational amplifier in that it has a
high impedance differential input stage and that it may be used with negative feedback.

The basic circuit for the C-multiplier is shown


in Fig. 3. Its analysis gives the driving-point
admittance function as
() = (1 + )

where = (2 ) is the transconductance

gain of the OTA, which is linearly tunable
over several decades with the bias current IB.
VT is the thermal voltage. The circuit thus
realizes an effective capacitance

Fig. 3 C-Multiplier using OTA = (1 + 2 )

Since, Ce is temperature dependent and
therefore the multiplying factor will vary
under changing environmental conditions.
This undesirable phenomenon is overcome
by replacing the resistor R by another
OTA, as shown in Fig. 4, where

1 2
= =( )
0 0


= (1 + ) = (1 + )
0 0
Fig. 4 Temperature Independent C-multiplier

The following attractive features are


evident from above eqn.:
(i) the effective capacitance is
temperature-independent
(ii) It may be tuned over several
decades with the bias current IB,
keeping IBo fixed at a small value.
(iii) The characteristics of both the
OTAs will track if dual OTAs on a
chip are used. This will provide a
highly stable multiplying factor
even under varying environmental
conditions.

NIC (Negative Impedance Converter)


The basic circuit, which utilizes only one Op-Amp, is the well-known negative impedance
converter (NIC), from which an equivalent capacitance is easily obtained by changing a
specific resistance of the basic scheme. Finally, negative and positive capacitance values can
be achieved and regulated either by cascading two or more stages.

NIC-BASED IMPEDANCE SIMULATOR

Fig. 5 shows the basic configuration of the negative


impedance converter (NIC) circuit, based on a single
Op-Amp, able to simulate a grounded negative
impedance whose behavior depends from how own
impedances are replaced. Under the hypothesis of
ideal Op-Amp behavior, we have:

3 1
= =
2
Fig. 5 Topology of NIC Circuit
GROUNDED CAPACITOR MULTIPLIERS
Considering Fig. 5 and starting from above equation, if we detail the basic circuit impedances
1
Z1 = R1, Z2 = R2 and 3 = , the ideal simulated equivalent impedance assumes the
1
following expression:
1 1 2
= 1 2 and so, the equivalent capacitance is =
1
1

It is possible to obtain a positive value of the capacitance by replacing, in the basic


configuration, the capacitor C1 with another grounded equivalent capacitor using an additional
NIC, in its basic configuration, as shown in Fig. 6.

Fig. 6 Positive C-Multiplier

In this case, the net capacitance is given by the following expression:

1 4 2
=
3 1

Obviously, it is also possible to implement a cascaded multi-NIC configuration, considering


that capacitance sign depends from the number of utilized stages: it is positive for even stages
and negative for odd ones.

FLOATING CAPACITOR MULTIPLIERS

Starting from the circuit depicted in Fig. 5,


redoubling the structure with respect to Z3
impedance, as shown in Fig. 7, it is possible
to achieve a floating capacitance multiplier.
In this case, the input equivalent impedance,
under the hypothesis of ideal Op-Amp
behavior, is given by the following
expression:

3 1 5
=
2 5 +1 4

In particular, from above equation, if circuit


impedances are Z1 = R1, Z2 = R2, Z4 = R4, Z5
1
= R3, 3 = , the equivalent
1
Impedance is given by: Fig. 7 Floating C-Multiplier
1
= 1(23 +14)
1 3
And consequently, equivalent Capacitance

1 (2 3 + 1 4 )
=
1 3
Also in this case, assuming the same technique previously adopted, replacing the capacitor in
the basic floating configuration (see Figure 7) with another equivalent floating capacitor, it is
possible to achieve positive capacitive behaviors.

REFERENCES
1. https://en.wikipedia.org/wiki/Capacitance_multiplier
2. I.A. Khan : Ota-Based Integrable Voltage/Current-Controlled Ideal C-Multiplier,
Electronics Letters, pp. 365-366
3. Andrea De Marcellis, Giuseppe Ferri, Vincenzo Stornelli : NIC-based Capacitance
Multipliers for Low-Frequency Integrated Active Filter Applications, Research in
Microelectronics and Electronics Conference, 2007. PRIME 2007. Ph.D.

You might also like