Compal La 3281p Unlocked
Compal La 3281p Unlocked
Compal La 3281p Unlocked
http://hobi-elektronika.net
1 1
2
Triathlon 2
Compal confidential
Schematics Document
Mobile Yonah uFCPGA with Intel
3
Calistoga_GM/PM+ICH7-M core logic 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 1 of 47
A B C D E
A B C D E
14W_PCB
1 Mobile Yonah 1
uFCBGA-479/uFCPGA-478 CPU
HDL20 PCB panelization Data for DVT Clock Gen.
ICS9LPR325AKLFT
page15
page4,5,6
PCB Function PCB Number DVT build revision
Connector page16
DMI
AMP&Audio Jack
AZALIA page30
USB2.0
Intel ICH7-M PCI-E Audio Codec
mBGA-652 ALC 861VD
SATA page29
3.3V / 33 MHz
PCI BUS
page19,20,21,22
ATA100
Finger printer
page36
BlueTooth Conn
page28
4 PATA CDROM 4
Connector page23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 2 of 47
A B C D E
A
Voltage Rails
+5VS
http://hobi-elektronika.net
SKU ID Table
Vcc 3.3V +/- 5%
+3VS
Ra 100K +/- 5%
power Board ID Rb V AD_BID min V AD_BID typ V AD_BID max
plane +2.5VS
+1.8VS * 0 0 0 V 0 V 0 V
+B 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VALW +1.8V +1.5VS
LDO3 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+3VALW +5V +1.2VS
LDO5 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+VGA_CORE
+0.9VS
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
State 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+CPU_CORE
+VCCP
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
O MEANS ON S3 : STR
X MEANS OFF S4 : STD
S5 : SOFT OFF
1 BOM Structure USB PORT LIST 1
MARK FUNCTION
External PCI Devices @ NC FOR ALL PORT DEVICE
Device IDSEL# REQ#/GNT# Interrupts
GIGA@ 8110SBL(SCL)Giga LAN 0 LEFT SIDE
13 94 AD22 0 PIRQG/H
10/100@ 8100CL 10/100Mb LAN 1 BT(HDL00/10)
LAN AD17 3 PIRQF
UMA@ Internal 945GM 2 RIGHT SIDE
CardBus AD20 2 PIRQA
VGA@ External G7xM 3 CMOS
4 RIGHT SIDE
5 FINGER PRINTER
6 RIGHT SIDE
EC SM Bus1 address EC SM Bus2 address 7 BT(HDL20)
Device Address Device Address
Smart Battery 0001 011X b ADM1032 1001 100X b
EEPROM(24C16/02) 1010 000X b
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 3 of 47
A
5 4 3 2 1
http://hobi-elektronika.net ITP_TDI
This shall place near CPU
R98 1 56_0402_5%
+VCCP
2
<7> H_A#[3..31] H_D#[0..63] <7>
JP1A ITP_TMS R97 1 2 56_0402_1%
1
2
5
6
ITP_BPM#2 AD1
B ITP_BPM#3 BPM2# 0.1U_0603_25V7K D Q19 B
AC4
P
BPM3# H_DSTBN#[0..3] <7>
2
H23 H_DSTBN#0 3 +IN G SI3456BDV-T1-E3_TSOP6
DSTBN0# <33> EN_FAN1
ITP_DBRESET# C20 M24 H_DSTBN#1 1 FAN1_ON 3 R222
<21> ITP_DBRESET# DBR# DSTBN1# OUT
H_DBSY# E1 W24 H_DSTBN#2 2 S 10K_0402_5%
<7> H_DBSY# DBSY# DSTBN2# -IN
H_DPSLP# B5 AD23 H_DSTBN#3 U15A
<20> H_DPSLP# H_DSTBP#[0..3] <7>
4
DPSLP# DSTBN3#
G
H_DPRSTP# E5 G22 H_DSTBP#0 LM358A_SO8
<20,45> H_DPRSTP#
1
H_DPWR# DPRSTP# DSTBP0# H_DSTBP#1
<7> H_DPWR# D24 N25
4
ITP_BPM#4 DPWR# DSTBP1# H_DSTBP#2
<45> H_PROCHOT# AC2 PRDY# MISC DSTBP2# Y25
ITP_BPM#5 AC1 AE24 H_DSTBP#3 JP2
PREQ# DSTBP3#
+VCCP 1 R83 2 H_PROCHOT# D21
PROCHOT# 1 2 FAN1
1
68_0402_5% R218
2
1000P_0402_50V7K
C305 10U_0805_10V4Z
H_PW RGOOD D6 100K_0402_5%
<20> H_PWRGOOD PWRGOOD 3
1
H_CPUSLP# D7 1 1
<7,20> H_CPUSLP# SLP#
1
ITP_TCK AC5 R219 ACES_85205-0300
ITP_TDI TCK H_A20M# 150K_0402_5%
AA6 TDI A20M# A6 H_A20M# <20>
ITP_TDO AB3 A5 H_FERR# D11 @
TDO FERR# H_FERR# <20> 2 2
R71 1 2 @ 1K_0402_5% TEST1 C26 C4 H_IGNNE# 1N4148_SOD80
H_IGNNE# <20>
2
R74 TEST1 IGNNE#
1 2 51_0402_5% TEST2 D25 B3 H_INIT#
H_INIT# <20>
2
TEST2 INIT#
C307
ITP_TMS AB5 C6 H_INTR
TMS LINT0 H_INTR <20>
ITP_TRST# AB6 B4 H_NMI
TRST# LINT1 H_NMI <20>
LEGACY CPU
THERMAL
H_THERMDA A24 D5 H_STPCLK#
H_THERMDC THERMDA DIODE STPCLK# H_SMI#
H_STPCLK# <20>
A25 THERMDC SMI# A3 H_SMI# <20> <33> FAN_SPEED1 1
H_THERMTRIP# C7 5
<7,20> H_THERMTRIP# THERMTRIP# +IN
7 C308
OUT 1000P_0402_50V7K
H_THERMDA, H_THERMDC routing together. 6 -IN 2
TYCO_1-1674770-2_Yonah~D U15B
Trace width / Spacing = 10 / 10 mil ME@ LM358A_SO8
A +VCCP A
+VCCP
1
R100
R73 H_DPSLP# 1 2
@ 56_0402_5% @ 56_0402_5%
R99 Security Classification Compal Secret Data Compal Electronics, Inc.
2 2
@ 56_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
E
H_PROCHOT# 3 1 OCP# AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
OCP# <21>
Q4 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
@ PMBT3904_SOT23 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 4 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
+VCCP +CPU_CORE
Length match within 25 mils JP1B JP1C
D D
The trace width 18 mils space
1
<45> VCCSENSE VCCSENSE AF7 AB26 AE18 K1
VCCSENSE VSS VCC VSS
+CPU_CORE 7 mils <45> VSSENSE VSSENSE AE7 VSSSENSE VSS AA25 AE17 VCC VSS J2
R69 R93 AD25 AB15 M2
+CPU_GTLREF 1K_0402_1% 100_0402_1% VSS VCC VSS
VSS AE26 AA15 VCC VSS N1
1 2 VCCSENSE B26 AB23 AD15 T1
2
+1.5VS VCCA VSS VCC VSS
0.01U_0402_16V7K
VSS AC24 AC15 VCC VSS R2
10U_0805_10V4Z
R94 K6 AF24 AF15 V2
100_0402_1% +VCCP VCCP VSS VCC VSS
J6 VCCP VSS AE23 AE15 VCC VSS W1
1
C132
C122
N6 AD22 AA13 D26
R62
2K_0402_1%
T6
VCCP
VCCP
YONAH VSS
VSS AC21 AD14
VCC
VCC
VSS
VSS C25
R6 VCCP VSS AF21 AC13 VCC VSS F25
2 2
K21 AB19 AF14 B24
2
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
R72
R102
R104
TYCO_1-1674770-2_Yonah~D TYCO_1-1674770-2_Yonah~D
ME@ ME@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 5 of 47
5 4 3 2 1
5 4 3 2 1
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D +CPU_CORE D
1 1 1 1 1 1 1 1
Place these capacitors on L8 C318 C326 C151 C171 C346 C169 C187 C184
(North side,Secondary Layer) 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
2 2 2 2 2 2 2 2
+CPU_CORE
1 1 1 1 1 1 1 1
Place these capacitors on L8 C325 C186 C341 C178 C316 C185 C166 C342
(North side,Secondary Layer) 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
2 2 2 2 2 2 2 2
+CPU_CORE
1 1 1 1 1 1 1 1
Place these capacitors on L8 C183 C170 C334 C319 C172 C333 C181 C176
(Sorth side,Secondary Layer) 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
2 2 2 2 2 2 2 2
C C
+CPU_CORE
1 1 1 1 1 1 1 1
Place these capacitors on L8 C150 C165 C345 C173 C179 C177 C317 C182
(Sorth side,Secondary Layer) 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
2 2 2 2 2 2 2 2
+CPU_CORE
330U_V_2.5VK_R9
330U_V_2.5VK_R9
330U_V_2.5VK_R9
330U_V_2.5VK_R9
330U_V_2.5VK_R9
1 1 1 1 1 1
C180
C175
C339
C320
C343
+ + + + + + North Side Secondary
South Side Secondary
@ @
2 2 2 2 2 2
B B
+VCCP
1
1 1 1 1 1 1
C109 + Place these inside
C190 C136 C138 C137 C189 C188 socket cavity on L8
220U_D2_4VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z (North side
2 2 2 2 2 2 2 Secondary)
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 6 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net U14
DMI
H_D#10 K7 D9 H_A#13 DMI_TXP3 AG39 G16 CFG9
HD10# HA13# <21> DMI_TXP3 DMIRXP3 CFG9 CFG9 <11>
H_D#11 J8 J14 H_A#14 E16 CFG10 PAD T5
H_D#12 HD11# HA14# H_A#15 CFG10 CFG11
H4 HD12# HA15# H13 CFG11 D15 CFG11 <11>
H_D#13 J3 J15 H_A#16 DMI_RXN0 AE37 G15 CFG12
HD13# HA16# <21> DMI_RXN0 DMITXN0 CFG12 CFG12 <11>
H_D#14 K11 F14 H_A#17 DMI_RXN1 AF41 K15 CFG13
HD14# HA17# <21> DMI_RXN1 DMITXN1 CFG13 CFG13 <11>
CFG
H_D#15 G4 D12 H_A#18 DMI_RXN2 AG37 C15 CFG14 PAD T2
HD15# HA18# <21> DMI_RXN2 DMITXN2 CFG14
H_D#16 T10 A11 H_A#19 DMI_RXN3 AH41 H16 CFG15 PAD T8
HD16# HA19# <21> DMI_RXN3 DMITXN3 CFG15
H_D#17 W11 C11 H_A#20 G18 CFG16
HD17# HA20# CFG16 CFG16 <11>
H_D#18 T3 A12 H_A#21 H15 CFG17 PAD T1
H_D#19 HD18# HA21# H_A#22 DMI_RXP0 CFG17 CFG18
U7 HD19# HA22# A13 <21> DMI_RXP0 AC37 DMITXP0 CFG18 J25 CFG18 <11>
H_D#20 U9 E13 H_A#23 DMI_RXP1 AE41 K27 CFG19
HD20# HA23# <21> DMI_RXP1 DMITXP1 CFG19 CFG19 <11>
H_D#21 U11 G13 H_A#24 DMI_RXP2 AF37 J26 CFG20
HD21# HA24# <21> DMI_RXP2 DMITXP2 CFG20 CFG20 <11>
H_D#22 T11 F12 H_A#25 DMI_RXP3 AG41
HD22# HA25# <21> DMI_RXP3 DMITXP3
H_D#23 W9 B12 H_A#26
H_D#24 HD23# HA26# H_A#27
T1 HD24# HA27# B14 G_CLKP AG33 CLK_MCH_3GPLL CLK_MCH_3GPLL <15>
H_D#25 T8 C12 H_A#28 M_CLK_DDR0 AY35 AF33 CLK_MCH_3GPLL#
HD25# HA28# <13> M_CLK_DDR0 SM_CK0 G_CLKN CLK_MCH_3GPLL# <15>
H_D#26 T4 A14 H_A#29 M_CLK_DDR1 AR1
HD26# HA29# <13> M_CLK_DDR1 SM_CK1
H_D#27 W7 C14 H_A#30 M_CLK_DDR2 AW7 A27 CLK_MCH_DREFCLK#
CLK
HD27# HA30# <14> M_CLK_DDR2 SM_CK2 D_REF_CLKN CLK_MCH_DREFCLK# <15>
H_D#28 U5 D14 H_A#31 M_CLK_DDR3 AW40 A26 CLK_MCH_DREFCLK
HD28# HA31# <14> M_CLK_DDR3 SM_CK3 D_REF_CLKP CLK_MCH_DREFCLK <15>
H_D#29 T9
H_D#30 HD29# M_CLK_DDR#0
W6 HD30# <13> M_CLK_DDR#0 AW35 SM_CK0# D_REF_SSCLKN C40 MCH_SSCDREFCLK# CLK_MCH_SSCDREFCLK# <15>
H_D#31 T5 M_CLK_DDR#1 AT1 D41 MCH_SSCDREFCLK
H_D#32 AB7
HD31#
HD32#
HOST HREQ#0 D8 H_REQ#0
H_REQ#[0..4] <4> <13>
<14>
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#2 AY7
SM_CK1#
SM_CK2#
D_REF_SSCLKP CLK_MCH_SSCDREFCLK <15>
H_D#33 AA9 G8 H_REQ#1 M_CLK_DDR#3 AY40 H32 MCH_CLKREQ#
HD33# HREQ#1 <14> M_CLK_DDR#3 SM_CK3# CLK_REQ# MCH_CLKREQ# <15>
H_D#34 W4 B8 H_REQ#2
H_D#35 HD34# HREQ#2 H_REQ#3 DDR_CKE0_DIMMA
W3 HD35# HREQ#3 F8 <13> DDR_CKE0_DIMMA AU20 SM_CKE0
DDR MUXING
H_D#36 Y3 A8 H_REQ#4 DDR_CKE1_DIMMA AT20
HD36# HREQ#4 <13> DDR_CKE1_DIMMA SM_CKE1
H_D#37 Y7 DDR_CKE2_DIMMB BA29 A3
C HD37# <14> DDR_CKE2_DIMMB SM_CKE2 NC0 C
H_D#38 W5 DDR_CKE3_DIMMB AY29 A39
HD38# <14> DDR_CKE3_DIMMB SM_CKE3 NC1
H_D#39 Y10 B9 H_ADSTB#0 A4
HD39# HADSTB#0 H_ADSTB#0 <4> NC2
H_D#40 AB8 C13 H_ADSTB#1 DDR_CS0_DIMMA# AW13 A40
HD40# HADSTB#1 H_ADSTB#1 <4> <13> DDR_CS0_DIMMA# SM_CS0# NC3
H_D#41 W2 DDR_CS1_DIMMA# AW12 AW1
HD41# <13> DDR_CS1_DIMMA# SM_CS1# NC4
H_D#42 AA4 AG1 CLK_MCH_BCLK# DDR_CS2_DIMMB# AY21 AW41
HD42# HCLKN CLK_MCH_BCLK# <15> <14> DDR_CS2_DIMMB# SM_CS2# NC5
H_D#43 AA7 AG2 CLK_MCH_BCLK DDR_CS3_DIMMB# AW21 AY1
HD43# HCLKP CLK_MCH_BCLK <15> <14> DDR_CS3_DIMMB# SM_CS3# NC6
H_D#44 AA2 BA1
NC
HD44# H_DSTBN#[0..3] <4> NC7
H_D#45 AA6 K4 H_DSTBN#0 M_OCDOCMP0 AL20 BA2
H_D#46 HD45# HDSTBN#0 H_DSTBN#1 M_OCDOCMP1 SM_OCDCOMP0 NC8
AA10 HD46# HDSTBN#1 T7 AF10 SM_OCDCOMP1 NC9 BA3
H_D#47 Y8 Y5 H_DSTBN#2 BA39
H_D#48 HD47# HDSTBN#2 H_DSTBN#3 M_ODT0 NC10
AA1 HD48# HDSTBN#3 AC4 H_DSTBP#[0..3] <4> <13> M_ODT0 BA13 SM_ODT0 NC11 BA40
H_D#49 H_DSTBP#0 +1.8V M_ODT1
AB4 HD49# HDSTBP#0 K3 <13> M_ODT1 BA12 SM_ODT1 NC12 BA41
H_D#50 AC9 T6 H_DSTBP#1 M_ODT2 AY20 C1
HD50# HDSTBP#1 <14> M_ODT2 SM_ODT2 NC13
H_D#51 AB11 AA5 H_DSTBP#2 M_ODT3 AU21 AY41
HD51# HDSTBP#2 <14> M_ODT3 SM_ODT3 NC14
H_D#52 AC11 AC5 H_DSTBP#3 B2
H_D#53 HD52# HDSTBP#3 R29 SMRCOMPN NC15
AB3 HD53# 1 2 80.6_0402_1% AV9 SM_RCOMPN NC16 B41
+VCCP H_D#54 AC2 1 2 SMRCOMPP AT9 C41
H_D#55 HD54# H_DINV#0 R28 80.6_0402_1% SM_RCOMPP NC17
AD1 HD55# HDINV#0 J7 H_DINV#0 <4> NC18 D1
H_D#56 AD9 W8 H_DINV#1 AK1
HD56# HDINV#1 H_DINV#1 <4> SM_VREF0
H_D#57 AC1 U3 H_DINV#2 +DDR_MCH_REF AK41
HD57# HDINV#2 H_DINV#2 <4> SM_VREF1
54.9_0402_1%
54.9_0402_1%
R27
RESERVED
PM
H_D#62 AD4 E8 H_ADS# 2 1 PM_EXTTS#1 H26 PM_EXTTS1# AG11
HD62# HADS# H_ADS# <4> <21,45> DPRSLPVR RESERVED5
H_D#63 AC8 E7 H_TRDY# <4,20> H_THERMTRIP# H_THERMTRIP# G6 PM_THERMTRIP# AF11
H_TRDY# <4>
2
24.9_0402_1%
+DDR_MCH_REF
1
R20
B4 H_RS#0
HRS0# H_RS#1
HRS1# E6 spacing is 20/20.
D6 H_RS#2 +3VS
HRS2#
H_RS#[0..2] <4>
2
CALISTOGA_FCBGA1466~D +1.8V
UMA@
R46
1
10K_0402_5%
R25 PM_EXTTS#0 2 1
2
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 / +DDR_MCH_REF PM_EXTTS#1 2 1
0.1U_0402_16V4Z
100_0402_1% @ 40.2_0402_1%
+VCCP M_OCDOCMP0 2 1
2
2
221_0603_1%
221_0603_1%
1
1
100_0402_1%
R31
1
R22
R18
@ 40.2_0402_1%
R30
M_OCDOCMP1 2 1
A A
2
+H_SWNG0 +H_SWNG1
2
+H_VREF
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
100_0402_1%
100_0402_1%
0.1U_0402_16V4Z
1 1
1
200_0402_1%
R24
R19
1
R36
C26
C19
C11
2
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 7 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
D D
U14D U14E
DDR_A_D[0..63] <13> DDR_B_D[0..63] <14>
DDR_A_BS#0 AU12 AJ35 DDR_A_D0 DDR_B_BS#0 AT24 AK39 DDR_B_D0
<13> DDR_A_BS#0 SA_BS0 SA_DQ0 <14> DDR_B_BS#0 SB_BS0 SB_DQ0
DDR_A_BS#1 AV14 AJ34 DDR_A_D1 DDR_B_BS#1 AV23 AJ37 DDR_B_D1
<13> DDR_A_BS#1 SA_BS1 SA_DQ1 <14> DDR_B_BS#1 SB_BS1 SB_DQ1
DDR_A_BS#2 BA20 AM31 DDR_A_D2 DDR_B_BS#2 AY28 AP39 DDR_B_D2
<13> DDR_A_BS#2 SA_BS2 SA_DQ2 <14> DDR_B_BS#2 SB_BS2 SB_DQ2
AM33 DDR_A_D3 AR41 DDR_B_D3
SA_DQ3 DDR_A_D4 SB_DQ3 DDR_B_D4
SA_DQ4 AJ36 SB_DQ4 AJ38
<13> DDR_A_DM[0..7] AK35 DDR_A_D5 <14> DDR_B_DM[0..7] AK38 DDR_B_D5
DDR_A_DM0 SA_DQ5 DDR_A_D6 DDR_B_DM0 SB_DQ5 DDR_B_D6
AJ33 SA_DM0 SA_DQ6 AJ32 AK36 SB_DM0 SB_DQ6 AN41
DDR_A_DM1 AM35 AH31 DDR_A_D7 DDR_B_DM1 AR38 AP41 DDR_B_D7
DDR_A_DM2 SA_DM1 SA_DQ7 DDR_A_D8 DDR_B_DM2 SB_DM1 SB_DQ7 DDR_B_D8
AL26 SA_DM2 SA_DQ8 AN35 AT36 SB_DM2 SB_DQ8 AT40
DDR_A_DM3 AN22 AP33 DDR_A_D9 DDR_B_DM3 BA31 AV41 DDR_B_D9
DDR_A_DM4 SA_DM3 SA_DQ9 DDR_A_D10 DDR_B_DM4 SB_DM3 SB_DQ9 DDR_B_D10
AM14 SA_DM4 SA_DQ10 AR31 AL17 SB_DM4 SB_DQ10 AU38
DDR_A_DM5 AL9 AP31 DDR_A_D11 DDR_B_DM5 AH8 AV38 DDR_B_D11
DDR_A_DM6 SA_DM5 SA_DQ11 DDR_A_D12 DDR_B_DM6 SB_DM5 SB_DQ11 DDR_B_D12
AR3 SA_DM6 SA_DQ12 AN38 BA5 SB_DM6 SB_DQ12 AP38
DDR_A_DM7 AH4 AM36 DDR_A_D13 DDR_B_DM7 AN4 AR40 DDR_B_D13
SA_DM7 SA_DQ13 DDR_A_D14 SB_DM7 SB_DQ13 DDR_B_D14
SA_DQ14 AM34 SB_DQ14 AW38
AN33 DDR_A_D15 AY38 DDR_B_D15
SA_DQ15 DDR_A_D16 SB_DQ15 DDR_B_D16
SA_DQ16 AK26 SB_DQ16 BA38
<13> DDR_A_DQS[0..7] AL27 DDR_A_D17 <14> DDR_B_DQS[0..7] AV36 DDR_B_D17
DDR_A_DQS0 SA_DQ17 DDR_A_D18 DDR_B_DQS0 SB_DQ17 DDR_B_D18
AK33 SA_DQS0 SA_DQ18 AM26 AM39 SB_DQS0 SB_DQ18 AR36
DDR_A_DQS1 AT33 AN24 DDR_A_D19 DDR_B_DQS1 AT39 AP36 DDR_B_D19
DDR_A_DQS2 SA_DQS1 SA_DQ19 DDR_A_D20 DDR_B_DQS2 SB_DQS1 SB_DQ19 DDR_B_D20
AN28 AK28 AU35 BA36
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 8 of 47
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5 4 3 2 1
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D D
R54 +1.5VS_PCIE
U14C 24.9_0402_1%
H27 D40 PEGCOMP 1 2
SDVOCTRL_DATA EXP_COMPI
H28 SDVOCTRL_CLK EXP_COMPO D38 PEG_RXN[0..15] <18>
F34 PEG_RXN0
LVDSA0+ EXP_RXN0 PEG_RXN1
<37> LVDSA0+ B37 LA_DATA0 EXP_RXN1 G38
LVDSA1+ B34 H34 PEG_RXN2
<37> LVDSA1+ LA_DATA1 EXP_RXN2
LVDSA2+ A36 J38 PEG_RXN3
<37> LVDSA2+ LA_DATA2 EXP_RXN3
L34 PEG_RXN4
LVDSA0- EXP_RXN4 PEG_RXN5
C37 LA_DATA#0 EXP_RXN5 M38
<37> LVDSA0- LVDSA1- PEG_RXN6
<37> LVDSA1- B35 LA_DATA#1 EXP_RXN6 N34
LVDSA2- A37 P38 PEG_RXN7
<37> LVDSA2- LA_DATA#2 EXP_RXN7
R34 PEG_RXN8
LVDSB0+ EXP_RXN8 PEG_RXN9
<37> LVDSB0+ F30 LB_DATA0 EXP_RXN9 T38
LVDSB1+ PEG_RXN10
LVDS
<37> LVDSB1+ D29 LB_DATA1 EXP_RXN10 V34
LVDSB2+ F28 W38 PEG_RXN11
<37> LVDSB2+ LB_DATA2 EXP_RXN11 PEG_RXN12
EXP_RXN12 Y34
LVDSB0- G30 AA38 PEG_RXN13
<37> LVDSB0- LB_DATA#0 EXP_RXN13
LVDSB1- D30 AB34 PEG_RXN14
<37> LVDSB1- LB_DATA#1 EXP_RXN14
LVDSB2- F29 AC38 PEG_RXN15
<37> LVDSB2- LB_DATA#2 EXP_RXN15 PEG_RXP[0..15] <18>
LVDSAC+ A32 D34 PEG_RXP0
<37> LVDSAC+ LA_CLK EXP_RXP0
LVDSAC- A33 F38 PEG_RXP1
<37> LVDSAC- LVDSBC+ LA_CLK# EXP_RXP1 PEG_RXP2
<37> LVDSBC+ E26 LB_CLK EXP_RXP2 G34
LVDSBC- E27 H38 PEG_RXP3
<37> LVDSBC- LB_CLK# EXP_RXP3
J34 PEG_RXP4
PCI-EXPRESS GRAPHICS
EXP_RXP4 PEG_RXP5
D32 LBKLT_CTL EXP_RXP5 L38
C GMCH_ENBKL PEG_RXP6 C
<16> GMCH_ENBKL J30 LBKLT_EN EXP_RXP6 M34
H30 N38 PEG_RXP7
LCTLA_CLK EXP_RXP7 PEG_RXP8
H29 LCTLB_DATA EXP_RXP8 P34
LDDC_CLK G26 R38 PEG_RXP9
LDDC_DATA LDDC_CLK EXP_RXP9 PEG_RXP10
G25 LDDC_DATA EXP_RXP10 T34
<16> GMCH_LVDDEN GMCH_LVDDEN F32 V38 PEG_RXP11
LVDD_EN EXP_RXP11 PEG_RXP12
2 1 B38 LIBG EXP_RXP12 W34
R53 1.5K_0402_1% C35 Y38 PEG_RXP13
LVBG EXP_RXP13 PEG_RXP14
C33 LVREFH EXP_RXP14 AA34
C32 AB38 PEG_RXP15 PEG_M_TXN[0..15] <18>
LVREFL EXP_RXP15
2 1 TV_COMPS F36 PEG_TXN0 C153 VGA@ 0.1U_0402_16V4Z PEG_M_TXN0
R207 UMA@ 150_0603_1% TV_COMPS EXP_TXN0 PEG_TXN1 C124 VGA@ 0.1U_0402_16V4Z PEG_M_TXN1
<17> TV_COMPS A16 TVDAC_A EXP_TXN1 G40
2 1 TV_LUMA <17> TV_LUMA TV_LUMA C18 H36 PEG_TXN2 C142 VGA@ 0.1U_0402_16V4Z PEG_M_TXN2
R208 UMA@ 150_0603_1% TV_CRMA TVDAC_B EXP_TXN2 PEG_TXN3 C115 VGA@ 0.1U_0402_16V4Z PEG_M_TXN3
<17> TV_CRMA A19 TVDAC_C EXP_TXN3 J40
TV
2 1 TV_CRMA L36 PEG_TXN4 C155 VGA@ 0.1U_0402_16V4Z PEG_M_TXN4
R209 UMA@ 150_0603_1% EXP_TXN4
2 R42 1 J20 TV_IREF EXP_TXN5 M40 PEG_TXN5 C126 VGA@ 0.1U_0402_16V4Z PEG_M_TXN5
4.99K_0402_1% N36 PEG_TXN6 C148 VGA@ 0.1U_0402_16V4Z PEG_M_TXN6
EXP_TXN6 PEG_TXN7 C117 VGA@ 0.1U_0402_16V4Z PEG_M_TXN7
B16 TV_IRTNA EXP_TXN7 P40
B18 R36 PEG_TXN8 C157 VGA@ 0.1U_0402_16V4Z PEG_M_TXN8
TV_IRTNB EXP_TXN8 PEG_TXN9 C128 VGA@ 0.1U_0402_16V4Z PEG_M_TXN9
B19 TV_IRTNC EXP_TXN9 T40
V36 PEG_TXN10 C140 VGA@ 0.1U_0402_16V4Z PEG_M_TXN10
EXP_TXN10 PEG_TXN11 C119 VGA@ 0.1U_0402_16V4Z PEG_M_TXN11
J29 TV_DCONSEL1 EXP_TXN11 W40
K30 Y36 PEG_TXN12 C159 VGA@ 0.1U_0402_16V4Z PEG_M_TXN12
TV_DCONSEL0 EXP_TXN12 PEG_TXN13 C130 VGA@ 0.1U_0402_16V4Z PEG_M_TXN13
EXP_TXN13 AA40
AB36 PEG_TXN14 C144 VGA@ 0.1U_0402_16V4Z PEG_M_TXN14
EXP_TXN14 PEG_TXN15 C121 VGA@ 0.1U_0402_16V4Z PEG_M_TXN15
EXP_TXN15 AC40 PEG_M_TXP[0..15] <18>
3VDDCCL C26
<17> 3VDDCCL DDCCLK
CRT
CALISTOGA_FCBGA1466~D
UMA@
+2.5VS +3VS
2.2K_0402_5%
2.2K_0402_5%
1
1
UMA@
R215
R216
R214 R217
UMA@
2.2K_0402_5% 2.2K_0402_5%
UMA@ UMA@
2
2
S
LDDC_CLK 3 1 EDID_CLK_LCD
EDID_CLK_LCD <37>
Q18
BSS138_SOT23
UMA@
G
2
A A
+2.5VS
2
G
LDDC_DATA 3 1 EDID_DAT_LCD
EDID_DAT_LCD <37>
S
Q17
BSS138_SOT23
UMA@ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 9 of 47
5 4 3 2 1
5 4 3 2 1
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+VCCP
2
D13 +2.5VS
D D
@ CH751H-40_SC76 U14H
1 1
+VCCP H22 1 2
VCC_SYNC C306
R221 +2.5VS AC14 0.1U_0402_16V4Z
VTT0
AB14 VTT1 VCCTX_LVDS0 B30 +2.5VS
@ 10_0402_5% W14 C30
VTT2 VCCTX_LVDS1 +1.5VS_PCIE R57
V14 A30
2
10U_1206_6.3V6M
10U_1206_6.3V6M
P14 VTT6 VCC3G1 AJ41
+1.5VS
220U_D2_4VM
N14 VTT7 VCC3G2 L41 1
M14 VTT8 VCC3G3 N41 1 1
C108
L14 R41 +
VTT9 VCC3G4
2
+2.5VS
C107
C105
0.1U_0402_16V4Z
AD13 VTT10 VCC3G5 V41
220U_D2_4VM
C99
Y13 G41 +2.5VS
1 1
VTT14 VCCA_3GBG
C91
+ W13 H41
VTT15 VSSA_3GBG 2 +1.5VS_DPLLA +1.5VS_DPLLB
V13 VTT16
R220 +3VS U13 L4 FBM-11-160808-601-T_0603 L16 L5
2 VTT17 +2.5VS_CRTDAC
T13 VTT18 VCCA_CRTDAC0 E21 1 2 +2.5VS 1 2 +1.5VS 1 2 +1.5VS
2200P_0402_50V7K
@ 10_0402_5% R13 F21 FBM-L10-160808-301-T_0603 FBM-L10-160808-301-T_0603
VTT19 VCCA_CRTDAC1
0.1U_0402_16V4Z
330U_D2E_2.5VM
UMA@ C300
0.1U_0402_16V4Z
330U_D2E_2.5VM
UMA@ C100
0.1U_0402_16V4Z
N13 G21 close pin G41
2
VTT20 VSSA_CRTDAC2
M13 VTT21 1 1 1 1
L13 VTT22 1 1
C72
C71
C82
C101
+ +
AB12 VTT23 VCCA_DPLLA B26 +1.5VS_DPLLA CRTDAC: Route caps within
AA12 VTT24 VCCA_DPLLB C39 +1.5VS_DPLLB
Y12 VTT25 VCCA_HPLL AF1 +1.5VS_HPLL
2 2 250mil of Alviso. Route FB
W12 2 2 2 2
VTT26 within 3" of Calistoga
V12 VTT27
U12 VTT28 VCCA_LVDS A38 +2.5VS
T12 VTT29 VSSA_LVDS B39
C
R12 VTT30 C
P12 +2.5VS
VTT31
N12 AF2
M12
VTT32
VTT33
P O W E R VCCA_MPLL +1.5VS_MPLL
+3VS_TVDACA +3VS_TVDACA +3VS_TVDACA +3VS
0.01U_0402_16V7K
4.7U_0805_10V4Z
2.2U_0805_16V4Z
0.1U_0402_16V4Z
L12 VTT34 VCCA_TVBG H20 +3VS_TVBG
R11 G20 R206
VTT35 VSSA_TVBG
1 1 P11 VTT36 2 1
C24
C50
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
N11 1 1 0_0603_5%
VTT37
C304
C102
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M11 VTT38 VCCA_TVDACA0 E19 +3VS_TVDACA
R10 VTT39 VCCA_TVDACA1 F19 1 1 1 1 1 1
2 2
P10 VTT40 VCCA_TVDACB0 C20 +3VS_TVDACA 2 2
C55
C54
C58
C45
C46
C297
N10 VTT41 VCCA_TVDACB1 D20
M10 VTT42 VCCA_TVDACC0 E20 +3VS_TVDACA 2 2 2 2 2 2
P9 VTT43 VCCA_TVDACC1 F20
N9 VTT44
M9 VTT45 close pin A38
R8 VTT46 VCCD_HMPLL0 AH1 +1.5VS
P8 VTT47 VCCD_HMPLL1 AH2
N8 VTT48
M8 +3VS_TVBG +3VS
VTT49 R205
P7 VTT50 VCCD_LVDS0 A28
N7 VTT51 VCCD_LVDS1 B28 2 1
M7 C28 0_0805_5%
VTT52 VCCD_LVDS2
2200P_0402_50V7K
0.1U_0402_16V4Z
R6 VTT53
P6 VTT54 VCCD_TVDAC D21 +1.5VS_TVDAC 1 1
M6 VTT55 VCCDQ_TVDAC H19
C49
MCH_A6 A6 VTT56
C63
0.47U_0603_10V7K
10U_1206_6.3V6M
M5 VTT60 1 1
P4 VTT61 VCCAUX0 AK31
N4 VTT62 VCCAUX1 AF31
2
C302
C298
2200P_0402_50V7K
0.1U_0402_16V4Z
10U_1206_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R1 AC30
MCH_AB1
2 VTT73 VCCAUX12
C299
C97
C98
C67
C37
C104
C301
VCCAUX16 AD29
2
1 VCCAUX17 AC29
2 2 2 2 2 2
C10
VCCAUX18 AG28
VCCAUX19 AF28
AE28 @ @
2 VCCAUX20
VCCAUX21 AH22
VCCAUX22 AJ21
AG14 VCCAUX32 VCCAUX23 AH21
AF14 VCCAUX33 VCCAUX24 AJ20
AE14 VCCAUX34 VCCAUX25 AH20
Y14 VCCAUX35 VCCAUX26 AH19
+1.5VS_MPLL R16 +1.5VS_HPLL R17
AF13 VCCAUX36 VCCAUX27 P19
AE13 P16 0_0603_5% 0_0603_5%
+1.5VS VCCAUX37 VCCAUX28
AF12 VCCAUX38 VCCAUX29 AH15 45mA Max. 2 1 +1.5VS 45mA Max. 2 1 +1.5VS
AE12 VCCAUX39 VCCAUX30 P15
0.1U_0402_16V4Z
10U_1206_6.3V6M
0.1U_0402_16V4Z
10U_1206_6.3V6M
AD12 VCCAUX40 VCCAUX31 AH14
1 1 1 1
CALISTOGA_FCBGA1466~D
C13
C14
C8
C9
UMA@
2 2 2 2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
Size Document Number Re v
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: ¬P期三, 七月 12, 2006 Sheet 10 of 47
5 4 3 2 1
5 4 3 2 1
AD27 VCC_NCTF0 VCCAUX_NCTF0 AG27 AA33 VCC0 VCC_SM0 AU41 011 = 667MT/s FSB
AC27 AF27 W33 AT41 MCH_AT41 CFG[2:0] 001 = 533MT/s FSB
VCC_NCTF1 VCCAUX_NCTF1 VCC1 VCC_SM1 MCH_AM41
AB27 VCC_NCTF2 VCCAUX_NCTF2 AG26 P33 VCC2 VCC_SM2 AM41
AA27 VCC_NCTF3 VCCAUX_NCTF3 AF26 N33 VCC3 VCC_SM3 AU40 0 = DMI x 2
0.47U_0603_10V7K
0.47U_0603_10V7K
Y27 VCC_NCTF4 VCCAUX_NCTF4 AG25 L33 VCC4 VCC_SM4 BA34 CFG5 1 = DMI x 4 *(Default)
W27 VCC_NCTF5 VCCAUX_NCTF5 AF25 J33 VCC5 VCC_SM5 AY34
V27 VCC_NCTF6 VCCAUX_NCTF6 AG24 AA32 VCC6 VCC_SM6 AW34 1 1 0 = Reserved
C106
D D
U27 VCC_NCTF7 VCCAUX_NCTF7 AF24 Y32 VCC7 VCC_SM7 AV34 CFG7 1 = Mobile Yonah CPU*(Default)
C103
T27 VCC_NCTF8 VCCAUX_NCTF8 AG23 W32 VCC8 VCC_SM8 AU34
0.22U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
C61
C25
AA26 VCC_NCTF13 VCCAUX_NCTF13 AF21 L32 VCC13 VCC_SM13 AW30 CFG6 0 = Reserved
Y26 VCC_NCTF14 VCCAUX_NCTF14 AG20 J32 VCC14 VCC_SM14 AV30
2 2 2
W26 VCC_NCTF15 VCCAUX_NCTF15 AF20 AA31 VCC15 VCC_SM15 AU30 PSB 4X CLK Enable 1 = Calistoga *
V26 VCC_NCTF16 VCCAUX_NCTF16 AG19 W31 VCC16 VCC_SM16 AT30
U26 VCC_NCTF17 VCCAUX_NCTF17 AF19 V31 VCC17 VCC_SM17 AR30 Place near pin AT41 & AM41
T26 VCC_NCTF18 VCCAUX_NCTF18 R19 T31 VCC18 VCC_SM18 AP30 00 = Reserved
R26 VCC_NCTF19 VCCAUX_NCTF19 AG18 R31 VCC19 VCC_SM19 AN30 CFG[13:12] 01 = XOR Mode Enabled
AD25 VCC_NCTF20 VCCAUX_NCTF20 AF18 P31 VCC20 VCC_SM20 AM30 10 = All Z Mode Enabled
AC25 VCC_NCTF21 VCCAUX_NCTF21 R18 N31 VCC21 VCC_SM21 AM29 11 = Normal Operation *(Default)
AB25 VCC_NCTF22 VCCAUX_NCTF22 AG17 M31 VCC22 VCC_SM22 AL29
AA25 VCC_NCTF23 VCCAUX_NCTF23 AF17 AA30 VCC23 VCC_SM23 AK29 0 = Dynamic ODT Disabled
Y25 VCC_NCTF24 VCCAUX_NCTF24 AE17 Y30 VCC24 VCC_SM24 AJ29 CFG16 1 = Dynamic ODT Enabled *(Default)
W25 VCC_NCTF25 VCCAUX_NCTF25 AD17 W30 VCC25 VCC_SM25 AH29
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
V25 VCC_NCTF26 VCCAUX_NCTF26 AB17 V30 VCC26 VCC_SM26 AJ28 10 = 1.05V*(Default)
U25 VCC_NCTF27 VCCAUX_NCTF27 AA17 U30 VCC27 VCC_SM27 AH28 CFG10 CFG18 01 = 1.5V
1U_0603_10V4Z
10U_1206_6.3V6M
10U_1206_6.3V6M
C21
C20
C86
C47
1 1 1 AD24 VCC_NCTF30 VCCAUX_NCTF30 T17 P30 VCC30 VCC_SM30 BA26 CFG19 1 = DMI Lane Reversal Enable
AC24 VCC_NCTF31 VCCAUX_NCTF31 R17 N30 VCC31 VCC_SM31 AY26
2 2 2 2
C48
C95
C31
AB24 VCC_NCTF32 VCCAUX_NCTF32 AG16 M30 VCC32 P O W E R VCC_SM32 AW26 0 = No SDVO Device Present *
2 2 2
AA24 VCC_NCTF33 VCCAUX_NCTF33 AF16 L30 VCC33 VCC_SM33 AV26 (Default)
Y24 VCC_NCTF34 VCCAUX_NCTF34 AE16 AA29 VCC34 VCC_SM34 AU26 SDVO_CTRLDATA
W24 VCC_NCTF35 VCCAUX_NCTF35 AD16 Y29 VCC35 VCC_SM35 AT26 1 = SDVO Device Present
V24 VCC_NCTF36 VCCAUX_NCTF36 AC16 W29 VCC36 VCC_SM36 AR26
U24 VCC_NCTF37 VCCAUX_NCTF37 AB16 V29 VCC37 VCC_SM37 AJ26
C
T24 VCC_NCTF38 VCCAUX_NCTF38 AA16 U29 VCC38 VCC_SM38 AH26 0 = Only PCIE or SDVO is C
R24 VCC_NCTF39 VCCAUX_NCTF39 Y16 R29 VCC39 VCC_SM39 AJ25 CFG20 operational. *(Default)
AD23 VCC_NCTF40 VCCAUX_NCTF40 W16 P29 VCC40 VCC_SM40 AH25
V23 VCC_NCTF41 VCCAUX_NCTF41 V16 M29 VCC41 VCC_SM41 AJ24 (PCIE/SDVO select) 1 = PCIE/SDVO are operating
U23 U16 L29 AH24
T23
VCC_NCTF42 VCCAUX_NCTF42
T16 AB28
VCC42 VCC_SM42
BA23 simu.
VCC_NCTF43 VCCAUX_NCTF43 VCC43 VCC_SM43
R23 VCC_NCTF44 VCCAUX_NCTF44 R16 AA28 VCC44 VCC_SM44 AJ23
0.47U_0603_10V7K
220U_D2_4VM
C27
+ R22 AC15 R28 AU22
VCC_NCTF49 VCCAUX_NCTF49 VCC49 VCC_SM49
C18
@ 220U_D2_4M_R45
10U_1206_6.3V6M
10U_1206_6.3V6M
R20 N26 AW19 R34 1 2 @ 2.2K_0402_5%
VCC_NCTF59 VCC59 VCC_SM59 <7> CFG12
AD19 VCC_NCTF60 VSS_NCTF0 AE27 L26 VCC60 VCC_SM60 AV19 1
V19 AE26 N25 AU19 1 1 R38 1 2 @ 2.2K_0402_5%
VCC_NCTF61 VSS_NCTF1 VCC61 VCC_SM61 + <7> CFG13
U19 VCC_NCTF62 VSS_NCTF2 AE25 M25 VCC62 VCC_SM62 AT19
C44
C78
C59
@ 220U_D2_4VM
0.47U_0603_10V7K
AC22 AW15 R48 1 2 @ 1K_0402_5%
+1.8V VCC74 VCC_SM74 <7> CFG18
M19 AB22 AV15 R50 1 2 @ 1K_0402_5%
VCC100 VCC75 VCC_SM75 <7> CFG19
L19 AR6 Y22 AU15 1 R51 1 2 @ 1K_0402_5%
VCC101 VCC_SM100 VCC76 VCC_SM76 <7> CFG20
N18 VCC102 VCC_SM101 AP6 W22 VCC77 VCC_SM77 AT15
C93
M18 VCC103 VCC_SM102 AN6 P22 VCC78 VCC_SM78 AR15
L18 VCC104 VCC_SM103 AL6 N22 VCC79 VCC_SM79 AJ15
2
P17 VCC105 VCC_SM104 AK6 M22 VCC80 VCC_SM80 AJ14
N17 VCC106 VCC_SM105 AJ6 L22 VCC81 VCC_SM81 AJ13
M17 VCC107 VCC_SM106 AV1 AC21 VCC82 VCC_SM82 AH13
N16 VCC108 VCC_SM107 AJ1 AA21 VCC83 VCC_SM83 AK12
M16 VCC109 W21 VCC84 VCC_SM84 AJ12
0.47U_0603_10V7K
0.47U_0603_10V7K
C17
CALISTOGA_FCBGA1466~D
A A
UMA@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 11 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
U14I U14J
AC41 VSS0 VSS100 AE34 AN21 VSS200 VSS280 AG10
AA41 VSS1 VSS101 AC34 AL21 VSS201 VSS281 AC10
W41 VSS2 VSS102 C34 AB21 VSS202 VSS282 W10
T41 VSS3 VSS103 AW33 Y21 VSS203 VSS283 U10
P41 VSS4 VSS104 AV33 P21 VSS204 VSS284 BA9
M41 VSS5 VSS105 AR33 K21 VSS205 VSS285 AW9
D D
J41 VSS6 VSS106 AE33 J21 VSS206 VSS286 AR9
F41 VSS7 VSS107 AB33 H21 VSS207 VSS287 AH9
AV40 VSS8 VSS108 Y33 C21 VSS208 VSS288 AB9
AP40 VSS9 VSS109 V33 AW20 VSS209 VSS289 Y9
AN40 VSS10 VSS110 T33 AR20 VSS210 VSS290 R9
AK40 VSS11 VSS111 R33 AM20 VSS211 VSS292 G9
AJ40 VSS12 VSS112 M33 AA20 VSS212 VSS291 E9
AH40 VSS13 VSS113 H33 K20 VSS213 VSS293 A9
AG40 VSS14 VSS114 G33 B20 VSS214 VSS294 AG8
AF40 VSS15 VSS115 F33 A20 VSS215 VSS295 AD8
AE40 VSS16 VSS116 D33 AN19 VSS216 VSS296 AA8
B40 VSS17 VSS117 B33 AC19 VSS217 VSS297 U8
AY39 VSS18 VSS118 AH32 W19 VSS218 VSS298 K8
AW39 VSS19 VSS119 AG32 K19 VSS219 VSS299 C8
AV39 VSS20 VSS120 AF32 G19 VSS220 VSS300 BA7
AR39 VSS21 VSS121 AE32 C19 VSS221 VSS301 AV7
AN39 VSS22 VSS122 AC32 AH18 VSS222 VSS302 AP7
AJ39 VSS23 VSS123 AB32 P18 VSS223 VSS303 AL7
AC39 VSS24 VSS124 G32 H18 VSS224 VSS304 AJ7
AB39 VSS25 VSS125 B32 D18 VSS225 VSS305 AH7
AA39 VSS26 VSS126 AY31 A18 VSS226 VSS306 AF7
Y39 VSS27 VSS127 AV31 AY17 VSS227 VSS307 AC7
W39 VSS28 VSS128 AN31 AR17 VSS228 VSS308 R7
V39 AJ31 AP17 G7
T39
VSS29
VSS30
VSS129
VSS130 AG31 AM17
VSS229
VSS230
P O W E R VSS309
VSS310 D7
R39 VSS31 VSS131 AB31 AK17 VSS231 VSS311 AG6
P39 VSS32 VSS132 Y31 AV16 VSS232 VSS312 AD6
N39 VSS33 VSS133 AB30 AN16 VSS233 VSS313 AB6
M39 E30 AL16 Y6
L39
VSS34
VSS35
P O W E R VSS134
VSS135 AT29 J16
VSS234
VSS235
VSS314
VSS315 U6
J39 VSS36 VSS136 AN29 F16 VSS236 VSS316 N6
H39 VSS37 VSS137 AB29 C16 VSS237 VSS317 K6
C C
G39 VSS38 VSS138 T29 AN15 VSS238 VSS318 H6
F39 VSS39 VSS139 N29 AM15 VSS239 VSS319 B6
D39 VSS40 VSS140 K29 AK15 VSS240 VSS320 AV5
AT38 VSS41 VSS141 G29 N15 VSS241 VSS321 AF5
AM38 VSS42 VSS142 E29 M15 VSS242 VSS322 AD5
AH38 VSS43 VSS143 C29 L15 VSS243 VSS323 AY4
AG38 VSS44 VSS144 B29 B15 VSS244 VSS324 AR4
AF38 VSS45 VSS145 A29 A15 VSS245 VSS325 AP4
AE38 VSS46 VSS146 BA28 BA14 VSS246 VSS326 AL4
C38 VSS47 VSS147 AW28 AT14 VSS247 VSS327 AJ4
AK37 VSS48 VSS148 AU28 AK14 VSS248 VSS328 Y4
AH37 VSS49 VSS149 AP28 AD14 VSS249 VSS329 U4
AB37 VSS50 VSS150 AM28 AA14 VSS250 VSS330 R4
AA37 VSS51 VSS151 AD28 U14 VSS251 VSS331 J4
Y37 VSS52 VSS152 AC28 K14 VSS252 VSS332 F4
W37 VSS53 VSS153 W28 H14 VSS253 VSS333 C4
V37 VSS54 VSS154 J28 E14 VSS254 VSS334 AY3
T37 VSS55 VSS155 E28 AV13 VSS255 VSS335 AW3
R37 VSS56 VSS156 AP27 AR13 VSS256 VSS336 AV3
P37 VSS57 VSS157 AM27 AN13 VSS257 VSS337 AL3
N37 VSS58 VSS158 AK27 AM13 VSS258 VSS338 AH3
M37 VSS59 VSS159 J27 AL13 VSS259 VSS339 AG3
L37 VSS60 VSS160 G27 AG13 VSS260 VSS340 AF3
J37 VSS61 VSS161 F27 P13 VSS261 VSS341 AD3
H37 VSS62 VSS162 C27 F13 VSS262 VSS342 AC3
G37 VSS63 VSS163 B27 D13 VSS265 VSS343 AA3
F37 VSS64 VSS164 AN26 B13 VSS264 VSS344 G3
D37 VSS65 VSS165 M26 AY12 VSS263 VSS345 AT2
AY36 VSS66 VSS166 K26 AC12 VSS266 VSS346 AR2
AW36 VSS67 VSS167 F26 K12 VSS267 VSS347 AP2
AN36 VSS68 VSS168 D26 H12 VSS268 VSS348 AK2
AH36 VSS69 VSS169 AK25 E12 VSS269 VSS349 AJ2
B B
AG36 VSS70 VSS170 P25 AD11 VSS270 VSS350 AD2
AF36 VSS71 VSS171 K25 AA11 VSS271 VSS351 AB2
AE36 VSS72 VSS172 H25 Y11 VSS272 VSS352 Y2
AC36 VSS73 VSS173 E25 J11 VSS273 VSS353 U2
C36 VSS74 VSS174 D25 D11 VSS274 VSS354 T2
B36 VSS75 VSS175 A25 B11 VSS275 VSS355 N2
BA35 VSS76 VSS176 BA24 AV10 VSS276 VSS356 J2
AV35 VSS77 VSS177 AU24 AP10 VSS277 VSS357 H2
AR35 VSS78 VSS178 AL24 AL10 VSS278 VSS358 F2
AH35 VSS79 VSS179 AW23 AJ10 VSS279 VSS359 C2
AB35 VSS80 VSS180 AT23 VSS360 AL1
AA35 VSS81 VSS181 AN23
Y35 AM23 CALISTOGA_FCBGA1466~D
VSS82 VSS182
W35 VSS83 VSS183 AH23 UMA@
V35 VSS84 VSS184 AC23
T35 VSS85 VSS185 W23
R35 VSS86 VSS186 K23
P35 VSS87 VSS187 J23
N35 VSS88 VSS188 F23
M35 VSS89 VSS189 C23
L35 VSS90 VSS190 AA22
J35 VSS91 VSS191 K22
H35 VSS92 VSS192 G22
G35 VSS93 VSS193 F22
F35 VSS94 VSS194 E22
D35 VSS95 VSS195 D22
AN34 VSS96 VSS196 A22
AK34 VSS97 VSS197 BA21
AG34 VSS98 VSS198 AV21
AF34 VSS99 VSS199 AR21
CALISTOGA_FCBGA1466~D
A A
UMA@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 12 of 47
5 4 3 2 1
5 4 3 2 1
<8> DDR_A_DQS#[0..7]
Layout Note:
+DDR_MCH_REFhttp://hobi-elektronika.net
trace width and
+1.8V +1.8V
+DDR_MCH_REF1
+DDR_MCH_REF1 <14>
spacing is 20/20.
<8> DDR_A_D[0..63] JP3
2.2U_0805_16V4Z
0.1U_0402_16V4Z
1 VREF VSS 2
3 4 DDR_A_D6 1 1
<8> DDR_A_DM[0..7] +1.8V VSS DQ4
C145
C134
DDR_A_D4 5 6 DDR_A_D0
DDR_A_D1 DQ0 DQ5
<8> DDR_A_DQS[0..7] 7 DQ1 VSS 8
9 10 DDR_A_DM0
VSS DM0
1
DDR_A_DQS#0 2 2
<8> DDR_A_MA[0..13] 11 DQS0# VSS 12
R86 DDR_A_DQS0 13 14 DDR_A_D5
DQS0 DQ6 DDR_A_D7
15 VSS DQ7 16
100_0402_1% DDR_A_D2 17 18
D DDR_A_D3 DQ2 VSS DDR_A_D13 D
19 20
2
+DDR_MCH_REF1 DQ3 DQ12 DDR_A_D12
<14> +DDR_MCH_REF1 21 VSS DQ13 22
0.1U_0402_16V4Z
DDR_A_D8 23 24
DQ8 VSS
1
Layout Note: DDR_A_D14 25 26 DDR_A_DM1
R87 DQ9 DM1
1 27 VSS VSS 28
Place near JP41 DDR_A_DQS#1 29 30 M_CLK_DDR0
M_CLK_DDR0 <7>
DQS1# CK0
C149
100_0402_1% DDR_A_DQS1 31 32 M_CLK_DDR#0
DQS1 CK0# M_CLK_DDR#0 <7>
33 34
2
2 DDR_A_D9 VSS VSS DDR_A_D11
35 DQ10 DQ14 36
DDR_A_D15 37 38 DDR_A_D10
DQ11 DQ15
39 VSS VSS 40
+1.8V 41 42
DDR_A_D16 VSS VSS DDR_A_D20
43 DQ16 DQ20 44
DDR_A_D17 45 46 DDR_A_D21
DQ17 DQ21
47 VSS VSS 48
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_DQS#2 49 50
DQS2# NC PM_EXTTS#0 <7,14>
1 1 1 1 1 1 1 1 1 DDR_A_DQS2 51 52 DDR_A_DM2
DQS2 DM2
C89
C87
C28
C92
C30
C85
C57
C43
C83
53 VSS VSS 54
DDR_A_D18 55 56 DDR_A_D23
DDR_A_D19 DQ18 DQ22 DDR_A_D22
57 DQ19 DQ23 58
2 2 2 2 2 2 2 2 2
59 VSS VSS 60
DDR_A_D29 61 62 DDR_A_D28
DDR_A_D24 DQ24 DQ28 DDR_A_D25
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_A_DM3 67 68 DDR_A_DQS#3
EC_P80_DATA DM3 DQS3# DDR_A_DQS3
<14,33> EC_P80_DATA 69 NC DQS3 70
71 VSS VSS 72
DDR_A_D26 73 74 DDR_A_D31
DDR_A_D27 DQ26 DQ30 DDR_A_D30
75 DQ27 DQ31 76
77 VSS VSS 78
C DDR_CKE0_DIMMA DDR_CKE1_DIMMA C
<7> DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA <7>
81 VDD VDD 82
EC_P80_CLK 83 84
<14,33> EC_P80_CLK NC NC/A15
DDR_A_BS#2 85 86
<8> DDR_A_BS#2 BA2 NC/A14
Layout Note: DDR_A_MA12
87 VDD VDD 88
DDR_A_MA11
89 A12 A11 90
Place one cap close to every 2 pullup DDR_A_MA9 91 92 DDR_A_MA7
DDR_A_MA8 A9 A7 DDR_A_MA6
resistors terminated to +0.9VS 93 A8 A6 94
95 VDD VDD 96
DDR_A_MA5 97 98 DDR_A_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2
99 A3 A2 100
DDR_A_MA1 101 102 DDR_A_MA0
A1 A0
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS#1
A10/AP BA1 DDR_A_BS#1 <8>
DDR_A_BS#0 107 108 DDR_A_RAS#
<8> DDR_A_BS#0 BA0 RAS# DDR_A_RAS# <8>
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
+0.9VS <8> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <7>
111 VDD VDD 112
DDR_A_CAS# 113 114 M_ODT0
<8> DDR_A_CAS# CAS# ODT0 M_ODT0 <7>
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
<7> DDR_CS1_DIMMA# NC/S1# NC/A13
117 VDD VDD 118
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C66
C60
C51
C42
C34
C40
C53
C64
C77
C39
C70
C33
1
10K_0402_5%
10K_0402_5%
DDR_A_MA8 1 8 8 1 DDR_CKE1_DIMMA 1
C7 FOX_ASOA426-M2RN-7F
R13
R15
A 56_0804_8P4R_5% 56_0804_8P4R_5% A
ME@
0.1U_0402_16V4Z
RP10 2
SO-DIMM A
2
DDR_A_MA9 4 5
DDR_A_MA12 3 6
DDR_A_BS#2 2 7
DDR_CKE0_DIMMA 1 8 Top side
56_0804_8P4R_5% Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 13 of 47
5 4 3 2 1
5 4 3 2 1
<8> DDR_B_DQS#[0..7]
<8> DDR_B_D[0..63]
http://hobi-elektronika.net +1.8V +1.8V
+DDR_MCH_REF1
+DDR_MCH_REF1 <13>
<8> DDR_B_DM[0..7] JP4
2.2U_0805_16V4Z
0.1U_0402_16V4Z
<8> DDR_B_DQS[0..7] 1 VREF VSS 2
3 4 DDR_B_D5 1 1
DDR_B_D0 VSS DQ4 DDR_B_D4
<8> DDR_B_MA[0..13] 5 DQ0 DQ5 6
C146
C135
DDR_B_D1 7 8
DQ1 VSS DDR_B_DM0
9 VSS DM0 10
DDR_B_DQS#0 2 2
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DDR_B_D7
15 VSS DQ7 16
D DDR_B_D2 D
17 DQ2 VSS 18
Layout Note: DDR_B_D3 19 20 DDR_B_D12
DQ3 DQ12 DDR_B_D13
21 VSS DQ13 22
Place near JP42 DDR_B_D8 23 24
DDR_B_D9 DQ8 VSS DDR_B_DM1
25 DQ9 DM1 26
27 VSS VSS 28
DDR_B_DQS#1 29 30 M_CLK_DDR3
DQS1# CK0 M_CLK_DDR3 <7>
DDR_B_DQS1 31 32 M_CLK_DDR#3
DQS1 CK0# M_CLK_DDR#3 <7>
33 VSS VSS 34
DDR_B_D10 35 36 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38
+1.8V 39 40
VSS VSS
41 VSS VSS 42
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_D17 43 44 DDR_B_D21
DDR_B_D20 DQ16 DQ20 DDR_B_D16
1 1 1 1 1 1 1 1 1 45 DQ17 DQ21 46
C29
C23
C90
C96
C22
C68
C75
C88
C32
47 VSS VSS 48
DDR_B_DQS#2 49 50
DQS2# NC PM_EXTTS#0 <7,13>
DDR_B_DQS2 51 52 DDR_B_DM2
2 2 2 2 2 2 2 2 2 DQS2 DM2
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22
DDR_B_D19 DQ18 DQ22 DDR_B_D23
57 DQ19 DQ23 58
59 VSS VSS 60
DDR_B_D28 61 62 DDR_B_D26
DDR_B_D25 DQ24 DQ28 DDR_B_D24
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_B_DM3 67 68 DDR_B_DQS#3
EC_P80_DATA DM3 DQS3# DDR_B_DQS3
<13,33> EC_P80_DATA 69 NC DQS3 70
71 VSS VSS 72
DDR_B_D30 73 74 DDR_B_D29
DDR_B_D31 DQ26 DQ30 DDR_B_D27
75 DQ27 DQ31 76
C C
77 VSS VSS 78
DDR_CKE2_DIMMB 79 80 DDR_CKE3_DIMMB
<7> DDR_CKE2_DIMMB CKE0 NC/CKE1 DDR_CKE3_DIMMB <7>
81 VDD VDD 82
Layout Note: EC_P80_CLK 83 84
<13,33> EC_P80_CLK NC NC/A15
DDR_B_BS#2 85 86
Place one cap close to every 2 pullup <8> DDR_B_BS#2 BA2 NC/A14
87 VDD VDD 88
DDR_B_MA12 89 90 DDR_B_MA11
resistors terminated to +0.9VS DDR_B_MA9 A12 A11 DDR_B_MA7
91 A9 A7 92
DDR_B_MA8 93 94 DDR_B_MA6
A8 A6
95 VDD VDD 96
DDR_B_MA5 97 98 DDR_B_MA4
DDR_B_MA3 A5 A4 DDR_B_MA2
99 A3 A2 100
DDR_B_MA1 101 102 DDR_B_MA0
A1 A0
103 VDD VDD 104
DDR_B_MA10 105 106 DDR_B_BS#1
+0.9VS A10/AP BA1 DDR_B_BS#1 <8>
DDR_B_BS#0 107 108 DDR_B_RAS#
<8> DDR_B_BS#0 BA0 RAS# DDR_B_RAS# <8>
DDR_B_WE# 109 110 DDR_CS2_DIMMB#
<8> DDR_B_WE# WE# S0# DDR_CS2_DIMMB# <7>
111 VDD VDD 112
DDR_B_CAS# 113 114 M_ODT2
<8> DDR_B_CAS# CAS# ODT0 M_ODT2 <7>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C80
C76
C35
C41
C56
C81
C62
C52
C84
C65
C38
C36
1
10K_0402_5%
DDR_B_MA3 6 3 3 6 DDR_B_MA11 1 10K_0402_5%
R14
A DDR_B_MA5 DDR_B_MA6 C6 P-TWO_A5692B-A0G16-P A
7 2 2 7
DDR_B_MA9 8 1 1 8 DDR_CKE3_DIMMB ME@
0.1U_0402_16V4Z
56_0804_8P4R_5% 56_0804_8P4R_5% 2 SO-DIMM B
2
RP12
DDR_CKE2_DIMMB 8 1
DDR_B_BS#2 7 2
DDR_B_MA12
DDR_B_MA8
6 3
Security Classification Compal Secret Data Compal Electronics, Inc.
5 4 Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
56_0804_8P4R_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 14 of 47
5 4 3 2 1
5 4 3 2 1
FSLC
CLKSEL2
FSLB
CLKSEL1
FSLA
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
+3VS
http://hobi-elektronika.net +CK_VDD_MAIN1
+3VS 1 2
R428 R419 R429 0_0805_5% 1 1 1 1 1 1 1
0 0 1 133 100 33.3 C227 C218 C219 C432 C222 C233 C449
2.2K_0402_5% 2.2K_0402_5%
Q29 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2N7002_SOT23 2 2 2 2 2 2 2
0 1 1 166 100 33.3
CLK_SMBDATA
S
<21,28> ICH_SMBDATA 1 3
Table : ICS954306 +CK_VDD_MAIN2
G
2
D D
FSB Frequency Selet: +3VS 1 2 1 2 +CK_VDD_REF C446 2 1 33P_0402_50V8J
+3VS R331 0_0805_5% 1 1 1 R330
1
C413 C458 C457 1_0805_1%
Stuff CLK_Ra CLK_Rb CLK_Rc 1 2 +CK_VDD_48 Y2
2
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R427 CLK_XTAL_IN 14.31818MHZ_20P_6X1430004201
G
CPU Driven 2 2 2 2.2_0805_1%
2
CLK_SMBCLK CLK_XTAL_OUT
*(Default) No Stuff CLK_Rd CLK_Re CLK_Rf<21,28> ICH_SMBCLK 1 3
C448
2 1
33P_0402_50V8J
S
2N7002_SOT23 L17
Stuff CLK_Rd CLK_Re CLK_Rf Q28
533MHz U29 1 2 +3VS
+CK_VDD_MAIN1 FBM-L10-160808-301-T_0603
1 1
No Stuff CLK_Ra CLK_Rb CLK_Rc C450 C451 Place crystal within
1 VDDSRC VDDA 7 500 mils of CK410
49 0.1U_0402_16V4Z 10U_0805_10V4Z
VDDSRC 2 2
Stuff CLK_Rd CLK_Rf 54 8 1 2
65
VDDSRC
VDDSRC
GNDA R865 0_0402_5% Place near U4
667MHz Place these components
No Stuff CLK_Ra CLK_Rb CLK_Rc 25 H_STP_PCI#
PCI_SRC_STOP# H_STP_PCI# <21>
30
CLK_Re 36
VDDPCI
VDDPCI CPU_STOP# 24 H_STP_CPU#
H_STP_CPU# <21>
near each pin within 40
+VCCP
12 VDDCPU MCH_BCLK CLK_MCH_BCLK
mils.
CPUCLKT1LP 11 1 2 CLK_MCH_BCLK <7>
1 2 +CK_VDD_REF 18 R424 0_0402_5%
C452 0.1U_0402_16V4Z VDDREF MCH_BCLK# 1 CLK_MCH_BCLK#
CPUCLKC1LP 10 2 CLK_MCH_BCLK# <7>
2
CLK_Ra 33_0402_5%
R323 FSB 45 FSLB/TEST_MODE/24Mhz CLK_MCH_SSCDREFCLK
SRCCLKT9LP 3 1 2
@ 1K_0402_5% <21> CLK_14M_ICH CLK_14M_ICH 2 1 CLKREF1 23 R345 @ 49.9_0402_1%
R412 33_0402_5% REF0/FSLC/TEST_SEL CLK_MCH_SSCDREFCLK#
2 1 2
2
R398 @ 49.9_0402_1%
R123 15_0402_5% 2 1 R404 PCI_LAN 27 71 CLK_MCH_3GPLL# 1 2
<27> CLK_PCI_LAN SEL_PCI6/PCICLK1 CLKREQ8#
15_0402_5% 2 1 R395 R409 @ 49.9_0402_1%
<32> CLK_PCI_DB
@ 1K_0402_5% 66 PCIE_SATA 1 2 CLK_PCIE_SATA CLK_PCIE_VGA 1 2
SRCCLKT7LP CLK_PCIE_SATA <20>
15_0402_5% 2 1 R415 CLK_CODEC 22 R414 0_0402_5% R343 @ 49.9_0402_1%
CLK_14M_CODEC
1
58 PCIE_ICH 1 2 CLK_PCIE_ICH
SRCCLKT4LP CLK_PCIE_ICH <21>
R383 R386 0_0402_5%
CLK_SMBDATA 17 59 PCIE_ICH# 1 2 CLK_PCIE_ICH#
<13,14> CLK_SMBDATA SMBDAT SRCCLKC4LP CLK_PCIE_ICH# <21>
R396 @ 1K_0402_5% R393 0_0402_5%
8.2K_0402_5% 57
1
CLKREF1 2 CLKREQ4#
1 1 2 MCH_CLKSEL2 <7>
1 2 CLKIREF 9 55
R407 R430 0_0402_5% GND SRCCLKT3LP
<5> CPU_BSEL2 1 2
R397 1K_0402_5% 4 56
0_0402_5% GNDSRC SRCCLKC3LP
1
CLK_ENABLE# PCI_ICH PCI_LAN CLK_CODEC GND48 SRCCLKT1LP R358 VGA@ 0_0402_5% R140 @ 10K_0402_5%
68 51 PCIE_VGA# 1 2 CLK_PCIE_VGA#
GNDSRC SRCCLKC1LP CLK_PCIE_VGA# <18>
1
PCI_MINI = FCTSEL1
R374 PCI_PME=SEL_PCI6 ICS9LPR325AKLFT_MLF72
FCTSEL1
@ 10K_0402_5% PIN43 PIN44 PIN47 PIN48
(PIN34) PCI_LAN PIN27
2
PCI_MINI
0 CLKREQ5 Security Classification Compal Secret Data Compal Electronics, Inc.
1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 15 of 47
5 4 3 2 1
A B C D E F G H
http://hobi-elektronika.net
1 1
+LCDVDD +5VALW
+LCDVDD +3VS
2
R196 R201 Q14
100_0402_1% 100K_0402_5%
S
1 3
AO3413_SOT23
1 2
1
D
G
2
2N7002_SOT23 0.047U_0402_16V4Z
2
Q15 G
S 1 1 1 1
3
C291 C288 C289
C290
1
4.7U_0805_10V4Z 4.7U_0805_10V4Z
Q16 2 2 2 2
DTC124EK_SC59
2 2
3
B+ INVPWR_B+ +3VS
MBV2012301YZF_0805 0.1U_0603_50V4Z
L14 1 2 2 1 C294
2
R202
@ L15 1 2 0_0805_5% 2 1
C295 4.7K_0402_5%
470P_0402_50V8J D9
1
CH751H-40_SC76
JP40 1 2 DISPOFF#
<33> BKOFF# DISPOFF#
1
2 <33> ENBKL
D10
<33> INVT_PWM 3
DISPOFF# @ CH751H-40_SC76
4
<33> DAC_BRIG 5 <9> GMCH_ENBKL 2 R52 1 1 2
3 UMA@ 0_0402_5% 3
INVPWR_B+ 6
2
7 R204
MOLEX_53780-0790 <18> G7X_ENBKL 2 R89 1 UMA@ 100K_0402_5%
VGA@ 0_0402_5%
1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 16 of 47
A B C D E F G H
A B C D E
http://hobi-elektronika.net
TV-OUT Conn.
150_0603_1%
1 R61 VGA@ 0_0402_5% 1
1
150_0603_1%
150_0603_1%
1
1
R5
R4
R3
<9> TV_LUMA 2 1
R224 UMA@ 0_0402_5%
2 1 @
<9> TV_CRMA
2
R225 UMA@ 0_0402_5% @ @
2
<9> TV_COMPS 2 1
R223 UMA@ 0_0402_5%
CRT Conn.
VGA@
2 1 R 1 2
<18> CARD_VGA_R RED <36>
R64 0_0402_5% L1 0_0603_5%
VGA@
2 1 G 1 2
<18> CARD_VGA_G GREEN <36>
R66 0_0402_5% L2 0_0603_5%
VGA@
2 1 B 1 2
<18> CARD_VGA_B BLUE <36>
150_0603_1%
82P_0402_50V8J
82P_0402_50V8J
82P_0402_50V8J
R68 0_0402_5% L3 0_0603_5%
1
150_0603_1%
150_0603_1%
1 1 1
1
R8
R6
R7
C3
C1
C2
UMA@
2 @ 2 2 2 2
<9> CRT_R 2 1
2
R63 0_0402_5% @ @
2
UMA@ @ @ @
<9> CRT_G 2 1
R65 0_0402_5%
UMA@
<9> CRT_B 2 1
R67 0_0402_5%
+3VS
+3VS
1
R9 R10
2.2K_0402_5% 2.2K_0402_5%
2
G
Q1
2
2 VGA@1 3 1 2N7002_SOT23
<18> CARD_DDCDATA VGA_DDC_DAT <36>
R80 10_0402_5%
S
<18> CARD_DDCCLK 2
2
G
<9> 3VDDCDA 1 2
R76 0_0402_5%
UMA@ 2 1
1 2 DDC CL +5VS R11 @ 0_0402_5%
<9> 3VDDCCL
R75 0_0402_5%
1
1
0.1U_0402_16V4Z R1
1K_0402_5%
C5
2
2
5
U1
VGA@
P
OE#
2 1 HSYNC 2 4
<18> CARD_HSYNC A Y JVGA_HS <36>
R82 0_0402_5%
G
VGA@
2 1 VSYNC +5VS 74AHCT1G125GW_SOT353-5
<18> CARD_VSYNC
3
R81 0_0402_5%
0.1U_0402_16V4Z
1
<9> CRT_HSYNC 1 UMA@ 2
R78 39_0402_5%
C4
5
2
<9> CRT_VSYNC 1 UMA@ 2 U2
R77 39_0402_5%
P
OE#
2 A Y 4 JVGA_VS <36>
Pop when with internal graphics
G
74AHCT1G125GW_SOT353-5
3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 17 of 47
A B C D E
5 4 3 2 1
http://hobi-elektronika.net
D D
MAX. 4.06A @ 1.8V
MAX. 130mA @ 2.5V
MAX. 655mA @ 3.3V
PEG_M_TXP[0..15]
PEG_M_TXP[0..15] <9>
PEG_M_TXN[0..15]
PEG_M_TXN[0..15] <9>
PEG_RXP[0..15]
PEG_RXP[0:15] <9>
JP7 JP8
1 41 1 41 PEG_RXN[0..15]
1 41 1 41 PEG_RXN[0:15] <9>
PEG_M_TXP1 2 42 PEG_RXP1 PEG_M_TXP0 2 42 PEG_RXP0
PEG_M_TXN1 2 42 PEG_RXN1 PEG_M_TXN0 2 42 PEG_RXN0
3 3 43 43 3 3 43 43
4 4 44 44 4 4 44 44
PEG_M_TXP3 5 45 PEG_RXP3 PEG_M_TXP2 5 45 PEG_RXP2
PEG_M_TXN3 5 45 PEG_RXN3 PEG_M_TXN2 5 45 PEG_RXN2
6 6 46 46 6 6 46 46
7 7 47 47 7 7 47 47
PEG_M_TXP5 8 48 PEG_RXP5 PEG_M_TXP4 8 48 PEG_RXP4
PEG_M_TXN5 8 48 PEG_RXN5 PEG_M_TXN4 8 48 PEG_RXN4
9 9 49 49 9 9 49 49
10 10 50 50 10 10 50 50
PEG_M_TXP7 11 51 PEG_RXP7 PEG_M_TXP6 11 51 PEG_RXP6
PEG_M_TXN7 11 51 PEG_RXN7 PEG_M_TXN6 11 51 PEG_RXN6
12 12 52 52 12 12 52 52
13 13 53 53 13 13 53 53
C PEG_M_TXP9 PEG_RXP9 PEG_M_TXP8 PEG_RXP8 C
14 14 54 54 14 14 54 54
PEG_M_TXN9 15 55 PEG_RXN9 PEG_M_TXN8 15 55 PEG_RXN8
15 55 15 55
16 16 56 56 16 16 56 56
PEG_M_TXP11 17 57 PEG_RXP11 PEG_M_TXP10 17 57 PEG_RXP10 +5VS +2.5VS
PEG_M_TXN11 17 57 PEG_RXN11 PEG_M_TXN10 17 57 PEG_RXN10
18 18 58 58 18 18 58 58
19 19 59 59 19 19 59 59
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PEG_M_TXP13 20 60 PEG_RXP13 PEG_M_TXP12 20 60 PEG_RXP12
PEG_M_TXN13 20 60 PEG_RXN13 PEG_M_TXN12 20 60 PEG_RXN12
21 21 61 61 21 21 61 61
22 22 62 62 22 22 62 62 2 2 2 2
C244
C240
C112
C113
PEG_M_TXP15 23 63 PEG_RXP15 PEG_M_TXP14 23 63 PEG_RXP14
PEG_M_TXN15 23 63 PEG_RXN15 PEG_M_TXN14 23 63 PEG_RXN14
24 24 64 64 24 24 64 64
25 25 65 65 25 25 65 65
+1.8VS SUSP# 1 1 1 1
+3VS 26 26 66 66 +5VS <15> CLK_PCIE_VGA 26 26 66 66 SUSP# <24,26,33,34,35,43,44>
+1.5VS 27 67 27 67 G7X_THER_ALERT#
27 67 <15> CLK_PCIE_VGA# 27 67 G7X_THER_ALERT# <21>
28 68 28 68 VGA@ VGA@ VGA@ VGA@
28 68 28 68
29 29 69 69 <17> CARD_DDCCLK 29 29 69 69
+2.5VS 30 70 30 70
30 70 <17> CARD_DDCDATA 30 70 G7X_ENBKL <16>
31 31 71 71 31 31 71 71 PLTRST_VGA# <19>
32 32 72 72 <17> CARD_VSYNC 32 32 72 72
33 73 B+ 33 73
33 73 33 73
34 34 74 74 <17> CARD_HSYNC 34 34 74 74
35 35 75 75 35 35 75 75
36 76 36 76 +3VS
36 76 <17> CARD_VGA_R 36 76 CARD_COMP <17>
37 37 77 77 37 37 77 77
38 38 78 78 <17> CARD_VGA_G 38 38 78 78 CARD_LUMA <17>
0.047U_0402_16V4Z
0.047U_0402_16V4Z
39 39 79 79 39 39 79 79
40 40 80 80 <17> CARD_VGA_B 40 40 80 80 CARD_CRMA <17>
ACES_88363-08001 ACES_88363-08001 1 1
C110
C111
B 2 2 B
VGA@ VGA@
A A
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 401429 B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 18 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
D D
+3VS
5
PCI_AD12 B12 U21
PCI_AD13 AD12 PCI_CBE#0 PCI_PCIRST#
C13 B15 1
P
AD13 C/BE0# PCI_CBE#0 <24,26,27,32> B
PCI_AD14 G15 C12 PCI_CBE#1 4 PCI_RST#
AD14 C/BE1# PCI_CBE#1 <24,26,27,32> Y PCI_RST# <21,24,25,26,27,32,33>
PCI_AD15 G13 D12 PCI_CBE#2 2
AD15 C/BE2# PCI_CBE#2 <24,26,27,32> A
G
PCI_AD16 E12 C15 PCI_CBE#3
AD16 C/BE3# PCI_CBE#3 <24,26,27,32>
PCI_AD17 C11 TC7SH08FUF_SSOP5
3
PCI_AD18 AD17 PCI _IRDY#
D11 AD18 IRDY# A7 PCI_IRDY# <24,26,27>
C PCI_AD19 PCI_PAR C
A11 AD19 PAR E10 PCI_PAR <24,26,27>
PCI_AD20 A10 B18 PCI_PCIRST# 2 1
PCI_AD21 AD20 PCIRST# PCI_DEVSEL# R257 @ 0_0402_5%
F11 AD21 DEVSEL# A12 PCI_DEVSEL# <24,26,27>
+3VS PCI_AD22 F10 C9 PCI_PERR#
AD22 PERR# PCI_PERR# <24,26,27> +3VS
PCI_AD23 E9 E11 PCI_PLOCK#
PCI_AD24 AD23 PLOCK# PCI_SERR# R236
D9 AD24 SERR# B10 PCI_SERR# <24,26,27>
R298 1 2 8.2K_0402_5% PCI_PIRQA# PCI_AD25 B9 F15 PCI_STOP# 2 1
AD25 STOP# PCI_STOP# <24,26,27> PLTRST_VGA# <18>
5
PCI_AD26 A8 F14 PCI_TRDY# U18 0_0402_5%
AD26 TRDY# PCI_TRDY# <24,26,27,32>
R300 1 2 8.2K_0402_5% PCI_PIRQB# PCI_AD27 A6 F16 PCI_FRAME# PCI_PLTRST# 1
P
AD27 FRAME# PCI_FRAME# <24,26,27,32> B
PCI_AD28 C7 4 PLT_RST#
AD28 Y PLT_RST# <7,23,28>
R294 1 2 8.2K_0402_5% PCI_PIRQC# PCI_AD29 B6 C26 PCI_PLTRST# 2
AD29 PLTRST# A
G
PCI_AD30 E6 A9 CLK_PCI_ICH
AD30 PCICLK CLK_PCI_ICH <15>
R291 1 2 8.2K_0402_5% PCI_PIRQD# PCI_AD31 D6 B19 PCI_PME# TC7SH08FUF_SSOP5
PCI_PME# <33>
3
AD31 PME#
R283 1 2 8.2K_0402_5% PCI_PIRQE#
CLK_PCI_ICH
B B
2
R277
@ 10_0402_5%
1
1
C364
@ 8.2P_0402_50V
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 19 of 47
5 4 3 2 1
5 4 3 2 1
C195
18P_0402_50V8J
ICH_RTCX1
http://hobi-elektronika.net
2 1
10M_0402_5%
1
Y1
R109
2 NC IN 1
32.768KHZ_12.5P_1TJS125BJ2A251
3 NC OUT 4
U3A
LPC_AD[0..3] <32,33>
2
C196
RTC
18P_0402_50V8J AB1 AA6 LPC_AD0
ICH_RTCX2 RTXC1 LAD0 LPC_AD1
2 1 AB2 RTCX2 LAD1 AB5
D LPC_AD2 D
LAD2 AC4
+RTCVCC R293 1 2 ICH_RTCRST# AA3 Y6 LPC_AD3
RTCRST# LAD3
LPC
20K_0402_5%
ICH_INTVRMEN W4 AC3 LPC_DRQ0#
INTVRMEN LDRQ0# LPC_DRQ#0 <32>
J1 SM_INTRUDER# Y5 AA5
INTRUDER# LDRQ1# / GPIO23
1 2
3MM AB3 LPC_FRAME#
+RTCVCC LFRAME# LPC_FRAME# <32,33>
W1 EE_CS
Y1 EE_SHCLK 2 1 R250 10K_0402_5% +3VS
C392 Y2 AE22 GATEA20
EE_DOUT A20GATE GATEA20 <33>
LAN
1U_0603_10V4Z W3 AH28 H_A20M#
EE_DIN A20M# H_A20M# <4>
1
CPU
1 2
R288 V3 AG27 H_CPUSLP_R# 2 @ 1 R233 0_0402_5%
LAN_CLK CPUSLP# H_CPUSLP# <4,7>
1M_0402_5% U3 AF24 DPRSLP# 2 1 R243 0_0402_5%
LAN_RSTSYNC TP1 / DPRSTP# H_DPRSTP# <4,45>
AH25 H_DPSLP#
H_DPSLP# <4>
2
AC-97/AZALIA
1 2 ICH_AC_BITCLK_R U1 2 1 R251 10K_0402_5%
<28> ICH_BITCLK_MDC ACZ_BCLK +3VS
332K_0402_1% 1 2 ICH_AC_SYNC_R R6 AG23 KB_RST#
<28> ICH_SYNC_MDC ACZ_SYNC RCIN# KB_RST# <33>
R281 33_0402_5%
2
1
1 2 ICH_AC_RST_R# R5 AF23 H_SMI#
<28> ICH_RST_MDC# ACZ_RST# SMI# H_SMI# <4>
ICH_INTVRMEN R314 33_0402_5% AH24 H_NMI R245
NMI H_NMI <4>
ICH_AC_SDIN0 T2
C <29> ICH_AC_SDIN0 ACZ_SDIN0 C
ICH_AC_SDIN1 T3 AH22 H_STPCLK# 56_0402_5%
<28> ICH_AC_SDIN1 ACZ_SDIN1 STPCLK# H_STPCLK# <4>
T1
2
ACZ_SDIN2 THRMTRIP_ICH#
THERMTRIP# AF26 1 R237 2 H_THERMTRIP# <4,7>
1 2 ICH_AC_SDOUT_R T4 24.9_0402_1%
<28> ICH_SDOUT_MDC ACZ_SDOUT
R315 33_0402_5%
AH17 PD_A0
DA0 PD_A0 <23>
SATA_LED# AF18 AE17 PD_A1
<37> SATA_LED# SATALED# DA1 PD_A1 <23>
AF17 PD_A2
DA2 PD_A2 <23>
PSATA_IRX_DTX_N0_C AF3 AE16 PD_CS#1
<23> PSATA_IRX_DTX_N0_C SATA0RXN DCS1# PD_CS#1 <23>
PSATA_IRX_DTX_P0_C AE3 AD16 PD_CS#3
<23> PSATA_IRX_DTX_P0_C SATA0RXP DCS3# PD_CS#3 <23>
PSATA_ITX_DRX_N0_C AG2 SATA0TXN
SATA
PSATA_ITX_DRX_P0_C AH2 SATA0TXP PD_D0
DD0 AB15
AF7 AE14 PD_D1
SATA2RXN DD1 PD_D2
AE7 SATA2RXP DD2 AG13
AG6 AF13 PD_D3
SATA2TXN DD3 PD_D4
AH6 SATA2TXP DD4 AD14
AC13 PD_D5
CLK_PCIE_SATA# DD5 PD_D6
<15> CLK_PCIE_SATA# AF1 SATA_CLKN DD6 AD12
CLK_PCIE_SATA AE1 AC12 PD_D7
<15> CLK_PCIE_SATA SATA_CLKP DD7
AE12 PD_D8
R275 DD8 PD_D9
AH10 SATARBIASN DD9 AF12
1 2 AG10 AB13 PD_D10
+3VS SATARBIASP DD10 PD_D11
DD11 AC14
24.9_0402_1% AF14 PD_D12
DD12 PD_D13
DD13 AH13
PD_D14
4.7K_0402_5% 2 1 R266 PD _IORDY PD _IORDY AG16
IDE DD14 AH14
AC15 PD_D15
<23> PD_IORDY IORDY DD15
8.2K_0402_5% 2 1 R265 PD_IRQ PD_IRQ AH16
<23> PD_IRQ IDEIRQ
10K_0402_5% 2 1 R259 SATA_LED# PD_DACK# AF16
<23> PD_DACK# DDACK#
PD_IOW# AH15 AE15 PD_DREQ
B <23> PD_IOW# DIOW# DDREQ PD_DREQ <23> B
PD_IOR# AF15
<23> PD_IOR# DIOR#
ICH7_BGA652~D
PD_D[0..15]
PD_D[0..15] <23>
PSATA_ITX_DRX_N0 1 2 PSATA_ITX_DRX_N0_C
<23> PSATA_ITX_DRX_N0
C387 3900P_0402_50V7K
PSATA_ITX_DRX_P0 1 2 PSATA_ITX_DRX_P0_C
<23> PSATA_ITX_DRX_P0
C388 3900P_0402_50V7K
BATT1.1
+RTCVCC
Close to U7
R114
+ BATT1 -
1 2 1 2
<29> ICH_SDOUT_AUDIO 1 2 ICH_AC_SDOUT_R W=20mils
R299 33_0402_5% 2 100_0603_1%
D3
C203
1 2 +CHGRTC ML1220T13RE
<29> ICH_SYNC_AUDIO 1 2 ICH_AC_SYNC_R 0.1U_0402_16V4Z 45@
R280 33_0402_5% 1
RB751V_SOD323
@ C390
27P_0402_50V8J
2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 20 of 47
5 4 3 2 1
5 4 3 2 1
CLK_48M_ICH
Place closely pin AC1
CLK_14M_ICH
+3VALW +3VALW
1
10K_0402_5%
R253 1 2 SIRQ R305 R308
1
2
2
8.2K_0402_5% R256 R247 @ 10_0402_5% @ 10_0402_5%
R258 1 2 PCI_CLKRUN# R239 R241
2
2.2K_0402_5% 2.2K_0402_5% U3C
10K_0402_5% 10K_0402_5% 10K_0402_5% 1 1
2
R254 1 2G7X_THER_ALERT# <15,28> ICH_SMBCLK ICH_SMBCLK C22 AF19 C384 C391
1
D ICH_SMBDATA SMBCLK GPIO21 / SATA0GP D
<15,28> ICH_SMBDATA B22 SMBDATA GPIO19 / SATA1GP AH18 SB_INT_FLASH_SEL
SMB
SATA
GPIO
LINKALERT# A26 AH19 @ 4.7P_0402_50V8C @ 4.7P_0402_50V8C
ICH_SMLINK0 LINKALERT# GPIO36 / SATA2GP 2 2
B25 SMLINK0 GPIO37 / SATA3GP AE19 1 R260 2
ICH_SMLINK1 A25 100_0402_5%
SMLINK1
+3VALW +3VALW
R232 AC1 CLK_14M_ICH +3VALW
CLK14 CLK_14M_ICH <15>
Clocks
10K_0402_5% 1 2 I CH_RI# A28 B2 CLK_48M_ICH
RI# CLK48 CLK_48M_ICH <15>
R242 1 2 LINKALERT# 8.2K_0402_5%
5
SB_SPKR A19 U37
<29> SB_SPKR SPKR
150_0402_5% PAD T41 SUS_STAT# A27 C20 ICH_SUSCLK T44 PAD SLP_S4# 1
P
R248 1 SUS_STAT# SUSCLK B
2 ITP_DBRESET# <4> ITP_DBRESET#
ITP_DBRESET# A22 SYS_RST# Y 4 PM_SLP_S5# PM_SLP_S5# <33>
SYS
B24 SLP_S3# SLP_S5# 2
SLP_S3# SLP_S3# <33> A
G
10K_0402_5% PM_BMBUSY# AB18 D23 SLP_S4#
R246 1 <7> PM_BMBUSY# GPIO0 / BM_BUSY# SLP_S4#
2 OCP# F22 SLP_S5# TC7SH08FUF_SSOP5
3
OCP# SLP_S5#
<4> OCP# B23 GPIO11 / SMBALERT#
10K_0402_5% AA4 ICH_POK R295
PWROK ICH_POK <7,33>
POWER MGT
R304 1 2 SPI_MISO <15> H_STP_PCI#
H_STP_PCI# AC20 GPIO18 / STPPCI# 1 2 10K_0402_5%
GPIO
H_STP_CPU# AF21 AC22 1 2 DPRSLPVR
<15> H_STP_CPU# GPIO20 / STPCPU# GPIO16 / DPRSLPVR DPRSLPVR <7,45>
10K_0402_5% R90 100_0402_5%
R285 1 2 SPI_CS# <23> IDERST_CD#
IDERST_CD# A21 GPIO26 TP0 / BATLOW# C21 ICH_LOW_BAT#
U3D
F26 V26 DMI_RXN0
PERn1 DMI0RXN DMI_RXN0 <7>
F25 V25 DMI_RXP0
PERp1 DMI0RXP DMI_RXP0 <7>
PCI-EXPRESS
K26 AB26 DMI_RXN2
PERn3 DMI2RXN DMI_RXN2 <7>
K25 AB25 DMI_RXP2
PERp3 DMI2RXP DMI_RXP2 <7>
J28 AA28 DMI_TXN2
PETn3 DMI2TXN DMI_TXN2 <7>
J27 AA27 DMI_TXP2
PETp3 DMI2TXP DMI_TXP2 <7>
M26 AD25 DMI_RXN3
B PERn4 DMI3RXN DMI_RXN3 <7> B
M25 AD24 DMI_RXP3
PERp4 DMI3RXP DMI_RXP3 <7>
L28 AC28 DMI_TXN3
PETn4 DMI3TXN DMI_TXN3 <7>
L27 AC27 DMI_TXP3
PETp4 DMI3TXP DMI_TXP3 <7>
P26 AE28 CLK_PCIE_ICH#
PERn5 DMI_CLKN CLK_PCIE_ICH# <15>
P25 AE27 CLK_PCIE_ICH
PERp5 DMI_CLKP CLK_PCIE_ICH <15>
N28 PETn5
N27 C25 R238 24.9_0402_1% Within 500 mils
PETp5 DMI_ZCOMP DMI_IRCOMP
DMI_IRCOMP D25 1 2 +1.5VS
T25 RP15
PERn6 USB20_N0 USB_OC#4
T24 PERp6 USBP0N F1 USB20_N0 <31> 4 5 +3VALW
R28 F2 USB20_P0 USB_OC#2 3 6
PETn6 USBP0P USB20_P0 <31>
R27 G4 USB20_N1 USB_OC#3 2 7
PETp6 USBP1N USB20_N1 <28>
G3 USB20_P1 USB_OC#1 1 8
USBP1P USB20_P1 <28>
R2 H1 USB20_N2
SPI_CLK USBP2N USB20_N2 <37>
SPI_CS# P6 H2 USB20_P2 10K_1206_8P4R_5%
SPI_CS# SPI USBP2P USB20_P2 <37>
P1 J4 USB20_N3
SPI_ARB USBP3N USB20_N3 <36>
J3 USB20_P3
USBP3P USB20_P3 <36>
SPI_MOSI P5 K1 USB20_N4 RP16
SPI_MOSI USBP4N USB20_N4 <37>
SPI_MISO P2 K2 USB20_P4 USB_OC#0 4 5
SPI_MISO USBP4P USB20_P4 <37> +3VALW
L4 USB20_N5 USB_OC#5 3 6
USBP5N USB20_N5 <36>
L5 USB20_P5 USB_OC#6 2 7
USBP5P USB20_P5 <36>
USB_OC#0 D3 M1 USB20_N6 USB_OC#7 1 8
<31> USB_OC#0 OC0# USBP6N USB20_N6 <37>
USB_OC#1 C4 M2 USB20_P6
USB_OC#2 D5
OC1# USB USBP6P
N4 USB20_N7
USB20_P6 <37>
10K_1206_8P4R_5%
<37> USB_OC#2 OC2# USBP7N USB20_N7 <28>
USB_OC#3 D4 N3 USB20_P7
OC3# USBP7P USB20_P7 <28>
USB_OC#4 E5
<37> USB_OC#4 OC4#
USB_OC#5 C3 R307 22.6_0402_1%
USB_OC#6 OC5# / GPIO29 USBRBIAS
<37> USB_OC#6 A2 OC6# / GPIO30 USBRBIAS# D2 1 2
USB_OC#7 B3 D1
OC7# / GPIO31 USBRBIAS
Within 500 mils
A ICH7_BGA652~D A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 21 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
+VCCP
U3F U3E
A4 VSS[0] VSS[98] P28
ICH_V5REF_RUN G10 L11 0.1U_0402_16V4Z A23 R1
V5REF[1] Vcc1_05[1] VSS[1] VSS[99]
Vcc1_05[2] L12 B1 VSS[2] VSS[100] R11
AD17 V5REF[2] Vcc1_05[3] L14 1 B8 VSS[3] VSS[101] R12
Vcc1_05[4] L16 1 1 B11 VSS[4] VSS[102] R13
+1.5VS ICH_V5REF_SUS F6 L17 C363 C357 + C351 B14 R14
V5REF_Sus Vcc1_05[5] VSS[5] VSS[103]
Vcc1_05[6] L18 B17 VSS[6] VSS[104] R15
D 0.1U_0402_16V4Z 220U_D2_4VM D
AA22 Vcc1_5_B[1] Vcc1_05[7] M11 B20 VSS[7] VSS[105] R16
2 2 2
1 AA23 Vcc1_5_B[2] Vcc1_05[8] M18 B26 VSS[8] VSS[106] R17
+5VS +3VS
220U_D2_4VM
1 1 1 AB22 Vcc1_5_B[3] Vcc1_05[9] P11 B28 VSS[9] VSS[107] R18
+ C335 C340 C332 AB23 P18 C2 T6
Vcc1_5_B[4] Vcc1_05[10] VSS[10] VSS[108]
C327
AC23 T11 1U_0603_10V4Z C6 T12
Vcc1_5_B[5] Vcc1_05[11] VSS[11] VSS[109]
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
P23 Vcc1_5_B[35] Vcc3_3[13] B13 H4 VSS[42] VSS[139] AA1
0.1U_0402_16V4Z R22 B16 1 1 1 H5 AA24
2 Vcc1_5_B[36] Vcc3_3[14] VSS[43] VSS[140]
R23 Vcc1_5_B[37] Vcc3_3[15] B7 H24 VSS[44] VSS[141] AA25
C368
C350
C337
R24 Vcc1_5_B[38] Vcc3_3[16] C10 H27 VSS[45] VSS[142] AA26
R25 Vcc1_5_B[39] Vcc3_3[17] D15 H28 VSS[46] VSS[143] AB4
2 2 2
R26 Vcc1_5_B[40] Vcc3_3[18] F9 J1 VSS[47] VSS[144] AB6
+3VS T22 G11 J2 AB11
Vcc1_5_B[41] Vcc3_3[19] VSS[48] VSS[145]
T23 Vcc1_5_B[42] Vcc3_3[20] G12 J5 VSS[49] VSS[146] AB14
T26 Vcc1_5_B[43] Vcc3_3[21] G16 J24 VSS[50] VSS[147] AB16
T27 Vcc1_5_B[44] J25 VSS[51] VSS[148] AB19
1 T28 Vcc1_5_B[45] VccRTC W5 +RTCVCC J26 VSS[52] VSS[149] AB21
C352 U22 K24 AB24
Vcc1_5_B[46] VSS[53] VSS[150]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
U23 Vcc1_5_B[47] VccSus3_3[1] P7 +3VALW K27 VSS[54] VSS[151] AB27
0.1U_0402_16V4Z V22 1 1 1 1 K28 AB28
2 Vcc1_5_B[48] VSS[55] VSS[152]
C369
C370
V23 A24 C386 C376 L13 AC2
Vcc1_5_B[49] VccSus3_3[2] VSS[56] VSS[153]
W22 Vcc1_5_B[50] VccSus3_3[3] C24 L15 VSS[57] VSS[154] AC5
W23 D19 0.1U_0402_16V4Z 0.1U_0402_16V4Z L24 AC9
Vcc1_5_B[51] VccSus3_3[4] 2 2 2 2 VSS[58] VSS[155]
Y22 Vcc1_5_B[52] VccSus3_3[5] D22 L25 VSS[59] VSS[156] AC11
Place closely pin AG28 within 100mlis. Y23 Vcc1_5_B[53] VccSus3_3[6] G19 L26 VSS[60] VSS[157] AD1
M3 VSS[61] VSS[158] AD3
+1.5VS +1.5VS_DMIPLLR +1.5VS_DMIPLL
B27 Vcc3_3[1] VccSus3_3[7] K3 +3VALW M4 VSS[62] VSS[159] AD4
R229 R230 K4 1 1 M5 AD7
VccSus3_3[8] VSS[63] VSS[160]
0.01U_0402_16V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 22 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
D JP9 D
1 GND
PSATA_ITX_DRX_P0 2
<20> PSATA_ITX_DRX_P0 A+
PSATA_ITX_DRX_N0 3
<20> PSATA_ITX_DRX_N0 A-
4 GND
2 1 PSATA_IRX_DTX_N0 5
<20> PSATA_IRX_DTX_N0_C B-
C230 3900P_0402_50V7K 6 B+
7 GND
2 1 PSATA_IRX_DTX_P0
<20> PSATA_IRX_DTX_P0_C
C234 3900P_0402_50V7K
8 V33
9 V33
+3VS 1 2 10 V33
R151 @ 0_0805_5% 11 +5VS +3VS
GND
12 GND
1000P_0402_50V7K
22U_1206_6.3V6M
22U_1206_6.3V6M
13 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z
GND
1000P_0402_50V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+5VS 1 2 14 V5
R170 0_0805_5% 15 1 1 1 1 1 1 1 1 1 1
V5
C266
C257
C258
C252
C246
C245
16 V5
17 C256 C271 C247 C251
GND
18 Reserved 2 2 2 2 2 2 2 2 2 2
19 GND
20 1U_0603_10V4Z @ 1U_0603_10V4Z
V12 @ @
21 V12
22 Pleace near HD CONN @
V12
Pleace near HD CONN
ALLTO_C16630-122A4-L_RV
C
Main SATA +5V Default C
PD_D[0..15]
PD_D[0..15] <20>
PD_A[0..2]
PD_A[0..2] <20>
JP10
<29> INT_CD_L 1 1 2 2 INT_CD_R <29>
<29> CD_AGND 3 3 4 4
R262 1 2@ 0_0402_5% 5 6 PD_D8
<21> IDERST_CD# 5 6
R267 1 2 33_0402_5% PD_D7 7 8 PD_D9
<7,19,28> PLT_RST# 7 8
PD_D6 9 10 PD_D10
PD_D5 9 10 PD_D11
11 11 12 12
B PD_D4 PD_D12 B
13 13 14 14
PD_D3 15 16 PD_D13
PD_D2 15 16 PD_D14
17 17 18 18
PD_D1 19 20 PD_D15
+3VS PD_D0 19 20 PD_DREQ
21 21 22 22 PD_DREQ <20>
23 24 PD_IOR#
23 24 PD_IOR# <20>
1
PD_IOW# 25 26
<20> PD_IOW# 25 26
PD _IORDY 27 28 PD_DACK#
<20> PD_IORDY 27 28 PD_DACK# <20>
R249 PD_IRQ 29 30
<20> PD_IRQ 29 30
10K_0402_5% PD_A1 31 32 PDIAG# 1 2
PD_A0 31 32 PD_A2 R244 100K_0402_5% +5VS
33 34
2
2 2
OCTEK_CDR-50DY1G
R231 ME@
470_0402_5%
1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 23 of 47
5 4 3 2 1
A B C D E
CARD_S1_A[0..25]
http://hobi-elektronika.net +3VS
CARD_S1_A[0..25] <25> +S1_VCC
+3VS
CARD_S1_D[0..15] C431 C438 C454
CARD_S1_D[0..15] <25>
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PCI_AD[0..31] 1 1 1 1 1 1 1 1 1 1 1
PCI_AD[0..31] <19,26,27,32>
C400 C456
Power on RESET# 4.7U_0805_10V4Z C402 C436
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 +3VS 2 2 2 2 2 2 2
Reset# Here C455 C445 C404
4 +3VS 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C421 4
0.1U_0402_16V4Z
<25> VPPD0
VCC <25> VPPD1 1 2
<25> VCCD0#
C403
<25> VCCD1#
0.1U_0402_16V4Z
ENE CB1410 just have one vcc plane internal,
if want S3 wake-up function(PME#),then at S3
126
138
122
102
CLK
74
73
72
71
44
18
90
86
50
30
14
63
U28 status must keep all Vcc +3V. That is different
VCCI
VCCD1#
VCCD0#
VPPD1
VPPD0
VCCP0
VCCP1
VCCSK0
VCCSK1
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
with TI 1410 and O2-Micro 6912, just keep the
VCCI pin +3V, the other vcc can use +3VS.
SUSPEND# >1ms PCI_AD31 3 144 CARD_S1_D10
PCI_AD30 AD31 CAD31/D10 CARD_S1_D9
4 AD30 CAD30/D9 142
PCI_AD29 5 141 CARD_S1_D1
PCI_AD28 AD29 CAD29/D1 CARD_S1_D8
7 AD28 CAD28/D8 140
PCIRST# PCI_AD27 8 139 CARD_S1_D0
PCI_AD26 AD27 CAD27/D0 CARD_S1_A0
9 AD26 CAD26/A0 129
PCI_AD25 10 128 CARD_S1_A1
PCI_AD24 AD25 CAD25/A1 CARD_S1_A2
11 AD24 CAD24/A2 127
PCI_AD23 15 124 CARD_S1_A3
PCI_AD22 AD23 CAD23/A3 CARD_S1_A4
16 AD22 CAD22/A4 121
PCI_AD21 17 120 CARD_S1_A5
PCI_AD20 AD21 CAD21/A5 CARD_S1_A6
19 AD20 CAD20/A6 118
PCI_AD19 23 116 CARD_S1_A25
PCI_AD18 AD19 CAD19/A25 CARD_S1_A7
24 AD18 CAD18/A7 115
PCI_AD17 25 113 CARD_S1_A24
3 PCI_AD16 AD17 CAD17/A24 CARD_S1_A17 3
26 AD16 CAD16/A17 98
PCI_AD15 38 96 CARD_S1_IOWR#
AD15 CAD15/IOWR# CARD_S1_IOWR# <25>
PCI_AD14 39 97 CARD_S1_A9
Entry S3 PCI_AD13
PCI_AD12
40
AD14
AD13
CAD14/A9
CAD13/IORD# 93 CARD_S1_IORD#
CARD_S1_A11
CARD_S1_IORD# <25>
>1ms PCI_AD11
41
43
AD12 CAD12/A11 95
92 CARD_S1_OE#
AD11 CAD11/OE# CARD_S1_OE# <25>
PCI_AD10 45 91 CARD_S1_CE2#
AD10 CAD10/CE2# CARD_S1_CE2# <25>
PCI_AD9 46 89 CARD_S1_A10
PCI_AD8 AD9 CAD9/A10 CARD_S1_D15
47 AD8 CAD8/D15 87
PCI_AD7 49 85 CARD_S1_D7
PCI_AD6 AD7 CAD7/D7 CARD_S1_D13
SUSPEND# 51 AD6 CAD6/D13 82
PCI_AD5 52 83 CARD_S1_D6
PCI_AD4 AD5 CAD5/D6 CARD_S1_D12
53 AD4 CAD4/D12 80
PCI_AD3 54 81 CARD_S1_D5
PCI_AD2 AD3 CAD3/D5 CARD_S1_D11 +S1_VCC
55 AD2 CAD2/D11 77
PCI_AD1 CARD_S1_D4
PCI_AD0
56
57
AD1 PQFP 144 CAD1/D4 79
76 CARD_S1_D3
AD0 CAD0/D3
PCIRST#
PCI_CBE#3 12
22.2 X 22.2 X 1.60 125 CARD_S1_REG# CARD_S1_OE# R806 1 2@ 43K_0402_5%
<19,26,27,32> PCI_CBE#3 C/BE3# CC/BE3#/REG# CARD_S1_REG# <25>
PCI_CBE#2 27 112 CARD_S1_A12
<19,26,27,32> PCI_CBE#2 C/BE2# CC/BE2#/A12
PCI_CBE#1 CARD_S1_A8 CARD_S1_CE2# R807 1 2@ 43K_0402_5%
SUSPEND# will gate the PCIRST# or <19,26,27,32> PCI_CBE#1
PCI_CBE#0
37
48
C/BE1# CC/BE1#/A8 99
88 CARD_S1_CE1#
<19,26,27,32> PCI_CBE#0 C/BE0# CC/BE0#/CE1# CARD_S1_CE1# <25>
GRST#, so need S3 wake up function, CARD_S1_CE1# R808 1 2@ 43K_0402_5%
PCI_RST# 20 119 CARD_S1_RST
SUSPEND# must be LOW ahead the PCIRST# <19,21,25,26,27,32,33> PCI_RST#
<19,26,27,32> PCI_FRAME# 28
RST# CRST#/RESET
111 CARD_S1_A23
CARD_S1_RST <25>
CARD_S1_RST R809 1 2@ 43K_0402_5%
FRAME# CFRAME#/A23 CARD_S1_A15
about 1ms. <19,26,27> PCI_IRDY# 29 IRDY# CIRDY#/A15 110
31 109 CARD_S1_A22
<19,26,27,32> PCI_TRDY# TRDY# CTRDY#/A22
32 107 CARD_S1_A21
<19,26,27> PCI_DEVSEL# DEVSEL# CDEVSEL#/A21
33 105 CARD_S1_A20
2 <19,26,27> PCI_STOP# STOP# CSTOP#/A20 2
34 104 CARD_S1_A14
<19,26,27> PCI_PERR# PERR# CPERR#/A14
35 133 CARD_S1_WAIT#
<19,26,27> PCI_SERR# SERR# CSERR#/WAIT# CARD_S1_WAIT# <25>
36 101 CARD_S1_A13
<19,26,27> PCI_PAR PAR CPAR/A13
1 2 1 123 CARD_S1_INPACK#
+3VS <19> PCI_REQ2# REQ# CREQ#/INPACK# CARD_S1_INPACK# <25>
R318 10K_0402_5% 2 106 CARD_S1_WE#
<19> PCI_GNT2# GNT# CGNT#/WE# CARD_S1_WE# <25>
CLK_PCI_PCM CLK_PCI_PCM 21 108 CARD_A16_CLK 1 2 CARD_S1_A16
<15> CLK_PCI_PCM PCLK CCLK/A16 R420 33_0402_5%
1
59 135 CARD_S1_BVD1
<33> CB_PME# RI_OUT#/PME# CSTSCHG/BVD1 CARD_S1_BVD1 <25>
R379 1 2 70 136 CARD_S1_WP
<18,26,33,34,35,43,44> SUSP# SUSPEND# CCLKRUN#/WP CARD_S1_WP <25>
33_0402_5% @ D17
@ RB751V_SOD323 PCI_AD20 1 2 PCI_PCM_ID 13 103 CARD_S1_A19
R408 100_0402_5% IDSEL CBLOCK#/A19
2
69 75 CARD_S1_CD1#
RSVD/D2
66 131 CARD_S1_VS1
<19,21,25,26,27,32,33> PCI_RST# VCC/GRST# CVS1/VS1# CARD_S1_VS1 <25>
CB1410_LQFP144
6
22
42
58
78
94
114
130
84
100
143
CARD_S1_D2
CARD_S1_A18
CARD_S1_D14
1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
PROPRIETARY NOTE Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401429
Date: 星期三, 七月 12, 2006 Sheet 24 of 47
A B C D E
A B C D E
SHDN
C198 CARD_S1_A5 24 58 CARD_S1_RST
GND
C194 CARD_S1_A4 A5 RESET CARD_S1_WAIT# CARD_S1_RST <24>
25 A4 WAIT# 59 CARD_S1_WAIT# <24>
10U_1206_10V4Z 0.1U_0402_16V4Z CARD_S1_A3 26 60 CARD_S1_INPACK#
2 2 CP-2211_SSOP16 CARD_S1_A2 A3 INPACK# CARD_S1_REG# CARD_S1_INPACK# <24>
27 61
16
CARD_S1_A1 A2 REG# CARD_S1_BVD2 CARD_S1_REG# <24>
28 A1 SPKR# 62 CARD_S1_BVD2 <24>
CARD_S1_A0 29 63 CARD_S1_BVD1
CARD_S1_D0 A0 STSCHG# CARD_S1_D8 CARD_S1_BVD1 <24>
30 D0 D8 64
PCI_RST# CARD_S1_D1 31 65 CARD_S1_D9
PCI_RST# <19,21,24,26,27,32,33> D1 D9
CARD_S1_D2 32 66 CARD_S1_D10
CARD_S1_WP D2 D10 CARD_S1_CD2#
<24> CARD_S1_WP 33 IOIS16# CD2# 67 CARD_S1_CD2# <24>
34 GND GND 68
2 +S1_VPP 1 2 C604 2
69 77 470P_0402_50V8J
GND GND
70 GND GND 78
1 71 GND GND 79
72 80 +S1_VCC
1 2 GND GND
C215 73 81
C241 4.7U_0805_10V4Z C243 GND GND
74 GND GND 82
2
1U_0805_25V4Z 75 GND GND 83 1 1 1
2 1
76 GND GND 84
0.01U_0402_16V7K C239 C216
87 89 0.1U_0402_16V4Z C238
GND GND 2 2 2
88 GND GND 90
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401429
Date: 星期三, 七月 12, 2006 Sheet 25 of 47
A B C D E
5 4 3 2 1
http://hobi-elektronika.net
+3VS
SD,MMC,MS,XD muti-function pin define
MDIO SD Card MMC Card MS Card XD Card
U34
<19,24,27,32> PCI_AD[0..31] PIN Name PIN Name PIN Name PIN Name PIN Name
10U_0805_4VAM
0.01U_0402_16V7K
PCI_AD31 125 10 1 1
PCI_AD30 AD31 VCC_PCI3V
126 AD30 VCC_PCI3V 20 MDIO00 SDCD# MMCCD# XDCD0#
C468
C506
PCI_AD29 127 27
PCI_AD28 AD29 VCC_PCI3V
1 32 MDIO01 MSCD# XDCD1#
PCI_AD27
PCI_AD26
2
3
AD28
AD27 R5C832 VCC_PCI3V
VCC_PCI3V 41
128
2 2 +3VS
MDIO02 XDCE#
PCI_AD25 AD26 VCC_PCI3V
5 AD25
PCI_AD24 6 61 MDIO03 SDWP# XDR/B#
PCI_AD23 AD24 VCC_RIN
9 AD23
0.1U_0402_16V4Z
10U_0805_4VAM
0.01U_0402_16V7K
0.01U_0402_16V7K
PCI_AD22 11 16 MDIO04 SDPWR0 MMCPWR MSWR XDPWR
PCI_AD21 AD22 VCC_ROUT
12 AD21 VCC_ROUT 34 1 1 1 1
D PCI_AD20 D
14 AD20 VCC_ROUT 64 MDIO05 SDPWR1 XDWP#
C515
C507
C489
C522
0.47U_0603_16V4Z
0.47U_0603_16V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
PCI_AD19 15 114 1 1 1 1
PCI_AD18 AD19 VCC_ROUT
17 AD18 VCC_ROUT 120
2 2 2 2
MDIO06 SDLED# MMCLED# MSLED# XDLED#
C464
C460
C491
C516
PCI_AD17 18
PCI_AD16 AD17
19 AD16 VCC_3V 67 +3VS 2 2 2 2
MDIO07 MSEXTCK
PCI_AD15 36 AD15
0.01U_0402_16V7K
10U_0805_4VAM
PCI_AD14 37 86 1 1 MDIO08 SDCCMD MMCCMD MSBS XDWE#
PCI_AD13 AD14 VCC_MD3V
38 AD13
C486
C505
PCI_AD12 39 98 +3V_PHY MDIO09 SDCCLK MMCCLK MSCCLK XDRE#
PCI_AD11 AD12 AVCC_PHY3V
40 AD11 AVCC_PHY3V 106
PCI_AD10 2 2
42 AD10 AVCC_PHY3V 110 MDIO10 SDCDAT0 MMCDAT MSCDAT0 XDCDAT0
PCI_AD9 43 112
PCI_AD8 AD9 AVCC_PHY3V
44 AD8 MDIO11 SDCDAT1 MSCDAT1 XDCDAT1
PCI_AD7 46 113 IEEE1394_TPBIAS0
PCI_AD6 AD7 TPBIAS0 +3V_PHY
47 AD6 MDIO12 SDCDAT2 MSCDAT2 XDCDAT2
PCI_AD5 48 109 IEEE1394_TPAP0 L18
PCI_AD4 AD5 TPAP0 IEEE1394_TPAN0
49 AD4 TPAN0 108 +3VS 1 2 MDIO13 SDCDAT3 MSCDAT3 XDCDAT3
PCI_AD3 50 AD3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
22U_0805_6.3V6M
1000P_0402_50V7K
1000P_0402_50V7K
PCI_AD2 51 105 IEEE1394_TPBP0 BLM21A601SPT_0805 MDIO14 XDCDAT4
PCI_AD1 AD2 TPBP0 IEEE1394_TPBN0
52 AD1 TPBN0 104
PCI_AD0 53 1 1 1 1 1 MDIO15 XDCDAT5
AD0 SDCD#_XDCD0#
MDIO00 80 SDCD#_XDCD0# <37>
C465
C470
C469
C466
C467
79 MSCD#_XDCD1 MDIO16 XDCDAT6
MDIO01 MSCD#_XDCD1 <37>
PCI_CBE#3 7 78 XD_CE#
<19,24,27,32> PCI_CBE#3 C/BE3# MDIO02 XD_CE# <37> 2 2 2 2 2
PCI_CBE#2 21 77 SDWP#_XDRB# MDIO17 XDCDAT7
<19,24,27,32> PCI_CBE#2 C/BE2# MDIO03 SDWP#_XDRB# <37>
PCI_CBE#1 35 76 SDPWR0_MSPWR_XDPWR
<19,24,27,32> PCI_CBE#1 C/BE1# MDIO04
PCI_CBE#0 45 75 XDWP# MDIO18 XDCLE
<19,24,27,32> PCI_CBE#0 C/BE0# MDIO05 XDWP# <37>
74 3IN1_LED#
MDIO06 3IN1_LED# <37>
73 TP_MSEXTCK MDIO19 XDALE
PCI_PAR MDIO07 SDCMD_MSBS
<19,24,27> PCI_PAR 33 PAR MDIO08 88 SDCMD_MSBS <37>
PCI_FRAME# 23 84 SDCLK_MSCLK
<19,24,27,32> PCI_FRAME# FRAME# MDIO09 SDCLK_MSCLK <37>
PCI_TRDY# 25 82 SDDATA0_MSDATA0
C <19,24,27,32> PCI_TRDY#
PCI_IR DY# 24
TRDY# MDIO10
81 SDDATA1_MSDATA1
SDDATA0_MSDATA0 <37> Function set pin define C
<19,24,27> PCI_IRDY# IRDY# MDIO11 SDDATA1_MSDATA1 <37>
PCI_STOP# 29 93 SDDATA2_MSDATA2 UDIO3 UDIO4 MSEN XDEN Function
<19,24,27> PCI_STOP# STOP# MDIO12 SDDATA2_MSDATA2 <37>
PCI_DEVSEL# 26 90 SDDATA3_MSDATA3
<19,24,27> PCI_DEVSEL# DEVSEL# MDIO13 SDDATA3_MSDATA3 <37>
PCI_AD22 1 2 CBS_IDSEL 8 91 XDD4 Pull-up Pull-up Pull-up Pull-up Enable
IDSEL MDIO14 XDD4 <37>
R455 100_0402_5% PCI_PERR# 30 89 XDD5 SD,XD,MS,MMC Card
<19,24,27> PCI_PERR# PERR# MDIO15 XDD5 <37>
PCI_SERR# 31 92 XDD6
<19,24,27> PCI_SERR# SERR# MDIO16 XDD6 <37>
87 XDD7
MDIO17 XDD7 <37> +3VS
85 XDCLE
MDIO18 XDCLE <37>
PCI_REQ0# 124 83 XDALE
<19> PCI_REQ0# REQ# MDIO19 XDALE <37>
PCI_GNT0# 123
<19> PCI_GNT0# GNT#
58 MSEN MSEN R474 1 2 10K_0402_5%
MSEN XDEN U DIO3 R468 10K_0402_5%
55 Layout Note: Place close to R5C832 Layout Note: Place close to R5C832 1 2
XDEN U DIO4 R475 10K_0402_5%
<15> CLK_PCI_1394 121 PCICLK and Shield GND for SDCLK_MSCLK and Shield GND for SD_CLK 1 2
119 94 R5C832XI U DIO5 R473 1 2 100K_0402_5%
<19,21,24,25,27,32,33> PCI_RST# PCIRST# XI
CBS_GRST# 71 95 R5C832XO 1 2
R436 1 GBRST# XO XDEN
2@ 10K_0402_5% 117 CLKRUN#
C471 R472 1 2 10K_0402_5%
70 96 0.01U_0402_16V7K
R435 1 PME# FIL0
<21,24,27,33> PCI_CLKRUN# 2 0_0402_5% REXT 101 C481
R5_PME# 100 1 2 R5C832XI
<33> R5_PME# VREF
10K_0603_1%
0.01U_0402_16V7K
<19> PCI_PIRQG# 115 INTA#
2
116 72 SIRQ 2 15P_0603_50V8J
<19> PCI_PIRQH# INTB# UDIO0/SERIRQ# SIRQ <21,24,32,33>
2
R441
60 TP_UDIO1 X2 Solve MS Duo Adaptor short problem
UDIO1 PAD T49
C461
56 TP_UDIO2
UDIO2 PAD T48
1 2 69 65 U DIO3 24.576MHz_16P_1BG24576CKIA
+3VS HWSPND# UDIO3 1
R464 10K_0402_5% 66 59 U DIO4 C473
1
TEST UDIO4 U DIO5 R5C832XO R490 2
UDIO5 57 1 2 1 0_0402_5%
<18,24,33,34,35,43,44> SUSP# 1 2
R463 @ 0_0402_5% 111 4 15P_0603_50V8J @ Q33
AGND GND SDDATA1_MSDATA1 SD_MSDATA1
3 2N7002_SOT23
S
107 AGND GND 13 1 SD_MSDATA1 <37>
103 22 R491 2 1 0_0402_5%
AGND GND
102 AGND GND 28
99 54 Layout Note: Shield GND for @ Q35
G
2
B AGND GND SDDATA2_MSDATA2 B
32N7002_SOT23 SD_MSDATA2
S
GND 62 CBS_CCLK_INTERNAL and CBS_CCLK 1 SD_MSDATA2 <37>
GND 63 1 2
97 68 R453 0_0805_5%
NC GND +VCC_4IN1
118
G
2
GND
S
GND 122 1 3 +VCC_4IN1_XD
+5VS @ Q31
R5C832_TQFP128~D 2N7002_SOT23
40mil 1 2
G
2
R456 @ 10K_0402_5%
1 2
Layout Note: Place close to R5C832 +3VS U35 +VCC_4IN1 R452 @ 10K_0402_5%
1
+VCC_4IN1 D D
3 1 SDCD#_XDCD0# 2 XDCD# 2
SDPWR0_MSPWR_XDPWR VIN VOUT
270P_0402_50V7K
4 5 G G
VIN/CE VOUT
1
5.1K_0603_1%
150K_0402_5%
0.1U_0402_16V4Z
1U_0603_10V4Z
10U_1206_6.3V6M
1 S S
3
C453
1
0.1U_0402_16V4Z
2 1 1 1 @ Q34 @ Q32
GND
R421
C517
R483
2N7002_SOT23 2N7002_SOT23
C521
C437
1 RT9701CB_SOT25
2
2
2 2 2
C494
CLK_PCI_1394 2
Z3008
1
2
56.2_0603_1%
56.2_0603_1%
4.7P_0402_50V8C10_0402_5%
R444
R439
R440
+3VS
@ D22
100K_0402_5%
MSCD#_XDCD1 2
2
1
1
1 XDCD#
XDCD# <37>
R462
JP13 SDCD#_XDCD0# 3
2 IEEE1394_TPBN0 1 5
A IEEE1394_TPBP0 TPB- GND DAN202U_SC70 A
2 TPB+ GND 6
C463
IEEE1394_TPAN0 3 7
2
ME@
2
2
56.2_0603_1%
56.2_0603_1%
1
Layout Note: Shield GND for
2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
R437
R438
C459
C462
1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
IEEE1394_TPBIAS0 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三 , 七月 12, 2006 Sheet 26 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net
+3VALW +3VS
+3V_LAN
1
R498
0_0603_5%
R499
GIGA@ 2SB1188_SC62
Lan Conn.
0_0603_5%
3
@ 2 1
U24 R403 C385 C525 @68P_0402_50V8K
2
2 1 CTRL12 1 +1.2V_LAN JP41
+3V_LAN
ACTIVITY# 1 2 10mil 10 Green LED-
3
1U_0603_10V4Z R327 @300_0402_5%
Q21 9
2
CTRL25 +3VALW Green LED+
1
8100CL 5.6K_0603_1% 1 MDO3- 1
100@ 100@ +2.5V_LAN PR4-
1
Q27 GIGA@ + MDO3+ 2
2
D 2SB1188_SC62 C374 C379 PR4+ D
1
PCI_AD17 58 18 NC/MDI3+ C442 C443
PCI_AD18 AD17 NC/MDI3+ NC/MDI3- 27P_0402_50V8J 27P_0402_50V8J R815
57 AD18 NC/MDI3- 19
PCI_AD19 2 2 0_0603_5% U23
55 AD19
PCI_AD20 53 121 LAN_X1
PCI_AD21 AD20 X1 LAN_X2
50 122
2
C PCI_AD22 AD21 X2 TXD+/MDI0+ MDO0+ C
49 AD22 12 TD4- MX4- 13
PCI_AD23 47 105 R319 1 2 1K_0402_5% C398 GIGA@ TXD-/MDI0- 11 14 MDO0-
PCI I/F
GND NC/VDD12
Power
1 52 GND NC/VDD12 45 2 2 2 2 2 2 1
80 64 GIGA@ C380 C383 GIGA@ C439 C444 C407 RXIN-/MDI1- 2 1
C397 GND NC/VDD12 GIGA@ R365
100 GND NC/VDD12 110
@ 10P_0402_50V8J 116 GIGA@ 0.1U_0402_16V4Z GIGA@ 0.1U_0402_16V4Z 49.9_0402_1% 0.01U_0402_16V7K
2 NC/VDD12 1 1 1 1 1
A 0.1U_0402_16V4Z 0.1U_0402_16V4Z A
12 V_12P R350 1 2 0.1U_0402_16V4Z
NC
1 100@ 0_0402_5%
+2.5V_LAN
near LAN controller
RTL8110SBL_LQFP128 C414 R351 1 2 +AVDDH
GIGA@ GIGA@ 0_0402_5%
0.1U_0402_16V4Z
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 27 of 47
5 4 3 2 1
A B C D E
http://hobi-elektronika.net
Mini-Express Card(Slot 1-WLAN)
1 1
JP16
<21> ICH_PCIE_WAKE# 1 1 2 2 +3VS
BT_AVTIVE R479 2 1 @ 0_0402_5% 3 4
WLAN_AVTIVE R480 2 @ 0_0402_5% 3 4
1 5 5 6 6 +1.5VS
0.1U_0402_16V4Z
<15> CLKREQ_MCARD# 7 7 8 8
0.1U_0402_16V4Z
9 9 10 10 1
C498
CLK_PCIE_MCARD# 11 12 1
<15> CLK_PCIE_MCARD# 11 12 +3VALW
MDC CONN.
C499
CLK_PCIE_MCARD 13 14
<15> CLK_PCIE_MCARD 13 14
15 15 16 16 C495
1
2
17 17 18 18
2
19 19 20 20 RF_OFF# <33> 1 2
21 22 PLT_RST# R495 JP17
21 22 PLT_RST# <7,19,23>
23 24 +3VALW 10K_0402_1%
<21> PCIE_RXN2 23 24 1U_0805_25V4Z
<21> PCIE_RXP2 25 26 1 2
2
25 26 GND1 RES0
27 27 28 28 <20> ICH_SDOUT_MDC 3 IAC_SDATA_OUT RES1 4
29 30 ICH_SMBCLK ICH_SMBCLK <15,21> 5 6
29 30 GND2 3.3V +3VALW
31 32 ICH_SMBDATA ICH_SMBDATA <15,21> AZ _SYNC 7 8
<21> PCIE_TXN2 31 32 <20> ICH_SYNC_MDC IAC_SYNC GND3
33 34 <20> ICH_AC_SDIN1 R107 1 2 AZ_SDIN3 9 10
<21> PCIE_TXP2 33 34 IAC_SDATA_IN GND4
35 36 <20> ICH_RST_MDC# R496 2 133_0402_5% 11 12
35 36 @ 0_0402_5% IAC_RESET# IAC_BITCLK ICH_BITCLK_MDC <20>
37 37 38 38
1
39 40 D23
39 40
41 42 2
GND
GND
GND
GND
GND
GND
41 42 W IRELESS_LED# R861
43 43 44 44 WIRELESS_LED# <37> 1
45 46 3 @ 10_0402_5%
45 46 <21> KILL_MDC#
47 48 ACES_88018-124G
13
14
15
16
17
18
2
47 48 DAP202U_SOT323
49 49 50 50 1
2 2
51 51 52 52
Connector for MDC Rev1.5 C649
53 54 @ 10P_0402_50V8J
GND1 GND2 2
FOX_AS0B226-S56N-7F
+5VS
+5VS BT MODULE CONN (HDL00@) BT MODULE CONN 2 (HDL20@)
1
1
R801
R108 10K_0402_1%
3 10K_0402_1% 3
1 2
RF_OFF2
1 2
RF_OFF
2 Q705
<33> RF_OFF# 2 Q9 BT MODULE CONN <33> RF_OFF#
DTC124EK_SC59
DTC124EK_SC59
+3VS Q706 +3VS_BT2
HDL00@ +3VS Q22 +3VS_BT C600
D
C164 3 1 2 1
3
3 1 2 1 AO3413_SOT23
AO3413_SOT23 0.1U_0402_16V4Z
0.1U_0402_16V4Z BTONLED
G
<37> BTONLED
2
BTONLED
G
<37> BTONLED
2
JP51
1
JP38 1 1
1
1 1 2 2
2 <21> USB20_N7 USB20_N7 3
USB20_N1 2 USB20_P7 3
<21> USB20_N1 3 3 <21> USB20_P7 4 4
<21> USB20_P1 USB20_P1 4 Q708 2 BTON_LED2 5
Q23 BTON_LED 4 DTC124EK_SC59 BT_AVTIVE 5
2 5 5 6 6
DTC124EK_SC59 BT_AVTIVE 6 WLAN_AVTIVE 7
6 7
1
WLAN_AVTIVE 7 8
7 8
1
8 9
3
HDL00@ 8 R810 GND1
9 10
3
2
MOLEX_53780-0870 ME@
2
ME@
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 28 of 47
A B C D E
A B C D E
+VDDA http://hobi-elektronika.net
1
R153
10K_0402_1%
AC97 Codec
2
2 1C255
1
C263 R168 1U_0603_10V4Z 28.7K for Module Design (VDDA = 4.702)
<33> BEEP# 2 1 1 2
R159 +5VS +5VAMP
C477
1
560_0402_5% 10K_0402_1% U33
(output = 250 mA)
1 1U_0603_10V4Z C487 1U_0603_10V4Z L22 1 2 60mil 4 5 40mil +VDDA
1
2
@ 0.1U_0402_10V6K VIN VOUT
1 2MONO_IN1 2 1 MONO_IN KC FBM-L11-201209-221LMAT_0805
2
2 R158 20K_0402_5% L21 1 2 2 DELAY SENSE or ADJ 6 1 4.85V
R167 1 KC FBM-L11-201209-221LMAT_0805 1
1 2 C490 7 1 R449 C478
C253 ERROR CNOISE
1
R160 C 150K_0603_1% 10U_0805_10V4Z
Q12 10K_0402_5% 10U_0805_10V4Z C482 2
<24> PCM_SPK# 2 1 1 2 2 8 3 1
1
B 2SC2411K_SC59 2 2 10U_1206_16V4Z SD GND C476
1
C472 560_0402_5% E SI9182DH-AD_MSOP8
1
1U_0603_10V4Z
@ 0.1U_0402_10V6K 2
2 R450
C254
R161 0.1U_0402_16V4Z 51K_0603_1%
<21> SB_SPKR 2 1 1 2
2
1
1
560_0402_5% D4
1U_0603_10V4Z R171
@ 10K_0402_5% 2 RB751V_SOD323
2
+VDDC
R816
+AVDD_AC97 20mil 1 2 +3VS
L23 FBM-L10-160808-301-T_0603
1 2 0.1U_0402_16V4Z 40mil
+VDDA
CD_AGND R817 2 1 CD_GNA FBM-L10-160808-301-T_0603 1 1 1
<23> CD_AGND
1 1 1 C605 C606 C607
2 20K_0402_5% C609 C610 2
1
25
38
9
2 GNDA 2 2 U39 0.1U_0402_16V4Z
20K_0402_5%
AVDD1
AVDD2
DVDD1
DVDD2
0.1U_0402_16V4Z
2
GNDA
1
<30,33> EAPD 1 2
R862 0_0603_5% 4 26 GNDA C625 R834
DVSS1 AVSS1 4.99K_0402_1%
EMI request add one pcs 0216 7 DVSS2 AVSS2 42 1000P_0402_50V7K
1
VC@ VC@
ALC861-VD-GR_LQFP48
2
1 2
R835 0_0603_5%
+MIC2_VREFO +AUD_VREF +MIC1_VREFO_L
1 2
R836 0_0603_5%
1 1 1
10mil 1 1 1
1 2 @ @
4 R837 0_0603_5% @ C626 C627 @ C628 C629@ @ C630 C631 4
1U_0603_10V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2
1 2 GNDA GNDA GNDA
R838 0_0603_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 29 of 47
A B C D E
A B C D E
http://hobi-elektronika.net Boot
EC_Mute Sequence
ACPI Driver Entry S3
EAPD
+5VAMP +5VAMP W=40mil
3Sec
0.1U_0402_16V4Z +3VS
1
EC_Mute
R839 1 1 HDL00/10
10K_0402_5% C632
2
1 C633 1
@
4.7U_0805_10V4Z R840
2
VOLMAX 2 2
10K_0402_5%
@
1
1
R842 10 1 MUTE_AMP R841 1 2 10K_0402_5%
VDD MUTE AMP_OFF# R843 1 0_0402_5% MUTE#
0_0402_5% 15 VDD SHUTDOWN# 2 2
VOL_AMP LOUT-
<33> VOL_AMP 7 VOLUME
16 SPKR- L25 1 2 0_0603_5% SPKR-O
VOLMAX ROUT-
8 VOLMAX
11 SPKL+ L26 1 2 0_0603_5% SPKL+O JP20
BTL# LOUT+ SPKL+O
1 2 13 SE/BTL# 1
R844 0_0402_5% 14 SPKR+ L27 1 2 0_0603_5% SPKR+O SPKL-O
LINE_OUTL LEFT_2 R845 1 L IN ROUT+ SPKR+O 2
<29> LINE_OUTL 1 2 2 10K_0402_5% 6 LIN- 3
C635 0_0603_5% 3 SPKR-O
LINE_OUTR RIGHT_2 R846 1 RIN RIN- 4
<29> LINE_OUTR 1 2 2 10K_0402_5% GND 5
C636 0_0603_5% 4 12 1 1 1 1 ACES_85204-0400
BYPASS GND C163 C162 C168 C167
1 ME@
APA2068KAI-TRL_SOP16
C637 @ 47P_0402_50V8J @ 47P_0402_50V8J @ 47P_0402_50V8J
4.7U_0805_10V4Z 2 2 2 2
2 @ 47P_0402_50V8J
+3VS +MIC2_VREFO
2 2
EXT MIC +MIC1_VREFO_L INT MIC
1
R847
1
10K_0402_5%
@
1
R848
2
3K_0402_5%
1 2 MUTE_AMP R849
2
R864 @ 0_0402_5% 3K_0402_5%
1
L28
2
MUTE 1 2 FBM-11-160808-601-T_0603
<29> MIC EXT_MIC <37> INT_MIC <29,37>
R850 1 2 MUTE#
<33> EC_MUTE#
0_0402_5%
R851 1 2 2 Q709 1 1
<29,33> EAPD
@ 0_0402_5% DTC124EK_SC59
@ C638 C639
47P_0402_50V8J 47P_0402_50V8J
2 2
3
GNDA GNDA
3 3
+3VS
HEADPHONE
C640
Reserve the 0 ohm resistor. R852 47_0402_5%
1
1 2 1 2 1 2
R853 for voltage filtering L29 FBMA-L11-160808-121LMT_0603
PL <37>
+3VS 0_0603_5% @
330U_V_6.3VM_R25
1 2 JACK_PLUG
C642 JACK_PLUG <29,37>
2
1 2 1 2 1 2 PR <37>
R855 L30 FBMA-L11-160808-121LMT_0603
1
0_0402_5% @ R856 R857
19
10
330U_V_6.3VM_R25 1 1
@ U41 C643 C644
1
47P_0402_50V8J 47P_0402_50V8J C
PVDD
SVDD
2
2
18 9 HP_OUTL E @
3
SHDNL# OUTL
1
C
MUTE 1 2 2 Q711
R859 @ 1K_0402_5% B 2SC2411K_SC59
4 E @
3
NC-4
<29> HP_R 1 2 H P_INR 15 INR 1 2
C645 1U_0603_10V4Z 6 R860 @ 1K_0402_5%
NC-6
<29> HP_L 1 2 HP_INL 13 INL
C646 1U_0603_10V4Z 8
NC-8
NC-12 12
4 4
1 C1P NC-16 16
1
PGND
SGND
3 20
PVss
SVss
17
C648
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
1U_0603_10V4Z Size Document Number Rev
2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 30 of 47
A B C D E
http://hobi-elektronika.net
+5VALW 1000P_0402_50V7K
1
1 1 1 1
C174 + C161 C160 C534 C535
+USB_VCCA 150U_D_6.3VM 0.1U_0402_16V4Z
U25
2 2 2 2 2
1 GND OUT 8
C411 0.1U_0402_16V4Z 2 7
IN OUT 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 1 3 IN OUT 6
4 EN# FLG 5 USB_OC#0 <21>
USB_ON# JP21
<33,37> USB_ON#
G528_SO8 1 VCC
<21> USB20_N0 2 D-
1 <21> USB20_P0 3 D+
C417 1 1 4 GND
2
@ 1000P_0402_50V7K
D14 C321 C322 5
2 @ PSOT24C_SOT23 @ 10P_0402_50V8J @10P_0402_50V8J GND1
6 GND2
2 2
7 GND3
8 GND4
1
For EMI SUYIN_020173MR004G565ZR
ME@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 31 of 47
5 4 3 2 1
http://hobi-elektronika.net
@ SW3
1 3
Power BTN
2 4
6
5
D D
@ SW1 +3VALW
1 3
1
2 4
KSI[0..7] KSI1 @ C650 1 2 100P_0402_50V8J R118
KSI[0..7] <33>
SMT1-05_4P 100K_0402_5%
6
5
KSI7 @ C651 1 2 100P_0402_50V8J
KSO[0..16]
KSO[0..16] <33>
2
KSI6 @ C652 1 2 100P_0402_50V8J D2
2 ON/OFF ON/OFF# <33>
KSO9 @ C653 1 2 100P_0402_50V8J ON/OFFBTN# 1
<37> ON/OFFBTN#
3 51ON# 51ON# <39>
KSI4 @ C654 1 2 100P_0402_50V8J
+3VALW DAN202U_SC70
KSI5 @ C655 1 2 100P_0402_50V8J Q10
JP26
1
KSI1 1 KSO0 @ C656 1 2 100P_0402_50V8J DTC124EK_SC59 1
1
1
KSI7 2 R113 D1
KSI6 2 KSI2 @ C657 1
3 3 2 100P_0402_50V8J 4.7K_0402_5% RLZ20A_LL34
KSO9 4
KSI4 4 KSI3 @ C658 1 2 C205
5 2 100P_0402_50V8J
2
KSI5 5 EC_ON 1000P_0402_50V7K
6 6 <33> EC_ON 1 2 2
KSO0 7 KSO5 @ C659 1 2 100P_0402_50V8J R804 33K_0402_5%
KSI2 7
8 8
KSI3 9 KSO1 @ C660 1 2 100P_0402_50V8J
KSO5 9
10
3
KSO1 10 KSI0 @ C661 1
11 11 2 100P_0402_50V8J
KSI0 12 12
1
KSO2 KSO2 @ C662 1 D
13 13 2 100P_0402_50V8J
KSO4 14 2
KSO7 14 KSO4 @ C663 1
15 15 2 100P_0402_50V8J G
C KSO8 Q707 C
16 S
3
KSO6 16 KSO7 @ C664 1
17 17 2 100P_0402_50V8J 2N7002_SOT23
KSO3 18
KSO12 18 KSO8 @ C665 1
19 19 2 100P_0402_50V8J
KSO13 20
KSO14 20 KSO6 @ C666 1
21 21 2 100P_0402_50V8J
KSO11 22
KSO10 22 KSO3 @ C667 1
23 23 2 100P_0402_50V8J
KSO15 24 24 KSO12 @ C668 1 2 100P_0402_50V8J
ACES_85202-2405
KSO13 @ C669 1 2 100P_0402_50V8J
+3VALW
KSO14 @ C670 1 2 100P_0402_50V8J
1
KSO11 @ C671 1 2 100P_0402_50V8J
R805
KSO10 @ C672 1 2 100P_0402_50V8J 100K_0402_5%
@
KSO15 @ C673 1 2 100P_0402_50V8J
2
D31
2 INST_ON# INST_ON# <33>
INSTANT_ON# 1
<37> INSTANT_ON#
SW4 3 51ON#
1 3 @ DAN202U_SC70
2 4
@ SMT1-05_4P
6
5
B B
JP33 JP43
1 1 PCI_CBE#0 FOR PORT 80 DEBUG PORT EC DEBUG PORT
1
2
+5VS FOR LPC SIO DEBUG PORT 1
2 PCI_AD6
PCI_CBE#0 <19,24,26,27>
PCI_AD6 <19,24,26,27>
2 2 PCI_AD4
3 3 +3VS 3 3 PCI_AD4 <19,24,26,27>
4 4 PCI_AD2
4 4 PCI_AD2 <19,24,26,27>
5 5 PCI_AD0
5 5 PCI_AD0 <19,24,26,27>
6 6 PCI_AD1
6 CLK_14M_SIO <15> LPC_AD[0..3] 6 PCI_AD1 <19,24,26,27>
7 LPC_AD0 7 PCI_AD3
7 LPC_AD[0..3] <20,33> 7 PCI_AD3 <19,24,26,27>
8 LPC_AD1 8 PCI_AD5 JP22
8 8 PCI_AD5 <19,24,26,27>
9 LPC_AD2 9 PCI_AD7 +5VALW 1
9 9 PCI_AD7 <19,24,26,27> 1
LPC_AD3 PCI_AD8
10 10
LPC_FRAME# 10 10
PCI_CBE#1
PCI_AD8 <19,24,26,27> <33> EC_TX 2 2 P80_DATA
11 11
12 LPC_DRQ#0
LPC_FRAME# <20,33>
R391 11 11
12 PCI_CBE#2
PCI_CBE#1 <19,24,26,27> <33> EC_RX 3
4
3 P80_CLK
12 LPC_DRQ#0 <20> 12 PCI_CBE#2 <19,24,26,27> 4
13 PCI_RST# 10K_0402_5% 13 PCI_CBE#3
13 PCI_RST# <19,21,24,25,26,27,33> 13 PCI_CBE#3 <19,24,26,27>
14 2 1 14 ACES_85205-0400
14 14
15 15 CLK_PCI_DB <15> 15 15 CLK_PCI_DB <15> ME@
16 SIRQ 16 +5VS
16 SIRQ <21,24,26,33> 16
17 17 17 17 PCI_RST# <19,21,24,25,26,27,33>
18 18 18 18 PCI_FRAME# <19,24,26,27>
19 19 19 19 PCI_TRDY# <19,24,26,27>
20 20 PCI_AD9
20 20 PCI_AD9 <19,24,26,27>
ACES_85201-2005 ACES_85201-2005
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 32 of 47
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net +3VALW
+EC_AVCC
Analog Board ID definition,
Please see page 3.
L6
1 2 +3VALW +3VALW
+3VALW +EC_AVCC
FBM-11-160808-601-T_0603 2 1
C212 1 1 1 1 1 1
C211
0.1U_0402_16V4Z
C231
0.1U_0402_16V4Z
C447
0.1U_0402_16V4Z
C248
0.1U_0402_16V4Z
C220
1000P_0402_50V7K
C237
1000P_0402_50V7K
C201
0.1U_0402_16V4Z
2
1000P_0402_50V7K
1 ECAGND 2 R492 R119
1 2
2 2 2 2 2 2 Ra
L7 FBM-11-160808-601-T_0603 100K_0402_1% 100K_0402_1%
@
1
D
ADP_ID SKU_ID D
1 1
2
C524 C208
105
127
141
0.1U_0402_16V4Z R493 R115 Rb
11
26
37
75
0.1U_0402_16V4Z
U6 2 1 ECAGND 0_0402_5% 56K_0402_5%
BATT_TEMP C202 0.01U_0402_16V7K @ 2 @ 2
1 71
VCC/ EC VCC
VCC / EC VCC
VCC / EC VCC
VCC / EC VCC
EC_AVCC / AVCC
VCC
VCC
<20> GATEA20 GA20/ GPIO00/GA20 BATTEMP/AD0/GPIO38 BATT_TEMP <40>
2 72 BATT_OVP
<20> KB_RST# BATT_OVP <41>
1
KBRST#/GPIO01/KBRST# BATT OVP/AD1/GPIO39 ADP_ID
<21,24,26,32> SIRQ 3 SERIRQ ADP_I/AD2/GPIO3A 73 ADP_ID <39>
5 74 SKU_ID
<20,32> LPC_FRAME# LPC_FRAME# / LFRAME# AD BID0/AD3/GPIO3B
LPC_AD3 6
<20,32> LPC_AD3 LPC AD3/LAD3
LPC_AD2 9 AD INtput or GPI
<20,32> LPC_AD2 LPC AD2/LAD2
LPC_AD1 10 Host +3VALW
<20,32> LPC_AD1 LPC AD1/LAD1 INTERFACE
LPC_AD0 12
<20,32> LPC_AD0 LPC AD0/LAD0
14 76 DAC_BRIG
<15> CLK_PCI_LPC CLK_PCI_EC/PCICLK DAC_BRIG/DA0/GPIO3D DAC_BRIG <16>
15 PWR 78 EN_FAN1
<19,21,24,25,26,27,32> PCI_RST# PCIRST# EN DFAN1/DA1/GPIO3D EN_FAN1 <4>
2
2 1 2 1 1 2 EC_RST# 42 79 IREF
+3VALW EC RST#/ ECRST# IREF2/DA2 IREF <41>
R143@ 10_0402_5% R112 47K_0402_5% EC_SCI# 24 80 1 2 R125 Ra
<21> EC_SCI# EC SCI#/SCI#/GPIO0E EN DFAN2/DA3/ GPIO3F VOL_AMP <30>
C232 R3361 2 44 R486 0_0402_5% 100K_0402_1%
<21,24,26,27> PCI_CLKRUN# PM_CLKRUN#/ CLKRUN# DA output or GPO
@ 22P_0402_50V8J 2 @ 0_0402_5% 15W@
C200 FAN/PWM
1
0.1U_0402_16V4Z 25 INVT_PWM MB_ID
INVT_PWM/GPIO0F/PWM1 INVT_PWM <16>
KSI0 63 27 BEEP#
KSI0/GPIO30 BEEP#/GPIO10/PWM2 BEEP# <29>
2
1 KSI1 AMP_MUTE#
64 KSI1/GPIO31 OUT BEEP/GPIO12/PWM3 30 AMP_MUTE# <37>
+3VALW KSI2 65 31 ACOFF R126 Rb
KSI2/GPI032 ACOFF/GPIO18/PWM4 ACOFF <39,41>
KSI3 66 32 FAN_SPEED1 0_0402_5%
KSI3/GPIO33 FAN SPEED1/GPIO14/FANFB1 FAN_SPEED1 <4>
KSI4 67 33 MB_ID 14W@
KSI4/GPIO34 FAN SPEED2/GPIO15/FANFB2
2
KSI5 68
1
R134 KSI6 KSI5/GPI035
69 KSI6/GPIO36
10K_0402_5% KSI7 70 91 EC_P80_CLK
KSI7/GPIO37 PSCLK1 EC_P80_CLK <13,14>
key Matrix 92 EC_P80_DATA
PSDAT1 EC_P80_DATA <13,14>
KSO0 47 scan 93
1
4
AGND
10P_0402_50V8J
10P_0402_50V8J
IN
OUT
2 2
KB910L_LQFP144
139
129
103
13
28
39
77
NC
NC
ECAGND
3
<35> SYSON# SYSON# 1 2 USB_ON#
USB_ON# <31,37>
A @ R866 0_0402_5% X1 32.768KHZ_12.5P_1TJS125BJ2A251 A
<For USB Port>
EC_GPIO4A 1 2
+3VALW 1 2 R867 0_0402_5%
R869 10K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401429
Date: 星期三, 七月 12, 2006 Sheet 33 of 47
5 4EC_GPIO4A 3 2 1
http://hobi-elektronika.net
+5VALW
+5VALW
1
C199
1 2 0.1U_0402_16V4Z R116
100K_0402_1%
U4
2
8 VCC A0 1
7 WP A1 2
<33,40> EC_SMB_CK1 6 SCL A2 3
<33,40> EC_SMB_DA1 5 SDA GND 4
AT24C16AN-10SU-2.7_SO8~N
+3VALW +3VALW
1
C501
R117
1
1 2 R442 100K_0402_1%
100K_0402_1%
SUSP# <18,24,26,33,35,43,44>
0.1U_0402_16V4Z
2
U32
2
G
5
TC7SH32FU_SSOP5
2
2 1 3
P
I0 EC_FLASH# <21>
FWE# 4
S
O
I1 1
G
Q30
2N7002_SOT23
3
+3VALW
FWR# <33>
U26 R337
5
@TC7SH32FU_SSOP5 @ 100K_0402_5%
R339 2 INT_FLASH_EN# 1 2
P
INT_FSEL# 1 I0
2 4 O
1 FSEL#
I1 FSEL# <33>
G
@ 22_0402_5%
3
1 2
R338 0_0402_5%
KBA[0..19]
<33> KBA[0..19]
ADB[0..7]
1MB Flash ROM
<33> ADB[0..7]
+3VALW
U30
KBA0 21 31
KBA1 A0 VCC0
20 A1 VCC1 30 1
KBA2 19 C416
KBA3 A2
18 A3
KBA4 17 25 ADB0 0.1U_0402_16V4Z
KBA5 A4 D0 ADB1 2
16 A5 D1 26
KBA6 15 27 ADB2
KBA7 A6 D2 ADB3
14 A7 D3 28
KBA8 8 32 ADB4
KBA9 A8 D4 ADB5
7 A9 D5 33
KBA10 36 34 ADB6
KBA11 A10 D6 ADB7
6 A11 D7 35
KBA12 5
KBA13 A12
4 A13
KBA14 3 10 RESET# 1 2 +3VALW
KBA15 A14 RP# R443
2 A15 NC 11
KBA16 1 12 100K_0402_1%
KBA17 A16 READY/BUSY#
40 A17 NC0 29
KBA18 13 38
KBA19 A18 NC1
37 A19
INT_FSEL# 22
FR D# CE#
<33> FRD# 24 OE# GND0 23
FWE# 9 39
WE# GND1
SST39VF080-70-4C-EIE_TSOP40~N
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 34 of 47
A B C D E F G H I J
http://hobi-elektronika.net +5VALW
1
R92
+5VALW to +5VS Transfer
1 47K_0402_5% 1
2
+5VALW +5VS SYSON#
<33> SYSON#
1
U27 0.1U_0402_16V4Z D
8 D S 1 <33,43> SYSON 2
C435 1 7 2 G Q6
+VSB 10U_0805_10V4Z D S 2N7002_SOT23
6 3 1 1 S
3
D S
5 D G 4
C426 C419
1
2 SI4800DY_SO8 10U_0805_10V4Z
R384 2 2 +5VALW
22K_0402_5%
1
2
RUNON R334
2 2
1 10K_0402_5%
1
D C434
2
SUSP 2 0.1U_0603_25V7K SUSP
<44> SUSP
G
1
Q26 2 D
S
3
2N7002_SOT23 2
<18,24,26,33,34,43,44> SUSP#
G Q24
S 2N7002_SOT23
3
3 3
1
2 SI4800DY_SO8 10U_0805_10V4Z
R136 2 2
33K_0402_5%
2
R132 1 2 RUNON +5VS +1.8VS +0.9VS
@ 0_0402_5%
1
1
D C224
SUSP 2 0.1U_0603_25V7K R335 R58 R106
G
Q11 S 2 470_0402_5% 470_0402_5% 470_0402_5%
3
2N7002_SOT23
1 2
1 2
1 2
D D D
5 5
2 SUSP 2 SUSP 2 SUSP
G G G
S Q25 S Q3 S Q8
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23
+1.8V
1
+1.8VS VGA@
U17 0.1U_0402_16V4Z R228 R731 R105
8 D S 1
1 7 2 470_0402_5% 470_0402_5% 470_0402_5%
6 +VSB D S 6
C313 6 3 1 1
1 2
1 2
1 2
VGA@ D S C131 C133
5 D G 4 D D D
10U_0805_10V4Z VGA@
2
3
VGA@ 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23
1
R129 1 2 RUNON
@ 0_0402_5%
1
1
D C312
SUSP 2 0.1U_0603_25V7K
G VGA@
Q20 S 2
3
7 2N7002_SOT23 7
VGA@
8
Security Classification Compal Secret Data Compal Electronics, Inc. 8
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 35 of 47
A B C D E F G H I J
5 4 3 2 1
http://hobi-elektronika.net
D
CMOS Camera Conn D
+5VS
2 1
C292 C293
@ 0.1U_0402_10V6K
4.7U_0603_6.3V6M 1 2
VGA I/O PORT Connector JP42
1 1
<21> USB20_N3 USB20_N3 2 1 2
JP6 USB20_P3 R488 2 0_0603_5% 2
<21> USB20_P3 1 3 3
VGA_DDC_DAT 1 2 R489 0_0603_5% 4
<17> VGA_DDC_DAT VGA_DDC_CLK 1 2 CRMA 4
<17> VGA_DDC_CLK 3 3 4 4 CRMA <17> 5 5
JVGA_HS 5 6 6
<17> JVGA_HS JVGA_VS 5 6 LUMA GND1
<17> JVGA_VS 7 7 8 8 LUMA <17> 7 GND2
9 9 10 10
RED 11 12 COMP ACES_88266-05001
<17> RED 11 12 COMP <17>
13 13 14 14 ME@
GREEN 15 16 +3VS
<17> GREEN 15 16
17 17 18 18 +5VS
BLUE 19 20
<17> BLUE 19 20
ACES_87216-2012
ME@
C C
1
D21
PSOT24C_SOT23
@
LID Switch (HDL00@) JP37
3
USB20_P5 4
<21> USB20_P5 4
USB20_N5 3
<21> USB20_N5 3
2 2
+3VS 1 1
+3VALW
+3VALW 1 2 2 1 ACES_85201-0405
R195 0_0402_5%
2
C315 C314
2
D19
1
2 C287
U13 10P_0402_25V8K
1
A3212ELHLT-T_SOT23W-3
B B
Kill Switch
+3VS
LID Switch 2 (HDL20@) SW2
1 2 3 3
R188 @ 10K_0402_5%
<33,37> KILL_SW# 2 2
+3VALW
KILL_SW#
+3VALW 1 2 1 1
R800 0_0402_5%
2
1
2
D30
1
2 C602
U38 10P_0402_25V8K
1
A3212ELHLT-T_SOT23W-3
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 36 of 47
5 4 3 2 1
5 4 3 2 1
5
U20
ODD_LED# 1
B
Front LEDs (HDL00@) <23> ODD_LED#
SATA_LED# 2
B
P Y 4 DRIVE_LED# +5VALW
+USB_VCCB B
<20> SATA_LED# A
G
+3VS U9
D6 TC7SH08FUF_SSOP5 1 8
3
+3VALW
SUSP_LED#
D8 T/P Board +5VALW
+USB_VCCC
<33> SUSP_LED# 2 1 1 2
R191 200_0402_5% U10
HT-110UYG-CT_YEL/GRN 1 8
+5VS C276 0.1U_0402_16V4Z GND OUT
2 IN OUT 7
D5 2 1 3 6
CHARGE0 JP28 IN OUT
<33> CHARGE_LED0# 1 2 2 4 EN# FLG 5 1 2 USB_OC#6 <21>
R192 200_0402_5% USB_ON# R172 0_0402_5%
1 <31,33> USB_ON#
1 G528_SO8
2
CHARGE1 3
<33> CHARGE_LED1# 1 2 3 4
R189 200_0402_5% TP_DATA <33> 1
5 C273
6 TP_CLK <33>
HT-210UD/UYG_AMB/GRN @ 1000P_0402_50V7K
ACES_85201-0605
2
A A
KILL WL BT CHARGE SLP MIC1 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 37 of 47
5 4 3 2 1
A B C D E F G H I J
http://hobi-elektronika.net
1 1
2 2
3 3
4 4
5 5
CF6 CF9 CF11 CF10 CF12 CF2 CF1 CF4 CF3 CF5
1 1 1 1 1 1 1 1 1 1
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
6 6
1
1
H11 H12 H13 H14 H15 H17 H18 H19 H20
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
7 H21 H22 H23 H24 H25 H26 H27 H28 7
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
8
Security Classification Compal Secret Data Compal Electronics, Inc. 8
Issued Date 2005/10/06 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401429 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 七月 12, 2006 Sheet 38 of 47
A B C D E F G H I J
A B C D
+3VALWP
@
PR213
10K_0402_1%
1 2 ADP_ID
http://hobi-elektronika.net
<33>
Precharge detector
ACIN BATT ONLY
Precharge detector
680P_0603_50VK
Min. typ. Max. Min. typ. Max.
2
0.1U_0402_16V7K
H-->L 13.843V 14.247V 14.636V H-->L 6.138V 6.214V 6.359V
1
PC154
PC185
PJP1 @PR279
@ JST_B5B-EH-A(LF)(SN) 0_0402_5% @ PD20 L-->H 14.936V 15.381V 15.814V L-->H 7.196V 7.349V 7.505V
2
V-PORT-0603-220 M-V05_0603 VIN
1 1 1 2
1
2 PF1 PL2
1
2 12A_65V_451012MRL ADPIN FBMA-L18-453215-900LMA90T_1812 PR2 1
3 2 1 1 2 1K_1206_5%
3
10_1206_5%
1 2
1
100P_0402_50V8J
560P_0402_50V7K
4 4
PR1
100P_0402_50V8J
560P_0402_50V7K
PQ1
1
5 PD2 PR3 TP0610K-T1-E3_SOT23
5
PC1
PC2
PC3
PC4
RLS4148_LLDS2 1K_1206_5%
VS 2 1 1 2 3 1
12
RLZ24B_LL34
PD1
PR4
1K_1206_5%
1 2
100K_0402_5%
100K_0402_5%
2
1
PR8
PR6
PR7
1K_1206_5%
2
PR175 PC131 1 2
10K_0402_1% 0.01U_0402_25V7K
1 2 1 2
2
VIN
PR5
VIN 1M_0402_1%
1 2
10K_0805_5%
100K_0402_5%
1
1
82.5K_0402_1%
1
VS
PR9
PR13
1
PR10
PR11
10K_0402_5%
1 2
1 2
PR12 ACIN <21,33>
2
2 215K_0402_1% PU1A 2 2
1 2 3 <33,41> ACOFF
P
+ PACIN
O 1 PACIN <41>
0.047U_0402_16V7K
24.9K_0402_1%
2 - B+
1
G
0.1U_0402_16V7K
RLZ4.3B_LL34
10K_0402_1%
PQ2 2
3
1
1
PR14
LM393DT_SO8 DTC115EUA_SC70
4
PC5
PC6
PR15
PD3
Vin Detector
2
PQ3
2
3
PR16 DTC115EUA_SC70
2
2
10K_0402_1%
2 1 RTCVREF
3.3V High 18.135 17.5660 17.011
Low 14.866 14.355 14.063 VL
PR17
2.2M_0402_5%
2 1
VIN
RLS4148_LLDS2
499K_0402_1%
1
2
PR18
PD4
100K_0402_1%
1
VS
PR19
PD5
2
RLS4148_LLDS2
1 1
2 1
3.3V BATT+ VS
33_1206_5%
PD6
8
RTCVREF
PR20
RB715F_SOT323
<40,42> MAINPWON 2 5
P
3 3
PU2 PQ4 +
1 7 O
0.01U_0402_25V7K
205K_0402_1%
499K_0402_1%
PR22 G920AT24U_SOT89 PR23 TP0610K-T1-E3_SOT23 PR276 <41> ACON 3 6
2
-
1
PR21 560_0603_5% 200_0805_5% 33_1206_5%
PC7
PR24
PR25
1000P_0402_50V7K
560_0603_5%
1 2 1 2 3 2 2 1 CHGRTCP 3 1 2 1 PR271
4
OUT IN
1
0.22U_1206_25V7K
200K_0402_1% PU1B
1
PC9
4.7U_0805_6.3V6K
PC10
0.1U_0603_25V7K
1U_0805_25V4Z
2
1
GND
PC11
100K_0402_5%
PRG++ 2
2
1
PC8
PR26
PC12
PC13
0.1U_0603_25V7K
2
1
2
2
PR27
2
22K_0402_1% PQ5
1 2 PR28 RHU002N06_SOT323 PR29
<32> 51ON#
1
PJ1 34K_0402_1% D 47K_0402_5%
PAD-OPEN 3x3m PJ2 PAD-OPEN 3x3m
2 1 2 2 1
+1.5VSP 1 2 +1.5VS 1 2 +1.8V
RTCVREF G PACIN <41>
+1.8VP
1
S
3
66.5K_0402_1%
1
(6A,240mils ,Via NO.=12) (6A,240mils ,Via NO.= 12)
PR30
PJ3 PJ4 2 +5VALWP
PAD-OPEN 3x3m PAD-OPEN 3x3m @
+5VALWP 1 2 +5VALW +0.9VSP 1 2 +0.9VS
2
PQ6
3
DTC115EUA_SC70
(5A,200mils ,Via NO.= 10) (0.3A,40mils ,Via NO.= 2)
4 PJ6 PJ11 4
http://hobi-elektronika.net BATT++
@ PJP2 PF2 PL3
ALLTO_C103D6-10701-L 12A_65V_451012MRL FBMA-L18-453215-900LMA90T_1812
PH1 under CPU botten side :
BATT_S1 BATT+
1 1 PR177
2 1
PR178
1 2 CPU thermal protection at 85 degree C
0.01U_0402_25V7K
1000P_0603_50V7K
1000P_0603_50V7K
1K_0402_1% 47K_0402_5%
2 ALI/NIMH# 1 2 1 2
Recovery at 70 degree C
2 +3VALWP
PC15
3 AB/I VS
3
1
PC14
PC16
4 TS_A
4 EC_SMDA
5
2
5
1
VL
0.1U_0603_25V7K
1K_0402_1%
1 6 EC_SMCA 1
2
6 VL
PR176
7 7
PC17
8.66K_0402_1%
150K_0402_1%
1
2
100_0402_1%
100_0402_1%
2
1
1
PR31
PR32
PR35
PR33
PR34
ALI/MH# 1 442K_0603_1%
2
1
PR36
2
6.49K_0402_1% PR37
8
1 2 47K_0603_1%
+3VALWP
1 2 3
P
+
O 1
MAINPWON <39,42>
1K_0402_1%
TM_REF1 2 -
G
100K_0603_1%_TH11-4H104FT
PU3A
1
PR38
LM393DT_SO8
4
PH1
1000P_0402_50V7K
2
1U_0603_6.3V6M
BATT_TEMP <33>
2
1
PC18
PC19
PR39
EC_SMB_DA1 <33,34>
2 150K_0402_1%
1 VL
2
EC_SMB_CK1 <33,34>
150K_0402_1%
1
PR40
2 2
2
PQ7
TP0610K-T1-E3_SOT23 VS
B+ 3 1 +VSBP
0.22U_1206_25V7K
0.1U_0603_25V7K
1
8
100K_0402_5%
1
PR41
PC20
PC21 5
P
+
O 7
6
2
G
PR42 PU3B
2
22K_0402_1% LM393DT_SO8
4
VL 1 2
100K_0402_5%
2
PR43
3 3
PR44
1
0_0402_5% D
1 2 2
<42> SPOK G
0.1U_0402_16V7K
S PQ8
3
1
PC22
RHU002N06_SOT323
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401429
Date: 星期三, 七月 12, 2006 Sheet 40 of 47
A B C D
A B C D E
5 5 1 2
4.7U_1206_25V6K
4
200K_0402_1%
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_1206_25V6K
0.1U_0603_25V7K
BATT+
1 PR272 1
4
1
PR48 100K_0402_1%
1
PC27
PR46
PC23
PC24
47K_0402_1% 1 2
1
PC25
PC26
P2 1 2
VIN
1
47K_0402_5%
1
10K_0402_1%
10K_0402_1%
PR47
PR273
PR50
1
0_0603_5%
2
PR49
PQ12 PU4
32
DTA144EUA_SC70 MB39A126PFV-ER_SSOP24
1
47K
1 -INC2 +INC2 24 ACOFF#
47K
3
2
1
2 PR51 PC28 PR52
2
47K
10K_0402_1% 4700P_0402_25V7K 100K_0402_1% 2
47K
1
MB39A126 1 2 1 2 2 1 2 23
OUTC2 GND
1
PC29 4 PQ13
0.22U_0603_16V7K AO4407_SO8
3 22 CS 1 2
1
+INE2 CS
1
DTA144EUA_SC70
PC30 2ACOFF ACOFF <33,39>
PQ41
0.1U_0603_25V7K 2
10K_0402_1%
30K_0402_1%
0.01U_0402_25V7K
4 -INE2 VCC 21 1 2 PRECHG <39>
5
6
7
8
1
PC31
PR53
PR54
2 PQ14
3
5 20 DTC115EUA_SC70 PQ40
3
ACOK OUT PC32 DTC115EUA_SC70
2
0.1U_0603_25V7K
2
2
PQ15
LXCHRG
6 19 1 2
3
VREF VH
1
150K_0402_1%
0.22U_0603_16V7K
DTC115EUA_SC70
PR55
1
1
D PC33 PL5
7 18
ACIN XACOK VIN
47K_0402_5%
BATT+
2 PR57 PC34 PR58 10U_LF919AS-100M-P3_4.5A_20%
G 1K_0402_1% 2200P_0402_50V7K 56.2K_0402_1% 1 2 1 2
2
2 MB39A1261 PR56 2
S 2 1 2 8 17 1 2
3
-INE1 RT
1
EC31QS04
EC31QS04
PQ16 0.02_2512_1%
PD10
PD11
RHU002N06_SOT323
PR59
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
9 +INE1 -INE3 16
PR60 PR61 PR62 PC35 @
1
PC36
PC37
PC38
IREF 133K_0402_1%
<33> 10K_0402_1% 33K_0402_1% 1500P_0603_50V7K
2
1 2 2 1 10 15 MB39A126 1 21 2
2
OUTC1 FB123
1
D PR278
2
100K_0402_1%
0.01U_0402_25V7K
2 0_0402_5%
1
PC39
G 11 14 1 2
SEL CTL
47K_0402_5%
PR63
S PQ17 PC40
3
1
RHU002N06_SOT323 10P_0402_50V8J
ACON
2
PR64
12 -INC1 +INC1 13 1 2
0_0402_5%
2
PR65
2
PD12 @
RLS4148_LLDS2
ACOFF# 1 2 2
PR66
22K_0402_1% +3VALWP
1 2
IREF=0.574~2.56V PC41
<39> PACIN
47K_0402_5%
CS 47P_0402_50V8J
1
1 2
PR67
<39> ACON
2
3 3
2
LI-3S :13.5V----BATT-OVP=1.5V
1
CC=2.746A
PQ18
BATT-OVP=0.1112*BATT+ (100K/(100K+133K))*2.56V=1.0985V
3
DTC115EUA_SC70
<33> FSTCHG
2
BATT+
1.098/(20*0.02)=2.746A
499K_0402_1% 340K_0402_1%
1
PQ19 VS
3
PR68
DTC115EUA_SC70
0.01U_0402_25V7K
2
CP Point=3.125A
PC42
1
5V*(10K/(30K+10K))=1.25V
PR69
2
1.25V/(20*0.02)=3.125A
2
8
PR277
10K_0402_1% 5
P
+
VS <33> BATT_OVP 2 1 7 0
G - 6
105K_0402_1%
1
0.01U_0402_25V7K
PU12B
4
1
PR72
PU12A LM358DR_SO8
Charge voltage
8
PC43
LM358DR_SO8
+ 3 3S CC-CV MODE : 12.6V
P
2
1
2
0
4
- 2 SEL is L 4
G
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401429
Date: 星期三, 七月 12, 2006 Sheet 41 of 47
A B C D E
A B C D
B+
2
http://hobi-elektronika.net
PL6
FBMA-L11-322513-201LMA40T_1210
PC45 PC46
1
0.1U_0603_25V7K 0.1U_0603_25V7K
2
1 2 BST5B BST3B 1 2
PJ13
1 JUMP_43X79 B+++ 1
MAX8743_B+
SI4800BDY-T1-E3_SO8
1 1 2 2 2200P_0402_50V7K VL
8
7
6
5
10U_1206_25VAK
PD13
1
CHP202UPT_SOT323-3 PJ14
D
D
D
D
1
2
PC48
0_0603_5%
PQ21
JUMP_43X79
MAX8743_B+
PC47
PR74
SI4800BDY-T1-E3_SO8
2200P_0402_50V7K
MAX8743_B+ 1 1 2 2
0.1U_0402_16V7K
47_0402_5%
10U_1206_25VAK
2
5
6
7
8
S
S
S
PR75
4.7_1206_5%
4.7_1206_5%
1
PR76
PR77
PC49
PR78
D
D
D
D
1
2
3
4
PC50
PC51
PQ20
0_0603_5%
2
5HG 1 2 DH5
2
2
G
S
S
S
LX5
SI4810BDY-T1-E3_SO8
@
4
3
2
1
8
7
6
5
2
PC52
0.1U_0603_25V7K
1U_0805_25V4Z
0_0603_5%
PR79
VL 3HG
D
D
D
D
PQ29
LX3
2
2VREF_1999
4.7UH_PCMC063T-4R7MN_5.5A_20%
5
6
7
8
4.7U_0805_6.3V6K
1 PC55
SI4810BDY-T1-E3_SO8
1
G
S
S
S
1U_0805_16V7K
365K_0402_1% 200K_0402_1%
215K_0402_1% 200K_0402_1%
D
D
D
D
1
2
PC53
PR80
PR81
1
2
3
4
PQ30
BST3A
PC54
G
S
S
S
0_0603_5%
DL5
PR82
2 1
4
3
2
1
2
18
20
13
17
2
PL7
PR83
4.7UH_PCMC063T-4R7MN_5.5A_20%
BST5A 14
V+
LD05
TON
VCC
1
BST5
PR84
2
ILIM3 5 2
16 DL3
DH5
+5VALWP
1
2
15
1
LX5
19 DL5 ILIM5 11
PL8
21 OUT5
9 PU6 28
FB5 BST3
150U_V_6.3VM_R18
10.2K_0402_1%
1 26 DH3
N.C.MAX8734AEEI+_QSOP28 DH3
2
24
1
DL3
150U_V_6.3VM_R18
PR85
6 SHDN# LX3 27
VS 4 22
1 1 ON5 OUT3
1 2 3 ON3
PC186
PC56
+ + PR86 7
1
@ 0_0402_5% FB3
12 SKIP# PGOOD 2 +3VALWP
2 2 2VREF_19998
PRO#
LDO3
PZD1 PR88
GND
REF
2
2
0_0402_5%
0_0402_5% @ 3.57K_0402_1%
@ RLZ5.1B_LL34 47K_0402_5% PR89
PR87
PR90
1 2 1 2 10_0402_5%2
150U_V_6.3VM_R18
23
25
10
0.047U_0603_16V7K
0.22U_0603_16V7K
1
14.7U_0805_6.3V6K
100K_0402_5%
1
1
2
PC59
PC58
+
PR91
PC57
2
PC60
0_0402_5%
<40> SPOK
2
2
2
PR92
2
1
PR93
PR94
+5V Ipeak = 6.66A ~ 10A 47K_0402_5%
1 2
0.047U_0603_16V7K
3 3
1
1
PC61
2
MAINPWON <39,40>
1U_0603_6.3V6M
1
PC62
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401429
Date: 星期三, 七月 12, 2006 Sheet 42 of 47
A B C D
5 4 3 2 1
http://hobi-elektronika.net
D D
PJ15
JUMP_43X79
1 OZ813_B+
1 2 2
PF5 PL9
@ 7A_24VDC_429007.WRML FBMA-L11-322513-201LMA40T_1210
2 1 1 2 B+
+3VALWP
10U_1206_25VAK
SI4800BDY-T1-E3_SO8
1
1K_0402_1%
PC63
1.8VS2N
8
7
6
5
1.8VS2P
PR261
D
D
D
D
2
PQ22
PR262
@ 0_0402_5%
1 2 @
G
S
S
S
PR269 PL10
+5VALWP 0_0402_5% 3.3UH_PCMC063T-3R3MN_6A_20%
1
2
3
4
PR266 DH_1.8V_1 1 DH_1.8V_2
0_0402_5% 1.8VSET
2 1 2 +1.8VP OCP=6A
220U_D2_4VM_R15
2 1 LX_1.8V
1
<33,35> SYSON
51_0402_1%
1
8
7
6
5
0.01U_0402_25V7K
PR95
PC65
1
0.1U_0603_25V7K
PC184
PC66
1000P_0402_50V7K PR97 PR98 +
D
D
D
D
2
100K_0402_1% 22K_0402_1%
2
1
PQ23 1 2 1 2
2
PC67
SI4810BDY-T1-E3_SO8 PC68
G
S
S
S
PU7 6800P_0402_25V7K
25
24
23
22
21
20
19
DL_1.8V
2
C 1.8VS2P 1 2 C
1
2
3
4
2
2
22_0402_1%
1K_0402_1%
CS2P
GNDA
CS2N
VSET2
PGD2
LX2
HDR2
PR99
PR100
@
RB751V-40TE17_SOD323-2
4700P_0402_25V7K
PD16 1.8VS2N
PR101 1 18 BST_1.8V 1 2
1
ON/SKIP2 BST2
1
PC69
22P_0402_50V8J
PC70
0_0402_5% 2 17
DREF VIN LDR2
2 1 3 VREF VDDP 16 +5VALWP
4 15
2
TSET GDNP
1
0.022U_0402_16V7K
0.1U_0603_25V7K
5 VDDA LDR1 14
2
24K_0402_1%
100K_0402_1%
6 13 PC71 +5VALWP
ON/SKIP1 BST1
1
0.01U_0402_25V7K
PR103
PC72
PC73
PC74
1U_0603_6.3V6M
1U_0805_16V7K
OZ813LN_QFN24
2
PR104
PC75
PJ18
VSET1
PGD1
HDR1
CS1N
CS1P
JUMP_43X79
2
LX1
PD17 1 2 2
1
2.2U_0603_6.3V6K
PR105 BST_1.05V1 2
1
@ 75K_0402_1% PF6
7
8
9
10
11
12
1
RB751V-40TE17_SOD323-2 @ 7A_24VDC_429007.WRML
PC156
PC76 2 1 OZ813_B+
0_0402_5%
0.1U_0603_25V7K
2
1.8VSET
PR263
2
DH_1.05V_1 PL11
150K_0402_1%
3.3UH_PCMC063T-3R3MN_6A_20%
2
1
2
61.9K_0402_1%
PR106
51_0402_1%
0_0402_5%
PR172
1.05VS1P
DL_1.05V
PR270
PR107
220U_D2_4VM_R15
PC77 1
1000P_0402_50V7K 1.05VS1N
1
PC78
PR108 PR109 +
1
5
6
7
8
SI4800BDY-T1-E3_SO8
100K_0402_1% 29.4K_0402_1%
2
10U_1206_25VAK
1 2 1 2
D
D
D
D
1
1
2
1K_0402_1%
PC80
DH_1.05V_2
PR264
PC79
B 5600P_0402_25V7K B
PQ24
1.05VS1P 2 1
2
G
S
S
S
PR179
2
4
3
2
1
100K_0402_1% @
4700P_0402_25V7K
2 1 1.05VS1N
<18,24,26,33,34,35,44> SUSP#
0.1U_0402_16V7K
1
1
PC81
22P_0402_50V8J
PC82
+3VALWP
PC132
5
6
7
8
SI4810BDY-T1-E3_SO8
2
2
D
D
D
D
PQ31
G
S
S
S
4
3
2
1
A A
http://hobi-elektronika.net
PJ16
JUMP_43X79
1 1 2 2
PF7
D PL12 D
@ 7A_24VDC_429007.WRML
B+ 1 2 2 1
10U_1206_25VAK
FBMA-L11-322513-201LMA40T_1210
PHASE_VCCPP
PC83
PR265
10K_0402_1% UG_VCCPP
1 2 PR110
2
1 2 1 2
1
BOOT_VCCPP
PR111
@4.7_0603_5%
5
6
7
8
17
16
15
14
13
PU8 PQ26
D
D
D
D
2
1 PR1122 6269_VCC
PHASE
GND
PGOOD
UG
BOOT
4.7_0603_5%
G
S
S
S
1 VIN PVCC 12 1 2 PC86
SI4800BDY-T1-E3_SO8
4
3
2
1
2.2U_0603_6.3V6K
OCP=6A
6269_VCC 2 11 LG_VCCPP PL13
VCC LG 3.3UH_PCMC063T-3R3MN_6A_20%
1 2 +1.5VSP
PR113
1
1 2 3 FCCM PGND 10 1
5
6
7
8
PC87
2.2U_0603_6.3V6K 0_0402_5% PQ27 + PC88
D
D
D
D
PR114
C
2 SI4810BDY-T1-E3_SO8 220U_D2_4VM_R15 C
1 2 4 9 ISEN_VCCPP
1 2
<18,24,26,33,34,35,43> SUSP# EN ISEN PR115 2
COMP
G
S
S
S
8.66K_0402_1%
FSET
47K_0402_5%
1
VO
FB
4
3
2
1
PC89
0.01U_0402_25V7K
2
8
ISL6269CRZ-T_QFN16
1
22P_0402_50V8J
1
PR117
PR116 PC90
PC91
49.9K_0402_1% 0.01U_0402_25V7K
2
2
2
1
57.6K_0402_1%
PC92
6800P_0402_25V7K
2 PR118
1 2
4.53K_0402_1%
1
PR119
3K_0402_1%
+1.8VP
B +3VS B
2
1
PJ9
1
+5VS JUMP_43X118
1
2
PJ10
1
JUMP_43X79
2
1
PC93 PU9
1 6 +3VALWP
2
2 GND NC 5
1
6
1
PU10 PC94 3 7 PC95
PC96 22U_1206_6.3V6M VREF NC 1U_0603_6.3V6M
5
VCNTL
2
VIN 22U_1206_6.3V6M PR120
7 4 8
2
2
TP
VOUT 3 +2.5VSP
33K_0402_1% 1
1
1 2 8 2 APL5331KAC-TRL_SO8
EN FB
1
,26,33,34,35,43> SUSP#
22U_1206_6.3V6M
+0.9VSP
1
PQ28 D
PC97
VIN
1
1
2.15K_0402_1% 2 1 2
2
1
PC100 2 <35> SUSP G PR124 PC101
1
2
1
APL5912-KAC-TRL_SO8 22U_1206_6.3V6M
2
1
0.01U_0402_25V7K PC103
0.1U_0402_16V7K
2
PR125
1K_0402_1%
A A
2
http://hobi-elektronika.net
+5VS
PJ17
PAD-OPEN 3x3m
1 2
CPU_B+ B+
PR214 PL14
5VS12 1 FBM-L11-322513-201LMAT_1210
2 1 2 1
0.01U_0402_25V7K
0_1206_5%
2200P_0402_50V7K
0.1U_0603_25V7K
PR215 PF8 1
100U_25V_M
PC157
10_0402_5% @ 7A_24VDC_429007.WRML
PC158
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
+
200K_0402_5%
PC159
PC160
PC161
PC162
PC163
2
2
2 PR216 1
2
D D
2
PC164 2
2
2.2U_0603_6.3V6K
2
13K_0402_5%
PC165
1
PR217
1U_0603_6.3V6M
SI7682DP-T1-E3_SO8
PU11
1
NTC
PQ32
100K_0402_5% V CC 19 25
PR218 Vcc VDD 0.22U_0603_16V7K 4
1 2 6 8 PR220
THRM TON 2.2_0402_5% PC166
PR219 0_0402_5% 2 1 31 30 BST1_CPU 1 2 BSTM1_CPU 1 2
<5> CPU_VID0 D0 BST1 +CPU_CORE
PR274
3
2
1
PR221 0_0402_5% 2 1 32 29 DH1__CPU 10_0402_5%2 PL15
<5> CPU_VID1 D1 DH1 P_0.36H_ETQP4LR36WFC_24A_20%
PR222 0_0402_5% 2 1 33 28 LX1__CPU 2 1 +CPU_CORE
<5> CPU_VID2 D2 LX1
6.8_1206_5%
2.1K_0603_1%
PR223 0_0402_5% 2 1 34 26 DL1__CPU
<5> CPU_VID3 D3 DL1
5
6
7
8
5
6
7
8
2
PR224
PR226
PR225 0_0402_5% 2 1 35 27
<5> CPU_VID4 D4 PGND1
IRF8113PBF_SO8
IRF8113PBF_SO8
PR227 0_0402_5% 2 1 36 18
<5> CPU_VID5
2
D5 GND
1
PQ33
PQ34
10_0402_5%
PR230
PR229
PR228 0_0402_5% 1 2 37 17 CSP1__CPU 4 4 3.48K_0402_1% PR231 NTC
<5> CPU_VID6 D6 CSP1
470P_0603_50V7K
PC167
1 2 1 2
DL1__CPU
PR2322 71.5K_0402_1%
1 7 16 CSN1_CPU
TIME CSN1 <5>
10KB_0603_5%_ERTJ1VR103J VCCSENSE
2
2 1 9 12 FB_CPU
3
2
1
3
2
1
CCV FB
180P_0402_50V8J
470P_0402_50V8J PC168 PC169
1 2 11 10 C CI_CPU 0.22U_0603_16V7K
C REF CCI C
1 2
2
180P_0402_50V8J
PC187
PR233 499_0402_1% 1 2 PC170 0.22U_0603_16V7K 39 21 DH2_CPU
<7,21> DPRSLPVR DPRSLPVR DH2
100_0402_5%
PR234 0_0402_5% 1 2 40 20 BST2_CPU
<4,20> H_DPRSTP#
1
DPRSTP BST2
PC188
PR235
1 2 3 22 LX2_CPU PR237 0_0402_5%
<5> H_PSI# PSI LX2
PR236 0_0402_5% 1 2
1
+3VS 2 24 DL2__CPU
1
PWRGD DL2 PR238 @3K_0603_1% PC171 @0.022U_0402_16V7K
2.2_0402_5%
1 23 1 2 1 2 CPU_VCC_SENSE
CLKEN PGND2
10K_0402_1%
PR239
2
2
2K_0402_1%
PR241
1 2 1100_0402_5%
2
4700P_0402_25V7K
5 15 CSN2__CPU
1
PR244 VRHOT CSN2 PR245 PR246
PC172
0_0402_5% 4 13 NTC @ 3K_0603_1% @ 3K_0603_1%
1
POUT GNDS
1 2 1 2 1 2
BSTM2_CPU
<21> VGATE
1
PR247
4700P_0402_25V7K
10_0402_5%2 PR248 PC173
<15> CLK_ENABLE# MAX8770GTL+_TQFN40 20K_0402_1% 470P_0402_50V8J
2
PR249 PC174 1 2 1 2
<33> VR_ON 10_0402_5%2 1
2
CPU_B+
10K_0402_5%
0.22U_0603_16V7K
1
+3VS
PR250
PC175
1
56_0402_5%
PR251
2200P_0402_50V7K
PR252
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
0.1U_0603_25V7K
100_0402_5%
1
1
PC176
PC177
@ PR253
1
SI7682DP-T1-E3_SO8
PC178
PC179
PC180
B @ 0_0402_5% B
2
1 2 VSSENSE
29.6
2
<4> H_PROCHOT# <5> VSSENSE PR275
PQ35
PR254 0_0402_5%
1
10K_0402_5% 1 2 4
1 2 PR255
10_0402_5%
0.1U_0402_16V7K
2
PC181
3
2
1
2 1
1
PL16
6.8_1206_5%
P_0.36H_ETQP4LR36WFC_24A_20%
5
6
7
8
5
6
7
8
PR256
IRF8113PBF_SO8
1
IRF8113PBF_SO8
2.1K_0603_1%
2
PQ36
PR257
PQ37
4
470P_0603_50V7K
DL2__CPU
4
2
1
PC182
PR258 PR259 NTC
3
2
1
3.48K_0402_1% 10KB_0603_5%_ERTJ1VR103J
3
2
1
2
180P_0402_50V8J
1 2 1 2
180P_0402_50V8J
1
PC189
PC190
1 2
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3281
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401429
Date: 星期三, 七月 12, 2006 Sheet 45 of 47
5 4 3 2 1
A B C D E
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Version change list (P.I.R. List) Page 1 of 1
2.Add PR278
4 Change recovery value is in order to adaptor voltage too low issue 0.1 39 1It .changed value of PR24 that 499k_0402 to 205k_0402
2 2
3 3
4 4
http://hobi-elektronika.net
Version change list (P.I.R. List) Page 1 of 1
Item Fixed Issue/Reason for change Rev. PG# Modify List B.Ver# Phase
1 A Test 1
B Test
5 Change audio solution from AD1986A to ALC861 0.2 29/30
C Test
7 Sloving ICS pin 50, 51 no clock issue 0.3 15 Add R865 to U29.8 and grounded
8 wake up on USB when AC-IN. 0.3 31, 33, 37 1. Add R866, R867
2. change EC pin 90 from KSO17 to EC_GPIO4A
3. connect R866, R867 pin2 together, and net name is USB_ON#.
4. change syson# to USB_ON#, and control U9, U10 and U25.
9 EMI solution 0.3 16 1. change L14 from 0 ohm to bead 300 ohm
2. change C295 from 0.8pF to 470pF
3 3
10
11
12
13
14
4 4