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    ACA Assignment

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    shreyas sachin
    This document contains two assignments from a 6th semester computer architecture course. The first assignment asks students to explain Flynn's classification of computer architectures with diagrams, list and explain different shared memory multiprocessor models, apply Bernstein's condition to detect parallelism in a program, and illustrate different levels of parallelism in modern computing. The second assignment asks students to explain linear and non-linear pipeline processors, internal data forwarding and hazard avoidance, floating point and fixed point pipeline units, cache coherence problems, routing techniques, and directory-based cache coherence protocols.

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    ACA Assignment

    Uploaded by

    shreyas sachin
    59 views2 pages
    This document contains two assignments from a 6th semester computer architecture course. The first assignment asks students to explain Flynn's classification of computer architectures with diagrams, list and explain different shared memory multiprocessor models, apply Bernstein's condition to detect parallelism in a program, and illustrate different levels of parallelism in modern computing. The second assignment asks students to explain linear and non-linear pipeline processors, internal data forwarding and hazard avoidance, floating point and fixed point pipeline units, cache coherence problems, routing techniques, and directory-based cache coherence protocols.

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    Advanced computer architecture assignments

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    This document contains two assignments from a 6th semester computer architecture course. The first assignment asks students to explain Flynn's classification of computer architectures with diagrams, list and explain different shared memory multiprocessor models, apply Bernstein's condition to detect parallelism in a program, and illustrate different levels of parallelism in modern computing. The second assignment asks students to explain linear and non-linear pipeline processors, internal data forwarding and hazard avoidance, floating point and fixed point pipeline units, cache coherence problems, routing techniques, and directory-based cache coherence protocols.

    Copyright:

    © All Rights Reserved
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    59 views2 pages

    ACA Assignment

    Uploaded by

    shreyas sachin
    This document contains two assignments from a 6th semester computer architecture course. The first assignment asks students to explain Flynn's classification of computer architectures with diagrams, list and explain different shared memory multiprocessor models, apply Bernstein's condition to detect parallelism in a program, and illustrate different levels of parallelism in modern computing. The second assignment asks students to explain linear and non-linear pipeline processors, internal data forwarding and hazard avoidance, floating point and fixed point pipeline units, cache coherence problems, routing techniques, and directory-based cache coherence protocols.

    Copyright:

    © All Rights Reserved
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    of 2

    Department of Computer Science and Engg.

    6th Semester ‘B’ Sec Computer Architecture (P15CS62)


    Assignment-1

    Qn. Bloom’s Course


    No. Questions Level outcome
    Explain Flynn’s classification of computer architecture
    1. L2 CO1
    with suitable diagrams.
    List the different shared memory multiprocessor
    2. L1,L2 CO1
    model. Explain any two of them.
    State and explain Bernstein’s condition and apply for
    the following HLL program and hence detect
    parallelism.
    P1: C = D * E
    3. L3 CO1
    P2: M = G + C
    P3: A = B + C
    P4: C = L + M
    P5: f = G + E
    Illustrate different levels of parallelism in program
    4. L2 CO1
    execution on modern computing.
    5. Explain any two dynamic connection networks. L2 CO1
    Explain the data path architecture and pipelined
    6. execution of a base scalar processor with the help of a L2 CO2
    diagram.
    Compare the characteristics of CISC and RISC
    7. L2 CO2
    processor architectures.
    Explain register based and memory based vector
    8. L2 CO2
    instructions.
    Explain central and distributed bus arbitration with the
    9. L2 CO2
    help of diagram.
    Explain the two types of memory interleaving with the
    10 L2 CO2
    help of a diagram.
    Department of Computer Science and Engg.

    6th Semester ‘B’ Sec Computer Architecture (P15CS62)


    Assignment-2

    Qn. Bloom’s Course


    No. Questions Level outcome
    1. Explain linear pipeline processor L2 CO3
    For a given non-linear pipeline with the
    reservation table find the following.
    i)Forbidden latencies ii) Initial collision vector iii)
    Latency cycle and greedy cycle iv)State transition
    2. diagram L3 CO3
    clock
    1 2 3 4 5 6
    S1 X X
    S2 X X
    S3 X X
    Explain internal data forwarding and hazard
    3. L3 CO3
    avoidance mechanism for instruction pipelining.
    Describe a pipeline floating point adder unit with
    4. L2 CO3
    array propagate adder and carry save adder
    With a neat diagram, explain pipeline unit for
    5. L2 CO3
    fixed point multiplication of 8 bit integer.
    Explain with a neat diagram, cross point design
    6. L2 CO4
    and multiport memory.
    What is cache coherence problem? Explain the
    7. L2 CO4
    factors causing cache inconsistency.
    Explain store and forward routing and wormhole
    8. L2 CO4
    routing.
    Explain different flow control methods for
    9. L2 CO4
    resolving a collision between two packets.
    Explain directory based protocol to handle cache
    10 L2 CO4
    coherence problem.

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