Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                

CSC219 - 356 - 132 CSC219 Dec 15

Download as pdf or txt
Download as pdf or txt
You are on page 1of 5

Dec_2015 CSC219

USN 2 B V

III Semester B.E. Examination


(Computer Science & Engineering)
Computer Organization (CSC219)
Duration: 3 hours Max. Marks: 100
Note: Answer any TWO full questions from UNIT-I, any TWO full questions from UNIT-II
and any ONE full question from UNIT-III.
UNIT-I
1 a. With a neat diagram explain the connections between memory and processor for
the following instruction Move R1,(R3)+. (06 marks)
b. Explain the use of DMA controller in a computer system with a neat diagram.
What is meant by cycle stealing and burst mode in DMA controller? (06 marks)
c. With a neat diagram explain single bus organization and write the control
sequences for implementing the unconditional branch instruction on it. (08 marks)
2 a. Write assembly language program using interrupts to read a line of character
from a keyboard via registers used for keyboard and display interfaces. (06 marks)
b. With a neat diagram explain three bus organization. Write the sequence of control
steps required to execute the instruction “Add the immediate number NUM to
register R1” on it. (08 marks)
c. Give the short sequence of machine instruction for the task: “Subtract the
contents of memory location A to those of location B and place the answer in
location C”.
i. Only Load Loc,Ri and Store Ri,Loc are available.
ii. Suppose that Move and Sub instructions are available with the format
Move/Sub Location1, Location2, is it possible to use fewer instructions to
accomplish the task in part (i)? If yes, give the sequence. (06 marks)
3 a. Convert the following pairs of decimal numbers to 5-bit, signed 2’s compliment
binary number and subtract them. State whether or not overflow occurs in each
case.
i. 5 and 10
ii. -14 and 11
iii. -5 and 7
iv. -10 and -13 (06 marks)
b. What is the key feature of an interface circuit for a serial port? With a neat serial
interface block diagram explain how serial communication takes place. (08 marks)
c Explain the basic organization of Microprogrammed control unit. Write the
microinstructions for the instruction Mul R4,R5,R6. (06 marks)
UNIT-II
4 a. Explain the internal organization of 32x4 memory chip.
(06 marks)
b. What is structural hazard? Explain the effect of load instruction Load X(R1),R2 (06 marks)
on pipeline timing.
c. Design a large memory module of total capacity 8Mx16 using 512x4 static (08 marks)
memory chips.
5 a. With a neat diagram explain how 3 bus organization of the internal datapath of a (06 marks)
processor can be modified to suit a 4-stage pipeline enumerate all changes
incorporated therein.

Page 1
b. A computer system has a main memory consisting of 1M 16-bit words. It also has (06 marks)
a 4K word cache organized in the block set associative manner, with 4 blocks per
set and 64 words per block. How many bits are there in the main memory address
and how they are distributed in each of the fields?
c. Explain the working of a static RAM memory cell with neat diagram. Give the (08 marks)
internal organization of 8M x 8, dynamic chip.
6 a. What do you mean by locality of reference and explain its types? Assume a (10 marks)
computer has L1 and L2 caches. The cache block consists of 8 words. Assume
that the hit rate is the same for both caches and that is equal to 0.95 for
instructions and 0.90 for data.
Assume also that the time needed to access an 8 word block in these caches are
C1=1 cycle and C2 =10 cycles.
i. What is the average access time experienced by the processor if the main
memory uses interleaving?
ii. What is the average access time if the main memory is not interleaved?
iii. What is the improvement obtained with interleaving?
b. What is the instruction hazard? With relevant example explain how instruction (10 marks)
hazard is caused due to unconditional branching?
UNIT-III

7 a. With a suitable diagram explain the concept of array multiplication for the
example M=1010 and Q=1100. (06 marks)
b. Multiply each of the following pairs of signed 2’s compliment numbers using bit
pairing of multipliers. In each case assume that A is the multiplicand and B is
multiplier.
i. A= 010111 and B = 110110
ii. A= 110011 and B = 101100
iii. A= 110101 and B = 011011
iv. A= 001111 and B = 001111 (08 marks)
c. With a suitable diagram explain the concept of binary division. Perform 1100/10
division using restoring method. (06 marks)
8 a. Explain 68020 processor register set, data types and addressing modes. (08 marks)
b. Explain generation of a memory address in the 8086 processor in protected mode. (06 marks)
c. Compare and contrast features of ARM instructions and IA 64 instructions. (06 marks)

Page 2
Department:CSE Sem:III Sub-Name: Computer ORganization Sub-Code:CSC219
Faculty Name: Vijayalakshmi M.
Q.No Blooms Learning Course Learning a-k Criteria PI codes Marks
Levels (LL) Objectives(CLO’s)
1: a L2 CO1 1 1.4.4 6
b L3 CO2 1 1.4.4 6
c L3 CO2 1 1.4.4 8
2: a L2 CO2 1 1.4.4 6
b L3 CO2 1 1.4.4 8
c L3 CO2 1 1.4.4 6
3: a L2 CO1 1 1.4.4 6
b L3 CO2 1 1.4.4 8
c L3 CO2 1 1.4.4 6
4: a L2 CO3 1 1.4.4 6
b L3 CO4 1 1.4.4 6
c L3 CO3 1 1.4.4 8
5: a L2 CO4 1 1.4.4 6
b L3 CO3 1 1.4.4 6
c L3 CO3 1 1.4.4 8
6: a L3 CO3 1 1.4.4 10
b L3 CO4 1 1.4.4 10
7: a L2 CO5 1 1.1.1 6
b L3 CO5 1 1.1.1 8
c L3 CO5 1 1.1.1 6
8: a L2 CO6 1 1.4.4 8
b L2 CO6 1 1.4.4 6
c L3 CO6 1 1.4.4 6

Page 3
K.L.E Society’s
B.V.Bhomaraddi College of Engineering & Technology, Hubli-580 031

Examination Section
Semester End Examination Question Paper Review
Set I / Set II / Set III/ External
(Strike off the not Applicable one)
Programme. BE/CSE Course: Computer organization
Course Code: CSC219
Duration:3 Hrs Semester: III

Self Review Expert


Criterion (Yes/No/NA/ Review
Number (Yes/No/NA/
Number
1] Whether the following details are mentioned correctly on YES
the
Header of the question paper (Exam month and year etc
up to instructions)?
2] Whether the question paper covers the entire syllabus YES
(unit wise) as announced in the scheme of SEE at the end
of prescribed syllabus for this course?
3] Whether the pattern of question paper is in accordance YES
with the model question paper?
4] Whether marks distribution is proper for all the questions YES
and sub questions?
5] Whether the question paper has all the required data and YES
figures? If figures exist, mention the number of figures in
the paper.
6] Mention the time required for an average student to 170
answer this paper (in minutes)
7] How many corrections you have made in the print copy NIL
of the question paper (typographical errors etc)?
8] Whether the scheme is ready along with the paper? YES
9] Whether the scheme contains marks splitting along with YES
points?
10] a) How many numerical problems are there in the 5
question paper? 5
b) How many worked out solutions exist in the scheme?
11] Is the Softcopy previewed for printing & verified for YES
corrections?
12] Would you like to do modifications to any of the NA *Yes/No
questions? (only for reviewer)
Reviewer’s Signature Vijayalakshmi
M.
Reviewer’s Name
Date of Review 19.11.2015

Page 4
*If Yes please fill in the details on the reverse page

To,
The Controller of Examinations
B.V.B College of Engineering & Technology, Hubli.

Sir,

After scrutinizing I Recommend No/ The Following (Strike out not applicable)
corrections for this paper. The details are as follows:

Department:__________________________ Course-
_____________________
Paper Code:___________________________ Course
Code:________________

Correction Unit Question & Existing Question Suggested Change Reasons for Change
No No Sub Questions

Date:______________ Signature of Scrutinizer


Scrutinizer:_____________
Name of the Scrutinizer:_

Page 5

You might also like