Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Scribd Logo
Upload

Welcome to Scribd!

  • 2 views

    19196

    Uploaded by

    muthusaravanan1645

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    19196

    Uploaded by

    muthusaravanan1645
    2 views4 pages

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    2 views4 pages

    19196

    Uploaded by

    muthusaravanan1645

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 4

    Reg. No.

    Question Paper Code : 19196

    B.E. / B.TECH. DEGREE EXAMINATION, NOVEMBER / DECEMBER 2022


    Fifth Semester
    B.E. – Electronics and Communication Engineering
    19ECC01 – COMPUTER ARCHITECTURE AND ORGANIZATION
    (Regulations: Mepco – R2019)
    Duration: 3 Hours Max. : 100 Marks
    Answer ALL Questions
    PART A – (10  2 = 20 Marks)
    BTL, CO

    R, CO1 1. What is Little-Endian and Big-Endian addressing?


    U, CO1 2. A processor needs software interrupt to __________. Justify your answer.
    A) Test the interrupt system of the processor
    B) Implement co-routines
    C) Obtain system services which need execution of privileged instructions
    D) Return from subroutine
    U, CO2 3. What is Bit-Pair Algorithm and list its significances over Booth Algorithm?
    A, CO2 4. What is the Booth encoded multiplier value of -20? Write the detailed steps.
    A) +1 +1 0 -1 0 0 B) -1 +1 0 -1 0 0
    C) +1 +1 +1 -1 0 0 D) -1 1 0 +1 0 0
    U, CO3 5. Compare and contrast Mealy & Moore, Classical & One-hot and Hardwired &
    Microprogrammed Control Unit.
    U, CO3 6. For hardwired control unit design, which of the following is not correct? Justify
    your answer.
    (S1) More number of components (S2) Maximum speed
    (S3) Redesigning the entire unit
    A) Either S1 or S2 B) Either S2 or S3
    C) Only S1 D) All of S1, S2 and S3
    U, CO4 7. What is TLB? Draw its Architecture for a segmented virtual memory.
    A, CO4 8. Change bit C in cache block is set to ‘0’ when the block is __________. Justify
    your answer.
    A) Copied to M2 B) Placed first time in M1
    C) Updated in M2 D) Updated first time in M1
    1
    19196
    U, CO5 9. What is response time and turnaround time of a process?
    R, CO5 10. Switching the CPU core to another process requires performing a state save of
    the current process and a state restore of a different process. This is referred to as
    __________. Justify your answer.
    A) Context switch B) CPU Scheduling
    C) Queue Scheduling D) Process Creation

    PART B – (5  16 = 80 Marks)
    A, CO1 11. a) i. Write a Machine Language for Z = (A*B) + (C/D) in Zero, One,
    Two and Three Operand format. (8 Marks)
    U, CO1 11. a) ii. Explain about Register level design of a computer with its suitable
    diagrams and examples. (8 Marks)
    OR
    A, CO1 11. b) i. Derive the M/M/1 Queuing model of a computer with necessary
    specifications (lq, tq, tw etc...). (8 Marks)
    U, CO1 11. b) ii. Explain about any eight Addressing Modes used in a computer
    with suitable examples. (8 Marks)

    A, CO2 12. a) i. Find X*Y of X = 0011 1111 and Y = 1100 0101 using Array
    multiplier algorithm. Also, design hardware for doing the same
    with necessary data bandwidth. (8 Marks)
    A, CO2 12. a) ii. Represent the following numbers in signed 2’s complement
    format (8 bit resolution) and multiply the following numbers
    using Robertson algorithm A = (-13); B = (-10). (8 Marks)
    OR
    A, CO2 12. b) Construct a hardware to find Z = X/Y for X = 52 and Y = 5. Find
    the remainder and quotient of the above with the help of Restoring
    and Non-Restoring Algorithm in unsigned binary format. Also,
    analyze the performance of the Algorithms. Provide necessary
    hardware details. (16 Marks)

    A, CO3 13. a) Find the GCD (48, 18). Design a Hardwired Control unit for the
    GCD Processor using One-Hot Method with necessary flow
    diagram. Also, map the necessary control signals. (16 Marks)
    OR

    2
    19196
    A, CO3 13. b) Design a Microprogrammed control unit for Multiplier with
    necessary control signals and also, explain about encoding
    methods followed in Control word format. (16 Marks)

    U, CO4 14. a) i. Discuss about Serial Peripheral Bus (SPI Bus) and UART Bus for
    On Board communication interfacing. (8 Marks)
    U, CO4 14. a) ii. Explain in detail about the Universal Serial Bus (USB) with its
    pin details and topology connection for external data
    communication interface. (8 Marks)
    OR
    U, CO4 14. b) Explain about the three Address Mapping methodologies used in
    Cache Memory with adequate examples and also, analyze their
    merits and demerits with respect to Hit Ratio (H) and Access time
    (tA). (16 Marks)

    U, CO5 15. a) Explain the following scheduling algorithms with suitable


    examples:
    A) First-Come, First-Served Scheduling
    B) Shortest-Job-First Scheduling
    C) Round-Robin Scheduling
    D) Priority Scheduling (16 Marks)
    OR
    U, CO5 15. b) i. Explain in detail about the Critical Section Problem, its general
    structure and race condition with necessary sketches. (8 Marks)
    U, CO5 15. b) ii. Explain in detail about the Hardware support for the
    Synchronization, its memory barriers and hardware instructions. (8 Marks)

    3
    19196
    4
    19196

    You might also like