Intel 8253 - Programmable Interval Timer
Intel 8253 - Programmable Interval Timer
Intel 8253 - Programmable Interval Timer
com/p/g/wXp7HU
tutorialspoint.com/microprocessor/microprocessor_intel_8253_programmable_interval_timer.htm
Advertisements
Previous Page
Next Page
The Intel 8253 and 8254 are Programmable Interval Timers (PTIs) designed
for microprocessors to perform timing and counting functions using three
16-bit registers. Each counter has 2 input pins, i.e. Clock & Gate, and 1 pin
for “OUT” output. To operate a counter, a 16-bit count is loaded in its
register. On command, it begins to decrement the count until it reaches 0,
then it generates a pulse that can be used to interrupt the CPU.
8253 8254
Reads and writes of the same counter Reads and writes of the same counter
cannot be interleaved. can be interleaved.
count.
In the above figure, there are three counters, a data bus buffer, Read/Write
control logic, and a control register. Each counter has two input signals -
CLOCK & GATE, and one output signal - OUT.
Intel 8253 - Programmable Interval Timer https://www.printfriendly.com/p/g/wXp7HU
It is a tri-state, bi-directional,
8-bit buffer, which is used to
interface the 8253/54 to the
system data bus. It has three
basic functions −
Read/Write Logic
It includes 5 signals, i.e. RD, WR, CS, and the address lines A0 & A1. In the
peripheral I/O mode, the RD and WR signals are connected to IOR and IOW,
respectively. In the memorymapped I/O mode, these are connected to
MEMR and MEMW.
Address lines A0 & A1 of the CPU are connected to lines A0 and A1 of the
8253/54, and CS is tied to a decoded address. The control word register and
counters are selected according to the signals on lines A0 & A1.
A1 A0 Result
0 0 Counter 0
0 1 Counter 1
1 0 Counter 2
X X No Selection
This register is accessed when lines A0 & A1 are at logic 1. It is used to write
Intel 8253 - Programmable Interval Timer https://www.printfriendly.com/p/g/wXp7HU
a command word, which specifies the counter to be used, its mode, and
either a read or write operation. Following table shows the result for various
control inputs.
A1 A0 RD WR CS Result
0 0 1 0 0 Write Counter 0
0 1 1 0 0 Write Counter 1
1 0 1 0 0 Write Counter 2
0 0 0 1 0 Read Counter 0
0 1 0 1 0 Read Counter 1
1 0 0 1 0 Read Counter 2
1 1 0 1 0 No operation
X X 1 1 0 No operation
X X X X 1 No operation
Counters
Previous Page
Print
Next Page
Advertisements