Dynamic Analysis of Three-Port DC/DC Converter

for Space Applications

Zhijun Qian*, Osama Abdel-Rahman**, Justin Reese*, Hussam Al-Atrash*, Issa Batarseh*
* University of Central Florida ** Advanced Power Electronics Corporation (ApECOR)
Orlando, FL - USA Orlando, FL - USA
batarseh@mail.ucf.edu sabdel@apecor.com

Abstract- This paper presents the control structure for a novel or the battery voltage is relatively slower, the control input of
three-port converter topology. This topology has the advantage the battery control loop or the input port control loop can be
of low switch count, high power density, high efficiency, so it is a
valuable choice for space applications. The three port converter assumed to be static during the Output Voltage Regulation
for space application interfaces one solar panel input port, one (OVR) loop design. This assumption provides convenient
bi-directional battery port and an isolated output port. Lithium- decoupling for the design of the two interacting control loops.
Ion battery charge control simulation is implemented. Maximum For this design, the converter runs at 100 kHz switching
Power Point Tracking (MPPT) is adopted to maximize the solar frequency, the output control loop crossover frequency is set
energy input. Two of the three ports can be simultaneously
regulated. However, the two control loops have interactions with at 5 kHz, while battery side or input side control loop’s
each other due to the integrated power trains of the three ports. crossover frequency is set at one tenth of 5 kHz in order to
Therefore, implementing the closed loop control requires careful minimize interactions. Digital control strategy is adopted to
analysis of their dynamic behaviors. In this paper, the dynamic realize the control structure. Simulation and experimental
behavior of the converter during different operational modes is results show the validity of this design concept.
fully characterized and studied. Small signal models are derived
based on state space equations, and experimental results verify
the converter control structure. II. TOPOLOGY AND CONTROL STRUCTURE
As shown in Figure 1, this topology has the capability of
I. INTRODUCTION interfacing the following three ports: source input port, storage
Most of Power Management and Distribution (PMAD) bidirectional port, and an isolated output port. The principal
systems for multiple power ports are realized by two or more modes of operation and DC analysis have been reported in
individual converters. The advantages of using integrated [1,5]. Basically, it is a constant frequency modified PWM half
power converters with multiple power ports instead of several bridge converter controlled by duty-cycles d1 and d2 which are
individual converters are as follows: less component count and gate signals of S1 and S2 respectively. Clearly understanding
lower cost, higher power density, higher efficiency, improved the circuit operation is necessary to build up the small-signal
reliability, and enhanced dynamic performance due to power model. There are three stages in the circuit operation. In stage
stage integration and centralized control implementation. I, S1 is gated ON, applying a positive voltage to the
transformer primary side, until S2 is turned ON and S1 turned
This paper is a continuing research based on the published OFF to start stage II. In stage II, a negative voltage is applied
Tri-Modal Half-Bridge Converter Topology for Three-Port to the transformer primary side until S3 is gated ON to start
Interface [1], which clearly presented the power topology stage III, during which zero voltage is applied to the
operation and its open loop design considerations. This paper transformer primary side. This allows both the magnetizing
will be focused on the control structure and dynamics, in and load-filter inductor currents to free-wheel.
addition to the power management of the three ports.
Unlike single input single output converter, the dynamic
model of the multi-port converter is actually multi-input
multi-output system (MIMO). MIMO converter contains
multiple interacting control variables, which further
complicates the control loop design [1,3,4]. Interactions
between control loops are common in multi-port converters
but most researches focus on open loop operation and lack of
investigation on dynamic performance under varied load
conditions.
Figure 1. Three-port half bridge (TP-HB) converter topology
Based on that the output voltage should be regulated tightly
all the time, while the dynamic behavior of the input voltage

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 As shown in Figure 2, control loops are named as follows, B. Excess-Insolation operation (Mode 2)
input voltage regulation (IVR), output voltage regulation In excess-insolation mode or battery regulation mode, the
(OVR), battery voltage regulation (BVR), and battery current load is regulated and sinks less power than is available, while
regulation (BCR). the battery charge rate is controlled depending on different
scenarios, which will be introduced in section IV. This mode
stops to start battery-balanced mode with MPPT when the
load increases beyond the available solar power.
At a given time the converter will be in one of the two
above-mentioned modes of operation, which means two out of
the three main control loops will be active. The mode of
operation will be determined according to the present
operating conditions.

III. MODELING AND CONTROL DESIGN

A. TP-HB during Excess-Insolation Mode
Small signal model is the basis for optimized controller
design. Especially for such a complicated MIMO system,
small signal model will be helpful to realize closed loop
Figure 2. Three-port control architecture control and furthermore to optimize the converter dynamics.
Before deriving for small signal transfer functions, state
equations for each energy storage element are developed.
The output port loop is simply a voltage-mode control loop, These include the battery capacitor C1, the transformer
closed around the load voltage, and duty-cycle d1 is used as its magnetizing inductance Lm, the output inductance Lo, and the
control input. The reason why d1 is used to control output output capacitance Co. Average model is demonstrated as
voltage is because of the following steady state formula: follows:
Vo = 2Vb ⋅ D1 ⋅ n ⎧ −vC1
+ iLm ⋅ ( D1 + D2 ) +
n ⋅ vo ⋅ ( D2 − D1 )
+ I Lm ( d1 + d 2 ) +
n ⋅ Vo ⋅ ( d 2 − d1 )
⎪C1 ⋅ dvC1 / dt =
⎪ R b R R
If battery voltage Vb is fixed while serving as the only ⎪ ( d1 + d 2 ) ⋅ D2 ⋅ Vin
source, output voltage Vo can only be controlled by d1, ⎪ Lm ⋅ diLm / dt = −vC1 ⋅ ( D1 + D2 ) − + d 2 ⋅ Vin
⎪ ( D1 + D2 )
otherwise Vo will be left uncontrollable as indicated by the ⎨
⎪ ( d1 − d 2 ) ⋅ n ⋅ D2 ⋅ Vin + d ⋅ n ⋅V
formula. ⎪ Lo ⋅ diLo / dt = vC1 ⋅ n ⋅ ( D1 − D2 ) − vo +
⎪ ( D1 + D2 ) 2 in

The IVR loop is used to regulate the solar array voltage to ⎪ vo

⎪Co ⋅ dvo / dt = iLo −
its reference value. This reference is to be provided by an ⎩ R
MPPT controller [2,6,9] using perturb and observe algorithm,
and represents an estimate of the optimal operating voltage, Linearizing and converting each equation to the frequency
duty cycle d2 is thus used as the control input when realizing domain gives the following state equations:
the IVR loop. Or in the other case d2 can be decided by battery
control loop which has two competitive controllers, battery ⎧ −vC1(s) iLm(s)⋅( D1 + D2 ) vo (s)⋅ n⋅( D2 − D1 ) ILm ( d1(s) + d2 (s)) n⋅Vo ⋅( d2 (s) − d1(s))
⎪s ⋅ vC1(s) = + + + +
voltage control (BVR) or battery current control (BCR). Only ⎪ Rb ⋅C1 C1 R⋅C1 C1 R⋅C1
one of two loops will be active depending on the battery ⎪ −vC1(s)⋅ ( D1 + D2 ) ( d1(s) + d2 (s)) ⋅ D2 ⋅Vin d2 (s)⋅Vin
⎪s ⋅iLm(s) = − +
chemistry charge algorithm and its state of charge. Therefore, ⎪ Lm ( D1 + D2 ) ⋅ Lm Lm
⎨
whether d2 is commanded by IVR, BVR or BCR depends on ⎪ vC1(s)⋅ n⋅( D1 − D2 ) vo (s) ( d1(s) − d2 (s)) ⋅ n⋅ D2 ⋅Vin d2 (s)⋅ n⋅Vin
which mode it is in. The Three-Port Half-Bridge topology can ⎪s ⋅iLo (s) = Lo
−
Lo
+
Lo ⋅( D1 + D2 )
+
Lo
⎪
operate in only one of following two modes to maintain the ⎪ iLo (s) vo (s)
energy balance between the three ports: ⎪s ⋅ vo (s) = C − R⋅C
⎩ o o

A. Battery-balanced operation (Mode 1)

In this mode, the load voltage is tightly regulated, and the Figure 1 shows the corresponding component names for
solar array operates under MPPT control to provide maximum above-mentioned equations, for instance, R is load resistance,
power. The battery preserves the power balance in the system Rb is battery internal resistance, etc. The system can be
by storing unconsumed solar power, or providing the deficit represented in matrix form using a state-space model. The
during high load intervals. This mode stops when battery state-space model takes the following form:
control activates to prevent battery from over-charge. dX / dt = A ⋅ X + B ⋅ U , Y = I ⋅ X

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 Where X is a matrix containing the state variables vC1, iLm, OVR loop. The OVR controller can then be designed with the
iLo, and vo, U is a matrix containing the system inputs d1 and d2, approximation as following equation:
Y is a matrix containing the system outputs, I is the identity
matrix. For this model the four state variables are also the vo (s)/ d1 (s) ≈ g11
system outputs. Filling in the A and B matrices using the state Once the OVR controller is designed, the BVR loop design
equations gives: becomes straightforward utilizing the BVR equation:
⎡ 1 ( D1 + D2 ) n ( D2 − D1 ) ⎤ vb ( s ) / d 2 ( s ) = g 22 − H OVR ⋅ g12 ⋅ g 21 /(1 + H OVR ⋅ g11 )
⎢ − 0 ⎥
⎢ R b C1 C1 RC1 ⎥ The bode plots of vo(s)/d1(s) and vb(s)/d2(s) before and after
⎢ ( D1 + D2 ) ⎥
⎢− 0 0 0 ⎥ compensation are plotted in Figure 4 and Figure 5,
Lm respectively.
A=⎢ ⎥,
⎢ n(D − D ) 1 ⎥
⎢ 1 2
0 0 − ⎥ Mode 2: Vo to d1 bode plot
⎢ Lo Lo ⎥ 40

magnitude (dB)
⎢ ⎥
⎢ 1 1 ⎥
0 0 − before compensation
⎢⎣ Co RCo ⎥⎦ 20

0 after compensation

⎡ I − nVo I Lm +
nVo ⎤ -20 3 4
⎢ Lm R R ⎥ 10 close loop result 10
⎢ C1 C1 ⎥
⎢ ⎥ frequency (Hz) BW= 5 kHz
⎢− D2Vin D1Vin ⎥ PM=70 degree
B = ⎢ (D + D )L ( D1 + D2 ) Lm ⎥ -100
⎢ 1 2 m
⎥ phase (deg)
⎢ nD2Vin nD1Vin ⎥ after compensation
⎢ (D + D )L ( D1 + D2 ) Lo ⎥⎥ -150
⎢ 1 2 o
before compensation
⎢⎣ 0 0 ⎥⎦

The control structures are then designed based on the state -200 3 4
10 10
space models. Using the models, transfer functions for output
frequency (Hz)
and battery voltage to duty-cycle values can be extracted
according to small signal diagram of Figure 3 as follows: Figure 4. Bode plots of vo(s)/d1(s)
G(s) = ( s ⋅ I − A) ) ⋅ B ,
−1

g11 = G( s)(4,1), g 21 = G(s)(1,1), Mode 2: Vb to d2 bode plot

g12 = G(s)(4,2), g22 = G(s)(1,2) 60
magnitude (dB)

− 40 before compensation
HOVR
20

g11 + vo(s) 0 after compensation

d1(s) 10
2
close loop result
3
10
g21 +
frequency (Hz) BW=600 Hz
PM=70 degree
g12 0
d2(s) +
phase (deg)

g22 -50 before compensation

+ vb(s)

− -100
HBVR after compensation
-150 2 3
Figure 3. Small signal model of Mode 2 10 10
frequency (Hz)

As mentioned earlier, it is difficult to design close loop Figure 5. Bode plots of vb(s)/d2(s)
compensators for each loop without proper decoupling
assumption. Therefore according to the assumption, the BVR The crossover frequency for the OVR loop is set at 5 kHz
loop is designed to have a one decade lower bandwidth than with a phase margin of 70 degrees. And to comply with the
that of OVR. Therefore, its loop gain can be neglected and it previously described approximation, the crossover frequency
can be considered static around the crossover frequency of the of the BVR loop is set at 600 Hz, a little bit more than 500 Hz

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 to ensure good battery transient performance. Phase margin of before and after compensation in this mode should be the
BVR is set at 70 degrees. same as the battery-regulation mode. Figure 7 shows that they
agree with each other in two different modes although they are
B. TP-HB during Battery-balanced Mode obtained from different operation modes.
The same method is followed for battery-balanced mode. In Then according to the designed OVR compensator (Hovr),
this mode, the input capacitor C2 is considered as a state IVR compensator (Hivr) can be designed. The vin(s)/d2(s)
variable instead of the battery capacitor C1. Average model is design result before and after compensation is shown in figure
first derived, then followed by state-space representation. The 8. The bandwidth of IVR loop is designed at 500 Hz, which is
state matrix X contains the four state variables vC2, iLm, iLo, and one decade lower than OVR bandwidth of 5 kHz. The phase
vo and the input matrix U contains the two control variables d1 margin is set at 65 degrees in this case. Because vin is
and d2. The A and B matrices take the following form: inversely proportional to d2, phase margin is measured by the
difference between the phase of vin(s)/d2(s) and 0° rather than
⎡ 1 D2 nD2 ⎤
⎢− R C −
C2
−
C2
0 ⎥ -180°. Positive feedback control is applied for the reason that
⎢ S 2
⎥ transfer function of vin(s)/d2(s) is negative by itself.
⎢ D2 ⎥
⎢ L 0 0 0 ⎥
A=⎢ ⎥,
m

⎢ nD2 1 ⎥ Mode 1 & Mode 2: Vo to d1 bode plot

⎢ L 0 0 −
Lo ⎥ 40

magnitude (dB)
⎢ o ⎥
⎢ 1 1 ⎥ before compensation
⎢ 0 0 − 20
⎣ Co RCo ⎥⎦
0 after compensation

-20 3
⎡ 1 ⎛ nV ⎞ ⎤ 4
⎢ 0 − ⎜ I Lm + o R ⎟ ⎥ 10 10
C2 ⎝ ⎠ frequency (Hz)
⎢ ⎥
⎢ Vb D1Vb ⎥ Mode 2 close loop
− 0
B = ⎢ Lm D2 Lm ⎥ Mode 2 open loop
⎢ ⎥
phase (deg)

-50 Mode 1 close loop

⎢ nVb nD1Vb ⎥ after compensation
⎢ L D2 Lo ⎥ -100
Mode 1 open loop
⎢ o ⎥
⎢⎣ 0 0 ⎥⎦ -150 before compensation
Again, since matrix A and B is derived, transfer functions 10
3
10
4

for output and input voltage to duty values can be extracted frequency (Hz)
from the small signal model as shown in Figure 6.
Figure 7. Bode plots of vo(s)/d1(s) in both modes
−
HOVR

Mode 1: Vin to d2 bode plot

g11 + vo(s) 50
magnitude (dB)

d1(s) before compensation

g21 +
0 after compensation
g12
d2(s) +
g22 -50
+ vin(s) 10
2 3
close loop result 10
frequency (Hz) BW=500 Hz
HIVR
+ PM=65 degree
200
before compensation
phase (deg)

Figure 6. Small signal model of Mode 1

100
after compensation
The same decoupling assumption is made here as the
battery-regulation mode. So once again, IVR loop bandwidth 0 2 3
is made one tenth that of OVR. In fact, the design of OVR is 10 10
frequency (Hz)
exactly the same as Mode 2, because no matter in which mode,
the transfer function of vo/d1 should be the same even though Figure 8. Bode plots of vin(s)/d2(s)
different approaches are applied, therefore bode plot of vo /d1

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 The values of the various circuit parameters used in the of two boards, power stage board and controller board.
simulation and experimental circuit are listed in the following Microchip DSP is utilized to implement the digital control of
table: all control loops.

TABLE 1
VALUES OF CIRCUIT PARAMETERS
D1 0.4 Vin(Vc2) 60 V
D2 0.35 Vb(Vc1) 28 V
Lo 65 µH n 1.25
Lm 45 µH fsw 100 kHz
Co 680 µF Rs 0.1 Ω
C1 680 µF Rb 0.2 Ω
C2 210 µF R 14 Ω

IV. BATTERY CHARGING CONTROL

Precise battery charging control must be implemented to
ensure a protected battery with safe operation and long Figure 10. Prototype photo of three-port converter
lifetime. When the battery reaches a set maximum or
minimum voltage level, the converter will switch to battery-
regulation mode (mode 2) operation in order to control the Venable 3120 frequency analyzer is used to verify the
battery state of charge. Battery charge control is designed control loop design. Close loop bode plots of three loops are
based on what the type of battery it is. For example, Lithium- tested as shown in Figure 11, Figure 12 and Figure 13
Ion batteries need to be charged with a constant current – respectively, and the measured bode plot results agree with the
constant voltage method. This means a constant current (BCR) previous control loop design discussed in section III.
is applied until the battery reaches its nominal voltage. At this
point the control switches to constant voltage mode (BVR)
until the battery current drops to a set percentage of the
charging current (6% in the simulation), afterward terminating
the charging cycle. Figure 9 shows the battery current and
voltage over a charging period by simulation.
Battery Charge Control

30
Maximum Voltage Setpoint
Vb (V)

28
Constant Voltage Mode
26
2 4 6 8 10 Figure 11. Measured bode plots of Vo/d1
t 4
x 10
3
2
Ib (A)

Constant Current Mode

1
0 Minimum Current Setpoint
-1
2 4 6 8 10
t 4
x 10

Figure 9. Battery charge control simulation

V. EXPERIMENTAL RESULTS
The control structure described in section III for both Figure 12. Measured bode plots of Vb/d2
operational modes is tested through a 200 W prototype as
illustrated in Figure 10. Power stage’s input port, battery port
and output port are marked in the prototype photo. It consists

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 Io

vin
vo
Figure 13. Measured bode plots of Vin/d2

Figure 14 shows the battery voltage and output voltage Figure 15. Mode 1 load step response without MPPT
response to a load transient between 1 A and 5 A in battery-
regulation mode. Output voltage transient response is better
than battery voltage because OVR is ten times larger than
BVR’s bandwidth. A resistive load instead of capacitive load
is installed at the battery port during this test, so it is expected Io
to get a better BVR voltage response when real battery or
capacitive load is inserted. Figure 15 demonstrates the system vin
transient response when input voltage loop is given a fixed
voltage reference instead of that from MPPT controller. The
load step is from 1.8 A to 3.8 A. Input voltage response to
load transient is slower than output voltage because IVR
crossover frequency is set at one tenth of that of OVR. Figure vo
16 shows a load step response from 2.4 A to 3.6 A when
MPPT controller is operating and input port is sourced by a
solar simulator. Input voltage waveform indicates input port
stays at maximum power point during load change. Perturb
Figure 16. Mode 1 load step response with MPPT
and observe MPPT technique is adopted in this design, so the
input voltage demonstrates a three-stair shape, which indicates
that MPPT controller is not influenced by load changes and
keeps oscillating around Maximum Power Point. Output VI. CONCLUSION
voltage change is almost negligible in this case because load Presented in this paper is the control structure for the three-
step is small. port DC/DC converter that interfaces a solar input panel, a
rechargeable battery port and an isolated output port. Battery
charge control and solar MPPT control were introduced. The
small signal models for two operational modes were derived
Io for optimized controller design. Control loop design examples
in all operational modes were presented and verified by both
simulation and experimental results.

vb
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