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    Arithmetic: - Performance (Seconds, Cycles, Instructions) - Abstractions

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    anand_duraiswamy
    The document discusses arithmetic and number representation in computing systems, including binary numbers, signed integers, and different encoding schemes for representing negative numbers like ones' complement, sign-magnitude, and two's complement. It also covers arithmetic logic unit design and implementation, how arithmetic operations like addition and subtraction work in two's complement systems, and strategies for building multi-bit ALUs from individual bit-level components.

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    Arithmetic: - Performance (Seconds, Cycles, Instructions) - Abstractions

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    anand_duraiswamy
    36 views7 pages
    The document discusses arithmetic and number representation in computing systems, including binary numbers, signed integers, and different encoding schemes for representing negative numbers like ones' complement, sign-magnitude, and two's complement. It also covers arithmetic logic unit design and implementation, how arithmetic operations like addition and subtraction work in two's complement systems, and strategies for building multi-bit ALUs from individual bit-level components.

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    The document discusses arithmetic and number representation in computing systems, including binary numbers, signed integers, and different encoding schemes for representing negative numbers like ones' complement, sign-magnitude, and two's complement. It also covers arithmetic logic unit design and implementation, how arithmetic operations like addition and subtraction work in two's complement systems, and strategies for building multi-bit ALUs from individual bit-level components.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    36 views7 pages

    Arithmetic: - Performance (Seconds, Cycles, Instructions) - Abstractions

    Uploaded by

    anand_duraiswamy
    The document discusses arithmetic and number representation in computing systems, including binary numbers, signed integers, and different encoding schemes for representing negative numbers like ones' complement, sign-magnitude, and two's complement. It also covers arithmetic logic unit design and implementation, how arithmetic operations like addition and subtraction work in two's complement systems, and strategies for building multi-bit ALUs from individual bit-level components.

    Copyright:

    © All Rights Reserved
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    of 7

    Arithmetic

    • Where we’ve been:


    – Performance (seconds, cycles, instructions)
    – Abstractions:
    Instruction Set Architecture
    Assembly Language and Machine Language
    • What’s up ahead:
    – Implementing the Architecture

    operation

    a
    32 ALU
    result
    32

    b
    32

    1998 Morgan Kaufmann Publishers 64

    Numbers

    • Bits are just bits (no inherent meaning)


    — conventions define relationship between bits and numbers
    • Binary numbers (base 2)
    0000 0001 0010 0011 0100 0101 0110 0111 1000 1001...
    decimal: 0...2n-1
    • Of course it gets more complicated:
    numbers are finite (overflow)
    fractions and real numbers
    negative numbers
    e.g., no MIPS subi instruction; addi can add a negative number)
    • How do we represent negative numbers?
    i.e., which bit patterns will represent which numbers?

    1998 Morgan Kaufmann Publishers 65


    Possible Representations

    • Sign Magnitude: One’s Complement Two’s Complement


    000 = +0 000 = +0 000 = +0
    001 = +1 001 = +1 001 = +1
    010 = +2 010 = +2 010 = +2
    011 = +3 011 = +3 011 = +3
    100 = -0 100 = -3 100 = -4
    101 = -1 101 = -2 101 = -3
    110 = -2 110 = -1 110 = -2
    111 = -3 111 = -0 111 = -1

    • Issues: balance, number of zeros, ease of operations


    • Which one is best? Why?

    1998 Morgan Kaufmann Publishers 66

    MIPS

    • 32 bit signed numbers:

    0000 0000 0000 0000 0000 0000 0000 0000two = 0ten


    0000 0000 0000 0000 0000 0000 0000 0001two = + 1ten
    0000 0000 0000 0000 0000 0000 0000 0010two = + 2ten
    ...
    0111 1111 1111 1111 1111 1111 1111 1110two = + 2,147,483,646ten maxint
    0111 1111 1111 1111 1111 1111 1111 1111two = + 2,147,483,647ten
    1000 0000 0000 0000 0000 0000 0000 0000two = – 2,147,483,648ten
    1000 0000 0000 0000 0000 0000 0000 0001two = – 2,147,483,647ten minint
    1000 0000 0000 0000 0000 0000 0000 0010two = – 2,147,483,646ten
    ...
    1111 1111 1111 1111 1111 1111 1111 1101two = – 3ten
    1111 1111 1111 1111 1111 1111 1111 1110two = – 2ten
    1111 1111 1111 1111 1111 1111 1111 1111two = – 1ten

    1998 Morgan Kaufmann Publishers 67


    Two’s Complement Operations

    • Negating a two’s complement number: invert all bits and add 1


    – remember: “negate” and “invert” are quite different!
    • Converting n bit numbers into numbers with more than n bits:
    – MIPS 16 bit immediate gets converted to 32 bits for arithmetic
    – copy the most significant bit (the sign bit) into the other bits
    0010 -> 0000 0010
    1010 -> 1111 1010
    – "sign extension" (lbu vs. lb)

    1998 Morgan Kaufmann Publishers 68

    Addition & Subtraction

    • Just like in grade school (carry/borrow 1s)


    0111 0111 0110
    + 0110 - 0110 - 0101

    • Two’s complement operations easy


    – subtraction using addition of negative numbers
    0111
    + 1010

    • Overflow (result too large for finite computer word):


    – e.g., adding two n-bit numbers does not yield an n-bit number
    0111
    + 0001 note that overflow term is somewhat misleading,
    1000 it does not mean a carry “overflowed”

    1998 Morgan Kaufmann Publishers 69


    Detecting Overflow

    • No overflow when adding a positive and a negative number


    • No overflow when signs are the same for subtraction
    • Overflow occurs when the value affects the sign:
    – overflow when adding two positives yields a negative
    – or, adding two negatives gives a positive
    – or, subtract a negative from a positive and get a negative
    – or, subtract a positive from a negative and get a positive
    • Consider the operations A + B, and A – B
    – Can overflow occur if B is 0 ?
    – Can overflow occur if A is 0 ?

    1998 Morgan Kaufmann Publishers 70

    Effects of Overflow

    • An exception (interrupt) occurs


    – Control jumps to predefined address for exception
    – Interrupted address is saved for possible resumption
    • Details based on software system / language
    – example: flight control vs. homework assignment
    • Don’t always want to detect overflow
    — new MIPS instructions: addu, addiu, subu

    note: addiu still sign-extends!


    note: sltu, sltiu for unsigned comparisons

    1998 Morgan Kaufmann Publishers 71


    Review: Boolean Algebra & Gates

    • Problem: Consider a logic function with three inputs: A, B, and C.

    Output D is true if at least one input is true


    Output E is true if exactly two inputs are true
    Output F is true only if all three inputs are true

    • Show the truth table for these three functions.

    • Show the Boolean equations for these three functions.

    • Show an implementation consisting of inverters, AND, and OR gates.

    1998 Morgan Kaufmann Publishers 72

    An ALU (arithmetic logic unit)

    • Let’s build an ALU to support the andi and ori instructions


    – we’ll just build a 1 bit ALU, and use 32 of them

    operation op a b res

    a result
    b

    • Possible Implementation (sum-of-products):

    1998 Morgan Kaufmann Publishers 73


    Review: The Multiplexor

    • Selects one of the inputs to be the output, based on a control input


    S

    note: we call this a 2-input mux


    A 0 even though it has 3 inputs!
    C
    B 1

    • Lets build our ALU using a MUX:

    1998 Morgan Kaufmann Publishers 74

    Different Implementations

    • Not easy to decide the “best” way to build something


    – Don’t want too many inputs to a single gate
    – Dont want to have to go through too many gates
    – for our purposes, ease of comprehension is important
    • Let’s look at a 1-bit ALU for addition:
    CarryIn

    a
    cout = a b + a cin + b cin
    Sum
    sum = a xor b xor cin
    b

    CarryOut

    • How could we build a 1-bit ALU for add, and, and or?
    • How could we build a 32-bit ALU?

    1998 Morgan Kaufmann Publishers 75


    Building a 32 bit ALU

    CarryIn Operation

    a0 CarryIn
    Result0
    ALU0
    b0
    CarryOut
    Operation
    CarryIn

    a1 CarryIn
    a Result1
    0 ALU1
    b1
    CarryOut

    1
    Result
    a2 CarryIn
    Result2
    2 ALU2
    b2
    b
    CarryOut

    CarryOut

    a31 CarryIn
    Result31
    ALU31
    b31

    1998 Morgan Kaufmann Publishers 76

    What about subtraction (a – b) ?

    • Two’s complement approch: just negate b and add.


    • How do we negate?

    • A very clever solution:

    Binvert Operation
    CarryIn

    a
    0

    1
    Result

    b 0 2

    CarryOut

    1998 Morgan Kaufmann Publishers 77

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