Project 5

Fall 2016

EE 8407: Power Converter Systems

PWM Current Source Converters

Submitted to: Submitted from:

Professor Dr. Bin Wu Muhammad Noman Qureshi

Electrical and Computer Engineering Department (Student ID: 500711613)

November 28, 2016

The Deparment of Electrical and Computer Engineering

Abstract
When input current from DC power supply or DC capacitor is maintained constant regardless of
the voltage and current requirements at the load, the converter is called Current Source Inverter
(CSI). When input current from AC power source is kept constant regardless of the changes in the
out load, the converter is called Current Source Rectifier (CSR). In this project we are
investigating the operation and performance of current source inverters and current source rectifier,
both modulated by selective harmonic elimination (SHE) schemes. In the first part, we build a
Simulink model of current source inverter. Then firstly we simulate the current source inverter
model with given parameters and SHE modulating scheme. We construct the SHE pattern to
selectively eliminate 5th, 7th and 11th harmonics with no bypass pulses. Then we investigate the
graphs of the current waveforms and total harmonic distortions (THD%) plotted up to 47th
harmonic. Then we record the harmonic magnitude from the harmonic spectrum for investigating
the impact of SHE with 5th, 7th and 11th harmonic eliminated on 13th, 17th and 19th harmonics
magnitudes. In the second part, we build a Simulink model of a current source rectifier. Firstly, we
calculate the missing parameters using the given parameters for current source rectifier. We
convert per unit (pu) given values into unit values. Then we construct a SHE modulating scheme
using the given angle values from the table in the textbook for eliminating 11th and 13th harmonics.
Then we investigate the graphs of the current waveforms and total harmonic distortions (THD%)
plotted up to 47th harmonic. Then we record the harmonic magnitude from the harmonic spectrum
for investigating the impact of SHE with 11th and 13th harmonic eliminated on 5th, 7th, 11th, 13th,
17th and 19th harmonics magnitudes. At the end, we present the conclusions derived from the
simulation results for current source inverter and current source rectifier.

Introduction
Current Source Inverter - An idealized PWM current source inverter is shown below. The
inverter is composed of six GCT devices, each of which can be replaced with two or more devices
in series for medium-voltage operation. The GCT devices used in the current source inverter are
of symmetrical type with a reverse voltage blocking capability. The inverter produces a defined
PWM output current iw. On the dc side of the inverter is an ideal dc current source Id. In practice,
Id can be obtained by a current source rectifier (CSR).
The current source inverter normally requires a three-phase capacitor Cf at its output to assist the
commutation of the switching devices. For instance, at the turnoff of switch S1, the inverter PWM
current iw falls to zero within a very short period of time. The capacitor provides a current path
for the energy trapped in the phase-A load inductance. Otherwise, a high-voltage spike would be
induced, causing damages to the switching devices. The capacitor also acts as a harmonic filter,
improving the load current and voltage waveforms. The value of capacitor is in the range of 0.3 to
0.6 per unit for the MV drive with a switching frequency of around 200 Hz. The capacitor value
can be reduced accordingly with the increase of the switching frequency.
The dc current source Id can be realized by an SCR or PWM current source rectifier with a dc
current feedback control as shown below. To make the dc current Id smooth and continuous, a dc
choke Ld is an indispensable device for the current source rectifier. Through the feedback control
the magnitude of Id is kept at a value set by its reference I*d. The size of the dc choke is normally
in the range of 0.5 to 0.8 per unit.
 Figure 10.2-1 PWM GCT current source inverter

Figure 10.2-2 Realization of a dc current source Id.

Dual-Bridge Current Source Rectifier - The figure below shows the converter configuration of
a dual-bridge current source rectifier. This topology is composed of two identical single-bridge
CSRs powered by a phase shifting transformer with two secondary windings, one connected in
delta and the other in wye (Y). The line-to-line voltage of each secondary winding is normally half
of that of the primary winding. The total line inductance Ls is referred to the secondary side of the
transformer. The filter capacitor Cf is normally in the range of 0.15 to 0.3 pu, which is smaller than
that for the single-bridge CSR.
 Figure 11.3-1 Dual-bridge GCT current source rectifier.
This topology uses two identical single-bridge CSRs powered by a phase shifting transformer with
two secondary windings, one connected in delta ( ) and the other in wye (Y). The line to line
voltage of each secondary winding is normally half of that of the primary winding. The transformer
is used to cancel the 5th, 7th, 17th, and 19th harmonic currents while the PWM technique is employed
to eliminate the 11th and 13th harmonics in transformer primary line currents. As a result, the
primary-side line current i A does not contain any harmonics lower than the 23rd. The transformer
can also block common-mode voltages. The other higher order harmonics can also be attenuated
by the filter capacitor C f .

Theoretical Analysis
Pulse Width Modulated (PWM) Current Source Inverter
The modulation scheme used for single-bridge CSI and dual-bridge rectifier is Selective Harmonic
Elimination (SHE). It provides a superior harmonic profile with minimum switching frequency.
SHE is an off-line modulation scheme, which is able to eliminate a number of low-order unwanted
harmonics in the inverter PWM current i w . The switching angles are pre-calculated and then
imported into a digital controller for implementation.
The number of harmonics to be eliminated is calculated by
k  ( N p  1) / 2

The inverter PWM current i w can generally be expressed as


iw (t )   an sin(nt )
n 1
Where

4

an  2
wi (t ) sin(nt )d (t )
0
The Fourier coefficient a n can be found from
  
cos( n  1 )  cos[ n (   1 )]  cos( n  2 )  cos[ n (   2 )]  ...
3 3

 cos( n )  cos[ n(   )]  cos( n  ) k  odd;
4 I dc  k
3
k
6
an  
n   
cos( n1 )  cos[ n(  1 )]  cos( n 2 )  cos[ n(   2 )]  ...
 3 3
  
 cos( n k )  cos[ n(   k )]  cos( n ) k  even.
 3 6
From which

 2
 1 sin(nt )d (t )  ...    k sin(nt )d (t ) 
6

  
 3  k 1
4I 
  

sin(nt )d (t )  ...   2 sin(nt )d (t )
1
k  odd;
an  dc   3
k
3
  2 k

 1
sin(nt )d (t )  ...   sin(nt )d (t ) 
 k 1
   k 
  sin(nt )d (t )  ...   2 sin(nt )d (t )
3 k  even.
 6 3
1

To eliminate k harmonics, k equations can be formulated by setting an  0 ,

Fi (1 ,  2 ,  3 , ...,  k )  0 i  1, 2, ..., k

For example, to eliminate the 5th, 7th, and 11th harmonics in PWM current i w , the following three
functions can be derived

  -------- (1)
F1  cos(51 )  cos[5(  1 )]  cos(5 2 )  cos[5(   2 )] 
3 3
 5
 cos(5 3 )  cos[5(   3 )]  cos( )0
3 6
 
F2  cos(71 )  cos[7(  1 )]  cos(7 2 )  cos[7(   2 )] ------- (2)
3 3
 7
 cos(7 3 )  cos[7(   3 )]  cos( )0
3 6
 
F3  cos(111 )  cos[11(  1 )]  cos(11 2 )  cos[11(   2 )]
3 3 ------- (3)
 11
 cos(11 3 )  cos[11(   3 )]  cos( )0
3 6
By using Newton-Rapson iteration algorithm, the switching angles for the 5th, 7th, and 11th
harmonic elimination are 1  2.24o ,  2  5.60o and  3  21.26 o . The SHE modulation generates
two pairs of dominant harmonics at n  3( N p  1)  1 and n  3( N p  1)  5 . For the elimination of
5th, 7th, and 11th harmonics, N p  7 and dominant harmonic pairs are 17th, 19th & 13th, 23rd.

The PWM current source inverter has the following characteristics:

 Simple Converter Topology. The GCT devices used in the inverter are of symmetrical type,
which do not require anti-parallel freewheeling diodes.
 Motor Friendly Waveforms. The current source inverter produces a three-phase PWM
current instead of PWM voltage as in the VSI. With the filter capacitor installed at the inverter
output, the load current and voltage waveforms are close to sinusoidal. The high dv/dt problem
associated with the VSI does not exist in the CSI.
 Reliable Short-Circuit Protection. In case of a short circuit at the inverter output terminals,
the rate of rise of the dc current is limited by the dc choke, allowing sufficient time for the
protection circuit to function.
 Limited Dynamic Performance. The dc current cannot be changed instantaneously during
transients, which reduces the system dynamic performance.

PWM Current Source Rectifiers (Dual-Bridge Current Source Rectifier)

Unlike the SHE modulation schemes for CSI where the modulation index is usually fixed to its
maximum value, the SHE scheme for the CSR should provide an adjustable modulation index for
dc current control in addition to the harmonic elimination. The SHE switching pattern for dual-
bridge CSR is designed by maintaining the following requirements.
(i) To eliminate 11th and 13th harmonics in the PWM current of each bridge.
(ii) To provide a full range of modulation index control.
(iii) To minimize switching frequency.

In addition, the PWM pattern design must satisfy the switching constraints for CSR: Only two
switching devices should conduct at any time, one connected to the positive dc bus and the other
to the negative dc bus.

The gate signal v g 1 for switch S1 is composed of six pulses per cycle of the supply frequency, of
which three are the bypass pulses specified by  7 to 12 . The resultant device switching frequency
is 60  6  360Hz , 6-times the supply frequency of 60 Hz.
The waveform of the primary current i A is virtually sinusoidal, which is the main feature
of the dual-bridge rectifier.
The dual-bridge rectifier has the following features:
 Sinusoidal Line Current. The transformer is used to cancel the 5th, 7th, 17th, and 19th
harmonic currents while the PWM technique is employed to eliminate the 11th and 13th
harmonics. As a result, the primary-side line current iA does not contain any harmonics lower
than the 23rd. The other high order harmonics can be attenuated by the filter capacitor Cf.
 Low Switching Frequency. The rectifier can draw sinusoidal input current with a low
switching frequency, typically 360 Hz or 420 Hz for the elimination of the 11th and 13th
harmonics.
 Reliable Operation. No GCT devices are connected in series in the dual bridge CSR, which
enhances the reliability of the system.
 Suitable for Retrofit Applications. The dual-bridge rectifier requires a phase shifting
transformer for harmonic cancellation. The transformer can also block common-mode voltages
that would otherwise appear on the motor windings, causing premature failure of the winding
insulation system. The MV drive with the dual-bridge CSR as a front end is suited for retrofit
applications, where a standard ac motor is usually employed.
Part A Single-bridge Current Source Inverter (CSI)

Inverter Specifications
Inverter Configuration: Single-bridge current source inverter (refer to Fig. 5-1).
Assumption: ideal inverter, no power loss.
Inverter dc Link Current: Id = 200 A
Inverter Output Frequency: 70 Hz
Output Filter Capacitor: 66 F
Inverter load: Three-phase balanced RL load,
Rload  15 with Lload = 6 mH in series per phase.

Part B Dual-Bridge Current Source Rectifier (CSR)

Rectifier Specifications
Rectifier Configuration: Dual-bridge current source rectifier as shown in Fig. 5-2.
Assumption: Ideal rectifier, no power loss.
Rated DC Output Power: 1.5MW (total power of the two single-bridge rectifiers)
Rated Utility Voltage: 3000V (rms, line-to-line), 60Hz
Phase-shifting Transformer: Represented by leakage inductances, no power loss.
Rated Secondary Voltage: 1500V (rms, line-to-line)
Total Leakage Inductance Llk: 0.07 pu (primary and secondary leakages, both referred to the
secondary side)
Filter Capacitor Cf: 0.4 pu
Base Values for Llk and Cf: Use the rated values of each secondary winding for the calculation of
Llk and Cf.
Line (source) inductance Ls: 0.8 mH (0.05 pu)
DC Choke Ld: 48 mH (3 pu. In practice, Ld is in the range of 0.5 to 1 pu. The high value of 3 pu
is used here to reduce the dc current ripple, which will increase the accuracy of the line/PWM
current THD analysis.
DC Load Resistance: 16 
Calculations, Simulation Results and Discussions/Explanations

Part A Single-bridge Current Source Inverter (CSI)

1) Build Simulink model for the single-bridge CSI.

See Appendix for Simulink Model.

2) Develop SHE switching pattern with 5th, 7th and 11th harmonic elimination
(no bypass pulses).

Harmonic
Angle (degrees)
Eliminated
0 Ɵ1 = 2.24 Ɵ2 = 5.60 Ɵ3 = 21.26

60-21.26 60-5.60 60-2.24

30
= 38.74 = 54.4 = 57.76
5th, 7th and 11th 120+2.24 120+5.60 120+21.26 120+30
= 122.24 = 125.6 = 141.26 = 150

180-21.26 180-5.60 180-2.24

180
= 158.74 = 174.4 = 177.76

SHE Switching Pattern with 5th, 7th and 11th Harmonic Elimination (no bypass pulses)
Pattern in Lookup Table for generating the desired switching pattern as shown above;

Angle (degrees) - 0, 2.24, 2.24, 5.6, 5.6, 21.26, 21.26, 30, 30, 38.74,
Magnitude - 0, 0 , 1 , 1 , 0 , 0 ,1 ,1 ,0 ,0

Angle (degrees) - 38.74, 54.4, 54.4, 57.76, 57.76, 122.24, 122.24, 125.6, 125.6, 141.26,
Magnitude - 1 ,1 ,0 ,0 ,1 ,1 ,0 ,0 ,1 ,1

Angle (degrees) - 141.26, 150, 150, 158.74, 158.74, 174.4, 174.4, 177.76, 177.76, 180
Magnitude - 0 ,0 ,1 ,1 ,0 ,0 ,1 ,1 ,0 ,0

3) Show waveforms of iw (A), io (A) and VAB (V).

4) Determine harmonic content by 1) completing Table 5-1 and plotting the
spectrum of Iwn / Iw1, Ion / Io1 and VABn / VAB1 up to the 47th harmonic. Make your
conclusions.

Harmonic Spectrum of Iwn / Iw1 up to the 47th Harmonic

Harmonic Spectrum of Ion / Io1 up to the 47th Harmonic

Harmonic Spectrum of VABn / VAB1 up to the 47th Harmonic

Table 5-1 Fundamental and Dominant Harmonics in Iw, Io and VAO

Fundamental 13th 17th 19th 23rd THD

(RMS) (RMS) (RMS) (RMS) (RMS) (%)
Iw 144.2 14.91 42.34 36.71 4.99 53.13

Io 140.4 1.93 1.27 0.8 0.57 7.64

VAO 3736 72.20 154.08 121.78 6.37 7.15

Conclusions:
As we can observe from the harmonic spectrum, eliminating 5th, 7th and 11th harmonic resulted in
an increase of 13th, 17th and 19th harmonics, although at 23rd the effect of elimination is not
significant. Also, the total harmonic distortion (THD%) is significantly smaller than we got using
simple pulse width modulation and other modulating schemes without lower order harmonics
elimination. The waveforms we obtain are also in very good shape as compared to our previous
project results in which we used no harmonic elimination, except once when we eliminated the
even order harmonics at the expense of doubling the switching frequency.
Part B Dual-Bridge Current Source Rectifier (CSR)

Calculations

Rated Secondary Voltage: 1500V (rms, line-to-line)

Total Leakage Inductance Llk: 0.07 pu (primary and secondary leakages, both referred to the
secondary side)
Filter Capacitor Cf: 0.4 pu
Base Apparent Power: SB = 1.5×106 VAR (Power Factor, PF = 1.0)
Secondary-Side Base Impedance: ZB = V2LL / SB = (1500)2 / (1.5×106) = 1.5 Ω
Secondary-Side Base Inductance: LB = ZB / B = 1.5 / 260 = 3.98 mH
Secondary-Side Leakage Inductance: Lpu = 0.07 pu / 2 = 0.035 pu
Leakage Inductance: L = LB × Lpu = 3.98 × 10-3 × 0.035 = 0.1393 mH
Filter Base Capacitance: CB = 1 / (ZB × B) = 1 / (260 × 1.5) = 1.768 mF
Filter Capacitance: Cf = CB ×Cpu = 1.768 × 10-3 × 0.4 = 707.2 μF

1) Build Simulink model for the dual-bridge CSR.

See Appendix for the Simulink Model.

2) Develop SHE switching pattern with 11th and 13th harmonic elimination at
ma  1.0. (refer to Table 2 on Page 248 of the textbook).

Angles from Table-2 on Page 248 of the Textbook for 11th and 13th Harmonic Elimination

ma Ɵ1 Ɵ2 Ɵ3 Ɵ4 Ɵ5 Ɵ6 Ɵ7 Ɵ8 Ɵ9 Ɵ10 Ɵ11 Ɵ12 Ɵ13 Ɵ14

1.0 19.4 21.1 30.0 36.4 40.6 139.4 143.6 150.0 158.9 160.6 261.1 263.6 276.4 278.9
3) Use delay angle of   0 (with respect to the transformer secondary voltage
instead of capacitor voltage).
DC voltage to RMS Line-to-Line voltage relation is as follows;

Vd = √ (3 / 2) × VLL × ma × cosα * α = 0o, ma = √2 × Iw1 / Id

Vd = √ (3 / 2) × VLL × √2 × Iw1 / Id

Vd = √3 × VLL × Iw1 / Id * VLL = 3000, Iw1 = 295.6 A, Id = 295.

Vd = √3 × 3000 × 295.6 / 295

Vd = 5207 V

Actual Vd (4725 V) is less than the calculated Vd because of a small voltage drop
across the dc choke.

4) Show waveforms of iw (A), is (A) and iA (A).

5) Determine harmonic content by 1) completing Table 5-2 and plotting the
spectrum of Iwn / Iw1, Isn / Is1 and IAn / IA1 up to the 47th harmonic. Make your
conclusions.

Harmonic Spectrum of Iwn / Iw1 up to the 47th Harmonic

Harmonic Spectrum of Isn / Is1 up to the 47th Harmonic

Harmonic Spectrum of IAn / IA1 up to the 47th Harmonic

Table 5-2 Fundamental and Dominant Harmonics in Iw, Is and IA

Fundamental 5th 7th 11th 13th 17th 19th THD

(RMS) (RMS) (RMS) (RMS) (RMS) (RMS) (RMS) (%)
Iw 209 43.48 1.59 1.95 1.25 8.85 21.33 46.39

Is 400.2 20.28 0.69 0.09 0.15 0.19 0.57 5.77

IA 13.85 0.01 0 0 0 0 0 1.56

Note: In case of LC resonances, add a three-phase damping resistance in parallel with Cf. You
should select your damping resistance such that the LC resonance can be effectively damped out
and in the meantime the power loss on the damping resistor is minimized. Give the value of the
damping resistance.

RDamping = 330 Ω.

Conclusions:

We can observe that there are no harmonics present at the primary side current, IA because of the
usage of a phase shifting transformer between AC and DC side. Also, it is clearly evident that
most of the harmonics are eliminate through the Cf as the magnitude of harmonics in Is are
significantly lower than the magnitude of harmonics in Iw.
Conclusions
We can conclude that using selective harmonic elimination (SHE) modulating scheme reduces the
total harmonic distortion (THD%), increases the output magnitude of fundamental and useful
frequency harmonic, and considerably improve the shapes of the output current and voltage
waveforms. Although, by eliminating a certain harmonic, we increase the value of the harmonics
around it. But this is not very harmful as we are more concerned with lower order harmonics than
higher order harmonics. Lower order harmonics are more harmful for inductive loads.
In the current source inverter (CSI) simulation, we can observe from the harmonic spectrum that
elimination of 5th, 7th and 11th harmonic is resulted in an increase of 13th, 17th and 19th harmonics,
although at 23rd the effect of elimination is not significant. Also, the total harmonic distortion
(THD%) is significantly smaller than we got using simple pulse width modulation and other
modulating schemes without lower order harmonics elimination. The waveforms we obtain are
also in very good shape as compared to our previous project results in which we used no harmonic
elimination, except once when we eliminated the even order harmonics at the expense of doubling
the switching frequency.
In the current source rectifier (CSR) simulation, we can observe that there are no harmonics present
at the primary side current, IA because of the usage of a phase shifting transformer between AC
and DC side. Also, it is clearly evident that most of the harmonics are eliminate through the Cf as
the magnitude of harmonics in Is are significantly lower than the magnitude of harmonics in Iw.
Apart from all the benefits we have described, selective harmonics elimination is not always the
best available option because of its certain limitations. One of the key factor is the calculations of
angles for eliminating one or more harmonics selectively. Because of the online angle calculation,
which involve complex differential equations and long-time running numerical methods, dynamic
performance of SHE is low.
Appendix: Simulink Models

Current Source Inverter

Gate Signal Generator for Implementing SHE Modulating Scheme

 Current Source Rectifier

One of the Two Gate Signal Generator for Implementing SHE Modulation