Dynamic Voltage Restorer: Prof. Shilpa Kapse
Dynamic Voltage Restorer: Prof. Shilpa Kapse
Dynamic Voltage Restorer: Prof. Shilpa Kapse
Electrical Engineering
Unversity of Mumbai.
By
Shweta Bodiwala
Deeksha Shetty
Komal Dongre
Prathamesh Dalvi
Sushant Saldur
Guided By
5.3 Reference Voltage Signal Generation for Dynamic Voltage Regulator (DVR): ................ 33
Chapter 6 Simulation results ................................................................................34
6.1 Case I: Balanced supply voltage ......................................................................................... 35
DC - Direct Current
AC - Alternating Current
CPD - Custom Power Device APF
- Active Power Filters
INTRODUCTION
1.1 Introduction
The technological advancements have proven a path to the modern industries to
extract and develop the innovative technologies within the limits of their industries for the
fulfilment of their industrial goals and their ultimate objective is to optimize the production
while minimizing the production cost and thereby achieving maximized profits while
ensuring continuous production throughout the period.
As such a stable supply of un-interruptible power has to be guaranteed during the
production process. The reason for demanding high quality power is basically the modern
manufacturing and process equipment, which operates at high efficiency, requires high
quality defect free power supply for the successful operation of their machines. More
precisely most of those machine components are designed to be very sensitive for the
power supply variations. Adjustable speed drives, automation devices, power electronic
components are examples for such equipment’s. Failure to provide the required quality
power output may sometimes cause complete shutdown of the industries which will make a
major financial loss to the industry concerned. Thus the industries always demands for high
quality power from the supplier or the utility.
Following shows some abnormal electrical conditions caused both in the utility end and
the customer end that can disrupt a process.
1. Voltage sags & swells.
2. Voltage interruptions.
3. Transients due to Lighting loads, capacitor switching, nonlinear loads, etc.
4. Harmonics.
5. Voltage unbalances, etc.
As a result of above abnormalities the industries may undergo burned-out motors, lost
data on volatile memories, erroneous motion of robotics, increased maintenance costs and
burning core materials especially in plastic industries, paper mills & semiconductor plants.
Among those power quality abnormalities voltage sags and swells or simply the
fluctuating voltage situations are considered to be one of the most frequent type of
abnormality.
As the power quality problems are originated from utility and customer side, the
solutions should come from both and are named as utility based solutions and customer based
solutions respectively. The best examples for those two types of solutions are FACTS devices
(Flexible AC Transmission Systems) and Custom power devices. FACTS devices are those
controlled by the utility, whereas the Custom power devices are operated, maintained and
controlled by the customer itself and installed at the customer premises. Both the FACTS
devices and Custom power devices are based on solid state power electronic components.
Uninterruptible Power Supplies (UPS), Dynamic Voltage Restorers (DVR) and Active
Power Filters (APF) are examples for commonly used custom power devices. Among those
APF is used to mitigate harmonic problems occurring due to non-linear loading conditions,
whereas UPS and DVR are used to compensate for voltage sag, voltage swell and voltage
unbalance conditions. In this report the control of a Dynamic voltage restorer (DVR) for
supply voltage disturbances has been studied.
.
Chapter 2
Power Quality
2.1 Introduction
The IEEE Standard Dictionary of Electrical and Electronics defines power quality as “the
concept of powering and grounding sensitive electronic equipment in a manner that is suitable
to the operation of that equipment.” Power quality may also be defined as “the measure,
analysis, and improvement of bus voltage, usually a load bus voltage, to maintain that
voltage to be a sinusoid at rated voltage and frequency. “Another definition of power quality
reported in the literature [1] is as follows:
Power quality is “the provision of voltages and system design so that the user of
electric
power can utilize electric energy from the distribution system successfully without interference
or interruption.” A broad definition of power quality borders on system reliability, dielectric
selection on equipment and conductors, long-term outages, voltage unbalance in three-phase
systems, power electronics and their interface with the electric power supply and many other
areas.
2.3.1.1 Transients
Transients are unwanted decay with time and hence not a steady state problem. A broad
definition is that a transient is “that part of the change in a variable that disappears during
transition from one steady state operating situation to the other". Another synonymous term
which can be used is surge.
Transients are further classified into two categories:
(a) Impulsive
(b) Oscillatory
a) Voltage Sags
Voltage sag is defined as the reduction of RMS voltage to a value between 0.1 and
0.9p.u and lasting for duration between 0.5 cycles to 1 minute. Voltage sags are mostly caused
by system faults and last for durations ranging from 3 cycles to 30 cycles depending on the
fault clearing time. It is to be noted that under-voltages (lasting over a minute) can be
handled by voltage regulation equipment. Starting of large induction motors can result in
voltage dip as the motor draws a current up to 10 times the full load current during the starting.
Also, the power factor of the starting current is generally poor.
b) Voltage Swells
A voltage swell is defined as a raise in RMS voltage which is between 1.1 and 1.8p.u
for time duration between 0.5 cycles to 1 minute. A voltage swell is characterized by its
magnitude (RMS) and duration. As with sag, swell is associated with system faults. A SLG
(single line to ground) fault can result in a voltage swell in the healthy phases. Swell can
also result from energizing a large capacitor bank. On an ungrounded system, the line to
ground voltages on the ungrounded phases is 1.73p.u during a SLG fault. However in a
grounded system, there will be negligible voltage rise on the unfaulted phases close to a
substation where the delta connected windings of the transformer provide low impedance
paths for the zero axis current during the SLG fault.
c) Interruption
If the supply voltage or load current decreases to less than 0.1 p.u for a period of time
not more than one minute is known as interruption. Interruption can be caused either by
system faults, equipment failures or control malfunctions. The interruptions are measured
by their duration alone. The duration due to a fault is determined by the operating time of the
protective devices. Duration of an interruption due to equipment malfunction can be
irregular. Some interruptions may also be caused by voltage sag conditions when there are
faults on the source side.
The NEMA definition assumes that the average voltage is always equal to the rated
value, which is 480 V for the US three-phase systems and since it works only with
magnitudes, phase angles are not included.
2) IEEE Definition: The IEEE definition (2.2) of voltage unbalance, also known as the phase
voltage unbalance rate (PVUR), is given by
True Definition: The true definition of voltage unbalance is defined as the ratio of the negative
axis voltage component to the positive axis voltage component (2.3). The percentage voltage
unbalance factor (% VUF), or the true definition, is given by
Devices
3.1 Introduction
Initially for the improvement of power quality or reliability of the system FACTS
devices
like static synchronous compensator (STATCOM), static synchronous series
compensator(SSSC), interline power flow controller (IPFC), and unified power flow
controller (UPFC) etc. are introduced. These FACTS devices are designed for the
transmission system. But now a day as more attention is on the distribution system for the
improvement of power quality, these devices are modified and known as custom power
devices. The term “custom power” describes the value-added power that electric utilities will
offer to their customers. The value addition involves the application of high power
electronic controllers to distribution systems, at the supply end of industrial, commercial
consumers.
The main custom power devices which are used in distribution system for power
quality improvement are distribution static synchronous compensator (DSTATCOM),
dynamic voltage
Restorer (DVR), active filter (AF), unified power quality conditioner (UPQC) etc. N.G
Hingorani [5] was the first to propose FACTS controllers for improving PQ. He termed them
as Custom Power Devices (CPD). These are based on VSC and are of 3 types given below.
1) Shunt connected Distribution STATCOM (DSTATCOM)
2) Series connected Dynamic Voltage Restorer (DVR)
3) Combined shunt and series, Unified Power Quality Conditioner (UPQC).
The DVR is similar to SSSC while UPQC is similar to UPFC. In spite of the similarities,
the control techniques are quite different for improving PQ. A major difference involves the
injection of harmonic currents and voltages to separate the source from the load. A DVR can
work as a harmonic isolator to prevent the harmonics in the source voltage reaching the load in
addition to balancing the voltages and providing voltage regulation. A UPQC can be considered
as the combination of DSTATCOM and DVR. A DSTATCOM is utilized to eliminate the
harmonics from the source currents and also balance them in addition to providing reactive
power Injection to improve power factor or regulate the load bus voltage.
Several power providers have installed custom power devices for mitigating power
quality problems. In particular, three major power quality devices (PQDs)—an advanced
static VAR compensator, a dynamic voltage restorer, and a high-speed transfer switch are
used these days. Over the past ten years, advanced power electronic devices have been the centre
of various research studies, installation projects, and development technologies.
By custom power devices, we refer to power electronic static controllers used for power
quality development on distribution systems rated 1 through 38 kV. This interest in the usage of
power quality devices (PQDs) arises from the need of mounting power quality levels to meet the
everyday growing sensitivity of consumer needs and expectations [5]. Power quality levels, if
not achieved, can cause costly downtimes and customer dissatisfaction. According to
contingency planning research company’s annual study [6], downtime caused by power
Disturbances results in major financial losses. In order to face these new needs, advanced power
electronic devices have developed over the last years. Their performance has been demonstrated
at medium distribution levels, and most are available as commercial products [7], [8].
While power disturbances occur on all electrical systems, the sensitivity of today’s
sophisticated electronic devices makes them more disposed to the quality of power supply. For
some sensitive devices, a temporary disturbance can cause scrambled data, interrupted
communications, a frozen mouse, system crashes and equipment failure etc. A power
voltage spike can damage valuable components.
To solve this problem, custom power devices are used. One of those devices is
the Dynamic Voltage Restorer (DVR), which is the most efficient and effective modern
custom power device used in power distribution networks. Its appeal includes lower cost,
smaller size, and its fast dynamic response to the disturbance.
3.2 configurations
The compensating type custom power devices can be classified on the basis of
different topologies and the number of phases. For power quality improvement the voltage
source inverter (VSI) bridge structure is generally used for the development of custom power
devices, while the use of current source inverter (CSI) is less reported. The topology can be
shunt (DSTATCOM), series (DVR), or a combination of both (UPQC).
1. DSTATCOM
A DSTATCOM is a custom power device which is utilized to eliminate the harmonics from
the source currents and also balance them in addition to providing reactive power Injection to
improve power factor or regulate the load bus voltage.
LINE
VSC
STORAGE
UNIT
LINE
VSC
STORAGE
UNIT
VSC VSC
4.1 Introduction
Among the power quality problems (sags, swells, harmonics…) voltage sags, swells
and supply voltage unbalances are the most severe disturbances. In order to overcome these
problems the concept of custom power devices is introduced recently. One of those devices is
the Dynamic Voltage Restorer (DVR), which is the most efficient and effective modern
custom power device used in power distribution networks. DVR is a recently proposed series
connected solid state device that injects voltage into the system in order to regulate the load
side voltage. It is normally installed in a distribution system between the supply and the
critical load feeder at the point of common coupling (PCC). Other than voltage sags and
swells Injection, DVR can also be added other features like: line voltage harmonics Injection,
reduction of transients in voltage and fault current limitations.
LOAD 1
SENSITIVE
DVR
AC STEP DOWN
LOAD
STEP DOWN
SOURCE TRANSFORMER
PCC TRANSFORMER
SERIES
TRANSFORMER
supply
FILTER
LOAD
+ PWM
Vdc Cdc INVERTER
-
DC LINK
DVR
Ripple Filter
The output of the inverter contains high frequency switching harmonics. To remove
these switching harmonics, a three phase ripple filter (Electro Magnetic Interference-EMI)
filter is used.
Vdvr
Line
Vinj
impedence
IL
ZL Zdvr
Vs
supply
VL
LOAD
When the system voltage (Vs) sags/swells, the DVR injects a series voltage Vdvr through
the injection transformer so that the desired load voltage magnitude VL can be maintained.
The series injected voltage of the DVR can be written as
Vs=VL =V0
δ
θ
Vdvr
VS1
I1L=IL
IL1=IL=Line current
VS1=source voltage under unbalance condition
Vdvr =injected voltage
θ =load angle.
Vs-pre-sag
δ Vs-sag Vdvr
VL
IL
|VL|=|Vs-pre-sag| (4.3)
θ =load angle.
One of the advantages of this method is that the amplitude of DVR injection voltage
is minimum for certain voltage sag in comparison with other strategies. Practical application
of this method is in non-sensitive loads to phase angle jump.
5.1 Introduction
The basic functions of a controller in a Dynamic Voltage Restorer are the detection of
voltage disturbances in the supply voltage, computation of the correcting voltage, and
generation of trigger pulses to the sinusoidal PWM based DC-AC inverter. The controller
may also be used to shift the DC-AC inverter into rectifier mode to charge the capacitors in
the DC energy link in the absence of voltage abnormalities.
1 1 1
V0 2 Vsa
2 2 2
V
Vd 3 sin( wt ) sin( wt 120) sin( wt 240) sb (5.1)
Vq cos( wt ) cos( wt 120) cos( wt 240) Vsc
Where Vsa, Vsb, Vsc are the supply voltage, V0, Vd, Vq are the zero axis, direct and
quadrature axis voltages.
The supply voltage to the load is given in equation (5.2). When rated balanced voltage is
applied Vm1 Vm 2 Vm3 Vm and 0 .The respective V0, Vd, and Vq are calculated in the
following equations.
v sa Vm1 sin( wt )
v sb Vm 2 sin( wt 120 )
(5.2)
v sc Vm3 sin( wt 240 )
1
v0 (v sa v sb v sc )
3
1
[Vm sin( wt ) Vm sin( wt 120) Vm sin( wt 240)]
3
1
Vm [sin( wt ) sin( wt 120) sin( wt 240)]
3
(5.3)
v0 0
2
v d [v sa * sin( wt ) v sb * sin( wt 120) v sc * sin( wt 240)]
3
2
[Vm sin( wt ) * sin( wt ) Vm sin( wt 120) * sin( wt 120) Vm sin( wt 240) * sin( wt 240)]
3
2
[Vm sin 2 ( wt ) sin 2 ( wt 120) sin 2 ( wt 240)]
3
1
Vm [3 cos( 2wt ) cos( 2wt )
3
1
* 3Vm
3
vd Vm (5.4)
2
v q [v sa * cos( wt ) v sb * cos( wt 120) v sc * cos( wt 240)]
3
2
[Vm sin( wt ) * cos( wt ) Vm sin( wt 120) * cos( wt 120) Vm sin( wt 240) * cos( wt 240)]
3
vq 0 (5.5)
From equations (5.3),(5.4),(5.5) we can analyse that quadrature axis voltage and zero
axis voltage are of zero value and direct axis voltage is a DC quantity of Vm.
Equations above defines the transformation from three phase abc to dqo reference
frame. In this transformation, phase a-axis is aligned to the d-axis which is in quadrature with
q-axis. Here ωt is the angle between phase a-axis and the d-axis.
Vsa V0 Via*
V0
abc 0 dq0
Vib* Sinusoidal
-
To Vd Vd* To
Vsb PWM
dq0 LPF 1 abc
+
Vq
transform V 0 transformation Vic* Pulses to
Vsc q inverter
ation
PLL ᶿ ᶿ
The reference injected voltages Via*, Vib*, Vic* are calculated from equation (5.7), and the
references injected voltages are used for the generation of pulses to inverter to fire IGBTs.
Chapter 6
Simulation results
This chapter analyses the performance of the Dynamic voltage Restorer (DVR) with
different supply voltage conditions (voltage sag, voltage swell, and voltage unbalance) to R-L
load. The complete model of the DVR is constructed in Simulink environment (MATLAB).
Figure 6.1 shows the complete model of DVR constructed in Simulink environment
(MATLAB). The model consists of source, inverter, control block, EMI filter, Injection
transformer, comparator, and load. The different supply voltage disturbances are generated by
using source. The inverter is used to convert DC supply to AC supply. The output of the
inverter contains fundamental voltage and the voltages of switching frequencies and multiples
of switching frequencies. The voltages of switching frequencies and multiples of switching
frequencies are eliminated by using EMI filter. The pulses are generated by the comparator by
comparing sinusoidal signal with triangular signal. The AC voltage of the inverter is injected
in each phase of the line by using injection transformers. The reference signals to the PWM
inverter are generated by using control block.
200
Source Voltage(Volts)
100
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
`
(b)
100
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
Figure 6-3: (a), (b) load voltage
Figure 6-3 (a) shows the waveform of Load Voltage (simulation is done in Matlab
Simulink).
Vdq0 Vs Time
350
Vd
300 Vq
v0
250
200
Vdq0(volts)
150
(a)
100
50
-50
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
Figure 6-4: (a), (b) Direct, Quadrature and Zero axis voltages
Figure 6-4 (a) shows the waveform of Direct, Quadrature and Zero axis voltages under
balanced supply Voltage (simulation is done in Matlab Simulink. The Quadrature and zero
axis voltages are of zero voltage after converting the source voltage to synchronously rotating
reference frame (abc to dq0).
Figure 6-5 (a) shows the waveform of injected Voltage (simulation is done in Matlab
Simulink.
200
Source Voltage(volts)
100
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
Figure 6-5 (a) shows the waveform of Balanced Sag Source Voltage (simulation is
done in Matlab Simulink). The voltage sag is supplied from 0.08 to 0.2 seconds (6 cycles).
Load Voltage Vs Time
400
Vla
Vlb
300
Vlc
200
Load Voltage(volts)
100
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
Figure 6-6: (a), (b) Load voltage
Figure 6-6 (a) shows the waveform of Load Voltage (simulation is done in Matlab
Simulink). The voltage is injected by DVR from 0.08 to 0.2 seconds. From the waveform it
can be observed that the voltage across load is maintained to rated voltage.
Injected Voltage Vs Time
80
Via
Vib
60
Vic
40
Injected Voltage(Volts)
20
0
(a)
-20
-40
-60
-80
0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
Figure 6-7(a) shows the waveform of Injected Voltage (simulation is done in Matlab
Simulink). The voltage is injected by DVR from 0.08 to 0.2 seconds.
Vdq0 Vs Time
350
Vd
Vq
300
V0
250
200
Vdq0(volts)
150
(a)
100
50
-50
0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
Figure 6-7: (a), (b) Direct, Quadrature and Zero axis voltage
Figure 6-8 (a) shows the waveform of Direct, Quadrature and Zero axis
voltages under Balanced Sag supply Voltage (simulation is done in Matlab Simulink. By
observing the waveform of 6-8 (a), (b) under Balanced Sag Supply voltage the direct quantity
voltage is a DC voltage with amplitude of phase voltage. From the wave form it can be
observed that there is a dip in Direct Quantity voltage from 0.08 to 0.2 seconds where the sag
voltage is applied. The Quadrature and Zero axis voltages are of zero voltage after converting
the source voltage into synchronously rotating reference frame (abc to dq0).
200
100
0
(a)
-100
-200
-300
-400
-500
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
Figure 6-9 (a) shows the waveform of Balanced Swell Voltage (simulation is done in
Matlab Simulink). The voltage Swell is supplied from 0.08 to 0.2 seconds (6 cycles)
Load Voltage Vs Time
400
Vla
Vlb
300
Vlc
200
Load Voltage(volts)
100
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
Figure 6-10 (a) shows the waveform of Load Voltage (simulation is done in Matlab
Simulink). The voltage is injected by DVR from 0.08 to 0.2 seconds. From the waveform it
can be observed that the voltage across load is maintained to rated voltage.
20
0
(a)
-20
-40
-60
-80
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
Figure 6-11(a) shows the waveform of Injected Voltage (simulation is done in Matlab
Simulink). The voltage is injected by DVR from 0.08 to 0.2 seconds
Vdq0 Vs Time
450
Vd
400 Vq
V0
350
300
Vdq0(volts)
250
200
(a)
150
100
50
-50
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
Figure 6-12 (a) shows the waveform of Direct, Quadrature and Zero axis voltages
under Balanced Swell supply Voltage (simulation is done in Matlab Simulink. By observing
the waveforms of 6-8 (a),(b) under Balanced Swell Supply voltage the Direct quantity voltage
is a DC voltage of magnitude phase voltage. From the wave form it can be observed that there
is a swell in Direct Quantity voltage from 0.08 to 0.2 seconds where the Swell voltage is
applied. The Quadrature and Zero axis voltages are of zero voltage after converting the source
voltage into synchronously rotating reference frame (abc to dq0).
300
200
Source Voltage(volts)
100
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(a)
(b)
Figure 6-13 (a) shows the waveform of Unbalanced Source Voltage (simulation is
done in Matlab Simulink).The Unbalance is supplied from 0.08 to 0.2 seconds (6 cycles).
Load Voltage Vs Time
400
Vla
Vlb
300
Vlc
200
Load Voltage(volts)
100
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
50
0
(a)
-50
-100
-150
0 0.05 0.1 0.15 0.2 0.25
Time(sec)
(b)
Figure 6-15(a) shows the waveform of Injected Voltage (simulation is done in Matlab
Vdq00.08
Simulink). The voltage is injected by DVR from Vs Time
to 0.2 seconds.
350
Vd
Vq
300
V0
250
200
Vdq0(volts)
150
(a)
100
50
-50
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
Figure 6-13: (a) Direct, Quadrature and Zero axis voltage
Figure 6-16 (a) shows the waveform of Direct, Quadrature and Zero axis voltages under
Unbalanced supply Voltage (simulation done in Matlab Simulink). By observing the
waveforms of 6-16 (a) under Unbalanced Supply voltage the direct quantity voltage is a
oscillating DC voltage of magnitude phase voltage and frequency of 100Hz from 0.08 to 0.2
seconds where unbalance is created. The Quadrature and Zero axis voltages are of oscillating
with average value of zero voltage after converting the source voltage into synchronously
rotating reference frame (abc to dq0).
(6.14)
vsb (338.846 0.8) sin( wt 140)
100
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(sec)
(b)
0
(a)
-100
-200
-300
-400
0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24
Time(Sec)
(b)
Figure 6-18 (a) shows the waveform of Load Voltage (simulation is done in Matlab
Simulink). The voltage is injected by DVR from 0.08 to 0.2 seconds. From the waveform it
can be observed that the voltage across load is maintained to rated voltage.
.
References
1.K.R. Padiyar “Facts controllers in power transmission and distribution” new age
international (P) Ltd publishers, 2007.
2.Michael D. Stump, Gerald J. Keane “The role, of custom power products in enhancing
power quality at industrial facilities”, Energy Management and Power Delivery, vol. 2,
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3.P.pillay, M. Manyage “Definitions of Voltage Unbalance” IEEE Power Engineering eview,
May 2001.
4.D. Daniel Sabin, and Ambra Sannino, “A Summary of the Draft IEEE P1409 Custom
Power Application Guide” Transmission and Distribution Conference and Exposition,
IEEE PES, vol. 3, pp. 931-936, 2003.
5.Masoud Aliakbar Golkar, “Power Quality in Electric Networks: Monitoring and Standards”
the second world engineering conference, pp. 137-141 July 2002.
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Flexible AC Transmission Systems, IEEE Press, New York, 2000.
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Devices for Power Quality Improvement” IEEE Power India Conference, pp. 1-8, 2008.
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Voltage Restorer” Electric Power and Energy Conversion Systems, EPECS '09.
International Conference, IEEE, pp. 1-6, 2009.
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Restorer Compensating Voltage Sags with Phase Jump”, Applied Power Electronics
Conference and Exposition, IEEE, vol. 2, pp. 1267-1273, 2001.
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International Journal of Innovation, Management and Technology vol. 1, no. 3, pp. 232-237,
2010.
12.Paisan Boonchiaml, Nadarajah Mithulananthan, Rajamangala University of Technology
Thanyaburi Thailand, “Detailed Analysis of Load Voltage Injection for Dynamic Voltage
Restorers” TENCON, IEEE region 10 conference, pp. 1-4, 2006.
PART 2
Features
• Easy interface to all microprocessors
• Operates ratio metrically or with 5 VDC or analog span adjusted voltage reference
Description
The ADC 0809 is an 8-bit A/D converter with 8-channel multiplexer. The ADC 0809 contains
on chip 8 channel multiplexer. 8 analog inputs can be applied to ADC 0809. The analog on
chip multiplexer selects one out of 8 inputs for conversion of analog to digital signal.
3.2.1 Definition
An embedded microcontroller is a chip which has a computer processor with all its support
functions (clock & reset), memory (both program and data), and I/O (including bus interface)
built into the device. These built in functions minimize the need for external circuits and
devices to be designed in the final application.
The microcontroller 89C51 is the core of this unit. Its responsibility is to take input
from different sections, process it and to provide visual interface on LCD or LED. It is a 40
pin IC having 4 input/output ports. This is the main central controller of the complete H/W.
Its job is to scan all the inputs and sequentially & con omputer which provides a highly-
flexible and cost-effective solution to many embedded control applications.
The AT89C51is designed with static logic for operation down to zero frequency and
supports two Software selectable power saving modes. The Idle Mode stops the CPU while
allowing the RAM, timer/counters, serial port and interrupt system to continue functioning.
The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other
chip functions until the next Hardware reset.
Fig 3.
3.2.7 Architecture of AT 89C51
Fig 3.4
Pin Description
VCC
Power supply positive voltage. Operating voltage of the IC.
GND
Power supply Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can
sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high
impedance inputs. Port 0 may also be configured to be the multiplexed low order
address/data bus during accesses to external program and data memory. In this mode
P0 has internal pull-ups. Port 0 also receives the code bytes during Flash
programming, and outputs the code bytes during program verification. External pull-
ups are required during program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins
that are externally being pulled low will source current (IIL) because of the internal
pull-ups. Port 1 also receives the low-order address bytes during Flash programming
and verification.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins
that are externally being pulled low will source current (IIL) because of the internal
pull-ups. Port 2 emits the high-order address byte during fetches from external
program memory and during accesses to external data memory that uses 16-bit
addresses (MOVX @ DPTR).In this application, it uses strong internal pull-ups when
emitting 1s. During accesses to external data memory that uses 8-bit addresses
(MOVX @ RI); Port 2 emits the contents of the P2 Special Function Register. Port 2
also receives the high-order address bits and some control signals during Flash
programming and verification
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output
buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins
that are externally being pulled low will source Current (IIL) because of the pull-ups.
Port 3 also serves the functions of various special features of the AT89C51 as listed
below:
Port 3 also receives some control signals for Flash programming and verification.
RST
Reset input. A high on this pin for two machine cycles, while the oscillator is running
resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during
Flash programming.
In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency,
and may be used for external timing or clocking purposes. Note, one ALE pulse is
skipped during each access to external Data Memory. If desired, ALE operation can be
disabled by setting bit 0 of SFR location 8EH.
With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise,
the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the
microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When the
AT89C51 is executing code from external program memory, PSEN is activated twice
each machine cycle, except that two PSEN activations are skipped during each access
to external data memory.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating
circuit.
XTAL2
Output from the inverting oscillator amplifier.
we are using ADC 0809 which is having 8 bit analog channel to which we can apply
0 to +5V analog in put which gets converted in to 00 to FF hex value. Thus we get
resolution of 20mV for one binary increment.
This ic is having A,B & C input for analog channel selection and ALE (address latch
enable) for confirmation after applying ALE signal we have to give SOC (start of conversion)
signal by which we analog value of selected channel will get sample and hold. Sample and
hold is needed as analog input is variable and IC needs some time depending on clock signal
to convert analog value to digital.
After conversion IC ADC0809 will make EOC (end of conversion) pin high. Converted data
inside the IC to make it available on output pins we have to make OE (output enable) high
otherwise output will remain in high impedance state as this IC is having tri-state output.
This IC needs external clock signal around 10 KHz which is applied by 555 timers IC
configure in astable mode. Conversion time is depending on this clock frequency. If IC’s
conversion time is less, then IC can process high frequency signals by taking more samples of
input.
IR sensor
IR sensor is connected with current limiting resistor of 560 ohm; it emits IR rays
continuously which are invisible. IR receiver is connected to the base of transistor in reverse
bias. When IR rays are falling on IR receiver it offer low resistance and hence transistor base
gets ground and hence transistor gets off. Led is connected in series with RE (collector
resistor). Transistor is off and LED is off and hence collector voltage is high.
When IR rays are not fallen on IR receiver diode it will offer high resistance and
transistor will get on due to base biasing resistor connected to it from +ve supply. Now led
will be on and collector voltage will be low.
IR transmitter and receiver are placed side by side , so when any object when appear in
front of the transmitted rays gets reflected from the object and received from the receiver thus
it needs a proximity detector. This are commonly use for the detection position of motor.
LCD
LCD is having a 8 bit data line& three control signals RS (resistor select), R/W &
(read/write) and CE (chip enable). We can interface LCD with 8 bit data or 4 bit data lines.
We have apply ASCII code byte by byte or nibble by nibble. RS is use to configure LCD.
R/W is used to read data from lcd or to write data to LCD. Normally data is to write on LCD
and this pin is kept low.
LCD needs +5v supply for its working which is given to pin no 1(GND) & 2 (VCC) pin
no. 15 (LED VCC) and pin no.16 (LED GND). LCD provides back light option for night and
better vision
Pin no 3 is contact by which we can adjust the back ratio of character which is adjusted
with a preset of 10 k ohm, which is a series of resistor which is used as voltage dividing
network.
Note: EIA-232 levels are inverted as well as level shifted compare to TTL/CMOS signals.
Personal computer serial port, GSM/GPS modems are having EIA-232 levels. These devices
are made compatible to use with PC serial port. Microcontroller is having TTL/CMOS signals
so when we want to interface microcontroller with such devices we need signal compatibility
and it is achieved with the help of IC MAX 232.
. 3.2.4 IC 555
The NE555 monolithic timing circuit is a highly stable controller capable of producing
accurate time delays or oscillation.
In the time delay mode of operation, the time is precisely controlled by one external
resistor and capacitor.
For a stable operation as an oscillator, the free running frequency and the duty cycle
are both accurately controlled with two external resistors and one capacitor.
The circuit may be triggered and reset on falling waveforms, and the output structure
can source or sink up to 200mA.
Explanation:
When the circuit is connected as shown in figure above (pin 2 and 6 connected) it
triggers itself and free runs as a multivibrator.
The external capacitor charges through R1 and R2 and discharges through R2 only.
Thus the duty cycle may be precisely set by the ratio of these two resistors.
In the astable mode of operation, C1 charges and discharges between 1/3 Vcc and 2/3
Vcc.
As in the triggered mode, the charge and discharge times and therefore frequency
are independent of the supply voltage.
The charge time (output HIGH) is given by : t1 = 0.693 (R1 + R2) C1
3.2.5 RELAY CIRCUIT
Fig.3.8
There are three relays operative in this circuit .Based on the microcontroller output, the relay
circuit switches control from one source to another.
An LED is connected to each relay which glows whenever the particular source is currently
activated.
When the relay output is high, then NC (Normally closed) is enabled otherwise NO
(Normally opened) is enabled.
Relay Driver
ULN2803
The eight NPN Darlington connected transistors in this family of arrays are ideally suited for
interfacing between low logic level digital circuitry (such as TTL, CMOS or PMOS/NMOS)
and the higher current/voltage requirements of lamps, relays, printer hammers or other similar
loads for a broad range of computer, industrial, and consumer applications. All devices
feature open–collector outputs and freewheeling clamp diodes for transient suppression.
The ULN2803 is designed to be compatible with standard TTL families while the ULN2804
is optimized for 6 to 15 volt high level CMOS or PMOS.
Features
Five versions are available to simplify interfacing to standard logic families: the ULN2801A
is designed for general purpose applications with a current limit resistor; the ULN2802A has a
10.5k input resistor and zener for 14-25V PMOS; the ULN2803A has a 2.7k input resistor for
5V TTL and CMOS; the ULN2804A has a 10.5k input resistor for 6-15V CMOS and the
ULN2805A is designed to sink a minimum of 350mA for standard and Schottky TTL where
higher output current is required. All types are supplied in an 18-lead plastic DIP with a
copper lead from and feature the convenient input opposite-output pinout to simplify board
layout.
RESET CIRCUIT:
Reset circuit is designed with RC & NOT gate. Reset switch is connected in
parallel of capacitor. Whenever switch is pressed positive pulse is applied to reset pin
of microcontroller. Which is level operating, when it is high mc gets reset and
program gets initialized.
SOLDERING
For soldering of any joints first the terminal to be soldered are cleaned to remove oxide
film or dirt on it. If required flux is applied on the points to be soldered.
Now the joint to be soldered is heated with the help of soldering iron. Heat applied
should be such that when solder wire is touched to joint, it must melt quickly
The joint and the soldering iron is held such that molten solder should flow smoothly
over the joint.
When joint is completely covered with molten solder, the soldering iron is removed.
In case of dry solder joint an air gap remains in between the solder metal and the joint. It
means that soldering is improper. This is removed and again soldering is done.
POWER SUPPLY
The performance of the master box depends on the proper functioning of the power
supply unit. The power supply converts not only A.C into D.C, but also provides o/p voltage
of 5volts, 1 amp. The essential components of the power supply are:
TRANSFORMER:
As name suggests it transforms the voltage level from one level to another.
Transformer used is the step down transformer to step 230 v to +5v. It provides isolation too
from the mains.
RECTIFIER:
The rectifier is used to convert A.C to D.C voltage. The design that we have carried out
is of the full wave rectifier, using 1N4001 diodes.
The full wave bridge rectifier has advantage over the full wave centre tap rectifier like:-
REGULATOR:
IC 7805 has an internal thermal overload protection and the internal short circuit
current limiting device.
The LM 7805 is available in aluminium (3 terminals) packages, which will allow over
1.0 Ampere load current if adequate heat sinking is provided. Current limiting is included to
limit the peak output current to a safe value. Protection for the output transistors is provided to
limit internal power dissipation. If internal power dissipation becomes too high for the heat
sinking provided; the thermal shut circuit takes place over preventing the IC from
overheating.
Considerable efforts were expended to make the LM 7805 regulators easy to use and
minimize the number of external components. It is not necessary to bypass the output
although this does improve transient response.