10.

Full-differential
operational amplifier

Kanazawa University
Microelectronics Research Lab.
Akio Kitagawa
10.1 The foundations of Full-
differential OPA

2
Function of a full-differential OPA
Function
Vout  Ad (Vin  Vin )
Ad = Open Loop Gain or Differential Gain
Symbol of Single-end OPA


Vin+
+ - Vout- Vout  Ad (Vin  Vin )

Vin- - + Vout + Vout   Ad (Vin  Vin )
 
Vout  Vout  Vout
Symbol of Full-differential 2Ad = Open Loop Gain or Differential Gain

3
Advantages of full-differential OPA
• Feature of full-differential OPAs
– Cancellation of common-mode noise
– Cancellation of clock feedthrough and charge injection
error (essential for the discrete analog circuit)
– Cancellation of even-order distortions of MOSFET

Differential output Differential input

Vout+

Circuit A Circuit B

Vout-

4
Cancellation of common-mode noise
Digital signal Errors
vsig vsig + vdrift vsig
CMOS switch
vsig + vdrift + vnoise
＋－ ＋－
－＋ －＋
Switching noise Cross-talk noise
Subtracter
-vsig -vsig + vdrift Drift -vsig + vdrift + vnoise -vsig
Differential Differential Error-free
signal signal and errors differential
signal
Drift : A slow shift of the common-mode voltage is often observed as a drift.
The drift error occurs by a temperature change easily.

5
Circuit configuration of diff. amp.
Gain = 1/2 times, Mirror symmetry
Current mirror load Current source load

DD
ISS/2 ISS/2
ID1 ID1
Vbiasp
Iout = ID1 - ID2 Iout- Iout+
Vin+ Vin-
ID1 ID2 ID1 ID2

ISS/2 ISS/2
ISS
Vbiasn
SS
Mirror symmetry
Current subtraction ISS/2 = (ID1 +ID2)/2
common mode rejection Iout+ = ISS/2 - ID2 = (ID1 - ID2)/2
Iout- = ISS/2 - ID1 = (ID2 - ID1)/2
6
10.2 2-stage CS OPA

7
2-stage CS full-differential OPA
DD Vbias1

200/2
M2L M2R
M4R 30/2 M4R
Vout- CCL M1L M1R CCR Vout+
6/2
CLL Vin- Vin+ CLR
ISS/2 ISS/2
M5R M5R
30/2
SS M3L Vbias2 M3R 6/2

I SS CMRR ○
SR 
CC PSRR △
G0  g m1 (rds1 // rds 2 )  g m 4 (rds 4 // rds 5 ) Gain △
1 Bandwidth △
 p1 
g m 4 (rds1 // rds 2 )  (rds 4 // rds 5 )  CC Power ×
gm4
 p2 
CL
NOTE: GBP increases with increasing gm1, but power
g m1 consumption is increased with the gm1 (gm ∝ IDS0.5).
u  8
CC
10.3 Cascode OPA

9
 Characteristic of cascode OPA
DD bias1 CG amplifier
I SS
30/2 SR 
bias2 CL
G0  g m1  ( g m 4  rds 4  rds1 ) //( g m 5  rds 5  rds 2 )
- 30/2 +
out out 1
 p1 
( g m 4  rds 4  rds1 ) //( g m 5  rds 5  rds 2 )  C L
L L g m1
bias3 10/2 u 
CL
+ - The voltage gain of M1 is about unity and the
in in
10/2 Miller effect is negligible, thus, wu ≧ p2
(The Phase margin depends on the CL.)

CMRR ○
bias4 10/2
SS PSRR ○
Gain ○
The bias current of M1 and M2 is Bandwidth ○ (depends on CL)
reused for the M4 and M5. Power ○ 10
 Cascode bias circuit
See Chapter 4, Wide Swing cascode current mirror.
VDD
Wp/Lp Iref Iref
VBias1
Wp/Lp
Wp/4Lp VBias2

Voltage Vref Wn/4Ln VBias3

Reference Wn/Ln
Iref Iref VBias4
Wn/Ln
VSS
VT ＋ΔOV
VDD
Vbias1
ΔOV Vbias2
ΔOV Vbias3
Vbias4
VSS
VT ＋ΔOV 11
 10.4 Folded cascode OPA

NOTE: The folded cascode OPA consumes larger bias current,

but it has some advantages, such as wide input range, good
stability, high gain, which these features are suitable for IP.
12
 Calculation method of the
common-mode range (remind)

VDS = VGS VDS = VGS

13
Common-mode input range of n-ch
input differential amplifier
 OV 2  VTn  0

ΔOV2
bias1 Common-mode input range
-VTn

ΔOV1
VTn + ΔOV1
bias4
VTn   OV 1

ΔOV3
 OV 3

14
 Common-mode input range of p-
ch input differential amplifier
 OV 3
ΔOV3
bias1 | VTp |   OV 1
|VTp| + ΔOV1

ΔOV1
-|VTp|
bias4
Common-mode input range

ΔOV2

 OV 2  | VTp | 0
15
Common-mode input range of n-ch
input differential amplifier~ 0
VDD
 OV 2   OV 5   OV 4  VTn
ΔOV2 M2L M2R
Vbias1
ΔOV5 M5L M5R
Vbias2 Common-mode input range
ΔOV4 Vbias3
M4L M4R
-VTn
M1L M1R
ΔOV1 VTn   OV 1
VTn + ΔOV1
Vbias4
ΔOV3 M3L M3R
 OV 3
VSS
High gain, small input range, and small output swing 16
 Folding technique of the current
source load
The differential pair and the current source load can be separated to
enhance the signal swing and to reduce the bias voltage tolerances.
VDD
VDD
M3 M4
M3 M4
Folding
vout M1 M2
M1 M2
vin+ vin-
vin+ vin-V
bias4
M8 M9
vout

M5 Vbias2 Vbias3 M10 M11

Vbias1 M6 M7
VSS Vbias1 M5 Vbias2 M6 M7
VSS
Separate the transconductor
and current source load. cascode
17
 Common-mode input range of
the folded cascode amplifier
 OV 3  VTn  0
ΔOV3 M3 M4 common-
mode input
-VTn
ΔOV1 range
M1 M2
+ -
in in V
bias4
M8 M9
out
VTn + ΔOV1 VTn   OV 1
Vbias3 M10 M11

Vbias1 M5 ΔOV5 Vbias2  OV 5

M6 M7

18
Full-Differential Folded Cascode
OPA (or OTA) Bias current
source
30/2 30/2 trans-
impedance
Folding Folding
30/2
amp.

10/2

10/2

10/2 10/2

Tail Current source load

(Same as a circuit shown in previous slide)
19
10.5 Rail-to-Rail OPA

20
 Rail-to-Rail input stage
Rail-to-Rain input OPA can be composed with p-ch differential pair
and n-ch differential pair

VDD
 OV 3  VTn  0  OV 5
common-mode
input range | VTp |   OV 1
common-mode
＋ → input range
common-mode
VTn   OV 1 input range

VSS  OV 5  OV 3  | VTp | 0
n-ch input p-ch input CMOS input
21
 Rail-to-Rail OPA
DD
M6Lbn M6Lbp bias1 M6Rbp M6Rbn
30/2 30/2
M6La M6Ra
30/2
bias2
M4L M4R
- 30/2 +
out + - out
in M1Lp M1Rp in
20/2
M1Ln M1Rn
CL M5L M5R CL
10/2
bias3 10/2

M2L M2R
M3Ln M3Lp bias4 M3Rp M3Rn 10/2

SS 10/2 10/2

p-ch input

n-ch input
22
Transconductance uniformity of
Rail-to-rail differential amplifier
The transconductance of rail-to-rail differential amplifier
is not uniform for the input voltage. The nonuniformity
raise the nonlinear characteristics. If 1n = 1p,
g m  g mn  g mp
 2 1n I DS 1n  2 1 p I DS 1 p  2 1n  ( I DS 1n  I DS 1 p )
gm gmp+gmn gm
x2 ID1b, ID1a
=x4
gmp gmn gmp gmn

VSS VDD VSS VDD

VSS + VTn VDD-|VTp| VSS + VTn VDD-|VTp| 23
 Bias-current control circuit
VDD
ISSp ISSn ISSp

vin+ vin-
M1Lp' M1Rp'
vin+ vin-

OFF M1Lp M1Ln M1Rn M1Rp

Current
-
+

differential 4ISSn
amplifier
3ISSn ISSn
ISSn M1Lp', M1Rp' → ON
1:3
VSS ISS = 3(ISSn - ISSp) + ISSn = ISSn
M1Lp', M1Rp' → OFF
ISSn = ISSp = const.
ISS = 3(ISSn) + ISSn = 4ISSn

24
Current differential amplifier

- +
in in out

- - + - + -
in in in in in in
25
 Rail-to-rail differential amplifier
p-ch current
with constant gm
monitor Current differential amp.
VDD
3:1
ISSp ISSp
vBias1
3(ISSp – ISSn)
ISSn ISSn
ISSp
iout+
iout-
vin+ vin- vin+ vin- vin+ vin-

M1SLp MS1Rp M1Lp M1Ln M1Rn M1Rp M1SLn MS1Rn

ISSp ISSn
ISSp
3(ISSn – ISSp)
vBias4
ISSn ISSn
1:3
VSS
Current differential amp. Rail-to-rail n-ch current Current summing
differential monitor circuit
amp. 26
10.6 High gain OPA

27
Gain enhancement by voltage
regulation
=

Vin is regulated with NFB.

v gs   AGE  vin  vin
vin  RS iout
iout  g m v gs  ir
vout  rds ir  RS iout
vout
Rout   rds (1  g m ( AGE  1) RS )  RS  AV ( AGE  1) RS
iout 28
 Folded Cascode OPA with gain
enhancement (GE) amplifiers
GE amplifiers
Without GE: Ad = A0, With GE： Ad = A0・(AP+1) VDD
VDD M6Lb M6Rb
Vin+ Vin-
Vout
M6La M6Ra
Vbias1 Vbias4
- + VGEp VGEp + -
ANL ANR
VSS
M4L M4R
Vout- Vout+
GE Amp: AN
Vin+ M1Ln M1Rn Vin-
CL M5L M5R CL
APL APR
- + V
GEn
VGEn + -
Vbias4
M2L M2R
M3Lp M3Rp
VSS
GE Amp: AP

Source follower input (Level shifter)

29
 Design example of GE-FC-OPA
Differential Pair Class A Buf. Folded Cascode Load Class A Buf.

NOTE: The phase

compensation circuit is left out.
The CMFB will be covered in
next section.
CMFB 30
10.7 Common mode feedback

31
Common Mode Feedback (CMFB)
• Common-mode voltage VCM
– The common potential of the input and output nodes in the full-
differential OPAs is not defined in the circuit. Therefore, the full-
differential OPAs have to be controlled with the common-mode
voltage VCM.
– The common-mode voltage is applied to the common-mode input.
• ISS or Iload should be controlled by the common-mode voltage,
because,
– Iload_L + Iload_R > ISS → Vout+ = Vout- = VDD
– Iload_L + Iload_R < ISS → Vout+ = Vout- = VSS
VDD
Voltage

VCM Common-mode input range

VSS
Time 32
 Operation of CMFB
CMFB keeps the bias condition: ID2L + ID2R = ISS.

 
(Vout  Vout )
ISS or Iload is 2
controlled by VCMFB.

VCM
Wide input range
differential amplifier CMFB circuit

33
 Loop gain of CMFB amplifier

 
(Vout  Vout )
2
The NFB control range is empirically
25~50% of the usual bias current.

Unity gain frequency of CMFB loop gain

g m ACMFB
Set the higher ACMFB in the range of uCMFB 
u_diff.amp. > uCMFB, that is, ACMFB < 1. CL
34
CMFB circuit for continuous-time
OPA (1)
- +
out out DD

CMFB
SUM SUM
CM
Rsum is averaging resistance.
The output buffer is required for the OPA. bias4

Cp is a speed up capacitor for the phase

compensation of the CMFB amplifier (It is
required in the case of large Rsum). SS
Implementation by the summing amplifier

35
CMFB circuit for continuous-time
OPA (2)
Dual differential pair CMFB

CMFB
- +
out out
+ -
in in
- +
out out

CM
SS CM CM

The load current is controlled CMFB

by the common-mode output
referred by VCM. R.A.Whatley, U.S.Pat. 4, 573, 020, (1986) 36
Dynamic CMFB for discrete-time
OPA (1)
Reset Mode 1
Switched capacitor
CMFBCMFB circuit

VCM - Vref -q VCM - Vref

Vref
q  C R (VCM  Vref )

D. Senderowicz et al., IEEE J. Solid-State Circuits, vol.17, p.1014 (1986)

37
 Dynamic CMFB for discrete-time
OPA (2)
Amplification Mode 2
Switched capacitor CMFB circuit

q2 q1
-q2 -q1 V + - V
Vout- - VCMFB out CMFB
VCMFB
Vref
q1  q2  2C R (VCM  Vref )
 
 C R (Vout  VCMFB )  C R (Vout  VCMFB )
If the common-mode 
Vout 
 Vout
output ＝ VCM, ISS = Iref VCMFB   VCM  Vref 38
2
 Cancellation of the parasitic
capacitances in the CMOS switch
+ -
out out

M3 M4
VBias
VCM
+ M1 M2 -
in in
CA CA CR CR Iref
-q→-q2-q -q→-q1-q
VCMFB
ISS
M5 C A  4 ~ 10  C R 2q 2q Vref
Cancel of the charge
injection error of
CMOS switch 39
Practical implementation of
discrete-time CMFB
+ -
out out

1 1
CM CM

r A A r

ref ref
1 1

CMFB

Symmetric schematic (intended for layout design)

40
10.8 Output buffer for OPA

41
 Class AB output buffer
Iout
VDD
Iout
Iout

Vb1 p-ch
VSS quiescent current

Inverter Class AB
quiescent current
VG Vin
VSS VG VDD
VTn |VTp|

Inverter n-ch Class AB amplifier

VG = 0
VG >|VTp|, VTn

NOTE: Class A amplifier (current source load) and Class AB amplifier is often
used for the output buffer of OPA.
42
 Floating DC voltage bias
VDD
vBias1 2 I DS _ MB 2
VGp  VTp  Floating DC voltage
From FC Amp. p
vBias2 1 1
rds _ MB 2   1 / 2  p I DS  Zero cancel
M6 g m _ MB 2 g m6
VGp
Floating DC
フローティン MB2 2 I DS _ MB1
CC VGn  VTn  Floating DC voltage
voltage
グ電源 source vout n
MB1 1 1
rds _ MB1   1 / 2  n I DS  Zero cancel
VGn g m _ MB1 g m7
M7
vBias3
位相補償
Phase compensation
From FC Amp.
vBias4

VSS
43
Floating current source bias (Sec. 7.3)
Small-signal
Current source
equivalent
100/2
circuit
Iref
100/2
Floating DC current
source
Iref/2 1000/2

100/8
i p   g mfcp  (v p )
Iref/2 50/80
in   g mfcn  vn
500/2 iin  in  i p   g mfcn  vn  g mfcp  v p
50/2
Iref
If g mfcp  g mfcn  g mfc ,
v p  vn
50/2 iin  2 g mfc ( )
2
An average potential of vp and
Current source vn is proportional to iin. 44
Class AB differential buffer
ID: Idling Current, Δi: Current Signal
Bias: |VTp| + OV(IDS)

Vin- IDS+Δi
80/2
Vin+ IDS-Δi/2
40/2

2∆i

IDS-Δi/2 IDS-Δi
20/2 40/2

VTn + OV(IDS)

(Don't use this circuit.)

45
Practical class AB differential buffer
+ -
80/2 in in 80/2

- +
40/2 in in 40/2
- +
out out

40/2 20/2 20/2 40/2

CM Adjusting the
output
40/2 40/2 common-mode
CMFB voltage.

46
10.9 Operational transconductance
amplifier (OTA)

47
 Functions of OTA
Gm
Iout+ = Gm(Vin+ - Vin-)
Vin+ + + Iout+
Vin- - - Iout- Iout- = -Gm(Vin+ - Vin-)

• Differential voltage input and differential current output

• All node are low impedance except the input and output nodes.
• Differences with OPA
– High output resistance
• OTA cannot drive the resistive load.
– Unity gain frequency decreases with increasing CL.
• This characteristic is used in the gm-C filters.
– Phase margin increases with increasing CL.
• OPA become unstable with a large CL.
48
Circuit configuration of OTA
M4L M2L M2R M4R
M3L M3R

- - + +
out in M1L M1R in out

Bias

M6L M7R
M7L M6R

iout+ = K･gm1(vin+ - vin-) = Gm(vin+ - vin-)

49
 Characteristics of OTA
 1  K  g m1 
vout  iout  (vin  vin )
j C L j C L
 
vout  vout 2 K  g m1
Ad   
vin  vin j C L
2 K  g m1
u 
gm-C integrator CL
1
p 
vout (rds 4 // rds 7 )C L
vin K  ISS
SR 
[dB ] CL
(The maximum current of M4 is K･ISS.)
p u [rad/s]
1 2 K  g m1
(rds 4 // rds 7 )C L 50
CL
 Cascode OTA

Bias2

- - + +
out in in out

Bias3

Bias4

51