ch03 PDF

Chapter 3
Basics Semiconductor
Devices and Processing
Hong Xiao, Ph. D.
www2.austin.cc.tx.us/HongXiao/Book.htm
Hong Xiao, Ph. D. www2.austin.cc.tx.us/HongXiao/Boo 1

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Objectives
• Identify at least two semiconductor materials from
the periodic table of elements
• List n-type and p-type dopants
• Describe a diode and a MOS transistor
• List three kinds of chips made in the
semiconductor industry
• List at least four basic processes required for a
chip manufacturing

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Topics
• What is semiconductor
• Basic semiconductor devices
• Basics of IC processing

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What is Semiconductor
• Conductivity between conductor and insulator
• Conductivity can be controlled by dopant
• Silicon and germanium
• Compound semiconductors
– SiGe, SiC
– GaAs, InP, etc.

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Periodic Table
of the Elements

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Semiconductor Substrate and Dopants
Substrate
P-type
Dopant
N-type Dopants
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Orbital and Energy Band
Structure of an Atom
Valence shells
Conducting band, Ec
Nuclei Band gap, Eg
Valence band, Ev

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Band Gap and Resistivity
Eg = 1.1 eV Eg = 8 eV
Aluminum Sodium Silicon Silicon dioxide

2.7 μΩ•cm 4.7 μΩ•cm ~ 1010 μΩ•cm > 1020 μΩ•cm
Conductors Semiconductor Insulator

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Crystal Structure of Single
Crystal Silicon
Shared electrons
Si
Si Si Si
Si
Si
Si Si Si
Si
Si Si
Si - Si

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Why Silicon
• Abundant, inexpensive
• Thermal stability
• Silicon dioxide is a strong dielectric and
relatively easy to form
• Silicon dioxide can be used as diffusion
doping mask

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N-type (Arsenic) Doped Silicon
and Its Donor Energy Band
Conducting band, Ec
Si Si Si
Extra
Ed ~ 0.05 eV
Electron
Si As Si Eg = 1.1 eV
Si Si - Si
Valence band, Ev

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P-type (Boron) Doped Silicon
and Its Donor Energy Band
Conducting band,
Si Ec
Si Si
Hole
Eg = 1.1 eV
Si B Si
Ea ~ 0.05 eV
Si Si - Si
Valence band, Ev
Electron

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Illustration of Hole Movement
Conducting band, Ec Conducting band, Ec Conducting band, Ec
Electron Eg = 1.1 eV Electron Eg = 1.1 eV Electron Eg = 1.1 eV

Ea ~ 0.05 eV
Valence band, Ev Valence band, Ev Valence band, Ev Hole

Hole Hole

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Dopant Concentration and Resistivity
Resistivity
P-type, Boron
N-type,
Phosphorus
Dopant concentration
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Dopant Concentration and
Resistivity
• Higher dopant concentration, more carriers
(electrons or holes)
• Higher conductivity, lower resistivity
• Electrons move faster than holes
• N-type silicon has lower resistivity than p-
type silicon at the same dopant concentration

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Basic Devices
• Resistor
• Capacitor
• Diode
• Bipolar Transistor
• MOS Transistor

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Resistor
ρ
l h
w
l
R=ρ
wh
ρ: Resistivity

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Resistor
• Resistors are made by doped silicon or
polysilicon on an IC chip
• Resistance is determined by length, line
width, height, and dopant concentration

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Capacitors
κ l
hl
h C =κ
d d
κ: Dielectric Constant

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Capacitors
• Charge storage device
• Memory Devices, esp. DRAM
• Challenge: reduce capacitor size while
keeping the capacitance
• High-κ dielectric materials

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Capacitors
Dielectric Layer
Dielectric Poly 2
Layer
Poly
Si Si
Poly Si
Oxide
Si Poly 1
Heavily
Doped Si
Parallel plate Stacked Deep Trench

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Metal Interconnection and RC Delay
Dielectric, κ Metal, ρ
I
l

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Diode
• P-N Junction
• Allows electric current go through only
when it is positively biased.

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Diode
V1 V2
P1 P2
• V1 > V2 , current current

• P1 > P2 ,
• V1 < V2 , no current • P1 < P2, no current

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Figure 3.14
Transition region
−− ++
−− ++
−−
P −−
++
++
N
−− ++
Vn
V0
Vp
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Intrinsic Potential
kT Na Nd
V0 = ln 2
q ni
• For silicon V0 ~ 0.7 V

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I-V Curve of Diode
V
-I 0

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Bipolar Transistor
• PNP or NPN
• Switch
• Amplifier
• Analog circuit
• Fast, high power device

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NPN and PNP Transistors
E B
E C
B N P N
C
C
B
E C
B
P N P
E

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NPN Bipolar Transistor
Emitter Base Collector
Al•Cu•Si
SiO2
n+ p n+
p+ p+
n-epi
Electron flow
n+ buried layer
P-substrate

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Sidewall Base Contact NPN
Bipolar Transistor
Metal
CVD
oxide CVD CVD
Base Emitter oxide oxide
Collector
Poly p n+ p
Field Field Field
oxide n Epi n+
oxide oxide
n+ Buried Layer
P-substrate
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MOS Transistor
• Metal-oxide-semiconductor
• Also called MOSFET (MOS Field Effect
Transistor)
• Simple, symmetric structure
• Switch, good for digital, logic circuit
• Most commonly used devices in the
semiconductor industry
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NMOS Device
Basic Structure
VG VD
VG
“Metal” Gate
Ground VD
n+ n+
p-Si
Source Drain

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NMOS Device
Positive charges
VG = 0 Electron flow VG > V T > 0 VD > 0

VD
“Metal” Gate
+++++++
SiO 2 SiO 2 −−−−−−−
n+ n+ n+ n+
p-Si p-Si
Source Drain Source Drain
No current Negative charges

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PMOS Device
Negative charges
VG = 0 Hole flow VG < V T < 0 VD > 0
VD
“Metal” Gate
SiO 2 SiO 2 −−−−−−−

p+ +++++++ p+
p+ p+
n-Si n-Si
Source Drain Source Drain
No current Positive charges

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MOSFET

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MOSFET and Drinking Fountain
MOSFET Drinking Fountain
• Source, drain, gate • Source, drain, gate valve

• Source/drain biased • Pressurized source
• Voltage on gate to • Pressure on gate (button)
turn-on to turn-on
• Current flow between • Current flow between
source and drain source and drain
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Basic Circuits
• Bipolar
• PMOS
• NMOS
• CMOS
• BiCMOS

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Devices with Different Substrates
• Bipolar
Dominate
Silicon • MOSFET
IC industry
• BiCMOS
Germanium • Bipolar: high speed devices
• GaAs: up to 20 GHz device

Compound
• Light emission diode (LED)

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Market of Semiconductor Products
Compound
100% }
4%
} 8%
Bipolar
50%
MOSFET 88%
1980 1990 2000

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Bipolar IC
• Earliest IC chip
• 1961, four bipolar transistors, $150.00
• Market share reducing rapidly
• Still used for analog systems and power
devices
• TV, VCR, Cellar phone, etc.

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PMOS
• First MOS field effect transistor, 1960
• Used for digital logic devices in the 1960s
• Replaced by NMOS after the mid-1970s

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NMOS
• Faster than PMOS
• Used for digital logic devices in 1970s and
1980s
• Electronic watches and hand-hold calculators
• Replaced by CMOS after the 1980s

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CMOS
• Most commonly used circuit in IC chip
since 1980s
• Low power consumption
• High temperature stability
• High noise immunity
• Symmetric design

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CMOS Inverter
Vdd
PMOS
V in Vout
NMOS
Vss
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CMOS IC
n+ Source/Drain p+ Source/Drain
Gate Oxide
Polysilicon
p-Si STI n-Si USG

Balk Si

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BiCMOS
• Combination of CMOS and bipolar circuits
• Mainly in 1990s
• CMOS as logic circuit
• Bipolar for input/output
• Faster than CMOS
• Higher power consumption
• Likely will have problem when power
supply voltage dropping below one volt
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IC Chips
• Memory
• Microprocessor
• Application specific IC (ASIC)

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Memory Chips
• Devices store data in the form of electric charge
• Volatile memory
– Dynamic random access memory (DRAM)
– S random access memory (SRAM)
• Non-volatile memory
– Erasable programmable read only memory (EPROM)
– FLASH

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DRAM
• Major component of computer and other
electronic instruments for data storage
• Main driving force of IC processing development
• One transistor, one capacitor

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Basic DRAM Memory Cell
Word line
NMOS
Capacitor
Bit line Vdd

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SRAM
• Fast memory application such as computer cache

memory to store commonly used instructions
• Unit memory cell consists of six transistors
• Much faster than DRAM
• More complicated processing, more expensive

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EPROM
• Non-volatile memory
• Keeping data ever without power supply
• Computer bios memory which keeps boot
up instructions
• Floating gate
• UV light memory erase

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EPROM
Passivation
Dielectric VG VD
Inter-poly Poly 2 Control Gate

Dielectric
Poly 1 Floating Gate
Gate
n+ n+
Oxide p-Si
Source Drain

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EPROM Programming
Passivation
Dielectric VG>VT>0 VD > 0

Dielectric
e- e- e- e- e- e- Floating Gate
Gate e-
n+ n+
Oxide p-Si
Source Drain Electron
Tunneling

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EPROM Programming
Passivation UV light
Dielectric VG>VT>0 VD > 0

Dielectric
e- e- Floating Gate
Gate
n+ n+
Oxide p-Si
Source Drain Electron
Tunneling

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IC Fabrication Processes
Ion implantation,
Diffusion
Epi, Poly
Adding Grown thin film, SiO 2 CV Dielectri
Deposited thin film PVD Meta
Electrical
Wafer Clean Patterned etch

Removing Etch Blanket
IC Strip
Dielectri
Fab. CMP
Meta Meta
Annealing Oxid
Heating Reflow Implantati
Alloying
Exposure (heating)
Patterning Photolithography PR coating (adding)

Baking (heating,
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Basic Bipolar Process Steps
• Buried layer doping
• Epitaxial silicon growth
• Isolation and transistor doping
• Interconnection
• Passivation

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Buried Layer Implantation
SiO2
n+
P-silicon

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Epitaxy Grow
n-epi
n+ buried layer
P-silicon

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Isolation Implantation
p+ p+
n-epi
n+ buried layer
P-silicon

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Emitter/Collector and Base
Implantation
n+ p n+
p+ p+
n-epi
n+ buried layer
P-silicon

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Metal Etch
SiO2
Emitter Base Collector
Al•Cu•Si
n+ p n+
p+ p+
n-epi
n+ buried layer
P-silicon

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Passivation Oxide Deposition
SiO2 Emitter Base Collector Al•Cu•Si
CVD
oxide
n+ p n+
p+ p+
n-epi
n+ buried layer
P-silicon

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MOSFET
• Good for digital electronics
• Major driving forces:
– Watches
– Calculators
– PC
– Internet
– Telecommunication

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1960s: PMOS Process
• Bipolar dominated
• First MOSFET made in Bell Labs
• Silicon substrate
• Diffusion for doping
– Boron diffuses faster in silicon
– PMOS

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PMOS Process Sequence (1960s)
Wafer clean (R) Etch oxide (R)
Field oxidation (A) Strip photo resist (R)
Mask 1. (Source/Drain) (P) Al deposition (A)
Etch oxide (R) Mask 4. (Metal) (P)
Strip photo resist/Clean (R) Etch Aluminum (R)
S/D diffusion (B)/Oxidation (A) Strip photo resist (R)
Mask 2. (Gate) (P) Metal Anneal (H)
Etch oxide (R) CVD oxide (A)
Strip photo resist/Clean (R) Mask 5. (Bonding pad) (P)
Gate oxidation (A) Etch oxide (R)
Mask 3. (Contact) (P) Test and packaging
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Wafer clean, field oxidation, and
photoresist coating
Native Oxide
N-Silicon N-Silicon
Primer Field Oxide

Field Oxide
Photoresist
N-Silicon N-Silicon

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Photolithography and etch
Source/Drain Mask UV Light
Source/Drain Mask Field Oxide
Photoresist PR
N-Silicon N-Silicon
Field Oxide Field Oxide
PR PR
N-Silicon N-Silicon

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Source/drain doping and gate
oxidation
Field Oxide Field Oxide
p+ p+
N-Silicon N-Silicon
Field Oxide Gate Oxide Field Oxide
p+ p+
p+ p+
N-Silicon
N-Silicon

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Contact, Metallization, and
Passivation
Gate Oxide Al∙Si Field Oxide
Gate Oxide Field Oxide
p+ p+ p+ p+
N-Silicon N-Silicon
Gate Oxide Field Oxide Gate Oxide CVD Cap Oxide
p+ p+ p+ p+
N-Silicon N-Silicon

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Illustration of a PMOS
Gate Oxide CVD Cap Oxide
p+ p+
N-Silicon
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NMOS Process after mid-1970s
• Doping: ion implantation replaced diffusion
• NMOS replaced PMOS
– NMOS is faster than PMOS
• Self-aligned source/drain
• Main driving force: watches and calculators

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Self-aligned S/D Implantation
Phosphorus Ions, P+
e
id
n
ox
co
ili
e ld
lys
Fi
Po
Gate
n+ n+
p-silicon
Source/Drain Gate oxide

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NMOS Process Sequence (1970s)
Wafer clean PSG reflow
Grow field oxide Mask 3. Contact
Mask 1. Active Area Etch PSG/USG
Etch oxide Strip photo resist/Clean
Strip photo resist/Clean Al deposition
Grow gate oxide Mask 4. Metal
Deposit polysilicon Etch Aluminum
Mask 2. Gate Strip photo resist
Etch polysilicon Metal anneal
Strip photo resist/Clean CVD oxide
S/D and poly dope implant Mask 5. Bonding pad
Anneal and poly reoxidation Etch oxide
CVD USG/PSG Test and packaging
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NMOS Process Sequence
Field
Clean p-Si p-Si Oxidation
Oxide Gate
Etch p-Si
p-Si Oxidation
Poly Dep. poly poly

Poly Etch
p-Si p-Si
P+ Ion poly poly

n+ n+ Annealing
Implant p-Si p-Si

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NMOS Process Sequence
PSG PSG PSG
PSG Dep. poly poly
Reflow
p-Si p-Si
Al·Si
PSG PSG PSG Metal
poly poly
Etch Dep.
p-Si p-Si
Al·Si
Al·Si SiN
Metal PSG PSG Nitride

Etch poly poly Dep.
p-Si n+ p-Si n+

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CMOS
• In the 1980s MOSFET IC surpassed bipolar
• LCD replaced LED
• Power consumption of circuit
• CMOS replaced NMOS
• Still dominates the IC market
• Backbone of information revolution

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Advantages of CMOS
• Low power consumption
• High temperature stability
• High noise immunity

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CMOS Inverter, Its Logic
Symbol and Logic Table
Vdd
Vin Vout
PMOS
Vin Vout
NMOS In Out
Vss 0 1
1 0
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CMOS Chip with 2 Metal Layers
PD2 Nitride
PD1 Oxide
Metal 2, Al·Cu·Si
IMD USG dep/etch/dep
Al·Cu·Si
PMD BPSG
LOCOS
SiO2
n+ n+ p+ p+
p+ p+
Poly Si Gate N-well
P-type substrate
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CMOS Chip
with 4 Metal Passivation 2, nitride
Lead-tin
alloy bump
Passivation 1, USG
Layers Metal 4 Copper
Tantalum
barrier layer
FSG
Metal 3 Copper FSG

Nitride etch
stop layer
FSG
Nitride
Metal 2 Copper seal layer
FSG
Tungsten plug Tantalum
M1 Cu Cu FSG
barrier layer
FSG
T/TiN barrier &
Tungsten local PSG Tungsten adhesion layer
Interconnection
STI n+ n+ USG p+ p+
P-well PMD nitride
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P-epi barrier
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P-wafer
Summary
• Semiconductors are the materials with
conductivity between conductor and
insulator
• Its conductivity can be controlled by dopant
concentration and applied voltage
• Silicon, germanium, and gallium arsenate
• Silicon most popular: abundant and stable
oxide
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Summary
• Boron doped semiconductor is p-type,
majority carriers are holes
• P, As, or Sb doped semiconductor is p-type,
the majority carriers are electrons
• Higher dopant concentration, lower resistivity
• At the same dopant concentration, n-type has
lower resistivity than p-type

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Summary
• R=ρ l/A
• C=κ A/d
• Capacitors are mainly used in DRAM
• Bipolar transistors can amplify electric signal,
mainly used for analog systems
• MOSFET electric controlled switch, mainly
used for digital systems
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Summary
• MOSFETs dominated IC industry since 1980s
• Three kinds IC chips microprocessor,
memory, and ASIC
• Advantages of CMOS: low power, high
temperature stability, high noise immunity,
and clocking simplicity

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Summary
• The basic CMOS process steps are transistor
making (front-end) and
interconnection/passivation (back-end)
• The most basic semiconductor processes are
adding, removing, heating, and patterning
processes.

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Chapter 3

Hong Xiao, Ph. D. www2.austin.cc.tx.us/HongXiao/Boo 1

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Nuclei Band gap, Eg

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Aluminum Sodium Silicon Silicon dioxide

Conductors Semiconductor Insulator

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Conducting band, Ec Conducting band, Ec Conducting band, Ec

Electron Eg = 1.1 eV Electron Eg = 1.1 eV Electron Eg = 1.1 eV

Valence band, Ev Valence band, Ev Valence band, Ev Hole

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Parallel plate Stacked Deep Trench

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• V1 > V2 , current current

• V1 < V2 , no current • P1 < P2, no current

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• For silicon V0 ~ 0.7 V

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VG = 0 Electron flow VG > V T > 0 VD > 0

No current Negative charges

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SiO 2 SiO 2 −−−−−−−

No current Positive charges

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• Source, drain, gate • Source, drain, gate valve

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• GaAs: up to 20 GHz device

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1980 1990 2000

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p-Si STI n-Si USG

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Bit line Vdd

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• Fast memory application such as computer cache

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