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15CS32
USN

Third Semester B.E. Degree Examination, June/July 2017

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Time: 3 hrs. Max. Marks: 80
Note: Answer any FIVE full questions, choosing one full question from each module.

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Module-l
1 a. Explain with help of a circuit diagram and characteristic curves working of N-channel DE
MOSFET. (12 Marks)

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b. List and explain anyone application ofFET and its working with circuit Diagram. (04 Marks)

OR
2 a. Explain the performance parameters of operational amplifier. (08 Marks)

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b. Mention and explain the working of any two applications of operational amplifier. (08 Marks)

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b.
c.
a. What is a logical gate? Realize
Describe positive
Find the minimal
Module-2

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((A + B) . C)D using only NAND Gates.
and Negative logic. List the equivalences between them.
SOP (sum of product) for the following Boolean functions
(04 Marks)
(04 Marks)
using K-map
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i) f(a, b, c, d) = Im (6,7,9,10,13) + d (1, 4, 5, II)
ii) f(a, b, c, d) = n M (1,2,3,4,10) + d (0, 15) (08 Marks)
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OR
4 a. Using Quine - MCClusky Method simplify the following Boolean equation.
f(a, b, c, d) = Im (0, 1,2,3, 10, 11, 12, 13, 14, 15). (10 Marks)
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b. Define Hazard. Explain Different Types of Hazards. (06 Marks)

Module-3
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5 a. What is multiplexer? Design a 32 to 1 multiplexer (MUX) using two 16 to 1 MUX and one
2 to 1 MUX. (04 Marks)
b. Show How using 3 to 8 Decoder and multi input OR gates, following Boolean Expressions
can be realized simultaneously
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F, (a, b, c) = Im (0, 4, 6), F2 (a, b, c) = Im (0,5), F3 (a, b, c) = Im (1, 2, 3, 7) (OSMarks)

OR
6 a. Implement the Boolean function expressed by SOP f (a, b, c, d) = Im (1, 2, 5, 6, 9, 12)
using 8 : I MUX. (04 Marks)
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b. What is magnitude comparator? Design and explain 2 bit magnitude comparator. (08 Marks)
.., c. Differentiate between combinational and sequential circuit. (04 Marks)
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c Module-4
i 7 a. With a neat logic diagrams and truth table. Explain the working of JK master slave Flip-Flop
.§ along with its implementation using NAND Gates. (10 Marks)
b. Derive the characteristic equation for SR, D and JK Flip-Flop. (06 Marks)

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15CS32

OR

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8 a. Using Negative Edge triggered D-Flip Flop. Draw a Logic diagram of 4 bit serial in serial
out (SISO) Register. Draw the waveform to shift Binary number 1010 into this register.
(06 Marks)
b. Explain with neat diagram How shift Register can be applied for serial addition. (07 Marks)

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c. Differentiate between synchronous and Asynchronous counter. (03 Marks)

Module-5

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9 a. Design Asynchronous counter for the sequences 0 ~ 4 ~ 1 ~ 2 ~ 6 ~ 0 ~ 4. Using S. R
Flip-Flop. (12 Marks)
b. With neat diagram. Explain Digital Clock. (04 Marks)

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OR
10 a. Explain 2 bit simultaneous AID converter. (10 Marks)
b.

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What is Binary Ladder? Explain the Binary Ladder with Digital input of 1000.

*****
(06 Marks)
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