5 4 3 2 1

ZZZ

PCB DAZ@
DA6000YE000
PCB 0YR LA-A031P REV0 M/B
D D

S1

FRAME
EC0MV000200

Compal Confidential
C C

Schematics Document

VSJEV
MT8317
B B

LA-A031P
2013-01-02
REV:1B
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, January 02, 2013 Sheet 1 of 23
5 4 3 2 1
 A B C D E

VSJEV system block diagram

1 1

Capacitive DDR3 512MB (2Gb X16 *2 Pcs)

Sidekey KCOL & KROW Touch Panel OR
CONN. DDR3 1GB (4Gb X16 *2 Pcs)

I2C,
EINT EMI

I2C
G Sensor EINT
Gyro Sensor
2 2

MT6329 Speaker (HPLP) Class D /

Class AB
PMU

AUDIO
AUD, HSP, LDO OUTPUT
LVDS
SN75LVDS83B
RGB MT8317/MT8377 BUCK OUTPUT
CHARGER LDO Output
LCM
CONN. Headset (HPLP, HPRP, MIC3) BUCK Output
PWM
Cortex-A9 Battery Input

Flashlight GPIO 1.2GHz Dual-Core BJT

Driver Battery
MIC1

DC
DRVVBUS OTG IN

3 USB 10-pin mini USB 3

Camera IF, I2C

Sub Camera
PCM, UART3, I2S

MT6620
4-in-1
JTAG
UART1
UART2 MSDC0 MSDC1 MSDC3 Blue Tooth
UART3 FM
UART4 WiFi
GPS
Debug Port eMMC micro SD

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, May 15, 2013 Sheet 2 of 23
A B C D E
 5 4 3 2 1

D D

Voltage Rails
MT6329 Power Plane Function Power Level IDLE Sleep mode I2C address
VCORE_PMU VCORE switching output 0.75 ~ 1.3 ON Low voltage
Address(8bit)
VAPROC_PMU VPROC switching output 0.75 ~ 1.3 ON Low voltage Device Address(7 bit)
Write Read
VTCXO_PMU LDO output for TCXO 2.8V ON OFF
VCAMA_PMU LDO output for camaera analog 2.8V ON Gating by SW
Gyro (MPU-3050) 0x68 0xD0 0xD1
VDD12_INT_PMU LDO output used for 1.2V SRAM 1.2V ON Low voltage
G-sensor (MC3210) 0x4C 0x98 0x99
VIO28_IC LDO output used for 2.8V IO 2.8V ON Gating by SW
Touch screen (GT927) 0x5D 0xBA 0xBB
VCAM_IO VCAM_IOPMU 1.8V ON Gating by SW
Camera (OV7675) 0x21 0x42 0x43
VMC_PMU SD card I/O and eMMC power 3.3V ON Gating by SW
Charge (NCP1851) 0x36 0x6C 0x6D
C VMCH SD card power 3.3V ON Gating by SW
PMU(MT6329) C

VGP Reserve for LCM 3.3V 3.3V ON Gating by SW

Codec
VGP2 Touch panel GT927 power 2.8V ON Gating by SW

Main board ID
MB_ID0 MB_ID1
0 0 PCB1.0+mCube
0 1 PCB2.0+mCube
1 0 PCB2.0+STK8311
1 1 PCB2.0+KXTIK

B B

Battery ID
BAT_ID
1 LG
0 Sanyo

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Friday, January 04, 2013 Sheet 3 of 23
5 4 3 2 1
 5 4 3 2 1

U201 (6) ED[0..31] U201F @

ED0 C27
@
Note: AFC > 3G_TX_VGA > APC > 3G_VBIAS ED1 C23 ED0
U201I SA00006GQ10 ED2 D25 ED1
K11 U201A @ ED3 D24 ED2
PWM4 MT8317TA 1.2G TFBGA 537P CO-Layout ED3
D4 AF20 AK9 ED4 B25 A19 /EWR (6)
CMFLASH X3 AF21 DL_I_P BPI_BUS0 AJ9 ED5 B24 ED4 EWR# B20
DL_I_N BPI_BUS1 ED5 ERAS# /ERAS (6)
4 3 SYSCLK AG21 AJ8 DDR3VCCIO ED6 D23 A20
Vdd OUT DL_Q_P BPI_BUS2 ED6 ECAS# /ECAS (6)
CMMCLK E6 AH21 AF10 ED7 A26 B17
E7 CMMCLK(10) DL_Q_N BPI_BUS3 AG10 ED8 A24 ED7 ECKE ECKE (6)
CMPCLK CMPCLK(10) BPI_BUS4 ED8
B2 AJ10 ED9 C24 B7 EDQM3 (6)
CMRST BPI_BUS5 ED9 DQM3

2
E5 1 2 AG23 AH11 1 ED10 A23 A11
CMPDN CMPDN (10) N.C. GND UL_I_P BPI_BUS6 1K_0402_1% ED10 DQM2 EDQM2 (6)
B1 AF23 DVDD BPI_BUS7 AJ11 C534 ED11 E21 B23
CMHREF (10)
CMHSYNC UL_I_N ED11 DQM1 EDQM1 (6)
CMVREF B3 (10) 26MHZ_10PF_TG-5035CJ-12N AG24 AF11 ED12 A22 B26 EDQM0 (6)
CMVSYNC AH24 UL_Q_P BPI_BUS8 AK10 R213 0.1U_0402_10V7K ED13 D21 ED12 DQM0
change to SJ000004W00 UL_Q_N BPI_BUS9 2 ED13
CMDAT9 A3 AG11 ED14 B22 E9
CMDAT9(10) DVDD_CAM EDQS3 (6)

1
D
D6 AK13 BPI_BUS10 ED15 D20 ED14 EDQS3 E12 D
CMDAT8 CMDAT8(10) VM0 EVREF (4,6) ED15 EDQS2 EDQS2 (6)
B5 AJ13 AB14 ED16 B12 E20
CMDAT7 CMDAT7(10) VM1 BSI0_CS0 ED16 EDQS1 EDQS1 (6)

2
CMDAT6 E4 NC21 @ Y16 AC14 1 1 ED17 C12 E24
A2 CMDAT6(10) 1 2 AFC AB16 APC BSI0_CS1 AF14 C401 1K_0402_1% C531 ED18 D12 ED17 EDQS0 E10
EDQS0 (6)
CMDAT5 CMDAT5(10) VTCXO_PMU AFC BSI0_DATA ED18 /EDQS3 /EDQS3 (6)
CMDAT4 A4 AA13 ED19 C11 E13
B4 CMDAT4(10) 0_0402_5% AC19 BSI0_CLK 1U_0402_10V6K R214 0.1U_0402_10V7K ED20 A10 ED19 /EDQS2 E19
/EDQS2 (6)
CMDAT3 CMDAT3(10) 3G_VBIAS ED20 /EDQS1 /EDQS1 (6)

1
B6 C643 AH15 2 2 ED21 B10 E23
CMDAT2 CMDAT2(10) /EDQS0 (6)

1
C3 @ AJ12 BSI1_CS0 AG14 ED22 B11 ED21 /EDQS0
CMDAT1 BPI_BUS11 BSI1_CS1 ED22

6
C4 0.01UF_0402_25V7K U606 AG12 AJ14 ED23 D11 E16
EDCLK_B (6)

2
CMDAT0 4 SYSCLK AK12 BPI_BUS12 BSI1_DATA AG15 ED24 D9 ED23 /EDCLK E17

VCC
OUTPUT BPI_BUS13 BSI1_CLK ED24 EDCLK EDCLK (6)
K10 AH12 ED25 B9
SCL1 SCL_1 (10,4) BPI_BUS14 ED25
K9 R611 AF12 ED26 D8 B30
SDA1 SDA_1 (10,4) TDD_TIMINGSYNC ED26 NLD15
AFC 1 2 2 AD11 ED27 B8 B29
ENABLE/DISABLE TDD_AFC_SW ED28 C8 ED27 NLD14 E27
I2C1: CAMERA, ATV 0_0402_5%
ED28 NLD13
MT8317_DDR3 5 ED29 A9 G30
1 NC MT8317_DDR3 ED30 C7 ED29 NLD12 E29

GND
NC ED30 NLD11

2
0.01UF_0402_25V7K ED31 A7 C30
ED31 NLD10 D30
@ C638 26MHZ_10PF_TX5651 D19 NLD9 A28
EVREF (4,6) BPI_GPS (9)

3
RVREF NLD8 C28
NLD7 G27
B21 NLD6 G29
(6) EA[0..14] EBA2 (6)
EBA2 NLD5
EBA1 B16 (6) D29
A13 EBA1 NLD4 F29
EBA0 (6)
EBA0 NLD3
EA14 A17 D28
VCAM_IOPMU EA13 C15 EA14 NLD2 E26
EA12 B15 EA13 NLD1 B28
EA11 D16 EA12 NLD0
EA10 C20 EA11 A29
Need to turn off if I2C1 devices not operated EA9 B14 EA10 NRNB B27
EA8 B18 EA9 NCLE C29
NCP_SPM (20) UTXD1 (11,21) EA8 NALE
EA7 B13 E28
LEVEL_SHIFT_EN (7) URXD1 (11,21) EA7 NWEB
2

EA6 A16 F30

MB_ID1 EA5 A14 EA6 NREB F27
4.7K_0402_5% 4.7K_0402_5% UTXD2 (11) EA5 NCEB0
EA4 D17 F28
R0212 R0211 @ PAD TP1340 EA4 NCEB1
EA3 C16
KCOL1 (15) @ PAD TP1341 EA3
EA2 D15
KCOL0 (11,15,21) URXD2 (11)
1

EA1 C19 EA2 K21

C C
B19 EA1 MEMPLL_TXN K22 @ PAD TP1386
SCL1 (10,4) BGF_INT_B_6620 (9) UTXD3 (9) EA0
EA0 MEMPLL_TXP @ PAD TP1387
SDA1 (10,4) ALL_INT_B_6620 URXD3 (9)
MB_ID0 UTXD4 (11,21)
WiFi_INT_B_6620 (9) URXD4 (11,21)
BAT_ID (20) ERESET_ (6) D7
DDR3RESET
CABC_ENABLE0 (7)

1
CABC_ENABLE1 (7) @ R219
KROW0 (11,15,21) MT8317_DDR3
@ PAD TP1342
1K_0402_5%
@ PAD TP1343
GPIO86_CTP_RST(14)
@ PAD TP1347 driving calibration setting (LPDDR1/LPDDR2)

2
AC10

AB11

@ @
AG6

AG7
AG8

AG2
AG3
AH8

AH7

AC5

AD1
AD5

AH1
AK6

AK7

AE1

AE3
AF6
AF7

AF9

AF8

AF2

AF4
R27

R25

R26
R0224
P26
P27

P28
AJ6

AJ7

AJ5

U201E SRCLKENAI 2 1
OSC_EN_6620 (9)
C198
KP_ROW0
KP_ROW1
KP_ROW2
KP_ROW3
KP_ROW4
KP_ROW5
KP_ROW6
KP_ROW7
KP_COL0
KP_COL1
KP_COL2
KP_COL3
KP_COL4
KP_COL5
KP_COL6
KP_COL7

UTXD1
URXD1
URTS1
UCTS1

UTXD2
URXD2
URTS2
UCTS2

UTXD3
URXD3

UTXD4
URXD4

SPI_MI

SPI_CSN
SPI_MO

SPI_CLK
0_0402_5%
X2 1000P_0402_50V7K
1 2
SYSCLK 1 2 26M_CK_IN AB21 W30
CLK26M SYSRST_B SYSRST_B (11,15,21)
32.768KHZ_12.5P_1TJF125DP1A000D 32K_OUT AK15 DVDD_NML
32K_IN AK16 RTC_XOUT U29 SRCLKENAI
AD16 RTC_XIN SRCLKENAI V29
RTC_GPIO_2V8 (21,9)
32K_OUT SRCLKENA SRCLKENA (21)
AJ16
AG16 TESTMODE AA3 @
2 2 BBWAKEUP (21)
BBWAKEUP DAICLK DAICLK (9)
18P_0402_50V8J 18P_0402_50V8J AA2 U201G
DAIPCMOUT DAIPCMOUT (9)
1 R217 2 0_0402_5% D27 AA4 E3 T4
C200 C199 FSOURCE DAIPCMIN DAIPCMIN (9) RDN0 DPICK DPICK (7)
AF5 AB1 F3 N5
1 1 WATCHDOG_RESET_B (21)
WATCHDOG_B BTSYNC DAISYNC (9) RDP0 DPIDE DPIDE (7)
Y2 DAIRST (9) C2 L5 DPIVSYNC (7)
DAIRSTB D2 RDN1 DPIVSYNC M5
RDP1 DPIHSYNC DPIHSYNC (7)
MCU_JTRST_B R30 (11) AC2 LCD3V3_POWER_EN
(7) D1
T30 JTRST_B EINT0 AD2 E2 RCN T2
MCU_JTCK (11)
JTCK EINT1 EINT1_GY (12) RCP DPIR0 DPI_R0 (7)
T29 AE4 U4
MCU_JTDI (11)
JTDI EINT2 @ PAD TP1361 DPIR1 DPI_R1 (7)
U27 DVDD_NML AA5 F2 R1
Close to MT8317 MCU_JTMS
U28
(11)
JTMS EINT3 AD4
EINT3_G (17)
F1 TDN0 DPIR2 R2
DPI_R2 (7)
MCU_JTDO (11)
JTDO EINT4 EINT4_CHARGER (20) TDP0 DPIR3 DPI_R3 (7)
MCU_JRTCK R29 (11) AE2 G1 N1 DPI_R4 (7)
B JRTCK EINT5 @ PAD TP1360 TDN1 DPIR4 B
AA6 G2 M1
EINT6 EINT6_C (14) TDP1 DPIR5 DPI_R5 (7)
U26 AB5 H4 P6
SWCLK (11)
SWCLKTCK EINT7 GPIO_USB_DRVVBUS(20) TCN DPIR6 DPI_R6 (7)
@ 0_0402_5% SWDIO T26 (11) Y4 EINT8_EARPHONE (8) G5 N8 DPI_R7 (7)
1 R0216 2 SWDIOTMS EINT8 AA1 TCP DPIR7
VUSB_6575 EINT9 PMU_INT (21)
CHD_DP AA27 (21) DPI_B0 N2 (7) R5 DPI_G0 (7)
R0202 1 2 1M_0402_1% AA26 CHD_DP AB2 P8 DPIB0 DPIG0 T5
CHD_DM (21)
CHD_DM PWM1 DPI_B1 (7)
DPIB1 DPIG1 DPI_G1 (7)
R0201 1 2 2M +-1% 0402 VBUS_BB AA29 AB4
DPI_B2
N7
(7)
P4
DPI_G2 (7)
VBUS AB26 USB_VBUS PWM2 AB3 P2 DPIB2 DPIG2 N4
90 Ohm USB_DM (18)
USB_DM PWM3 DPI_B3 (7)
DPIB3 DPIG3 DPI_G3 (7)
USB_VBUS rating: 3.3V AC26 N3 P7
differential USB_DP
AA30
(18)
USB_DP K4
DPI_B4
M2
(7)
DPIB4 DPIG4 U5
DPI_G4 (7)
In device only mode, you USB_VRT (4)
USB_VRT LPCE1B @ PAD TP1348 DPI_B5 (7)
DPIB5 DPIG5 DPI_G5 (7)
Y29 K1 L2 P3
can use R0216 instead of USB_ID (18)
IDDIG LPCE0B MEM_PWR_EN (20) DPI_B6 (7)
DPIB6 DPIG6 DPI_G6 (7)
J2 T1 P5
R0202 and R0201 LPTE LCM_BL_EN (22) DPI_B7 (7)
DPIB7 DPIG7 DPI_G7 (7)
SCL0 AG1 (12,14,17,20,4) K2
AH2 SCL_0 DVDD_NML LRSTB K5
SDA0 (12,14,17,20,4)
SDA_0 LRDB @ PAD TP1350
DVDD_LCD J3
LPA0 LCM_PWM4 (7)
W5 K3 MT8317_DDR3
I2S1_CK I2S1_CK LWRB
I2C0: CTP, M-Sensor, G-Sensor, ALS&PS, Gyro, OFN Y5
I2S1_DAT I2S1_DAT
I2S1_WS W1 U2
I2S1_WS DVDD_NML LSCE1B V4 @ PAD TP1358
W2 LSCE0B V2
I2S0_CK LSDA LCM_VLED_EN (22)
MSDC0_SDWPI

Y6 V3 VDD18_6575 VDD18_6575
MSDC0_RSTB
MSDC3_DAT0
MSDC3_DAT1
MSDC3_DAT2
MSDC3_DAT3

MSDC2_DAT0
MSDC2_DAT1
MSDC2_DAT2
MSDC2_DAT3

MSDC1_DAT0
MSDC1_DAT1
MSDC1_DAT2
MSDC1_DAT3

MSDC0_DAT0
MSDC0_DAT1
MSDC0_DAT2
MSDC0_DAT3
MSDC0_DAT4
MSDC0_DAT5
MSDC0_DAT6
MSDC0_DAT7

LCM_RST (7)
MSDC3_CMD

MSDC2_CMD

MSDC1_CMD

MSDC0_CMD

I2S0_WS LSA0
MSDC1_INSI
MSDC3_CLK

MSDC2_CLK

MSDC1_CLK

MSDC0_CLK

V1 V5
Close to MT8317 I2S0_DAT LSCK U3
LVDS_SHUTDOWN_N
(7)
LSDI LCM_STBY (7)

2
USB_VRT (4) @
R1687 R1688
2

MT8317_DDR3 100K_0402_5% 100K_0402_5%

R1669
AJ3
AH4
AJ4
AH3
AG4
AK3

J29
H26
K24
J30
H29
J28

J26
K26
K28
K30
K29
J27

L29
M29
M26
N27
L27
K27
N26
N28
P29
N30
M30
L26
N29

5.11K +-1% 0402 EMC@

1
R0203 MC1CK 1 2 MC1CK_R MC1CK_R (17)
MC0INS (17) MB_ID0 MB_ID1
1

MC3CMD (9) 0_0402_5%

@ PAD TP1345

2
MC3CLK (9) MC0DA7 (13) 2
MC3DA0 (9) MC0DA6 (13) R1689 @ R1690
MC3DA1 (9) MC0DA5 (13) C1653
MC3DA2 (9) MC0DA4 (13) 100K_0402_5% 100K_0402_5% 10P_0402_50V8J
1
MC3DA3 (9) MC0DA3 (13) @
1

1
A VDD18_6575 MC0DA2 (13) A
MC0DA1 (13)
MC0DA0 (13) RF request to add.1102.
MC0CK (13)
2

MC0CM0 (13)
4.7K_0402_5% 4.7K_0402_5% MC0RSTB (13)
R0205 R0204
MC1DA3 (17)
TP1335 PAD @ MC1DA2 (17)
1

SCL0 (12,14,17,20,4) 6620_LNA_EN (9) MC1DA1 (17)

SDA0 (12,14,17,20,4) GPIO12_6620_PWR_EN (9)
MC1CK
MC1DA0 (17) Security Classification Compal Secret Data Compal Electronics, Inc.
2012/11/03 2013/11/03 Title
MC1CMD (17) Issued Date Deciphered Date MT8377 - Baseband
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, December 19, 2012 Sheet 4 of 23
5 4 3 2 1
 5 4 3 2 1

VDD18_6575
@
U201H R344
AVDD28_RTC AVDD28_RTC AH16 J1 VDD18_MIPI 1 2
VRTC AVDD28_RTC DVDD18_MIPITX
AVSS28_RTC AVSS28_RTC AJ15 H5 C339 1 2 0.1U 10V +-10% X7R 0402
AVSS28_RTC DVSS18_MIPITX 0_0402_5%
H3
AK18 AVDD18_MIPI J5 C344 1 2 0.1U 10V +-10% X7R 0402
VTCXO_PMU AVDD28_DAC AVSS18_MIPI
2 1
C470 1U_0402_6.3V6K H2
DVDD18_MIPIRX J4 C360 1 2 0.1U 10V +-10% X7R 0402
AK22 DVSS18_MIPIRX
VDD25_VA1_6575 AVDD25_MD
2 2 1 AC20
0.1U 10V +-10% X7R 0402 C459 1U_0402_6.3V6K AVSS25_MD

D C312 VDD18_6575 D
K23
1 VDD25_VA1_6575 AVDD25_MEMPLL
2 1 H20 AK24
C460 1U_0402_6.3V6K AVSS25_MEMPLL AVDD18_MD AJ26 1 2
Close to MT8317
AVSS18_MD C361 1U 6.3V K X5R 0402 L301
VDD25_VA1_6575 AK19 VUSB_6575 1 2 AVDD33_USB
2 1 W15 AVDD25_VDAC
AVSS25_VDAC 1 1
C461 1U_0402_6.3V6K 1 0_0402_5% C356
C367 @ C366
AK21 AA28 AVDD33_USB11 @ 1U 6.3V K X5R 0402
VDD25_VA1_6575 AVDD25_PLL AVDD33_USB11 2 2
2 1 W16 V18 4.7U_0402_6.3V6M 0.1U 10V +-10% X7R 0402
C468 1U_0402_6.3V6K AVSS25_PLL AVSS33_USB11 2
AB28 AVDD33_USB
AC22 AVDD33_USB W18
VDD25_VA2_6575 AVDD25_VBUF AVSS33_USB
2 1
C469 1U_0402_6.3V6K
AB30
AVDD30_VSIM AE30 VSIM_6575
AVDD30_VSIM2 VSIM2_6575
W17 2 2
AVSS30_VSIM
C521 C520 L302
1U 6.3V K X5R 0402 1U 6.3V K X5R 0402 1 2 AVDD33_USB11 AVDD33_USB11
1 1 VSIM_6575
MT8317_DDR3
0_0402_5%
Close to MT8317
1
C369

0.1U 10V +-10% X7R 0402

2

@
U201C
C AF18 AF29 C458 VDD18_6575 C
VDAC_OUT AVDD18_AUD AG25 1 2 4.7U_0402_6.3V6M
DDR3VCCIO
AVSS18_AUD
star connect to cap gnd
@
U201B AK28 AK29 AVSS12N C313 1 2 2.2U 10V K X7R 0603
ACCDET (8)
ACCDET COUT_AVSS12N
F9 DDR3VCCIO AJ30
VDD_EMI F12 AVSS12N_DAC
1 1 1 1 1 star connect to cap.(thicker)
H12 VDD_EMI F14 C377 C334 C332 C333 C1618 AG29 FLYP C363 1 2 1U 6.3V K X5R 0402
H16 VSS VDD_EMI F15 CF AG30 FLYN
H21 VSS VDD_EMI F16 0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 2.2U 10V K X7R 0603 CF_IN R327 VBAT_SUPPLY
J8 VSS VDD_EMI F17 2 2 2 2 2 AK25 AH27
close to IC 2 1
VSS VDD_EMI MICP0 (16)
NS_AU_VIN0_P VMIC VMIC
J10 F18 2.2U_0402_6.3VM 0.1U 10V +-10% X7R 0402 MICN0 AJ25 (16) AF26 EARBIAS (8) 1 0_0402_5%
VSS VDD_EMI NS_AU_VIN0_N EARBIAS

1
J13 F21 AJ27
VSS VDD_EMI MICP1 (8)
NS_AU_VIN1_P C362 100K_0402_1%
J16 F23 AK27 AJ20
J19 VSS VDD_EMI G11
Close to MT8317 MICN1
AF25
(8)
NS_AU_VIN1_N AUX_IN0 AJ17 1U 6.3V K X5R 0402
VSS VDD_EMI NS_AU_VIN2_P AUX_IN1 ADC1_ACCESSORY
(8) 2 R332
J20 G15 C398 1 2 0.1U 10V +-10% X7R 0402 C395 1 2 0.1U 10V +-10% X7R 0402 AE25 AF16
J22 VSS VDD_EMI G17 NS_AU_VIN2_N AUX_IN2 AJ18

2
J24 VSS VDD_EMI N22 VDD_NFI C393 1 2 0.1U 10V +-10% X7R 0402 VDD_LCD C394 1 2 0.1U 10V +-10% X7R 0402 AJ29 AUX_IN3 AJ19
VSS DVDD_NFI HPRP (21,8)
HPRP AUX_IN4
K14 N23 HPLP AJ28 (21,8)
VSS DVDD_NFI HPLP

2
K18 N10 C392 1 2 0.1U 10V +-10% X7R 0402 AH19 ADC0: Not used
L14 VSS DVDD_LCD N11 AH28 AUX_XM AG19 R376
L15 VSS DVDD_LCD P10 VDD_LCD R378 1 2 0_0402_5%
HSP (21)
HSP
AH29 (21) AUX_XP AF17 ADC1: Accessory
VSS DVDD_LCD VDD18_6575 HSN HSN AUX_YM
L16
VSS AUX_YP
AG18 ADC2: UMTS Power 100K_0402_1%
L17 AH30 ADC3: UMTS Temp

1
L18 VSS C376 1 2 0.1U 10V +-10% X7R 0402 AUDREFN
VSS

2
M14 K8 DVDD_CAM R384 1 2 0_0402_5% AF28 AJ23
VSS DVDD_CAM VCAM_IOPMU FMINR REFP
M15 AF13 DVDD_BPI R382 1 2 0_0402_5% AF27 AJ22
M16 VSS DVDD_BPI AB12 VDD28_6575 0_0402_5% FMINL REFN
C347 1 2 0.1U 10V +-10% X7R 0402 1
M17 VSS DVDD_BSI R315 C345
VSS

1
M18 AB8 4 mil trace Gnd Via 1U 6.3V K X5R 0402

1
N13 VSS DVDD_NML1 AB9 VDD_NFI R343 1 2 0_0402_5% R456 R451 MT8317_DDR3
VSS DVDD_NML2 VDD18_6575 Close to MT6329 2
N14 AE5 1 1 1
N15 VSS DVDD_NML3 AC9 C338 C337 51K_0402_5% 51K_0402_5%
N16 VSS DVDD_NML4 Y25 C341

2
N17 VSS DVDD_NML5 U23 0.1U 10V +-10% X7R 0402
N18 VSS DVDD_NML6 V23 2 10V +-10%
0.1U 2 X7R 0402 2
N19 VSS DVDD_NML6 0.1U 10V +-10% X7R 0402
P13 VSS
P14 VSS R22 DVDD_MC0 R323 1 2 0_0402_5%
B VSS DVDD_MC0 VDD18_6575 B
P15 R23 DVDD_MC1 R317 1 2 0_0402_5% VMC_6575 3.3V power for SD card
VSS DVDD_MC1 VMC_6575
P16 P23 DVDD_MC2 R379 1 2 0_0402_5%
VSS DVDD_MC2 VDD28_6575
P17 AK4 DVDD_MC3 R380 1 2 0_0402_5%
P18 VSS DVDD_MC3 MT6620_SDIO1
VDD18_6575
P19 VSS P11
VSS VDDK 1 1 1 1
R13 K12 C371 C342 C343 C379
R14 VSS VDDK N12
R15 VSS VDDK P12
VSS VDDK 2 2 2 2 03/07 for Power noise
0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

R16 R12
VSS VDDK

2
R17 T12
R18 VSS VDDK U12 C246 C247 C1656 C1657 VDDK 4.7K_0402_5%
R19 VSS VDDK V12 4.7K_0402_5%
VSS VDDK Close to MT8317 1 1 1 1
1

T13 W12 R206 R205

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

T14 VSS VDDK L13 C248

1
T15 VSS VDDK M13 0.01UF_0402_25V7K
2

T16 VSS VDDK W13 2 2 2 2

VSS VDDK SCL_2 (21,5)
T17 G14
VSS VDDK SDA_2 (21,5)
T18 H14
T19 VSS VDDK J14
U13 VSS VDDK W14
U14 VSS VDDK K15
Close to MT8317
U15 VSS VDDK V15 VDDK 0.1U 10V +-10% X7R 0402 U201D @
VSS VDDK VCORE_6575
U16 K16
U17 VSS VDDK V16
VSS VDDK 1 1 1 1 1 2 1 1 1 C1658 1
U19 K17 C352 C353 C354 C355 C391 C373 C245 CT5 W26(21,5) AC29
VSS VDDK SCL_2
V13 V17 10U_0402_6.3V6M Y26 SCL_2 USB11_DM AB29
VSS VDDK C368 SDA_2 (21,5)
SDA_2 USB11_DP
V14 G18 1U 6.3V K X5R 0402 2.2U_0402_6.3VM 10U_0402_6.3V6M 100U_1206_6.3V6M
VSS VDDK 2 2 10V +-10%
2 X7R 0402 2 2 1 2 2 2 2
0.1U 10V +-10% X7R 0402

H18 0.1U 0.1U 10V +-10% X7R 0402 AD27 V30 PACTRL0 (21)
VDDK J18 2.2U_0402_6.3VM AC27 SRST PACTRL0 V28
VDDK SIO PACTRL1 PACTRL1 (21)
U18 AD26 W29 PACTRL2 (21)
VDDK V19 SCLK PACTRL2
VDDK AD29 W27
M20
Close to MT8317 AD30 SRST2 PMUCTRL0 V27
PMUCTRL0 (21)
VDDK_DVFS SIO2 PMUCTRL1 PMUCTRL1 (21)
N20 VDDK_DVFS AD28
VDDK_DVFS VAPROC_6575 SCLK2
A1 P20
A30 CORNER VDDK_DVFS R20
CORNER VDDK_DVFS 1 1 1 1 1 1 1 1 1 1
AK30 T20 C374 C372 C357 C358 C364 C365 C256 C1659 CT6 Separate SIO1/2 and SCLK1/2
AJ1 CORNER VDDK_DVFS U20 C350
A A
AK1 CORNER VDDK_DVFS V20 0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 10U_0402_6.3V6M 100U_1206_6.3V6M SIO/SCLK trace 6mil
2.2U_0402_6.3VM

CORNER VDDK_DVFS 2 2 2 2 2 2 2 2 2 2
0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

AK2 M21 MT8317_DDR3

CORNER VDDK_DVFS N21 0.1U 10V +-10% X7R 0402 10U_0402_6.3V6M
VDDK_DVFS P21
VDDK_DVFS R21
VDDK_DVFS T21
VDDK_DVFS V21
Close to MT8317
VDDK_DVFS M19 VDDK_MDVFS R391 1 2 0_0402_5%
VDDK_VSRAM VM12_INT_6575
U21
E25 VDDK_VSRAM V22
VDDK_DVFS_OUT VDDK_VSRAM C385
1
C386
1 1 1
C387
Security Classification Compal Secret Data Compal Electronics, Inc.
MT8317_DDR3 2012/11/03 2013/11/03 Title
0.1U 10V +-10% X7R 0402 2.2U_0402_6.3VM C375 0.1U 10V +-10% X7R 0402
Issued Date Deciphered Date MT8377 - Power and ABB
VPROC_FB 2 2 2 2
VPROC_FB (21) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.1U 10V +-10% X7R 0402 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C378 1 2 C 0.1
1U 6.3V K X5R 0402
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 5 of 23
5 4 3 2 1
 5 4 3 2 1

RN1 RN7

EDCLK (4,6)
SD309220A80 SD309220A80

2
U5 U6 22 +-5% 8P4R 0804 22 +-5% 8P4R 0804
100_0402_5%
ED3 E3 N3 RA0_R ED20 E3 N3 RA0_R_2 R525
ED6 F7 DQ0 A0 P7 RA1_R ED19 F7 DQ0 A0 P7 RA1_R_2 RN2 RN8

1
ED2 F2 DQ1 A1 P3 RA2_R ED22 F2 DQ1 A1 P3 RA2_R_2
DQ2 A2 DQ2 A2 EDCLK_B (4,6)
ED5 F8 N2 RA3_R ED23 F8 N2 RA3_R_2
ED1 H3 DQ3 A3 P8 RA4_R ED18 H3 DQ3 A3 P8 RA4_R_2
H8 DQ4 A4 P2 H8 DQ4 A4 P2
SD309220A80 SD309220A80
ED4 RA5_R ED21 RA5_R_2
ED0 G2 DQ5 A5 R8 RA6_R ED16 G2 DQ5 A5 R8 RA6_R_2
DQ6 A6 DQ6 A6 22 +-5% 8P4R 0804 22 +-5% 8P4R 0804
ED7 H7 R2 RA7_R ED17 H7 R2 RA7_R_2
ED8 D7 DQ7 A7 T8 RA8_R ED30 D7 DQ7 A7 T8 RA8_R_2
ED13 C3 DQ8 A8 R3 RA9_R ED29 C3 DQ8 A8 R3 RA9_R_2 RN3 RN9
D
ED14 C8 DQ9 A9 L7 RA10_R ED28 C8 DQ9 A9 L7 RA10_R_2 D
ED15 C2 DQ10 A10/AP R7 RA11_R ED25 C2 DQ10 A10/AP R7 RA11_R_2
ED10 A7 DQ11 A11 N7 RA12_R ED24 A7 DQ11 A11 N7 RA12_R_2
A2 DQ12 A12/BC# T3 A2 DQ12 A12/BC# T3
SD309220A80 SD309220A80
ED9 RA13_R ED31 RA13_R_2
ED12 B8 DQ13 A13 ED26 B8 DQ13 A13
DQ14 DQ14
22 +-5% 8P4R 0804 22 +-5% 8P4R 0804
ED11 A3 J1 ED27 A3 J1
DQ15 NC_0 J9 DQ15 NC_0 J9
NC_1 L1 NC_1 L1 RN4 RN10
C7 NC_2 L9 C7 NC_2 L9
EDQS1 (4) UDQS NC_3 EDQS3 (4) UDQS NC_3
ED0 /EDQS1 (4) B7 UDQS# NC_4
M7 /EDQS3 (4) B7 UDQS# NC_4
M7
ED1 F3 T7 RA14_R F3 T7 RA14_R_2 SD309220A80 SD309220A80
EDQS0 (4) LDQS NC_6 EDQS2 (4) LDQS NC_6
ED2 G3 G3
/EDQS0 (4) LDQS# /EDQS2 (4) LDQS#
ED3
EDQM1 (4) D3 UDM BA0
M2 RBA0_R
EDQM3 (4) D3 UDM BA0
M2 RBA0_R_2 22 +-5% 8P4R 0804 22 +-5% 8P4R 0804
ED4 E7 N8 RBA1_R E7 N8 RBA1_R_2
EDQM0 (4) LDM BA1 EDQM2 (4) LDM BA1
ED5 M3 RBA2_R M3 RBA2_R_2
ED6 BA2 J7 BA2 J7 RN5 RN11
CK EDCLK (4,6) CK EDCLK (4,6)
ED7 EVREF H1 K7 EVREF H1 K7
EVREF (4,6) VREFDQ CK# EDCLK_B (4,6) EVREF (4,6) VREFDQ CK# EDCLK_B (4,6)
ED8 M8 L2 RCS1__R M8 L2 RCS2__R
ED9 RRESET_R T2 VREFCA CS# K3 RCAS__R RRESET_R_2 T2 VREFCA CS# K3 RCAS__R_2
1
L8 RESET# CAS# K1
1
L8 RESET# CAS# K1
SD309220A80 SD309220A80
ED10 C61 RODT1_R C69 RODT2_R
ED11 ZQ ODT J3 RRAS__R ZQ ODT J3 RRAS__R_2
RAS# RAS# 22 +-5% 8P4R 0804 22 +-5% 8P4R 0804

1
ED12 0.1U 10V +-10% X7R 0402 L3 RWE__R 0.1U 10V +-10% X7R 0402 L3 RWE__R_2
ED13 2 R65 WE# K9 RCKE_R 2 R71 WE# K9 RCKE_R_2
ED14 CKE CKE RN6 RN12
ED15 240_0402_1% 240_0402_1%
ED16 B1 B1
EVREF (4,6)

2
ED17 DDR3VCCIO VSSQ_0 B9 DDR3VCCIO VSSQ_0 B9
VSSQ_1 D1 VSSQ_1 D1
SD309220A80 SD309220A80
ED18 EVREF (4,6) 1
ED19 A1 VSSQ_2 D8 C65 A1 VSSQ_2 D8
VDDQ_0 VSSQ_3 VDDQ_0 VSSQ_3 22 +-5% 8P4R 0804 22 +-5% 8P4R 0804
ED20 1 A8 E2 A8 E2
ED21 C66 C1 VDDQ_1 VSSQ_4 E8 0.1U 10V +-10% X7R 0402 C1 VDDQ_1 VSSQ_4 E8
ED22 C9 VDDQ_2 VSSQ_5 F9 2 C9 VDDQ_2 VSSQ_5 F9
ED23 0.1U 10V +-10% X7R 0402 D2 VDDQ_3 VSSQ_6 G1 D2 VDDQ_3 VSSQ_6 G1
ED24 2 E9 VDDQ_4 VSSQ_7 G9 E9 VDDQ_4 VSSQ_7 G9
ED25 F1 VDDQ_5 VSSQ_8 F1 VDDQ_5 VSSQ_8 RN1 22x4 RN11 22x4
ED26 H2 VDDQ_6 A9 H2 VDDQ_6 A9 EA6 2 1 RA6_R EA14 2 1 RA14_R_2
ED27 H9 VDDQ_7 VSS_0 B3 H9 VDDQ_7 VSS_0 B3 EA8 4 3 RA8_R EA11 4 3 RA11_R_2
ED28 VDDQ_8 VSS_1 E1 VDDQ_8 VSS_1 E1 EA11 6 5 RA11_R EA8 6 5 RA8_R_2
C C
ED29 B2 VSS_2 G8 B2 VSS_2 G8 EA14 8 7 RA14_R EA6 8 7 RA6_R_2
ED30 D9 VDD_0 VSS_3 J2 D9 VDD_0 VSS_3 J2 RN0402_SMD RN0402_SMD
ED[0..31] (4) VDD_1 VSS_4 VDD_1 VSS_4
ED31 G7 J8 G7 J8 RN2 22x4 RN7 22x4
K2 VDD_2 VSS_5 M1 K2 VDD_2 VSS_5 M1 /ECAS 2 1 RCAS__R 2 1
K8 VDD_3 VSS_6 M9 K8 VDD_3 VSS_6 M9 /ERAS 4 3 RRAS__R /EWR 4 3 RWE__R_2
N1 VDD_4 VSS_7 P1 N1 VDD_4 VSS_7 P1 /EWR 6 5 RWE__R /ERAS 6 5 RRAS__R_2
N9 VDD_5 VSS_8 P9 N9 VDD_5 VSS_8 P9 8 7 /ECAS 8 7RCAS__R_2
R9 VDD_6 VSS_9 T1 R9 VDD_6 VSS_9 T1 RN0402_SMD RN0402_SMD
R1 VDD_8 VSS_10 T9 R1 VDD_8 VSS_10 T9 RN3 22x4 RN8 22x4
VDD_7 VSS_11 VDD_7 VSS_11 ECKE 2 1 RCKE_R EBA0 2 1 RBA0_R_2
EA10 4 3 RA10_R EBA2 4 3 RBA2_R_2
DDR3VCCIO DDR3VCCIO EBA2 6 5 RBA2_R EA10 6 5 RA10_R_2
EBA0 8 7 RBA0_R ECKE 8 7 RCKE_R_2
EBA1 (4)
/EWR (4) RN0402_SMD RN0402_SMD

1
(4) RN4 22x4 RN9 22x4
ECKE 2 1 2 1 RA2_R_2
EBA0 (4) IC DDR3 x16 FBGA-96 R75 IC DDR3 x16 FBGA-96 R73 EA3 RA3_R EA2
ERESET_ (4) MT41J256M16RE-15E-D_FBGA_96P @ MT41J256M16RE-15E-D_FBGA_96P @ EA0 4 3 RA0_R EA5 4 3 RA5_R_2
0_0402_5% 0_0402_5% EA5 6 5 RA5_R EA0 6 5 RA0_R_2
EBA2 (4) Compal footptint Compal footptint RCS2__R EA2 8 7 RA2_R EA3 8 7 RA3_R_2
/ERAS (4) @ @

2
/ECAS (4) RCS1__R RODT1_R RODT2_R RN0402_SMD RN0402_SMD

1
RN5 22x4 RN10 22x4
1

1
EDCLK R70 EA7 2 1 RA7_R ERESET_ 2 1RRESET_R_2
TP41 PAD @
R77 R76 EDCLK R72 EA9 4 3 RA9_R EA13 4 3 RA13_R_2
TP38 PAD @ 6 5 6 5 RA9_R_2
EDCLK_B 1K_0402_1% EA13 RA13_R EA9
TP39 PAD @
1K_0402_1% 1K_0402_1% EDCLK_B 1K_0402_1% ERESET_ 8 7 RRESET_R EA7 8 7 RA7_R_2
TP40 PAD @

2
RN0402_SMD RN0402_SMD
2

2
RN6 22x4 RN12 22x4
EBA1 2 1 RBA1_R EA1 2 1 RA1_R_2
EA12 4 3 RA12_R EA4 4 3 RA4_R_2
EA4 6 5 RA4_R EA12 6 5 RA12_R_2
EA1 8 7 RA1_R EBA1 8 7 RBA1_R_2
RN0402_SMD RN0402_SMD

B
U5 Test Point B
RRAS__R
TP01 PAD @
RCAS__R
TP02 PAD @
RWE__R
TP03 PAD @
RCKE_R
TP04 PAD @
DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO RBA0_R
TP05 PAD @
RBA1_R
TP06 PAD @
1 1 1 1 1 EDQM0
TP07 PAD @
C56 C60 C67 C1619 EDQM1
TP08 PAD @
C71 EDQS0
TP09 PAD @
0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 2.2U 10V K X7R 0603 /EDQS0
2 2 2 2 2 TP10 PAD @
EA[0..14] (4) 0.1U 10V +-10% X7R 0402 EDQS1
TP11 PAD @
EA0 0.1U 10V +-10% X7R 0402 /EDQS1
TP12 PAD @
EA1 U5 U6 RA9_R
TP13 PAD @
EA2 Hyn 256Mx16@ Hyn 256Mx16@ RA10_R
TP14 PAD @
EA3 DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO ED1
TP15 PAD @
EA4 ED5
EA5 1 1 1 1 1
SA00005GI10 SA00005GI10 TP16
TP17
PAD @
PAD @
ED10
EA6 C62 C70 C74 C54 C1620 H5TQ4G63MFR-PBC H5TQ4G63MFR-PBC ED15
TP18 PAD @
EA7
EA8 0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 2.2U 10V K X7R 0603
EA9 2 0.1U 10V +-10%2X7R 0402 2 2 X7R 0402
0.1U 10V +-10% 2
EA10 U6 Test Point
EA11
EA12 DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO RRAS__R_2
TP19 PAD @
EA13 U5 U6 RCAS__R_2
TP20 PAD @
EA14 1 1 1 1 1 Nan 256Mx16@ Nan 256Mx16@ RWE__R_2
TP21 PAD @
C73 C58 C63 C68 C1626 RCKE_R_2
TP22 PAD @
RBA0_R_2
0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 2.2U_0402_6.3VM SA00006HI10 SA00006HI10 TP23
TP24
PAD
PAD
@
@
RBA1_R_2
2 2 2 2 2 EDQM2
NT5CB256M16BP-CG NT5CB256M16BP-CG TP25 PAD @
0.1U 10V +-10% X7R 0402 EDQM3
TP26 PAD @
EDQS2
TP27 PAD @
DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO DDR3VCCIO /EDQS2
TP28 PAD @
EDQS3
TP29 PAD @
1 1 1 1 1 /EDQS3
TP30 PAD @
C64 C72 C75 C59 C1627 RA9_R_2
TP31 PAD @
A RA10_R_2 A
TP32 PAD @
0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 2.2U_0402_6.3VM ED20
2 TP33 PAD @
0.1U 10V +-10%2X7R 0402 2 2 2 ED21
TP34 PAD @
0.1U 10V +-10% X7R 0402 ED30
TP35 PAD @
ED31
TP36 PAD @

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Memory (DDR3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Tuesday, December 18, 2012 Sheet 6 of 23
5 4 3 2 1
 5 4 3 2 1

VDD33_6575

2
+LCD_VCOM LCM_VCOM
R372 LCM_VDD
0_0402_5%
JP3 2 2
42 40 LCM_VCOM 1U 6.3V K X5R 0402 1U 6.3V K X5R 0402
GND 40

1
41 39 LCM_VDD C1346 C1347
GND 39 38
38 37 1 1
37 36 LCM_RST_3V3 EMC@ L1009 VBAT
36 35 LCM_STBY_3V3 CN_LCM_RIN0+ 2 1 LCM_RIN0+
35 34 1 2
34 33 CN_LCM_RIN0- R1640 0_0402_5%
STBYB=1 "Normal mode" 33 32 CN_LCM_RIN0+ CN_LCM_RIN0- 3 4 LCM_RIN0-
STBYB=0 "timing control"32

1
31 LCM_AVDD C1615
31 30 CN_LCM_RIN1- LCM_VGL OCE2012120YZF_4P
D 30 29 CN_LCM_RIN1+ LCM_VGH 2.2U_0603_10V6K VDD33_6575 VGP
D

2
29 28 EMC@ L1010 U21
28 R387
27 CN_LCM_RIN2- CN_LCM_RIN1+ 2 1 LCM_RIN1+ 1 @ R398
27 26 CN_LCM_RIN2+ VDD 5 1 2 1 2
26 1 2 2 VOUT
25 1U 6.3V K X5R 0402 1U 6.3V K X5R 0402 2 R1685 0_0603_5%
25 24 CN_LCM_CLKIN- C1343 C1344 C1345 CN_LCM_RIN1- 3 4 LCM_RIN1- R415 GND 4 2 1 0_0603_5%
24 23 CN_LCM_CLKIN+ 1U 6.3V K X5R 0402 2 1 3 VFB @
23 LCD3V3_POWER_EN (4) CE

1
22 2 1 1 OCE2012120YZF_4P 0_0402_5% C1616
22 21 CN_LCM_RIN3- 0_0402_5% APL5320-33BI-TRG SOT-23 5P LDO
21

1
20 CN_LCM_RIN3+ EMC@ L1011 2.2U_0603_10V6K

2
20 19 CN_LCM_RIN2+ 2 1 LCM_RIN2+
19 18
PN: SA00005J700
18 17 R1638
17 16 CN_LCM_RIN2- 3 4 LCM_RIN2- 100K_0402_5%

2
16 15
15 14 OCE2012120YZF_4P
14 LCM_DIMO_R (22)
13 0_0402_5% 2 1 R373
13 12 LCM_AVDD 2 1 R54
12 AVDD
11 0_0402_5% EMC@ L1012
11 10 CN_LCM_CLKIN+ 2 1 LCM_CLKIN+
10 LCM_LEDK (22)
9
9 8 LCM_LR_SEL
8 7 LCM_UD_SEL CN_LCM_CLKIN- 3 4 LCM_CLKIN-
7 6 LCM_VGL 0_0402_5% 2 1 R62
6 VGL
5 CABC1 2 1 CABC_ENABLE1 (4) OCE2012120YZF_4P
5 4 CABC0 0_0402_5% 2 @ 1
R63
4 CABC_ENABLE0 (4)
3 LCM_VGH 1 2
0_0402_5% @ R64 EMC@ L1013 VDD18_6575
3 VGH
2 R57 0_0402_5% VDD33_6575 CN_LCM_RIN3+ 2 1 LCM_RIN3+
2 1 @
1 LCM_LEDA (22)
R879 R877

2
ACES_88716-4001 0_0402_5% 1 2 1 2100K_0402_5% CN_LCM_RIN3- 3 4 LCM_RIN3- @
CONN@ 1 2 @1 2 R876
100K_0402_5% R880 R878 0_0402_5% OCE2012120YZF_4P 0_0402_5% VDD33_6575
@
U1615 C43

1
@
LCM_LR_SEL 2 1 B2 B1 2 @1
LCM_UD_SEL C44 0.1U_0402_25V4Z VL VCC
C C
2 @ 1 SHIFT_EN_R B3 B4 0.1U_0402_25V4Z
LEVEL_SHIFT_EN (4) EN GND
CABC1 0_0402_5% R444
1 2 A1 C1
LCM_PWM4 (4)@ IOVL1 IOVCC1 LCM_BLU_PWM (22)
CABC0 R463 0_0402_5% A2 C2
TP1359 PAD @ IOVL2 IOVCC2 @ PAD TP1357
LCM_RST 1 (4)@ 2 A3 C3 LCM_RST_3V3
R396 1 (4)@ 2
0_0402_5% A4 IOVL3 IOVCC3 C4 LCM_STBY_3V3
LCM_STBY IOVL4 IOVCC4
R397 0_0402_5%
2

R1675 R1676 NLSX4378FCT1G_BGA12

10K_0402_5% 10K_0402_5%

LVDS Bridge
1

U2
DPI_R0 51 1 LVDS83A_IOVCC
DPI_R1 52 D0 Vcc 9 LVDS83A_VCC
DPI_R2 54 D1 Vcc 26
DPI_R3 55 D2 Vcc 44 LVDS83A_LVDSVCC
DPI_R4 56 D3 LVDSVcc 34 LVDS83A_PLLVCC
DPI_R5 3 D4 PLLVcc
DPI_B0 (4) D6
DPI_R6 50 47 LCM_RIN0+
DPI_B1 (4) D27 Y0P VDD33_6575
DPI_R7 2 48 LCM_RIN0-
DPI_B2 (4) D5 Y0M VDD33_6575
DPI_B3 (4)
DPI_G0 4
DPI_B4 (4) D7 VDD18_6575
DPI_B5 (4) DPI_G1 6 45 LCM_RIN1+
D8 Y1P

2
DPI_G2 7 46 LCM_RIN1- VDD18_6575
DPI_B6 (4) D9 Y1M

2
DPI_G3 11 R1679
DPI_B7 (4) D12
DPI_G4 12 R1680
D13

2
DPI_G5 14 41 LCM_RIN2+ 100K_0402_5%
DPI_R0 (4) D14 Y2P

2
DPI_R1 (4) DPI_G6 8 42 LCM_RIN2- R1681 100K_0402_5%

1
DPI_G7 10 D10 Y2M R1682
DPI_R2 (4)

1
D11 100K_0402_5% LCM_RST_3V3
DPI_R3 (4)
DPI_R4 (4) DPI_B0 15 37 LCM_RIN3+ 100K_0402_5% LCM_STBY_3V3

1
D15 Y3P

1
DPI_B1 19 38 LCM_RIN3- D
DPI_R5 (4)

1
D18 Y3M

1
DPI_B2 20 2 Q1 D
B DPI_R6 (4) D19 B
DPI_B3 22 G 2 Q2
DPI_R7 (4) D20

1
DPI_B4 23 39 LCM_CLKIN+ D BSS138W-7-F_SOT323-3~D G
S

3
D21 CLKOUTP

1
DPI_B5 24 40 LCM_CLKIN- LCM_RST 2 D BSS138W-7-F_SOT323-3~D
DPICK (4) S

3
DPI_B6 16 D22 CLKOUTM G LCM_STBY 2
DPIDE (4) D16
DPIVSYNC (4) DPI_B7 18 5 S G

3
D17 GND 13 Q3
DPIHSYNC (4) S

3
DPIHSYNC 27 GND 21 BSS138W-7-F_SOT323-3~D Q4
DPIVSYNC 28 D24 GND 53 BSS138W-7-F_SOT323-3~D
DPI_G0 (4) D25 GND 29
DPI_G1 (4) GND
DPI_G2 (4) LVDS83A_SHDTN 32 33
DPIDE 30 SHTDN# PLLGND 35
DPI_G3 (4) D26 PLLGND
25 36
DPI_G4 (4) TP1367 PAD @ D23 LVDSGND
DPI_G5 (4) DPICK 2 1 DPICK_R 31 43
LVDS83A_CLKSEL 17 CLKIN LVDSGND 49
DPI_G6 (4) CLKSEL LVDSGND
DPI_G7 (4) 0_0402_5% R1686 LCM_PWM4 2 1 LCM_BLU_PWM
0_0402_5% R1683
SN75LVDS83BDGGR_TSSOP56

1 : Rising edge
0 : Falling edge

VDD18_6575 VDD33_6575

VDD18_6575
LVDS83A_VCC LVDS83A_PLLVCC
LVDS83A_IOVCC 2 1
1 1 1 1 0_0402_5% R416
2

C536 C535 C533 C532 LVDS83A_VCC 2 1

0_0402_5% R409 10K_0402_1%
0.01U_0402_25V7K 0.1U_0402_25V4Z 0.01U_0402_25V7K 0.1U_0402_25V4Z LVDS83A_LVDSVCC 2 1
A 2 2 2 2 0_0402_5% R412 R1642 A
LVDS83A_PLLVCC 2 1
1

0_0402_5% R413
LVDS83A_CLKSEL
2

LVDS83A_IOVCC
LVDS83A_LVDSVCC R1641
1 1 1 2 0_0402_5%
C539 C538 C541 0.1U_0402_25V4Z
@
1

0.01U_0402_25V7K 0.1U_0402_25V4Z 0.1U_0402_25V4Z C537 LVDS83A_CLKSEL R410

2 2 2 1 LVDS83A_SHDTN 1 2 LVDS_SHUTDOWN_N
(4) Security Classification Compal Secret Data Compal Electronics, Inc.
2

R1643 0_0402_5% 2012/11/03 2013/11/03 Title

4.7K_0402_5%
Issued Date Deciphered Date LCD
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1

C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Tuesday, December 18, 2012 Sheet 7 of 23
5 4 3 2 1
 5 4 3 2 1

Earphone RECEIVER
EINT8_EARPHONE (4)
VDD18_6575
D D
close to IC close to connector

1
R454
1 1 470K_0402_5%
C419 C422

2
33P 50V J NPO 0402 R434 R432 33P 50V J NPO 0402
2 2 1 2 1 2 HP_MP3L
HPLP (21,5)

1 33_0402_5% 0_0603_5% 1
C420 C426 EMC@ FBMA-L11-160808-700LMT_2P AUDJACK_GND 1 2 R445 AUDJACK_GND_R
L1016 1 2 AUDJACK_L 0_0402_5%
R457
100P_0402_50V8J 100P_0402_50V8J EMC@ FBMA-L11-160808-700LMT_2P
2 R436 R435 2 1 2 EMC@ L1017 1 2 ADDJACK_DET_R
2 1 2 1 HP_MP3R 47K +-5% 0402 L1018 1 2 FBMA-L11-160808-700LMT_2P AUDJACK_R
HPRP (21,5)
1 1 L1019 1 2 FBMA-L11-160808-700LMT_2P AUDJACK_MIC
33_0402_5% 0_0603_5% EMC@
C421 C423
33P 50V J NPO 0402 33P 50V J NPO 0402
2 2
Microphone: 6k~13k Ohm
1000P_0402_50V7K 1 2 C646 EMC@
TV: 75 Ohm
(8) HP_MIC 1000P_0402_50V7K 1 2 C647 EMC@

1000P_0402_50V7K 1 2 C649 EMC@

C C

AUDIO Jack

2
L1020
FBMA-L11-160808-700LMT_2P
EMC@

1
JP27
AUDJACK_MIC 1
AUDJACK_GND_R 4
AUDJACK_L 2
Single via to GND plane
AUDJACK_R 3

ADDJACK_DET_R 5

PROCO_879B-N004-00A0
CONN@

2
@ @
D408 R1660 R1678
EMC@ 0_0402_5% 0_0402_5% D407
EMC@
TVNST52302AB0 SOT523

1
TVNST52302AB0 SOT523

1
Earphone MICPHONE
B B

(5) EARBIAS

C418
1 2
2

33P 50V J NPO 0402

Close to BB Close to MIC 1K_0402_1% GND of C454(10uF) and headset

R408
should tie together and single
1

C415
1 2 AU_VIN1_N1 1
C454
2
via to GND plane
MICN1 (5)
10U_0603_6.3V6M
2

1U 6.3V K X5R 0402 1

C409
Close to CON401
1.5K_0402_1%
R411
1 33P 50V J NPO 0402 2
C402 2 1 R447
ACCDET (5)
1

1K_0402_1%
100P_0402_50V8J 1
2 2 1 R446
ADC1_ACCESSORY (5) HP_MIC (8)
C416 0_0402_5% @
33P 50V J NPO 0402 tie together and single via to GND plane 1
C417 2 C441 @
1 2 HP_MIC
MICP1 (5) HP_MIC (8)
0.1U_0402_25V4Z
A 1U 6.3V K X5R 0402 2 A

releate to MIC Detect

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Audio,I/O
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 8 of 23
5 4 3 2 1
 5 4 3 2 1

2
U1003 JP2 EMC@ EMC@
JP1 EMC@ EMC@ EMC@ 2 R1019 U1004 EMC@

GND
2 R1018 C1024 GND1 1 50 Ohm 1 2 50 Ohm C1035 1 2 50 Ohm 4 1 GPS_RF
GND1 1 50 Ohm 1 2 50 Ohm C1028 1 2 50 Ohm 3 1 50 Ohm 1 2 50 Ohm WIFI_BT_ANT 3 SIG 0_0402_5% Output Input
3 SIG OUT IN GND2 18P_0402_50V8J
GND2 1 1
1 0_0402_5% 1 18P_0402_50V8J RFBPF2012080AM0T62_3P 18P_0402_50V8J C1032 C1034
C1027 C1026 EMC@ IPEX_20279-001E-01 @ @
D D
IPEX_20279-001E-01 @ @ CONN@ 0.1U_0402_10V7K 0.1U_0402_10V7K

GND
GND
GND
0.1U_0402_10V7K 0.1U_0402_10V7K 2 2
CONN@
2 2

5
3
2
SAFEB1G57KB0F00R14_5

U1001

PK29S004M00
AW-NH520(MT6228)
0_0402_5%
1 R1017 2
MT6620_SDIO1 MT6620_2V8
@

R1058 MT6620_EEDI
MT6620_2V8 1 2 (21,4,9)
MT6620_1V8 RTCCLK_6620
0_0402_5% 2
0.1U_0402_10V7K RTCCLK_O
@ PAD TP1308
C1005 OSC_IN_6620
2 1
0.1U_0402_10V7K
@ SYNC -----> BPI_BUS8
C1025

60
59
58
57
56
52
28

15

40

34

33

35
U1001

6
5
VBAT 1
change to SH00000RT00

DVDDIO_SD1

ANTSEL3
ANTSEL2
GND
GND
GND
GND
GND
GND
GND

EEDI

OSC_IN
RTCCLK_O
RTCCLK
R1001
EMC@ PMU_EN_6620 4
1 2 VBAT_6620 14 PMU_EN
0_0603_5% 1 2 LXB_6620 11 VBAT 1 SYSRST_B_6620
L1001 2.2UH_LQM2HPN2R2MJ0L_1A_20% LXB SYSRST_B
2 2
C1001 C1002 12 3
BUCKOUT OSC_EN OSC_EN_6620 (4)
C 8 C
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K WF_PA_LDOOUT 42
1 1 GPS_SYNC GPS_SYNC_6620(4,9)
7
9 WF_PA_VDD R1015 TLDO
13 DVDDIO18 54 1 2
GND_SMPS FSOURCE 1
0_0402_5% C1037
TLDO 36
TCXO_LDO
AW-NH520 @ PAD TP1311

2
41 MT6620 module 2 .033U 16V K X7R 0402 @ C1038
DVDDIO28 BGF_INT_B BGF_INT_B_6620 (4) 2
2 2 2 32 10 33P_0402_50V8J
VRTC_6620 VRTC WIFI_INT_B WiFi_INT_B_6620 (4)
C1006 C1003 C1004 C1010 2 1 55 ALL_INT_B
@ PAD TP1312 L1007

1
ALL_INT_B

4
1U_0402_6.3V6K C1036 U1006 C1039
4.7U_0603_6.3V6K

0.1U_0402_10V7K

C1008 1U_0402_6.3V6K 20 39 50 Ohm 1R1052 2 EMC@ 1 2 6 3 1 2 2 1 GPS_RF

Vcc
1 1 1 SD1_DAT1_6620 (9) SD1_DAT1 GPS_ANT_P RF_OUT RF_IN GPS_RF
U1002 R1003 SD1_DAT2_6620 (9) 17 6.8NH +-5% LQG15HS6N8J02D 0402 33P_0402_50V8J 6.8NH +-5% LQG15HS6N8J02D 0402
OSC_IN_6620 2 1 3 4 1 2 21 SD1_DAT2 50 EMC@ 5 EMC@ 470P 50V J NPO 0402
OUT Vdd SD1_DAT3_6620 (9) SD1_DAT3 PCM1SYNC PCM1SYNC_6620 (4,9) ENABLE
0_0402_5% 19 49 EMC@
SD1_CMD_6620 (9) SD1_CMD PCM1IN PCM1IN_6620 (4,9)
1000P_0402_50V7K R1008 1 2 18 48 Add offpage.1102.
2 Close to MT6620

GND

GND
SD1_CLK_6620 (4,9) SD1_CLK PCM1OUT PCM1OUT_6620 (4,9)

1
I2S_DATA_OUT
0_0402_5% 16 47

FM_AUOUT_R

6.8NH +-5% LQG15HS6N8J02D 0402

FM_AUOUT_L
SD1_DAT0_6620 (9) SD1_DAT0 PCM1CLK PCM1CLK_6620 (4,9)

I2S_DATA_IN
FM_TX_OUT
2 1 C1007 @

FM_AUIN_R
FM_AUIN_L
GND N.C. TP1309 PAD @
23 38 L1008 BGU7005_XSON6_1P45X1

FM_RX_N
FM_RX_P
WiFi_ANT
1U_0402_6.3V6K UART1_URXD_6620 (4,9)

1
1 UART1_URXD RF_I_CAL

I2S_CLK
BT_ANT
26MHZ_10PF_TG-5035CJ-12N 22 37 EMC@

I2S_WS
UART1_UTXD_6620 (4,9) UART1_UTXD AUX_REF
TP1310 PAD @
change to SJ000004W00

2
AW-NH520

53
51

29
30
31

27
26
24
25

43
46
44
45
AWAVE_AW-NH520_60P 1 2 6620_LNA_EN (4)
R1011 0_0402_5%

WIFI_BT_ANT
Compal footptint Close to U1007
WIFI_BT_ANT
IF GPS have to pass AGPS IOT, recommend to
reserve an external GPS LNA between U1007
pin3 and U1001 pin39

B B

SYSRST_B_6620 R1033 1 2 0_0402_5%

(4)
DAIRST
PMU_EN_6620 R1028 1 2 0_0402_5%
(4)
GPIO12_6620_PWR_EN

VRTC_6620 R1030 1 2 0_0402_5% VRTC XTEST EEDI ANTSEL_3

2.8V TCXO or OSC 0 0 0 Default
RTCCLK_6620 (21,4,9) RTC_GPIO_2V8 (21,4) clock setting 1.8V TCXO or OSC 0 1 0
XTAL 0 0 1
@ PAD TP1305 1 external clock mode 0 1 1
2 R1021
SD1_CMD_6620 (9) MC3CMD (4) PCM1CLK_6620 (4,9) DAICLK (4)
0_0402_5%
@ PAD TP1306
1 2 R1020
SD1_DAT3_6620 (9) MC3DA3 (4) PCM1SYNC_6620 (4,9) DAISYNC (4)
@ PAD TP1307
0_0402_5%
R1055 XTEST ANTSEL_2 ANTSEL_1
SD1_DAT2_6620 (9) 1 2 R1016 MC3DA2 (4) PCM1OUT_6620 (4,9) (4)
DAIPCMIN 1 2
@ PAD TP1303
0_0402_5% VDD28_6575 MT6620_2V8 WIFI :SDIO1 0 0 0 Default
SD1_DAT1_6620 (9) 1 2 R1014 MC3DA1 (4) PCM1IN_6620 (4,9) (4) WIFI host
DAIPCMOUT
1

@ PAD
0_0402_5%
TP1304 1
0_0402_5%
interface WIFI :SDIO2 0 0 1
2 R1022 C1031
SD1_DAT0_6620 (9) MC3DA0 (4)
0_0402_5% WIFI :SPI 0 1 0
2

SD1_CLK_6620 (4,9) MC3CLK (4) 2.2U_0603_10V6K

WIFI :reserved 0 1 1
R1056
A VDD18_6575 1 2 MT6620_1V8 A
XTEST ANTSEL_0
1

0_0402_5% BT/common host

UART1_URXD_6620 (4,9) UTXD3 (4) C1030
interface UART1 0 0 Default
2

UART1_UTXD_6620 (4,9) URXD3 (4) GPS_SYNC_6620 (4,9) BPI_GPS (4) 2.2U_0603_10V6K SDIO2 0 1

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date BT, FM, GPS, WiFi (MT6628)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 9 of 23
5 4 3 2 1
 5 4 3 2 1

Sub Camera
EMI815 EMI816
1 8 SUB_PCLK 1 8
CMPCLK (4) SDA1 (4) SENSOR_SDA (10)
CMDAT6 2 (4)7 SUB_DAT6 SCL1 2 (4) 7 SENSOR_SCL (10)
3 6 3 6
CMDAT2 (4) SUB_DAT2 CMVREF (4) SUB_VREF (10)
CMDAT5 4 (4)5 SUB_DAT5 CMHREF 4 (4) 5 SUB_HREF (10)
0 +-5% 8P4R 0804 0 +-5% 8P4R 0804
EMC@ EMC@

D D

EMI817 EMI818
1 8 1 8 SUB_DAT9
CMDAT3 (4) SUB_DAT3 CMDAT9 (4)
CMDAT4 2 (4) 7 SUB_DAT4 CMMCLK 2 (4)7 SENSOR_MCLK
3 6 3 6 SUB_DAT8
CMDAT8 (4)
4 5 4 5
CMDAT7 (4) SUB_DAT7
0 +-5% 8P4R 0804 0 +-5% 8P4R 0804
EMC@ EMC@

R833
2V8 VCAMA_PMU 2 1 AVDD2.8V_CAM

0_0402_5% @
2

2
0.1U_0402_16V4Z
C837
2.2U_0603_10V6K C836
1

1
C C
R832
1V8 VCAM_IOPMU 1 2 DOVDD1.8V_CAM

0_0402_5% @
2

2 0.1U_0402_16V4Z
C830
2.2U_0603_10V6K C844
1

Acer reserve

@
2
C540 0.3M connector
B B
1 22P_0402_50V8J JP18

29 30 DOVDD1.8V_CAM
SENSOR_MCLK 27 29 30 28 DOVDD1.8V_CAM
25 27 28 26 AVDD2.8V_CAM
23 25 26 24 AVDD2.8V_CAM
SENSOR_SCL (10) 23 24
SUB_DAT9 21 22
SUB_DAT8 19 21 22 20
19 20 SENSOR_SDA (10)
SUB_DAT3 17 18
17 18 SUB_HREF (10)
SUB_DAT7 15 16
SUB_DAT6 13 15 16 14
SUB_DAT5 11 13 14 12
SUB_DAT4 9 11 12 10
EMC@ SUB_DAT2 7 9 10 8
R1674 5 7 8 6
5 6 SUB_VREF (10)
SUB_PCLK 2 1 SUB_PCLK_R 3 4
1 3 4 2
1 2 CMPDN (4)
20_0402_5%
CONN@

2
EMC@
C1654
22P_0402_50V8J
1

EMI

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Camera
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 10 of 23
5 4 3 2 1
 5 4 3 2 1

SD CARD
MSDC1
D D

USB OTG Power

C C

Common Debug USB HS IF

JP28
If mini-A connector insert => CID < 0V => Low
If mini-B connector insert => CID > 1.2V => High
@
(15,21) 2 1 R471 1 2 0_0402_5% IDPULLUP pin is replaced by 1.2V power source.
PWRKEY 1 2 4 3 VBAT
SYSRST_B (15,21,4)
R472 0_0402_5% 6 5 URXD1_DEBUG
KCOL0 (15,21,4)
@ (15,21,4) 8 7 UTXD1_DEBUG
KROW0 10 9 URXD2_DEBUG
12 11 UTXD2_DEBUG
14 13
16 15
18 17 (4)
20 19 MCU_JRTCK
MCU_JTDO (4)
SWCLK 22(4) 21 (4)
24 23 MCU_JTMS
SWDIO (4) MCU_JTDI (4)
B 26 25 B
URXD4 (21,4) MCU_JTRST_B (4)
UTXD4 (21,4) 28 27 (4)
30 29 MCU_JTCK
32 31
34 33
36 35
@ 38 37
UTXD1_DEBUG R473 1 2 0_0402_5%
UTXD1 (21,4)
40 39
URXD1_DEBUG R474 1 2 0_0402_5% URXD1 (21,4)
@ CONN@
41
42
43
44

AXT440124
CON20X2_SMD_M_AXT440124
@
UTXD2_DEBUG R477 1 2 0_0402_5%
UTXD2 (4)
URXD2_DEBUG R478 1 2 0_0402_5%
URXD2 (4)
@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date SD Card,Debug,USB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 11 of 23
5 4 3 2 1
 5 4 3 2 1

Gyro Sensor

@
D VDD18_6575 R1633 1 2 0_0402_5% D
VDD28_6575
1
@
C1609

1
@ @ 0.1U_0402_10V6K
R1635 R1634 2
4.7K_0402_5% 4.7K_0402_5% @
U1605
1 13

2
SDA0_GYRO (17) 6 CLKIN VDD @
SDA0_GYRO IME_DA
SCL0_GYRO (17) 7 10 C1608 1 2 0.1U_0402_10V6K
SCL0_GYRO 2 IME_CL REGOUT
VDD18_6575 @ 1 R1632 8 11
0_0402_5% 9 VLOGIC FSYNC 12
AD0 INT EINT1_GY (4)
20 1 2 @
CPOUT 22 C1610 2200P_0402_25V7K
1 CLKOUT
C1607
@ 2
Sync to Camera key
0.01U_0402_25V7K 3 NC 23
2 NC SCL SCL0 (14,17,20,4)
4 24 (14,17,20,4)
5 NC SDA SDA0
14 NC 18
15 NC GND
16 NC 19
17 NC RESV 21
C NC RESV C

MPU-3050_QFN24_4X4

I2C Address: 0x68 (Write:0xD0, Read:0xD1)

G Sensor
VDD28_6575

2
C1662
B 1U_0402_6.3V6K B
C1663

1
0.1U_0402_10V6K U1617
1 2 14
VDD 11 1 2
INT EINT3_G
1 R1691 0_0402_5%
VDD18_6575 VDD_IO 9
2 1 6 RES
(12,14,20,4) SDA0 SDA
0_0402_5% R1692
2 1 4
(12,14,20,4) SCL0 SCL
0_0402_5% R1693 7
NC
2
3 RES
8 DNC 5
VDD18_6575 RES GND
13 10
15 RES RES 12
16 NC GND
RES
KXTIK-1004_LGA16_3X3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date GYRO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Monday, January 07, 2013 Sheet 12 of 23
5 4 3 2 1
 5 4 3 2 1

169 ball eMMC R540

VMC_6575 VDD28_6575

1 2
0_0402_5%
R539 @
1 2

C509 0.1U_0402_16V7K 0_0402_5%

1 2
U502
D D
MC0DA0 H3 M6 eMMC_VCC 2 1
MC0DA1 H4 DAT0 VCC N5
MC0DA2 H5 DAT1 VCC T10 C506 4.7U_0603_6.3V6K
DAT2 VCC @
MC0DA3 J2 U9
MC0DA4 J3 DAT3 VCC VDD18_6575
MC0DA5 J4 DAT4 K6
Close to MC0DA6
MC0DA7
J5
J6
DAT5
DAT6
VCCQ
VCCQ
W4
Y4
R538
Memory EMMC_VDDI K2
DAT7 VCCQ
VCCQ
AA3
AA5 eMMC_VCCQ 1 2
VDDI VCCQ 0_0402_5%
K4 W5 MC0CM0 1 2
Y2 VSSQ CMD W6 MC0CK_EMMC 0.1U_0402_16V7K
Y5 VSSQ CLK C507
AA4 VSSQ U5 MC0RSTB C510
VSSQ RST# / NC 4.7U_0603_6.3V6K
AA6 L4 2 1
VSSQ A1 INDEX / NC @

1 M7 K7
C504 P5 VSS NC K8
R10 VSS NC K9
1U_0402_6.3V6K U8 VSS NC K10
2 VSS NC K11
A4 NC K12 U502
A6 NC NC K13
A9 NC NC K14
SS8GB@
A11 NC NC L1
B2 NC
NC
NC
NC
L2 SA00005KM10
B13 L3 KLM8G2FE3B-B001
D1 NC NC L12
D14 NC NC L13
H1 NC NC L14
H2 NC NC M1
H8 NC NC M2
H9 NC NC M3
H10 NC NC M12
H11 NC NC M13
H12 NC NC M14
H13 NC NC N1 U502
C C
H14 NC NC N2
J1 NC NC N3
SD8GB@
J7 NC NC N12
J8 NC
NC
NC
NC
N13 SA00005MV10
J9 N14 SDIN5D1-8G-L
J10 NC NC P1
J11 NC NC P2 MC0DA7
NC NC MC0DA7 (4)
J12 P12 MC0DA6
NC NC MC0DA6 (4)
J13 P13 MC0DA5
NC NC MC0DA5 (4)
J14 P14 MC0DA4 MC0DA4 (4)
K1 NC NC T1 MC0DA3
NC NC MC0DA3 (4)
K3 T2 MC0DA2 MC0DA2 (4)
R1 NC NC T3 MC0DA1
NC NC MC0DA1 (4)
R2 T12 MC0DA0
NC NC MC0DA0 (4)
R3 T13 MC0CK_EMMC 1 2 MC0CK MC0CK (4)
R12 NC NC T14 R541 0_0402_5% MC0CM0
NC NC MC0CM0 (4)
R13 V1 MC0RSTB MC0RSTB (4)
R14 NC NC V2
U1 NC NC V3
NC NC @ PAD TP37
U2 V12
U3 NC NC V13
U12 NC NC V14
U13 NC NC Y1
U14 NC NC Y3
W1 NC NC Y6
W2 NC NC Y7 R522 10K_0402_1%
W3 NC NC Y8 MC0CM0 1 2 eMMC_VCCQ
W7 NC NC Y9
W8 NC NC Y10 MC0DA0 R514 1 2 47.5K_0402_1%
W9 NC NC Y11 MC0DA1 R515 1 2 47.5K_0402_1%
W10 NC NC Y12 MC0DA2 R516 1 2 47.5K_0402_1%
W11 NC NC Y13 MC0DA3 R517 1 2 47.5K_0402_1%
W12 NC NC Y14 MC0DA4 R518 1 2 47.5K_0402_1%
W13 NC NC AE1 MC0DA5 R519 1 2 47.5K_0402_1%
W14 NC NC AG2 MC0DA6 R520 1 2 47.5K_0402_1%
AA1 NC NC AH4 MC0DA7 R521 1 2 47.5K_0402_1%
AA2 NC NC AH6
B
AA8 NC NC AH9 B
AA9 NC NC AH11
AA11 NC NC AG13
AA12 NC NC AE14
AA13 NC NC
AA14

AA7
NC
NC
RFU
H6
H7
SCREW HOLE
AA10 RFU RFU K5
U10 RFU RFU M5
U7 RFU RFU M8
U6 RFU RFU M9
T5 RFU RFU M10
R5 RFU RFU N10
P10 RFU RFU P3 H1 H2 H3 H4 H5
RFU RFU HOLEA HOLEA HOLEA HOLEA HOLEA CLIP1 CLIP2 CLIP3 CLIP4
169 ball eMMC EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P

SDIN4E2-16G-T_TFBGA_169P
1

1
Compal
@ footptint

CLIP5 CLIP6 CLIP7 CLIP8

EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P

1
FD1 FD2 FD3 FD4
1 1 1 1

S2 S3 S4
TP @ TP @ TP @
A A
H6 H7
H_1P8N H_2P1X1P5N

1
1

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date eMMC, SCREW HOLE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 13 of 23
5 4 3 2 1
 5 4 3 2 1

VGP2
AVDD28_GT927 AVDD18 U4
R1673

DVDD12
1 2

0_0402_5% 1
SA00006GS00

1
GT927 QFN 68P TOUCH
C1628 C78

1
2.2U_0603_10V6K 0.1U_0402_10V7K C1629 C1630

DRV0
DRV1
DRV2
DRV3
DRV4
DRV5
DRV6
DRV7
DRV8
2
2 2.2U_0603_10V6K 2.2U_0603_10V6K VDDIO
D D

2
@
JP26

69

68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
U4 1
DRV30 2 1

NC
NC
NC
NC
NC
NC
NC
AGND
EP

DRV0
DRV1
DRV2
DRV3
DRV4
DRV5
DRV6
DRV7
DRV8
DRV29 3 2
1 3
C1660 DRV28 4
DRV27 5 4
VDDIO SENS0 1 51 0.1U_0402_10V7K DRV26 6 5
VDD18_6575 @ SENS1 2 SENS0 DRV9 50 DRV10 2 DRV25 7 6
R400 SENS2 3 SENS1 DRV10 49 DRV11 DRV24 8 7
1 2 SENS3 4 SENS2 DRV11 48 DRV12 DRV23 9 8
0_0402_5% SENS4 5 SENS3 DRV12 47 DRV13 DRV22 10 9
SENS5 6 SENS4 DRV13 46 DRV14 DRV21 11 10
SENS6 7 SENS5 DRV14 45 DRV15 DRV20 12 11
1 SENS6 DRV15 12
1

C1631 C79 SENS7 8 GT927 44 DRV16 DRV19 13

2.2U_0603_10V6K SENS8 9 SENS7 DRV16 43 DRV17 DRV18 14 13
0.1U_0402_10V7K SENS9 10 SENS8 DRV17 42 DRV18 DRV17 15 14
2

2 SENS10 11 SENS9 DRV18 41 DRV19 DRV16 16 15

SENS11 12 SENS10 DRV19 40 DRV20 DRV15 17 16
SENS12 13 SENS11 DRV20 39 DRV21 DRV14 18 17
SENS13 14 SENS12 DRV21 38 DRV22 DRV13 19 18
SENS14 15 SENS13 DRV22 37 DRV23 DRV12 20 19
C SENS14 DRV23 20 C
SENS15 16 36 DRV24 DRV11 21
SENS15 DRV24 21

Sensor_OPT1
Sensor_OPT2
SENS16 17 35 DRV25 DRV10 22
SENS16 DRV25 DRV8 23 22
23

I2C_SDA
I2C_SCL
DVDD12
AVDD28
AVDD18
DRV7 24

DRV30
DRV29
DRV28
DRV27
DRV26
VDDIO
24

DGND
25

RSTB
DRV6
25

INT
DRV5 26

NC
DRV4 27 26
DRV3 28 27
Compal footptint

18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
DRV2 29 28
DRV1 30 29

CTP_RST
30

I2C_SDA
CTP_INT
DRV0 31

I2C_SCL
DVDD12
AVDD18
R1650 31

DRV30
DRV29
DRV28
DRV27
DRV26
VDDIO
32

OPT1
OPT2
0_0402_5% 1 2 I2C_SCL SENS16 33 32
SCL0 (12,17,20,4) 33
0_0402_5% 1 2 I2C_SDA SENS15 34
SDA0 (12,17,20,4) 34
SENS14 35
R1651 SENS13 36 35
SENS12 37 36
AVDD28_GT927 SENS11 38 37
SENS10 39 38
SENS9 40 39
SENS8 41 40
SENS7 42 41
SENS6 43 42
VDDIO SENS5 44 43
B B
SENS4 45 44
SENS3 46 45
SENS2 47 46
47
2

@ 1 R1658 2 SENS1 48
SENSOR_ID (14) 48
R1655 0_0402_5% SENS0 49
10K_0402_5% 50 49
SENSOR_ID (14) 50
VDDIO @1 R1647 2 OPT1
0_0402_5% 51
1

R1656 52 GND1
1 2 CTP_RST @1 R1646 2 GND2
GPIO86_CTP_RST (4)
0_0402_5% STARC_089B50-012000-G2-R
0_0402_5% 1
CONN@
C77 Add TP CONN.1102.
0.01U_0402_16V7K
2 0_0402_5%
1 2 OPT2
R1649
R1657
1 2 CTP_INT 1 2
(4) EINT6_C
R1654
0_0402_5% @
300K_0402_1%
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Touch Panel
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 14 of 23
5 4 3 2 1
 5 4 3 2 1

D D
Power-on Button
MTK comment don't pull up R on PWRKEY.1101.
Compal GND MTK GND
SW1
1
2 VDD18_6575
PWRKEY (11,21)
3

4 G
G

2
RESET

5
SYSRST_B R1659
10K_0402_5%

2
NTC313-BA1G-A160T_3P

1
SW2
1 D403
C1632 1 2
SYSRST_B (11,21,4)
EMC@
1U_0402_10V6K 3 4 1

1
2 TVNST52302AB0 SOT523 C1633

5
NTC316-DA1J-A220T_4P 1U_0402_10V6K
2
C C

Volume Up Volume Down

(Download Key)
B B
SW3
1 SW4
KCOL0 (11,21,4)
2 (11,15,21,4) 1 (4)
3 KROW0 KCOL1 2
KROW0 (11,15,21,4)
3
4 G
G

NTC313-BA1G-A160T_3P NTC313-BA1G-A160T_3P

4 G
G
5

2
D404
EMC@ D405
TVNST52302AB0 SOT523 EMC@
TVNST52302AB0 SOT523
1

1
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Button
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 15 of 23
5 4 3 2 1
 5 4 3 2 1

MIC
R414
D
VMIC 1 2 Compal GND MTK GND D
1K_0402_1%

1
1 JP19
R417 C455 4
1.5K_0402_1% 10U_0603_6.3V6M 3 G2
G1
2 R1671

2
MICP0 1 2 C424 1 2 MICP0_R 2
(5) MICP0 2
1U 6.3V K X5R 0402 0_0402_5% 2 MICN0_R 1
C428 1
ACES_88266-02001
R1672 100P_0402_50V8J CONN@

3
MICN0 1 2 C425 1 2 1
(5) MICN0 1U 6.3V K X5R 0402 0_0402_5% D406

1
R418 2 1 EMC@
1.5K_0402_1% 33P 50V J NPO 0402 C433
EMC@ EMC@ TVNST52302AB0 SOT523
R419

1
C434 33P 50V J NPO 0402

2
1 2 1 2

1K_0402_1%

C C

Modify MIC CONN SCH.1102.

SPAKER

Confirm L17/L18 add or not?.1101.

B B

JP20 EMC@
1 SPK_N L1015 1 2 FBMA-L11-160808-700LMT_2P
1 2 SPK2_N_CON
SPK_P L1014 1 2 FBMA-L11-160808-700LMT_2P
2 SPK2_P_CON
EMC@

3
G1 4
G2
ACES_88266-02001
CONN@
1 1
EMC@ EMC@
C253 C254
33P 50V J NPO 0402 33P 50V J NPO 0402
2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Connector(MIC/SPK)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 16 of 23
5 4 3 2 1
 5 4 3 2 1

D
G-sensor Compal GND MTK GND
D

VDD18_6575
VDD28_6575
U1616 @

1 10
NC NC @
2 9 C1635 1 2 0.1U_0402_10V6K
TEST DVDD
@ 2.2U_0603_10V6K 2 1C1655 3 8
AVDD GND
@ 0.1U_0402_10V6K 2 1C1634 4 7 R1663 1 @ 2 0_0402_5% SDA0_GYRO
(12)
VPP SDA SDA0_GYRO
2 1 G_INT 5 6 R1664 1 @ 2 0_0402_5% SCL0_GYRO
EINT3_G (4) INTN SCK SCL0_GYRO (12)
0_0402_5% @ R1665

MC3210_VDFN10_3X3
R1662 1 @ 2 0_0402_5%
SDA0 (12,14,20,4)

R1661 1 @ 2 0_0402_5%
SCL0 (12,14,20,4)

C C

VSD
VMCH VSD

SD card 1
R1410
2
C1636

1 2
0_0603_5%
B 2.2U_0402_6.3V6M B

JP22
EMC@ 10
R1666 9 DET TERM (GND)
(4) MC0INS SWITCH TERM CD
1 2 SD_CLK 8
(4) MC1CK_R (4) MC1DA1 DAT1
7
(4) MC1DA0 DAT0
20_0402_5% 6 11
SD_CLK 5 VSS G1 12
2 CLK G2
EMC@ 4 13
C1637 3 VDD G3 14
(4) MC1CMD CMD G4
10P 50V J NPO 0402 2 15
1 (4) MC1DA3 CD/DAT3 G5
1
(4) MC1DA2 DAT2

PROCO_879S-N010-03A0
CONN@

EMI SW:
H: Card remove
L: Card insert

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03
Issued Date Deciphered Date Title
Connector-2(SD card/G-se)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Friday, December 28, 2012 Sheet 17 of 23
5 4 3 2 1
 5 4 3 2 1

If mini-A connector insert => CID < 0V => Low

Micro-USB If mini-B connector insert => CID > 1.2V => High
IDPULLUP pin is replaced by 1.2V power source.
D VBUS D

JP23 Compal GND MTK GND

EMC@ 1
L16 VBUS
4 (4) 3 USB_DM_R 2 6
USB_DM USB- GND 7
USB_DP_R 3 GND 8
1 2 USB+ GND 9
USB_DP (4) GND
4
USB_ID (4) ID
OCE2012120YZF_4P
5
GND
ACON_MUE41-531200

3
CONN@
EMC@ D409
1
TVNST52302AB0 SOT523
C1638

1
2 1U_0402_6.3V6K

C C

Vibrator
B B
R1684
2 1
VIBR_PMU_OUT
0_0402_5% 2
C1661

1U 6.3V K X5R 0402

1 JP29
1
2 1
3 2
4 3
5 4
6 G1
G2
ACES_50504-0040N-001

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Connector-3(USB/Vibrator)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, November 28, 2012 Sheet 18 of 23
5 4 3 2 1
 5 4 3 2 1

RF Antenna change to use MTK Compal GND MTK GND

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03
Issued Date Deciphered Date Title
RF Antenna
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, January 02, 2013 Sheet 19 of 23
5 4 3 2 1
 5 4 3 2 1

Charger
OVP: 12V
VBUS
VBUS
PL3 U7 L6
2.2UH_PH041H-2R2MS_3A_20% R320
HCB2012KF-221T30_2P R308
1 2 VIN A1 C1 1 2 4 1
IN SW VBAT 330K_0402_1%
PCH_LED PCH_LED
A2 C2 3 2 1 2 VCDT
21 rating: 1.268V
IN SW 25V rating VCDT
10P_0402_50V8J

100P_0402_50V8J
1

1U_0603_25V6K
0.068_1206_1%

1
D D
PC18

PC19

1 2

C336
4.7U_0603_6.3V6K
@
R311
2

1
B1 E1 1 2 D

2
CAP CBOOT
C49

39K_0402_1% 2
B2 C76
80mil R307 G
2

CAP

4.7U_0603_6.3V6K
3.3K_0402_1% S U303

3
C50 .01U_0402_16V7K SSM3K7002FU_SC70-3
C51 2 1 CHR_LDO 21
2 2.2U_0603_6.3V6K

1 2 E3 D3 PCH_DET
CORE SENSP PCH_DET 21
D4
SENSN
@ R35 0_0402_5% NCP_CORE @
VIN 2 1 NCP_TRANS E2 E4 1 2
TRANS WEAK NC31 0_0402_5% VBAT_SUPPLY

1 VBAT_SUPPLY @
2 5 ISENSE_R 1 2 ISENSE 21
1 2 D5 @ 1 2 FET_CTRL 3 4mil R469 0_0402_5%
NCP_ILIM1 C4 FET 0_0402_5% R484
ILIM1 U9
C14 VBAT
NCP_ILIM2 B4
.1U_0402_16V7K ILIM2

4
E5 @ 1 2VBAT_SUPPLY SIS407DN-T1-GE3_PAK1212-8-5
2 1 NCP_OTG B3 BAT 0_0402_5% R483 @
GPIO_USB_DRVVBUS 4 OTG BATSNS_R 4mil 1 2
@ R34 0_0402_5% BATSNS 21
R470 0_0402_5%

R482 @
C5 1 2 BAT_NTC
NTC
0_0402_5%
@
R29
0_0402_5%
2 1 A5
SCL0 12,14,17,4 SCL

2
D1
PGND @
C 2 1 A4 C

VDD18_6575
SDA0
@
R30
12,14,17,4
0_0402_5% SDA
PGND
D2 0_0402_5%
R486
BATTERY CONNECTOR VBAT_SUPPLY
40mil
R39 R340

1
2 1 NCP_FLAG B5 C3 JP25 80mil
FLAG AGND 1K_0402_1%
1
10K_0402_1% @ R37 0_0402_5% A3 4 1 2 1 2
BAT_NTC 40mil
21
2 1 SPM 5 GND 2 3 BAT_ON
EINT4_CHARGER 4 GND 3 FGN 40mil 1 2
TREF 21
NCP1851FCCT1G_CSP25
2 1NCP_SPM_R R339
NCP_SPM 4

2
@ 0_0402_5% ACES_88231-03041_3P 24K_0402_1%
R40 D402
TVNST52302AB0 SOT523
Add BAT CONN.1102.
@ Rfg @

VDD18_6575 R366

1
4 1

3 2

1
Compal Part
NCP_CORE 100K_0402_1% 0.02_1206_1%
FGP_IC 21
PR29
FGN_IC 21

2
FGN_IC
2

@
100K_0402_1% R386 BAT_ID 4
1K_0402_1%
R385 JP30
1
1

NCP_ILIM1 1 2
VBAT_SUPPLY NCP_ILIM2 2 3
3 4
4
2

2
4.7U_0603_6.3V6K

@R377 5
GND1
1

1K_0402_1% 100K_0402_1% 6
GND2
C18

C17 R383
0.1U_0402_25V6
2

B B
1

DDR3 ILIM1 ILIM2 INPUT CURRENT LIMIT

0 0 100 mA
VBAT
R1644
U3

2
L7

1
1UH_1269AS-H-1R0M-P2_2.5A_20%

2 1
R395
2
DDR3VCCIO
0 1 Automatic Charge Current
@ 0_0402_5%
2 1 8 SW @ 0_0603_5%
PVIN
1 0 500 mA
1

2.2U_0603_6.3V6K 1 2 7 22P_0402_50V8J C258

AVIN 4 1 2 C1617
2

C1621 @ R1648 FB
2.2U_0603_6.3V6K
1 1 900 mA
2

@ 0_0402_5% 3 R78 270K_0402_1%

2

AGND
1

A 2 1 4 5 A
MEM_PWR_EN EN 1
0_0402_5% R1645
PGND
180K_0402_1%

R80

6
MODE 9
GND
2

TLV62065DSGR_WSON8_2X2

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Charger
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Wednesday, May 15, 2013 Sheet 20 of 23
5 4 3 2 1
 5 4 3 2 1

U331

PMIC L317 AUDIO SPK1_P

P13
P12

2.2U_0402_6.3V6M
1 2 P8 SPK1_N
VBAT @0_0603_5% VBAT_SPK1
VAPROC_PMU VAPROC_6575

1
P7 P10
VBAT_SPK2 SPK2_P SPK2_P_CON

C267
P11
SPK2_N VCORE_PMU VCORE_6575
SPK2_N_CON

2
C205
0.1U_0402_25V6 M13 VDD1V8_PMU VDD18_6575
1 2 VBI_P P5 NC N14
(5) HSP
1 2 VBI_N N5 VBI_P ISINK1 N13 VDD12_INT_PMU VM12_INT_6575
(5) HSN C202 0.1U_0402_25V6 VBI_N DRIVER ISINK2 N12
ISINK3 M10 ISINK4 VDD28_PMU VDD28_6575
ISINK4 N11 ISINK5
C2061 2 0.1U_0402_25V6 AUD1_P N3 ISINK5 K9
(5,8) HPLP
C2031 2 0.1U_0402_25V6 AUD1_N N4 AUD1_P BST_GDRV L14 VUSB_PMU VUSB_6575
AUD1_N KPLED L13
D C2041 2 0.1U_0402_25V6 AUD2_P P2 FLASH VSIM_PMU VSIM_6575 D
(5,8) HPRP AUD2_P
C2011 2 0.1U_0402_25V6 AUD2_N P3 N7
AUD2_N ASW_IN1 N8
PC20 VSIM2_PMU VSIM2_6575
ASW_IN2 PR28
C2691 2 1U_0402_6.3V6K BYPASS M5 N6
BYPASS ASW_OUT 1 2 1 2 VMC_PMU VMC_6575

4.7_0603_5% 680P_0402_50V7K
L311
VCDT N1 CHARGER BUCK OUTPUT F12
VCORE_SW 1 2 VCORE_PMU
(20) VCDT
CHR_LDO H5 VCDT VCORE F13 2.2UH_PHI25201B-2R2MS_20% VCORE_PMU
(20)CHR_LDO CHR_LDO VCORE

2
VDRV L1 E12
TP1389 H1 VDRV VCORE
(20) ISENSE ISENSE C316
BATSNS H2 ISENSE B12VCORE_FB
(20) BATSNS 4.7U_0603_6.3V6K

1
BATSNS VCORE_FB
1U_0402_6.3V6K

BATON K1
(20) BAT_ON BATON
TREF J3 L305
(20)TREF TREF
PCH_DET M2 C14
VAPROC_SW 1 2 VAPROC_PMU
1U_0402_6.3V6K PCH_DET PCH_DET VPROC VAPROC_PMU
1

1
C380

D13 2.2UH_PHI25201B-2R2MS_20%
(20) VPROC

2
C384 D14
VPROC 0_0402_5% @R321 C318
2

1 2 1 2 2 1 K3 E10VAPROC_FB_SEL 2 1 4.7U_0603_6.3V6K
(11,15,21,4) KROW0 VPROC_FB (5)

1
C383 L3 USB_DLN VPROC_FB
(11,15,21,4) KCOL0 USB_DLP
100P_0402_50V8J C382 C381 L312
100P_0402_50V8J 100P_0402_50V8J G12VDD18_SW 1 2
VIO18 VDD1V8_PMU

2
G13 2.2UH_PHI25201B-2R2MS_20%
CONTROL SIGNAL VIO18 C315
A2 A13 VDD18_FB 4.7U_0603_6.3V6K
(4) SRCLKENA

1
2 1 RESETB L2 SRCLKEN VIO18_FB
(11,15,4) SYSRST_B RESETB
2
@ 0_0402_5% 1 R314 PWRKEY_PMIC N2 J13 L313
(11,15,21) PWRKEY PWRKEY VPA
1K_0402_1% R304 K13 VPA 1 2 VPA_PMU
PMU_TESTMODE M4 VPA 4.7UH_VLS252012ET-4R7M_1.2A_20% VPA_PMU
M3 PMU_TESTMODE C12 VPA_FB 2.2U_0603_10V7K 1 2 C359
(4)BBWAKEUP PWRBB VPA_FB
TP1334 L309
RESET_PMIC B4 H12 VRF18_SW 1 2 VRF18_PMU
(4) WATCHDOG_RESET_B
AVDD18_DIG A4 SYSRSTB VRF18 2.2UH_PHI25201B-2R2MS_20% VRF18_PMU
FSOURCE

1
D12 VRF18_FB
D3 VRF18_FB 4.7U_0603_6.3V6K
(5) SCL_2 SCK
D2 C351
(5) SDA_2

2
B3 SDA
(4) PMU_INT INT A10
C C1 LDO OUTPUT VM12_1 C9 C
(5) PMUCTRL0 DVS1 VM12_2
C4 B10VDD12_INT_PMU
(5) PMUCTRL1 DVS2 VM12_INT E1 VRF_IC VDD12_INT_PMU
B2 VRF28 F5 VTCXO_IC TP1363
(5) PACTRL0
C3 PA_SEL0 VTCXO E3 VTCXO_PMU
(5) PACTRL1
B1 PA_SEL1 VA1 B9 VIO28_IC VDD25_VA1_6575
(5) PACTRL2 PA_SEL2 VIO28 A8 VSIM_PMU VDD28_PMU
A3 VSIM C8 VSIM2_IC VSIM_PMU
TP1356
E6 BL_PWM VSIM2 C10VMC_IC VSIM2_PMU
HOMEKEY VMC A11 VMC_PMU
VMCH B7 VMCH
VGP B11 VGP
VGP2 B8 VUSB_PMU VGP2
@ L315 0_0603_5% VBAT INPUT VUSB F2 VCAMA_IC VUSB_PMU
VBAT 1 2 VBAT_VCORE E13 VCAMA F3 VCAMA_S 1 2 VCAMA_PMU
VBAT E14 VBAT_VCORE VCAMA_S A7 C467 1U_0402_6.3V6K
VBAT_VCORE VCAM_AF B5 VCAMD_IC
22U_0603_6.3V6M

@ L319 0_0603_5% VCAMD A5 VCAM_IOPMU VCAMD_PMU

VCAM_IO VCAM_IOPMU
3

D304 1 2 VBAT_VAPROC A14 B6

VBAT_VPROC VIBR VIBR_PMU_OUT
1

B13 G3
VBAT_VPROC VA2 VDD25_VA2_6575
C463

B14 G5
C13 VBAT_VPROC VA2_S
2

@ L321 0_0603_5% VBAT_VPROC

1 2 VBAT_VIO18 G14 VRTC
1

TVNST52302AB0 SOT523 @ L318 0_0603_5% H14 VBAT_VIO18

1 2 VBAT_VPA J14 VBAT_VIO18 E7
K14 VBAT_VPA VRTC
L324 @ 0_0402_5% VBAT_VPA Function Symbol Vout (V) Iout (mA) External HW Control
1 2 VBAT_VRF18 H13
1 2 N9 VBAT_VRF18 J2 VPA 0.9 ~ 3.4 (100mV/step) 800 PA_SEL[2:0]

1U_0402_6.3V6K
@ R334 0_0402_5% VBAT_MISC
@ L320 VBAT_MISC VREF
VPROC 0.75 ~ 1.3 (25mV/step) 1800 SRCLKENA, DVS[2:1]

1
1 2
0_0603_5% VBAT_LDO2 C7

C457
E8 VBAT_LDO2
@ L323 0_0603_5% VBAT_LDO2 Buck VRF18 1.8 250 SRCLKENA

2
1 2 VBAT_LDO3 C5 K2
C6 VBAT_LDO3 GND_VREF VCORE 0.75 ~ 1.3 (25mV/step) 1300 SRCLKENA
L325 @ 0_0402_5% VBAT_LDO3
1 2 VBAT_LDO4 C11 VIO18 1.8 1000 N/A
VBAT_LDO4
1 2 VBAT_LDO5 D1 VRF 2.85 200 SRCLKENA
B @ L322 0_0603_5% E2 VBAT_LDO5 B
VBAT_LDO5 VTCXO 2.8 10 SRCLKENA
F6
VDD1V8_PMU Analog VCAMA 1.5/1.8/2.5/2.8 200 N/A
110U_0603_10V6M

110U_0603_10V6M

E9 AVDD18_IO
1U_0402_6.3V6K
1

AVDD18
C335 AVDD18_DIG E5
AVDD18_DIG LDO VA1 1.8/2.0/2.1/2.5 200 SRCLKENA
(20)
FGP_IC G1
2

CS+ VA2 2.5/2.8 100

1 C243

1 C244

1 C239

1 C462

1 C464

1 C465

1 C466

1 C275

1 C276

FGP_IC FGN_IC G2 GAS GAUGE

(20) FGN_IC CS-
K5
RTC_GPIO_2V8 32K_IN VM12_1 1.2 300
(4,9)
VM12_2 1.2 300
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

J5 BC 1.1
VM12_INT 1.2 100
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

(4) CHD_DP
C241 2

C235 2

1U_0402_6.3V6K2

1U_0402_6.3V6K2

1U_0402_6.3V6K2

CHG_DP
H3
(4) CHD_DM CHG_DM VRF28 2.85 200
L12 VIO28 2.8 100
MP Test Point
GND_DCDC

GND_DRV M12
F8 GND_DRV M11 VSIM1 1.8/3.0 100
(11,4) UTXD4 TP1338 GND_VPROC GND_ISINK
F9 K10
F10 GND_VPROC GND_ISINK M8 Digital VSIM2 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100
GND_VPROC GND_SPK1
(11,4) URXD4 TP1339
G8 GND_SPK1
M9
K7
LDO VUSB 3.3 100
G9 GND_VCORE GND_SPK2 M7
VBAT TP1315 G10 GND_VCORE GND_SPK2 VCAMD 1.3/1.5/1.8/2.5/2.8/3.0/3.3 300
H8 GND_VCORE
VBAT TP1316 GND_VCORE K6 VCAM_IO 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100
H9 GND_LDO M6
(11,15,21)
H10 GND_VIO18 GND_LDO G7 VCAM_AF 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200
TP1317 GND_VIO18 GND_LDO
PWRKEY J8 H7
GND_VIO18 GND_LDO J7 VMC 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200
J9 GND_LDO K8
(11,4) UTXD1 TP1318
J10 GND_VRF18 GND_LDO H6 VMCH 1.3/1.5/1.8/2.5/2.8/3.0/3.3 400
GND_VRF18 GND_LDO F7
J12 GND_LDO G6
VGP 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100
(11,4) URXD1 TP1319 GND_VPA GND_LDO
K12 J6
GND_VPA GND_LDO VGP2
TP1320
GND_DCDC

P14
BGA_NC-P14 A1
Vibrator VIBR 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200
A TP1321 BGA_NC-A1 P1 A
(11,15,21,4)
TP1326 BGA_NC-P1 RTC VRTC 2.8 2
KCOL0
MT6329BA_TFBGA155
VREF
KROW0 TP1327
(11,15,21,4)

Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date MT6329 PMIC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Tuesday, December 18, 2012 Sheet 21 of 23
5 4 3 2 1
 5 4 3 2 1

20V/1mA

3
VBAT @ 2 1
0_0603_5% PR1 PD1
20V/1mA

1
PC1 1K_0402_1% VGH
PQ1
BAS40-04_SOT23
1U_0603_25V6K PR3 Compal GND MTK GND
PR2 1 2

2
3 2
1 P5103EMG_SOT23-3 1 AVDD

1 1
1
@ 0_0603_5%

1
PR4 PC3 10U_0603_25V6M

1
PC2 PC4 PR5

G
10K_0402_1%

2
0.1U_0402_25V6 PD2 100K_0402_1% @

0.1U_0402_16V4Z

1
18K_0402_1%

19.6K_0402_1%
D 2 BZT52-B20S_SOD323-2 @ D

2
PC17 @

PR26

PR24
0.1U_0402_25V6

2
1
PR6 PL1 AVDD
2.4V~4.8V

1
1 2 LX_AVDD 2 1
1K_0402_1% 11V/30mA

1
1
22UH_1069AS-220M_0.42A_20% PD3 2
+LCD_VCOM

2
PC5 PR7 @ VR1
BAT43WS-7-F_SOD323-2 10U_0805_25V6K 78.7K_0603_1% 0.15W_10K_EVM3ESX50B14

2
1
PU1

10U_0805_25V6K
PC7
PQ2 1

3
LX

1
PDTC115EU_SOT323-3 5
PR8 VIN

6.8K_0402_1%
PC6 2
GND

9.53K_0402_1%
2 1 2 4.7U_0402_6.3V6M 4 @ @ @
(4) LCM_VLED_EN

2
EN

PR27
3 PR10
FB

PR25
10K_0402_1%
1K_0402_1% PR9
1 2 APW7137BI-TRG_SOT23-5
(4) LCM_VLED_EN
3

2
47K_0402_1%

0.1U_0402_10V7K
PC8
1

1
PC9 1K_0402_1% VGL
100K_0402_1% 0.1U_0402_25V6 -6.8V/1mA
PR12

2
PR11 Apply symbol
2 1 2

2
C 1 C
PD5

470K_0402_1%

1U_0603_10V6K
PD4 3 GLZ6.8B_LL34-2

1
PR14

PC11
BAS40-04_SOT23

1
PC10

2
PR13 1U_0603_25V6K

1
Apply symbol

2
100_0402_1%

2
PQ3
9.3V/ 120mA
3 1 P5103EMG_SOT23-3
S

D
VBAT
390P_0402_50V7K (7)
1

PR23 1
100K_0402_1%

PC12 @
G
(22,7)
2
@ PR16 PC13 LCM_LEDK
1

100K_0402_1% 1 2 1 2 LCM_LEDA
0.1U_0402_25V6 @ PR15 BAT43WS-7-F_SOD323-2
4.7_0603_5% PD6
2

B PR17 1 2 2 1 B
LX_BL
Create GPIO 1 2

1
PL2
PC14 10UH_1231AS-100M_0.9A_20%
PR18 10K_0402_1%
1

1
D 10U_0603_25V6M

2
1 2 2 PQ4 PC15
(4) LCM_BL_EN
G SSM3K7002FU_SC70-3 10U_0603_25V6M

2
S
3

10K_0402_1% PU2
6 1
VIN LX
1

5 2
(22,7) OVP GND
PC16
LCM_LEDA 1U_0402_6.3V6K 4 3
2

EN FB
APW7136CCI-TRG_SOT23-6

1
LCM_BACK_CTL

PR19
1

2.05_0603_1%
1

PR20

2
2

300K_0402_1%
PR21
100K_0402_1%
2

VDD33_6575 2 PQ5
PDTC115EUA_SC70-3
1
1

PR22
3

20K_0402_1%
A A
2

R90 @
1 2
0_0402_5%
@ R67
2 1 LCM_BACK_CTL
(7) LCM_DIMO_R
0_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/11/03 2013/11/03
Issued Date Deciphered Date Title
LED Backlight Driver
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1 2 Size Document Number Rev
(7) LCM_BLU_PWM AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R91 0_0402_5% Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A031P
Date: Tuesday, December 18, 2012 Sheet 22 of 23
5 4 3 2 1