74HC240; 74HCT240

Octal buffer/line driver; 3-state; inverting

Rev. 4 — 25 February 2016 Product data sheet

1. General description
The 74HC240; 74HCT240 is an 8-bit inverting buffer/line driver with 3-state outputs. The
device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output
enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE
causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess
of VCC.

2. Features and benefits

 Complies with JEDEC standard JESD7A
 Input levels:
 For 74HC240: CMOS level
 For 74HCT240: TTL level
 Inverting 3-state outputs
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V
 Multiple package options
 Specified from 40 C to +85 C and from 40 C to +125 C

3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC240D 40 C to +125 C SO20 plastic small outline package; 20 leads; SOT163-1
74HCT240D body width 7.5 mm

74HC240DB 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body SOT339-1
74HCT240DB width 5.3 mm

74HC240PW 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; SOT360-1
74HCT240PW body width 4.4 mm

74HC240BQ 40 C to +125 C DHVQFN20 plastic dual-in-line compatible thermal enhanced very SOT764-1
74HCT240BQ thin quad flat package; no leads; 20 terminals; body
2.5  4.5  0.85 mm
NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

4. Functional diagram

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Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Functional diagram

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 2 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

5. Pinning information

5.1 Pinning

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(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration SO20, (T)SSOP20 Fig 5. Pin configuration DHVQFN20

5.2 Pin description

Table 2. Pin description
Symbol Pin Description
1OE, 2OE 1, 19 output enable input (active LOW)
1A0, 1A1, 1A2, 1A3 2, 4, 6, 8 data input
2Y0, 2Y1, 2Y2, 2Y3 3, 5, 7, 9 bus output
GND 10 ground (0 V)
2A0, 2A1, 2A2, 2A3 17, 15, 13, 11 data input
1Y0, 1Y1, 1Y2, 1Y3 18, 16, 14, 12 bus output
VCC 20 supply voltage

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 3 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

6. Functional description
Table 3. Function table[1]
Input Output
nOE nAn nYn
L L H
L H L
H X Z

[1] H = HIGH voltage level;

L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.

7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA
IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA
IO output current 0.5 V < VO < VCC + 0.5 V - 35 mA
ICC supply current - 70 mA
IGND ground current 70 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation SO20, SSOP20, TSSOP20 and [1] - 500 mW
DHVQFN20 packages

[1] For SO20 packages: above 70 C, Ptot derates linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60 C, Ptot derates linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 C, Ptot derates linearly with 4.5 mW/K.

8. Recommended operating conditions

Table 5. Recommended operating conditions
Symbol Parameter Conditions 74HC240 74HCT240 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VI input voltage 0 - VCC 0 - VCC V
VO output voltage 0 - VCC 0 - VCC V
t/V input transition rise and VCC = 2.0 V - - 625 - - - ns/V
fall rate VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 4 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC240
VIH HIGH-level VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
input voltage VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
input voltage VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level VI = VIH or VIL
output voltage IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level VI = VIH or VIL
output voltage IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
II input leakage VI = VCC or GND; - - 0.1 - 1.0 - 1.0 A
current VCC = 6.0 V
IOZ OFF-state VI = VIH or VIL; VCC = 6.0 V; - - 0.5 - 5.0 - 10 A
output current VO = VCC or GND
ICC supply current VI = VCC or GND; IO = 0 A; - - 8.0 - 80 - 160 A
VCC = 6.0 V
CI input - 3.5 - - - - - pF
capacitance
74HCT240
VIH HIGH-level VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
input voltage
VIL LOW-level VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
input voltage
VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V
IO = 6 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 20 A - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA - 0.16 0.26 - 0.33 - 0.4 V

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 5 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

Table 6. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
II input leakage VI = VCC or GND; - - 0.1 - 1.0 - 1.0 A
current VCC = 5.5 V
IOZ OFF-state VI = VIH or VIL; VCC = 5.5 V; - - 0.5 - 5.0 - 10 A
output current VO = VCC or GND
ICC supply current VI = VCC or GND; - - 8.0 - 80 - 160 A
VCC = 5.5 V; IO = 0 A
ICC additional per input pin;
supply current VI = VCC  2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V;
IO = 0 A
nAn or inputs - 150 540 - 675 - 735 A
nOE input - 70 252 - 315 - 343 A
CI input - 3.5 - - - - - pF
capacitance

10. Dynamic characteristics

Table 7. Dynamic characteristics
GND = 0 V; for test circuit see Figure 8.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ Max Max Max
(85 C) (125 C)
74HC240
tpd propagation delay nAn to nYn; see Figure 6 [1]

VCC = 2.0 V - 30 100 125 150 ns

VCC = 4.5 V - 11 20 25 30 ns
VCC = 5.0 V; CL = 15 pF - 9 - - - ns
VCC = 6.0 V - 9 17 21 26 ns
ten enable time nOE to nYn; see Figure 7 [2]

VCC = 2.0 V - 39 150 190 225 ns

VCC = 4.5 V - 14 30 38 45 ns
VCC = 6.0 V - 11 26 33 38 ns
tdis disable time nOE to nYn or see Figure 7 [3]

VCC = 2.0 V - 41 150 190 225 ns

VCC = 4.5 V - 15 30 38 45 ns
VCC = 6.0 V - 12 26 33 38 ns
tt transition time see Figure 6 [4]

VCC = 2.0 V - 14 60 75 90 ns
VCC = 4.5 V - 5 12 15 18 ns
VCC = 6.0 V - 4 10 13 15 ns

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 6 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

Table 7. Dynamic characteristics …continued

GND = 0 V; for test circuit see Figure 8.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ Max Max Max
(85 C) (125 C)
CPD power dissipation per transceiver; [5] - 30 - - - pF
capacitance VI = GND to VCC
74HCT240
tpd propagation delay nAn to nYn; see Figure 6 [1]

VCC = 4.5 V - 11 20 25 30 ns
VCC = 5.0 V; CL = 15 pF - 9 - - - ns
ten enable time nOE to nYn; VCC = 4.5 V; [2] - 13 30 38 45 ns
see Figure 7
tdis disable time nOE to nYn; VCC = 4.5 V; [3] - 13 25 31 38 ns
see Figure 7
tt transition time VCC = 4.5 V; see Figure 6 [4] - 5 12 15 18 ns
CPD power dissipation per transceiver; [5] - 30 - - - pF
capacitance VI = GND to VCC  1.5 V

[1] tpd is the same as tPHL and tPLH.

[2] ten is the same as tPZH and tPZL.
[3] tdis is the same as tPHZ and tPLZ.
[4] tt is the same as tTHL and tTLH.
[5] CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD  VCC2  fi  N +  (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
 (CL  VCC2  fo) = sum of outputs.

11. Waveforms

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Measurement points are given in Table 8.

VOL and VOH are typical voltage output drop that occur with the output load.
Fig 6. Input (nAn) to output (nYn) propagation delays and output transition times

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 7 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

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Measurement points are given in Table 8.

VOL and VOH are typical voltage output drop that occur with the output load.
Fig 7. 3-state enable and disable times

Table 8. Measurement points

Type Input Output
VM VM VX VY
74HC240 0.5  VCC 0.5  VCC 0.1  VCC 0.9  VCC
74HCT240 1.3 V 1.3 V 0.1  VCC 0.9  VCC

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 8 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

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Test data is given in Table 9.

Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 8. Test circuit for measuring switching times

Table 9. Test data

Type Input Load S1 position
VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC240 VCC 6 ns 15 pF, 50 pF 1 k open GND VCC
74HCT240 3V 6 ns 15 pF, 50 pF 1 k open GND VCC

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 9 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

12. Package outline

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Fig 9. Package outline SOT163-1 (SO20)

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 10 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

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Fig 10. Package outline SOT339-1 (SSOP20)

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 11 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

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Fig 11. Package outline SOT360-1 (TSSOP20)

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 12 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

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Fig 12. Package outline SOT764-1 (DHVQFN20)

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 13 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

13. Abbreviations
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic

14. Revision history

Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT240 v.4 20160225 Product data sheet - 74HC_HCT240 v.3
Modifications: • Type numbers 74HC240N and 74HCT240N (SOT146-1) removed.
74HC_HCT240 v.3 20070802 Product data sheet - 74HC_HCT240_CNV v.2
Modifications: • The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Added type number 74HC240BQ and 74HCT240BQ (DHVQFN20 package)
74HC_HCT240_CNV v.2 19970828 Product specification - -

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 14 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

15. Legal information

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Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.

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Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
15.3 Disclaimers customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Limited warranty and liability — Information in this document is believed to
Semiconductors products in order to avoid a default of the applications and
be accurate and reliable. However, NXP Semiconductors does not give any
the products or of the application or use by customer’s third party
representations or warranties, expressed or implied, as to the accuracy or
customer(s). NXP does not accept any liability in this respect.
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no Limiting values — Stress above one or more limiting values (as defined in
responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC 60134) will cause permanent
source outside of NXP Semiconductors. damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
In no event shall NXP Semiconductors be liable for any indirect, incidental,
the Recommended operating conditions section (if present) or the
punitive, special or consequential damages (including - without limitation - lost
Characteristics sections of this document is not warranted. Constant or
profits, lost savings, business interruption, costs related to the removal or
repeated exposure to limiting values will permanently and irreversibly affect
replacement of any products or rework charges) whether or not such
the quality and reliability of the device.
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Terms and conditions of commercial sale — NXP Semiconductors
Notwithstanding any damages that customer might incur for any reason products are sold subject to the general terms and conditions of commercial
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards sale, as published at http://www.nxp.com/profile/terms, unless otherwise
customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual
with the Terms and conditions of commercial sale of NXP Semiconductors. agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
Right to make changes — NXP Semiconductors reserves the right to make applying the customer’s general terms and conditions with regard to the
changes to information published in this document, including without purchase of NXP Semiconductors products by customer.
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or
to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 15 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

Export control — This document as well as the item(s) described herein NXP Semiconductors’ specifications such use shall be solely at customer’s
may be subject to export control regulations. Export might require a prior own risk, and (c) customer fully indemnifies NXP Semiconductors for any
authorization from competent authorities. liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
Non-automotive qualified products — Unless this data sheet expressly
standard warranty and NXP Semiconductors’ product specifications.
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested Translations — A non-English (translated) version of a document is for
in accordance with automotive testing or application requirements. NXP reference only. The English version shall prevail in case of any discrepancy
Semiconductors accepts no liability for inclusion and/or use of between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer 15.4 Trademarks
(a) shall use the product without NXP Semiconductors’ warranty of the
Notice: All referenced brands, product names, service names and trademarks
product for such automotive applications, use and specifications, and (b)
are the property of their respective owners.
whenever customer uses the product for automotive applications beyond

16. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com

74HC_HCT240 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet Rev. 4 — 25 February 2016 16 of 17

NXP Semiconductors 74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting

17. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 4
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14
14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
15.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
16 Contact information. . . . . . . . . . . . . . . . . . . . . 16
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP Semiconductors N.V. 2016. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 25 February 2016
Document identifier: 74HC_HCT240