Panel CSOT ST3151A04-1 0 PDF

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ST3151A04-1 Product Specification
MODEL: ST3151A04-1
Ver. 1.1
Date: 14.Nov.2011
Customer’s Approval CSOT
Signature Date Approved By Product Director Date

Name: Richard Lung
Signature:
Reviewed By PM Manager Date

Name: Aaron Tu
Signature:
Reviewed By Project Leader Date

Name: Joe Kuo
Signature:
Reviewed By PM Date
Name: Charles Chin
Signature:
The copyright belongs to Shenzhen China Star 1 / 20 Ver. 1.1

Optoelectronics Technology Co., Ltd.
Any unauthorized use is prohibited.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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Contents
Revision History ................................................................................................................................................3

1. General Description .......................................................................................................................................4
1.1 Product Features ..................................................................................................................................4
1.2 Overview..............................................................................................................................................4
1.3 General Information.............................................................................................................................4
2. Electrical Specification ..................................................................................................................................5
2.1 Open cell Power Consumption (TA = 25 ± 2 °C) ................................................................................5
2.2 LVDS Characteristics...........................................................................................................................6
3. Input Terminal Pin Assignment .....................................................................................................................7
3.1 Interface pin assignment ......................................................................................................................7
3.2 Block Diagram of Interface .................................................................................................................8
3.3 LVDS Interface ....................................................................................................................................8
3.3.1 VESA Format (SELLVDS = L or Open) ..................................................................................8
3.3.2 JEIDA Format (SELLVDS = H) ...............................................................................................8
4. Interface Timing...........................................................................................................................................10
4.1 Timing Table (DE Only Mode)..........................................................................................................10
4.2 Power On/Off Sequence ....................................................................................................................11
5. Optical Characteristics.................................................................................................................................12
5.1 Measurement Conditions ...................................................................................................................12
5.2 Optical Specifications ........................................................................................................................13
6. Mechanical Characteristics ..........................................................................................................................16
6.1 Mechanical Specification...................................................................................................................16
6.2 Packing...............................................................................................................................................17
6.2.1 Packing Specifications............................................................................................................17
6.2.2 Packing Method ......................................................................................................................17
7. Definition of Labels .....................................................................................................................................18
7.1 Open Cell Label .................................................................................................................................18
7.2 Carton Label ......................................................................................................................................18
7.3 Pallet Label ........................................................................................................................................19
8. Precautions...................................................................................................................................................20
8.1 Assembly and Handling Precautions .................................................................................................20
8.2 Safety Precautions..............................................................................................................................20

Revision History
Version Date Page (New) Section Description Revision by
Ver. 1.1 14.Nov.2011 20 All Tentative Specification was First Issued. Charles Chin

1. General Description
1.1 Product Features
- HD Resolution (1366 x 768)
- Very High Contrast Ratio: 4000:1
- Fast Response Time
- Ultra Wide Viewing Angle: 178° (H)/178° (V) (CR t 10)
- DE (Data Enable) Mode
- LVDS (Low Voltage Differential Signaling) Interface
1.2 Overview
ST3151A04-1 is a diagonal 31.5” color active matrix LCD Open cell with 1ch-LVDS interface. This Open cell is a
transmissive type display operating in the normally black mode. It supports 1366 x 768 HD resolution and can display up to
16.7M colors (8-bit). Each pixel is divided into Red, Green and Blue sub-pixels which are arranged in vertical stripe. There is
no backlight built-in.
This open cell dedicates for LCD TV products and provides excellent performance which includes high transparency,
ultra wide viewing angle and high color depth. CSOT open cell comply with RoHS for identification.
1.3 General Information
Item Specification Unit Note
Active Area 697.6845 (H) x 392.2560 (V) mm
Cell Size 714.835(H) x 410.570 (V) x 1.900 (D) mm
Weight 1.2 kg Max.
Driving Scheme a-Si TFT Active Matrix -
Number of Pixels 1366 x 768 pixel
Pixel Pitch (Sub Pixel) 0.17025 (H) x 0.51075 (V) mm
Pixel Arrangement RGB Vertical Stripe -
Display Colors 16.7 M color 8-bit
Display Mode Transmissive Mode, Normally Black -
Glass thickness (Array/CF) 0.7/0.7 mm

R=0.638, 0.335
G=0.323, 0.621
Color Chromaticity
B=0.156, 0.054
W=0.280, 0.290
Typical value measured at CSOT’s
Contrast Ratio 4000:1(Typ.) module: MT3151A04-1
Cell Transmittance 6.75%(Typ.) %
View Angle(CR>10) +89/-89(H),+89/-89(V) (Typ.)
Polarizer(CF side) Anti-glare, Haze 12%, Hard Coating (3H)
Polarizer(TFT side) Hard Coating (3H)

2. Electrical Specification
2.1 Open cell Power Consumption (TA = 25 ± 2 °C)
Value
Parameter Symbol Unit Note
Min. Typ. Max.
Power Supply Voltage VCC TBD 12.0 TBD V (1)
Rush Current IRUSH - - 3 A (2)
White Pattern ICC - 0.27 0.35 A

Power Supply
Horizontal Stripe ICC - 0.24 0.32 A (3)
Current
Black Pattern ICC - 0.15 0.2 A
Note:
(1) The ripple voltage should be controlled less than 10% of VCC.
(2) Measurement condition: VCC rising time = 470 μs.
VCC
VCC x 0.9
VCC x 0.1
GND
470 μs
Fig. 2.1 VCC rising time condition

(3) Measurement condition: VCC = 12 V, Ta = 25 ± 2 ºC, F = 60 Hz. The test patterns are shown as below.
A. White Pattern B. Horizontal Pattern
C. Black Pattern
œġ ňġ Ńġ œġ ňġ Ńġ
Fig. 2.2 Test patterns

2.2 LVDS Characteristics

Value
Parameter Symbol Unit Note
Min. Typ. Max.
Differential Input High
VTH + 100 - - mV
Threshold Voltage
Differential Input Low
VTL - - - 100 mV
Threshold Voltage
LVDS Interface (1)
Common Input Voltage VCM 1.0 1.2 1.4 V
Differential Input Voltage |VID| 200 - 600 mV
Terminating Resistor RT - 100 - ohm
Input High Threshold Voltage VIH 2.7 - 3.3 V

CMOS Interface
Input Low Threshold Voltage VIL 0.0 - 0.6 V
Note:
(1) The LVDS input signal has been defined as follows:
VTH |VID|
VCM
VTL
GND
GND
Fig. 2.3 LVDS input signal

3. Input Terminal Pin Assignment

3.1 Interface pin assignment
CN1: 300B30-0000RA-M4 (STARCONN) or equivalent (see Note (1))
Pin No. Symbol Description Note
1 VCC Power Supply ,+ 12 V DC Regulated
5 GND Ground
6 GND Ground
7 GND Ground
8 GND Ground
9 LVDS SEL LVDS Data Format Selection (2)
10 NC For CSOT Users Only
11 GND Ground
12 LV1N0 1st Channel LVDS Data Input (0-)
13 LV1P0 1st Channel LVDS Data Input (0+)
14 GND Ground
17 GND Ground
20 GND Ground
21 LVCK1N 1st Channel LVDS Clock Input (-)
22 LVCK1P 1st Channel LVDS Clock Input (+)
23 GND Ground
26 GND Ground
27 NC For CSOT Users Only (3)
30 GND Ground

Note:
(1) The direction of pin assignment is shown as below:
#1 # 30 CN1
CN1
#1 # 30
Fig. 3.1 LVDS direction sketch map

(2) High: connect to +3.3 V ė JEIDA format; Low: connect to GND or Open ė VESA format.
(3) For CSOT internal only, please let it open.
3.2 Block Diagram of Interface
Connector Timing Controller
LV1N0
100Ω
LV1P0
LV1N1
100Ω
LV1P1
LV1N2
100Ω
LV1P2
LVCK1N
100Ω
LVCK1P
LV1N3
100Ω
LV1P3
Attention:
(1) This Open cell uses a 100 ohms (Ω) resistor between positive and negative lines of each receiver input.
(2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line respectively.
3.3 LVDS Interface
3.3.1 VESA Format (SELLVDS = L or Open)
LVCK1 N/ LVCK1 P
LV1N0/ LV1P0 G0 R5 R4 R3 R2 R1 R0
LV1N1/ LV1P1 B1 B0 G5 G4 G3 G2 G1
LV1N2/ LV1P2 DE VS HS B5 B4 B3 B2
LV1N3/ LV1P3 RSVD B7 B6 G7 G6 R7 R6
3.3.2 JEIDA Format (SELLVDS = H)

LVCK1 N/ LVCK1 P
LV1N0/ LV1P0 G2 R7 R6 R5 R4 R3 R2
LV1N1/ LV1P1 B3 B2 G7 G6 G5 G4 G3
LV1N2/ LV1P2 DE VS HS B7 B6 B5 B4
LV1N3/ LV1P3 RSVD B1 B0 G1 G0 R1 R0
3.4 Pattern FOR Vcom Adjustment

2 line-inversion pattern ( 2n+1)
Frame N Frame N+1
+ - + - + - + - + - + - + - + - + -
- + - + - + - + - + - + - + - + - +
- + - + - + - + - + - + - + - + - +
+ - + - + - + - + - + - + - + - + -
+ - + - + - + - + - + - + - + - + -
- + - + - + - + - + - + - + - + - +
- + - + - + - + - + - + - + - + - +

4. Interface Timing
4.1 Timing Table (DE Only Mode)
Signal Item Symbol Min. Typ. Max. Unit Note
Fclk
LVDS Clock Frequency 50.0 75.4 85.0 MHz
(= 1 / Tclk)
Frame Rate F TBD. 60 TBD. Hz
Vertical Frequency Fv 47.0 48.4 60.9 KHz

Vertical
Total Tv 784 806 1015 Th Tv = Tvd + Tvb
Term
Display Tvd 768
Blank Tvb 16 38 247 Th
Total Th 1460 1560 2000 Tclk Th = Thd + Thb

Horizontal
Display Thd 1366
Term
Blank Thb 94 194 634 Tclk
Attention:
(1) The TFT LCD Open cell is operated in DE only mode, H sync and V sync input signal have no effect on normal operation.
Tv
Tvd Tvb
DE
Th
DCLK
Tclk
Thb Thd
DE
DATA Valid Display Data
Fig. 4.1 Interface signal timing diagram

4.2 Power On/Off Sequence

To prevent a latch-up or DC operation of the Open cell, the power on/off sequence should be as the diagram below.
0.1 VCC 0.1 VCC

0V
T1 T3
T2 T4
LVDS & Option Signal Valid Data

0V
Power On Power Off
Backlight(Recommended)
50% 50%
T5 T6
Fig. 4.2 Power On/Off

Values
Parameter Unit
Min. Typ. Max.
T1 0.5 - 10 ms
T2 0 - 50 ms
T3 0 - 50 ms
T4 1000 - - ms
T5 500 - - ms
T6 100 - - ms
Attention:
(1) The supply voltage of the external system for the open cell input should follow the definition of VCC.
(2) When the customer’s backlight turns on before the LCD operation or the LCD turns off before the backlight turns off, the
display may momentarily become abnormal screen.
(3) In case that VCC is in off level, please keep the level of input signals on the low or high impedance. If T2 < 0, that may
cause electrical overstress.
(4) T4 should be measured after the module has been fully discharged between power off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.

5. Optical Characteristics
5.1 Measurement Conditions
The table below is the test condition of optical measurement.
Item Symbol Value Unit
Ambient Temperature TA 25 r 2 ºC
Ambient Humidity HA 50 r 10 % RH
Supply Voltage VCC 12 V
Driving Signal Refer to the typical value in Chapter 2: Electrical Specification
Vertical Refresh Rate FR 60 Hz

To avoid abrupt temperature change during optical measurement, it’s suggested to warm up the LCD module more than 45
minutes after lighting the backlight and in the windless environment.
To measure the LCD cell, it is suggested to set up the standard measurement system as Fig. 5.1. The measuring area S
should contain at least 500 pixels of the LCD cell as illustrated in Fig.5.2 (A means the area allocated to one pixel). In this
model, for example, the minimum measuring distance Z is 370 mm when T is 2 degree. Hence, 500 mm is the typical
measuring distance. This measuring condition is referred to 301-2H of VESA FPDM 2.0 about viewing distance, angle, and
angular field of view definition.
T
S = πr²
For Square
Z
T r
Fig. 5.1 The standard set-up system of measurement Fig. 5.2 The area S contains at least 500 pixels to be measured
S
N= ı 500pixels
A
N means the actual number of the pixels in the area S.

5.2 Optical Specifications

The table below of optical characteristics is measured by MINOLTA CS2000, MINOLTA CA310, ELDIM OPTI
Scope-SA and ELDIM EZ Contrast in dark room.
Item Symbol Condition Min. Typ. Max. Unit Note
Static Contrast Ratio CR - 4000 - - (1) (2)
Response Time TL - 6.5 12 ms (3)
Center Transmittance T% - 6.75 % (2) (4)
RX 0.638 -
Red
RY TH = 0q, TV = 0q 0.335 -
GX Normal direction at 0.323 -

Green
Color GY center point with Typ. 0.621 Typ. -
(2) (5)
Chromaticity BX CSOT Module - 0.03 0.156 + 0.03 -
Blue
(CIE1931) BY 0.054 -
WX 0.280 -
White
WY 0.290 -
Color Gamut CG 68 72 - % NTSC
TH+ - 89 -
Horizontal
TH- - 89 -
Viewing Angle CR t 10 Deg. (6)
TV+ - 89 -
Vertical
TV- - 89 -
Note:
(1) Definition of static contrast ratio (CR):
It’s necessary to switch off all the dynamic and dimming function when measuring the static contrast ratio.
CR-W
Static Contrast Ratio (CR) =
CR-D
CR-W is the luminance measured by LMD (light-measuring device) at the center point of the LCD module with
full-screen displaying white. The standard setup of measurement is illustrated in Fig. 5.3; CR-D is the luminance measured
by LMD at the center point of the LCD module with full-screen displaying black. The LMD in this item is CS2000.
(2) The LMD in the item could be a spectroradiometer such as (KONICA MINOLTA) CS2000, CS1000(TOPCON), SR-UL2
or the same level spectroradiometer. Other display color analyzer (KONICA MINOLTA) CA210, CA310 or (TOPCON)
BM-7 could be involved after being calibrated with a spectroradiometer on each stage of a product.

Black & White
LMD
LCD Module
Fig. 5.3 The standard setup of CR measurement

(3) Response time TL is defined as the average transition time in the response time matrix. The table below is the response
time matrix in which each element tX to Y is the transition time from luminance ratio X to Y. X and Y are two different
luminance ratios among 0%, 25%, 50%, 75%, and 100% luminance. The transition time tX to Y is defined as the time taken
from 10% to 90% of the luminance difference between X and Y (X < Y) as illustrated in Fig.6.4. When X > Y, the
definition of tX to Y is the time taken from 90% to 10% of the luminance difference between X and Y. The response time is
optimized on refresh rate Fr = 60Hz.
Measured Luminance Ratio of Previous Frame
Transition Time 0% 25% 50% 75% 100%
0% t25% to 0% t50% to 0% t75% to 0% t100% to 0%
25% t0% to 25% t50% to 25% t75% to 25% t100% to 25%

Luminance
Ratio of 50% t0% to 50% t25% to 50% t75% to 50% t100% to 50%
Current Frame
75% t0% to 75% t25% to 75% t50% to 75% t100% to 75%
100% t0% to 100% t25% to 100% t50% to 100% t75% to 100%
tX to Y means the transition time from luminance ratio X to Y.

Luminance
Luminance
ttXX totoYY
100% 0%, 25%
Y:Y: 0%, 50%,
25%, 75%,75%,
50%, 100%100%
100%
90%
90% Brighter state
Brighter State
Darker State
10%
10%
0% Darker state
0% X: 0%,
X: 0%,25% 50%,50%,
25%, 75%, 75%,
100% 100%
Time
Time
Fig. 5.4 The definition of tX to Y
All the transition time is measured at the center point of the LCD module by ELDIM OPTI Scope-SA.

(4) Definition of center Transmittance (T%):

The transmittance is measured with full white pattern (Gray 255)
Luminance of LCD module

Static Contrast Ratio (CR) =
Luminance of Backlight
(5) Definition of color chromaticity:

Each chromaticity coordinates (x, y) are measured in CIE1931 color space when full-screen displaying primary color R, G,
B and white. The color gamut is defined as the fraction in percent of the area of the triangle bounded by R, G, B
coordinates and the area is defined by NTSC 1953 color standard in the CIE color space. Chromaticity coordinates are
measured by CS2000 and the standard setup of measurement is shown in Fig. 5.7.
Colors
LMD
LCD Module
Fig. 5.5 The standard setup of color chromaticity measurement

(6) Definition of viewing angle coordinate system (TH, TV):
The contrast ratio is measured at the center point of the LCD module. The viewing angles are defined at the angle that the
contrast ratio is larger than 10 at four directions relative to the perpendicular direction of the LCD module (two vertical
angles: up TV+ and down TV-; and two horizontal angles: right TH+ and left TH-) as illustrated in Fig. 5.8. The contrast ratio
is measured by ELDIM EZ Contrast.
TH+
TH- TV+
TV-
Z
Fig. 5.6 Viewing angle coordination system

6. Mechanical Characteristics
6.1 Mechanical Specification

6.2 Packing
6.2.1 Packing Specifications
Specification
Item
Quantity Dimension (mm) Weight (kg)
Net Weight: 28.20 (Max.)
Packing Box 24 pcs / box 923.00 (L) x 663.00 (W) x 252.00 (H)
Gross Weight: 40.00 (Max.)
Pallet 1 1420.00 (L) x 1120.00 (W) x 150.00 (H) Net Weight: 33
Stack Layer 5
Boxes per Pallet 10 boxes / pallet
Pallet after Packing 240 pcs / pallet 240 pcs / pallet 240 pcs / pallet
6.2.2 Packing Method
LCD Panel 4pcs LCD Panel/Tray
5pcs EPE Spacer/Tray
EPE Spacer
EPE Board Tray
PE Bag
Stack the top layer empty tray, Stack 6 layer tray. The tray
Stack 7 Layer need to revolve 180q need to revolve 180q
Carton Corner Cushion

Box Tape Box Tape
Carton Label
Corner Protector (1)
PE Sheet
PE Film (2 Layers)
PP Belt
Corner Protector (2)
Pallet Label
Pallet (1420*1120*150mm)

7. Definition of Labels
7.1 Open Cell Label
ST3151A04-1
For RoHS compatible products, CSOT will add RoHS for identification.
Model Name: ST3151A04-1
Ver.X.X: Version, for example: 0.1, 0.2, … , 1.1, 1.2, …, 2.1, 2.2, …
WC (Week Code): XX XX
Week
Year
Year: 2010 = 10, 2011 = 11 … 2020 = 20, 2021 = 21…

Week: 01, 02, 03 …
Serial Number: XXXXXXXXXXXX XXXXXXXX
CSOT Internal Use

Panel ID
7.2 Carton Label
ST3151A04-1
Serial Number: XXXX XX XXXXX XXXXX
CSOT Internal Use

Year, Month, Date
Model Version Code
CSOT Internal Use

Manufactured Date:
Year: 2010 = 10, 2011 = 11…2020 = 20, 2021 = 21…
Month: 1~9, A~C, for Jan. ~ Dec.
Date: 01~31, for 1st to 31st
Model Version Code: Version of product, for example: 01, 02, 11, 12…
7.3 Pallet Label
ST3151A04-1
240 10
Serial Number: XXX XX XXX XXXXX
CSOT Internal Use

Year, Month
Model Version Code
CSOT Internal Use

8. Precautions
8.1 Assembly and Handling Precautions
(1) Do not apply rough force such as bending or twisting to the open cell during assembly.
(2) It is recommended to assemble or install a open cell into the user’s system in clean working areas. The dust and
oil may cause electrical short or damage the polarizer.
(3) Do not apply pressure or impulse to the open cell to prevent the damage to the open cell.
(4) Always follow the correct power-on sequence. This can prevent the damage and latch-up to the LSI chips.
(5) Do not plug in or pull out the interface connector while the open cell is in operation.
(6) Use soft dry cloth without chemicals for cleaning because the surface of polarizer is very soft and easily be
scratched.
(7) Moisture can easily penetrate into the open cell and may cause the damage during operation.
(8) High temperature or humidity may deteriorate the performance of the open cell. Please store open cell in the
specified storage conditions.
(9) When ambient temperature is lower than 10 ºC, the display quality might be deteriorated. For example, the
response time will become slow.
8.2 Safety Precautions
(1) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of
contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(2) After the open cell end of life, it is not harmful in case of normal operation and storage.


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Customer’s Approval CSOT

Signature Date Approved By Product Director Date

Reviewed By PM Manager Date

Reviewed By Project Leader Date

The copyright belongs to Shenzhen China Star 1 / 20 Ver. 1.1

Revision History ................................................................................................................................................3

The copyright belongs to Shenzhen China Star 2 / 20 Ver. 1.1

The copyright belongs to Shenzhen China Star 3 / 20 Ver. 1.1

1.3 General Information

Item Specification Unit Note

Active Area 697.6845 (H) x 392.2560 (V) mm

Cell Size 714.835(H) x 410.570 (V) x 1.900 (D) mm

Weight 1.2 kg Max.

Driving Scheme a-Si TFT Active Matrix -

Number of Pixels 1366 x 768 pixel

Pixel Pitch (Sub Pixel) 0.17025 (H) x 0.51075 (V) mm

Pixel Arrangement RGB Vertical Stripe -

Display Colors 16.7 M color 8-bit

Display Mode Transmissive Mode, Normally Black -

Glass thickness (Array/CF) 0.7/0.7 mm

View Angle(CR>10) +89/-89(H),+89/-89(V) (Typ.)

Polarizer(CF side) Anti-glare, Haze 12%, Hard Coating (3H)

Polarizer(TFT side) Hard Coating (3H)

The copyright belongs to Shenzhen China Star 4 / 20 Ver. 1.1

Power Supply Voltage VCC TBD 12.0 TBD V (1)

Rush Current IRUSH - - 3 A (2)

White Pattern ICC - 0.27 0.35 A

Fig. 2.1 VCC rising time condition

Fig. 2.2 Test patterns

The copyright belongs to Shenzhen China Star 5 / 20 Ver. 1.1

2.2 LVDS Characteristics

Differential Input Voltage |VID| 200 - 600 mV

Terminating Resistor RT - 100 - ohm

Input High Threshold Voltage VIH 2.7 - 3.3 V

Fig. 2.3 LVDS input signal

The copyright belongs to Shenzhen China Star 6 / 20 Ver. 1.1

3. Input Terminal Pin Assignment

The copyright belongs to Shenzhen China Star 7 / 20 Ver. 1.1

Fig. 3.1 LVDS direction sketch map

LV1N3/ LV1P3 RSVD B7 B6 G7 G6 R7 R6

3.3.2 JEIDA Format (SELLVDS = H)

The copyright belongs to Shenzhen China Star 8 / 20 Ver. 1.1

LV1N3/ LV1P3 RSVD B1 B0 G1 G0 R1 R0

3.4 Pattern FOR Vcom Adjustment

The copyright belongs to Shenzhen China Star 9 / 20 Ver. 1.1

Vertical Frequency Fv 47.0 48.4 60.9 KHz

Blank Tvb 16 38 247 Th

Total Th 1460 1560 2000 Tclk Th = Thd + Thb

DATA Valid Display Data

Fig. 4.1 Interface signal timing diagram

The copyright belongs to Shenzhen China Star 10 / 20 Ver. 1.1

4.2 Power On/Off Sequence

0.1 VCC 0.1 VCC

LVDS & Option Signal Valid Data

Fig. 4.2 Power On/Off

The copyright belongs to Shenzhen China Star 11 / 20 Ver. 1.1

Supply Voltage VCC 12 V

Driving Signal Refer to the typical value in Chapter 2: Electrical Specification