Chapter2 Summary
Chapter2 Summary
Chapter2 Summary
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
The instantaneous power is:
2 (𝑡)
𝑣 2 (𝑡)
𝑝(𝑡) = 𝑣(𝑡)𝑖(𝑡) = 𝑅𝑖 = , 𝑤ℎ𝑒𝑟𝑒 𝑅 ≥ 0
𝑅
This equation illustrates that the power is a nonlinear function of either
current or voltage and that it is always a positive quantity.
1
𝐺= 𝑖𝑛 𝑆𝑖𝑒𝑚𝑒𝑛𝑠 (𝑆); 1𝑆 = 1𝐴/𝑉
𝑅
We can rewrite two additional expressions:
𝑖(𝑡) = 𝐺𝑣(𝑡)
and
𝑖 2 (𝑡)
𝑝(𝑡) = = 𝐺𝑣 2 (𝑡)
𝐺
Specific values of resistance: Two specific values of resistance are very
important: R=0 and R=∞.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
𝑖(𝑡) = 𝑣(𝑡)⁄𝑅 = 0
Example2.1: In the circuit below, determine the current and the power
absorbed by the resistor.
Solution:
Using Eq. (2.1), we find the current to be
I = V/R = 12/2k = 6 mA
Note that because many of the resistors employed in our analysis are
in kΩ, we will use k in the equations in place of 1000. The power
absorbed by the resistor is given by Eq. (2.2) or (2.3) as
P = VI = (12)(6 × 10−3) = 0.072 W
= I2R = (6 × 10−3)2(2k) = 0.072 W
= V2/R = (12)2/2k = 0.072 W
Solution:
Using the power relationship, we can determine either of the
unknowns:
𝑉𝑠2 ⁄𝑅 = 𝑃
𝑉𝑠2 = (3.6 × 10−3 )(10𝐾)
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
𝑉𝑠 = 6 𝑉
and
𝐼2 𝑅 = 𝑃
𝐼 2 = (3.6 × 10−3 )/(10𝐾)
𝐼 = 0.6 𝑚𝐴
Example2.3: Given the circuit in Fig. 2.4c, we wish to find the value of
the voltage source and the power absorbed by the resistance.
Solution:
The voltage is
𝐼 0.5 × 10−3
𝑉𝑠 = = = 10𝑉
𝐺 50 × 10−6
The power absorbed is then
𝐼 2 (0.5 × 10−3 )2
𝑃= = = 5 𝑚𝑊
𝐺 50 × 10−6
Or we could simply note that
R = 1 G = 20 kΩ
and therefore
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Vs = IR = (0.5 × 10−3) (20k) = 10 V
Example2.4: Given the network in Fig. 2.4d, we wish to find R and Vs.
Solution:
Using the power relationship, we find that
R = P/I2 = (80 × 10−3)/(4 × 10−3)2 = 5 kΩ
E2.1: Given the circuits in Fig. E2.1, find (a) the current I and the
power absorbed by the resistor in Fig. E2.1a, and (b) the voltage
across the current source and the power supplied by the source in Fig.
E2.1b.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
E2.2: Given the circuits in Fig. E2.2, find (a) R and VS in the circuit in
Fig. E2.2a, and (b) find I and R in the circuit in Fig. E2.2b.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Terms:
The first law is Kirchhoff’s current law (KCL), which states that
the algebraic sum of the currents entering any node is zero. In
mathematical form the law appears as:
∑ 𝑖𝑗 (𝑡) = 0
𝑗=1
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
-i2(t) + i4(t) - i5(t) + i7(t) = 0
KCL 3: the sum of the currents leaving a node is equal to the sum of
the currents entering the node.
Example2.5: Let us write KCL for every node in the network in Fig.
2.5, assuming that the currents leaving the node are positive.
Solution:
Solution:
Assuming the currents leaving the node are positive, the KCL
equations for nodes 1 through 4 are
−I1 + 0.06 + 0.02 = 0
I1 − I4 + I6 = 0
−0.06 + I4 − I5 + 0.04 = 0
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−0.02 + I5 − 0.03 = 0
The first equation yields I1 and the last equation yields I5.
Knowing I5, we can immediately obtain I4 from the third equation.
Then the values of I1 and I4 yield the value of I6 from the second
equation. The results are I1 = 80 mA, I4 = 70 mA, I5 = 50 mA, and I6
= −10 mA.
Example2.7: Let us write the KCL equations for the circuit shown in
Fig. 2.7.
Solution:
The KCL equations for nodes 1 through 4 follow:
i1(t) + i2(t) − i5(t) = 0
−i2(t) + i3(t) − 50i2(t) = 0
−i1(t) + 50i2(t) + i4(t) = 0
i5(t) − i3(t) − i4(t) = 0
Solution:
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
This diagram is redrawn in Fig. 2.8;
E2.4: Given the networks in Fig. E2.3, find (a) I1 in Fig. E2.4a and (b)
IT in Fig. E2.4b.
E2.5: Find (a) I1 in the network in Fig. E2.5a and (b) I1 and I2 in the
circuit in Fig. E2.5b.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Answer: (a) I1 = 6 mA; (b) I1 = 8 mA and I2 = 5 mA.
Kirchhoff’s second law, called Kirchhoff’s voltage law (KVL), states that
the algebraic sum of the voltages around any loop is zero. As was the
case with Kirchhoff’s current law, we will defer the proof of this law
and concentrate on understanding how to apply it.
In applying KVL, we must traverse any loop in the circuit and sum to
zero the increases and decreases in energy level. We will adopt a
policy of considering a decrease in energy level as positive and an
increase in energy level as negative. As we move around a loop, we
encounter the plus sign first for a decrease in energy level and a
negative sign first for an increase in energy level.
Finally, we employ the convention Vab to indicate the voltage of point a
with respect to point b: that is, the variable for the voltage between
point a and point b, with point a considered positive relative to point b.
Since the potential is measured between two points, it is convenient to
use an arrow between the two points, with the head of the arrow
located at the positive node.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
In general, the mathematical representation of Kirchhoff’s voltage law
is
N
∑ vj (t) = 0
j=1
where vj(t) is the voltage across the jth branch (with the proper
reference direction) in a loop containing N voltages.
Example2.9: Consider the circuit shown in Fig. 2.9. If VR1 and VR2 are
known quantities, let us find VR3.
Solution:
Starting at point a in the network and traversing it in a clockwise
direction, we obtain the equation
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Example2.10: Consider the network in figure below.
Let us demonstrate that only two of the three possible loop equations
are linearly independent.
Solution:
Note that this network has three closed paths: the left loop, right loop,
and outer loop. Applying our policy for writing KVL equations and
traversing the left loop starting at point a, we obtain
VR1 + VR4 − 16 − 24 = 0
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Solution:
The circuit is redrawn in Fig. 2.12b. Since points a and e as well as e
and c are not physically close, the arrow notation is very useful.
Vae + 10 − 24 = 0
and
16 − 12 + 4 + 6 − Vae = 0
Note that both equations yield Vae = 14 V. Even before calculating Vae,
we could calculate Vec using the path cdec or cefabc. However, since
Vae is now known, we can also use the path ceabc. KVL for each of
these paths is
4 + 6 + Vec = 0
−Vec + 10 − 24 + 16 − 12 = 0
and
−Vec − Va + 16 − 12 = 0
Single source
The circuit shown in Fig. 2.15 will serve as a basis for discussion. This
circuit consists of an independent voltage source that is in series with
two resistors.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Applying Kirchhoff’s voltage law to this circuit yields
−v(t) + vR1 + vR2 = 0
v(t) = vR1 + vR2
𝑅1
𝑉𝑅1 = 𝑣(𝑡)
𝑅1 + 𝑅2
Multiple source/Resistance
Consider the circuit shown in Fig. 2.18a. Here we have assumed that
the current flows in a clockwise direction, and we have defined the
variable i(t) accordingly.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Kirchhoff’s voltage law for this circuit is
+vR1 + v2(t) − v3(t) + vR2 + v4(t) + v5(t) − v1(t) = 0
where
v(t) = v1(t) + v3(t) − [v2(t) + v4(t) + v5(t)]
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
and therefore,
v(t) = RS.i(t)
where
RS = R1 + R2 + ∙ ∙ ∙ + RN
Note also that for any resistor Ri in the circuit, the voltage across Ri is
given by the expression
vRi = (Ri/RS).v(t)
Example2.15: Given the circuit in the figure below, let us find I, Vbd,
and the power absorbed by the 30-kΩ resistor. Finally, let us use
voltage division to find Vbc.
Solution:
KVL for the network yields the equation:
10k.I + 20k.I + 12 + 30k.I − 6 = 0
60k.I = −6
I = −0.1 mA
Therefore, the magnitude of the current is 0.1 mA, but its direction is
opposite to that assumed.
The voltage Vbd can be calculated using either of the closed paths
abdea or bcdb. The equations for both cases are
10k.I + Vbd + 30k − 6 = 0
and
20kI + 12 − Vbd = 0
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Using I = −0.1 mA in either equation yields Vbd = 10 V. Finally, the
power absorbed by the 30-kΩ resistor is
P = I2R = 0.3 mW
Now from the standpoint of determining the voltage Vbc, we can simply
add the sources since they are in series, add the remaining resistors
since they are in series. Then
20𝐾
𝑉𝑏𝑐 = [ ] (−6) = −2𝑉
20𝐾 + 40𝐾
Solution:
Knowing the load voltage and load resistance, we can obtain the line
current using Ohm’s law:
IL = 458.3k/220 = 2.083 kA
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
E2.10: Find I and Vbd in the circuit in Fig. E2.10.
Answer: Vs = 9 V.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
𝑣(𝑡) 𝑣(𝑡) 1 1 𝑣(𝑡)
𝑖(𝑡) = + = ( + ) 𝑣(𝑡) =
𝑅1 𝑅2 𝑅1 𝑅2 𝑅𝑝
Where,
1 1 1
= +
𝑅𝑝 𝑅1 𝑅2
𝑅1𝑅2
𝑅𝑝 =
𝑅1 + 𝑅2
The manner in which the current i(t) from the source divides between
the two branches is called current division and can be found from the
preceding expressions.
𝑅2
𝑖1 (𝑡) = 𝑖(𝑡)
𝑅1 + 𝑅2
Example2.17: Given the network in the below figure, let us find I1, I2,
and Vo.
Solution:
Applying current division, we obtain
40𝐾 + 80𝐾
𝐼1 = (0.9.10−3 ) = 0.6 𝑚𝐴
60𝐾 + (40𝐾 + 80𝐾)
60𝐾
𝐼2 = (0.9.10−3 ) = 0.3 𝑚𝐴
60𝐾 + (40𝐾 + 80𝐾)
The voltage Vo can be derived using Ohm’s law as
Vo = 80k.I2 = = 24 V
MULTIPLE-SOURCE/RESISTOR NETWORKS
Consider the circuit shown in Fig. 2.25a. We have assumed that the
upper node is v(t) volts positive with respect to the lower node.
Applying Kirchhoff’s current law to the upper node yields
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
i1(t) − i2(t) − i3(t) + i4(t) − i5(t) − i6(t) = 0
or
i1(t) − i3(t) + i4(t) – i6(t) = i2(t)+ i5(t)
The terms on the left side of the equation all represent sources that
can be combined algebraically into a single source; that is,
1 1
𝑖𝑜 (𝑡) = ( + )𝑣(𝑡)
𝑅1 𝑅2
1 1 𝑣(𝑡)
𝑖𝑜 (𝑡) = ( + ⋯ + ) 𝑣(𝑡) =
𝑅1 𝑅𝑁 𝑅𝑝
Where
1 1 1
= + ⋯+
𝑅𝑝 𝑅1 𝑅𝑁
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The current division for any branch can be calculated using Ohm’s law
and the preceding equations. For example, for the jth branch in the
network
𝑣(𝑡) 𝑅𝑝
𝑖𝑗 (𝑡) = = 𝑖 (𝑡)
𝑅𝑗 𝑅𝑗 𝑜
Example2.19: Given the circuit in the below figure, we wish to find the
current in the 12-KΩ load resistor.
Solution:
To simplify the network, we add the current sources algebraically and
combine the parallel resistors in the following manner:
1 1 1 1
= + + = 4𝐾𝛺
𝑅𝑝 18𝐾 9𝐾 12𝐾
and
𝐼 = 1𝑚𝐴 − 4𝑚𝐴 + 2𝑚𝐴 = −1𝑚𝐴
4𝐾
𝐼𝐿 = [ ] (−1 × 103 ) = −0.25𝑚𝐴
4𝐾 + 12𝐾
E2.13: Find the power absorbed by the 6-kΩ resistor in the network in
Fig. E2.13.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Answer: P=2.67mW.
𝑅𝑠 = 𝑅1 + 𝑅2 + ⋯ + 𝑅𝑁
1 1 1
= + ⋯+
𝑅𝑠 𝑅1 𝑅𝑁
Solution:
Starting at the opposite end of the network from the terminals and
combining resistors as shown in the sequence of circuits in Fig. 2.28,
we find that the equivalent resistance at the terminals is 5 kΩ.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
E2.14: Find the equivalent resistance at the terminals A-B in the
network below.
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Answer: RAB= 12 kΩ.
Solution:
If I4 = 1/2 mA, then from Ohm’s law, Vb = 3 V. Vb can now be used
to calculate I3 = 1 mA.
Now KVL applied to any closed path containing Vo will yield the value
of this input source.
For example, if the path is the outer loop, KVL yields
−Vo + 6k.I1 + 3k.I5 + 1k.I5 + 4k.I1 = 0
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E2.17: Find Vo in the below network.
Answer: V0 = 2V.
Answer: Vs = 9V.
Answer: V1 = 12 V.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
E2.21: Find I0 in the circuit below.
Answer: I0 = -4 mA.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Example2.24: Consider the network in the figure below. Given that VDE
= Vo = 4 V, find the value of the voltage source VS and the voltage
across the current source VAD.
Solution:
By using Kirchhoff’s laws and Ohm’s law, we can calculate the desired
quantities. Since VDE = 4 V, using Ohm’s law we obtain I8 = 2 A.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Now Kirchhoff’s voltage law around the upper left-hand loop yields
VS − VAC − VCB = 0
Or VS = 30 V
Consider the networks shown in Fig. 2.34. Note that the resistors
in Fig. 2.34a form a Δ (delta) and the resistors in Fig. 2.34b form a Y
(wye). If both of these configurations are connected at only three
terminals a, b, and c, it would be very advantageous if an equivalence
could be established between them. It is, in fact, possible to relate the
resistances of one network to those of the other such that their
terminal characteristics are the same. This relationship between the
two network configurations is called the Y-Δ transformation.
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𝑅1 𝑅2
𝑅𝑎 =
𝑅1 + 𝑅2 + 𝑅3
𝑅2 𝑅3
𝑅𝑏 =
𝑅1 + 𝑅2 + 𝑅3
𝑅1 𝑅3
𝑅𝑐 =
𝑅1 + 𝑅2 + 𝑅3
𝑅𝑎 𝑅𝑏 + 𝑅𝑏 𝑅𝑐 + 𝑅𝑎 𝑅𝑐
𝑅1 =
𝑅𝑏
𝑅𝑎 𝑅𝑏 + 𝑅𝑏 𝑅𝑐 + 𝑅𝑎 𝑅𝑐
𝑅2 =
𝑅𝑐
𝑅𝑎 𝑅𝑏 + 𝑅𝑏 𝑅𝑐 + 𝑅𝑎 𝑅𝑐
𝑅3 =
𝑅𝑎
Example2.25: Given the network in figure below, let us find the source
current IS.
Solution:
Note that none of the resistors in the circuit are in series or parallel.
However, careful examination of the network indicates that the 12k-,
6k-, and 18k-ohm resistors, as well as the 4k-, 6k-, and 9k-ohm
resistors each form a delta that can be converted to a wye.
Furthermore, the 12k-, 6k-, and 4k-ohm resistors, as well as the 18k-,
6k-, and 9k-ohm resistors, each form a wye that can be converted to a
delta. Any one of these conversions will lead to a solution. We will
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
perform a delta-to-wye transformation on the 12k-, 6k-, and 18k-ohm
resistors, which leads to the circuit in Fig. 2.35b.
The 2k- and 4k-ohm resistors, like the 3k- and 9k-ohm resistors, are
in series and their parallel combination yields a 4k-ohm resistor. Thus,
the source current is
Answer: RT = 34 kΩ.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
E2.25: Find Vo in the network below.
Answer: V0 = 24V.
Answer: I1 = -1.2A.
We will now show how to solve simple one-loop and one-node circuits
that contain dependent sources. Although the following examples are
fairly simple, they will serve to illustrate the basic concepts.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Example2.27: Let us determine the voltage Vo in the circuit below:
Solution:
Applying KVL, we obtain
−12 + 3kI1 − VA + 5kI1 = 0
Where VA = 2000I1
and the units of the multiplier, 2000, are ohms. Solving these
equations yields
I1 = 2 mA
Then Vo = (5 k)I1 = 10 V
Solution:
Applying KCL at the top node, we obtain
𝑉𝑠 𝑉𝑠
10 × 10−3 + + − 4𝑚𝐼0 = 0
2𝑘 + 4𝑘 3𝑘
where
𝑉𝑠
𝐼0 =
3𝑘
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Substituting this expression for the controlled source into the KCL
equation yields
𝑉𝑠 𝑉𝑠 𝑉𝑠
10−2 + + −4 =0
6𝑘 3𝑘 3𝑘
VS = 12 V
4𝑘
𝑉0 = 𝑉 = 8𝑉
2𝑘 + 6𝑘 𝑠
Solution:
Applying KVL to this network yields
−12 + 3kI + 2Vo + 1kI = 0
Where Vo = 1kI
Or I = 2 mA
Therefore, Vo = 1kI= 2 V
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
Example 2.30: An equivalent circuit for a FET common-source
amplifier or BJT common-emitter amplifier can be modeled by the
circuit shown below. We wish to determine an expression for the gain
of the amplifier, which is the ratio of the output voltage to the input
voltage.
Solution:
Note that although this circuit, which contains a voltage-controlled
current source, appears to be somewhat complicated, we are actually
in a position now to solve it with techniques we have studied up to this
point. The loop on the left, or input to the amplifier, is essentially
detached from the output portion of the amplifier on the right. The
voltage across R2 is υg(t), which controls the dependent current
source.
To simplify the analysis, let us replace the resistors R3, R4, and R5
with RL such that
1 1 1 1
= + +
𝑅𝐿 𝑅3 𝑅4 𝑅5
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Solving these equations for vg(t) yields
𝑅2
𝑣𝑔 (𝑡) =
𝑣 (𝑡)
𝑅1 + 𝑅2 𝑖
From the output circuit, note that the voltage υo(t) is given by the
expression
𝑣𝑜 (𝑡) = −𝑔𝑚 𝑣𝑔 (𝑡)𝑅𝐿
−𝑔𝑚 𝑅𝐿 𝑅2
𝑣𝑜 (𝑡) = 𝑣 (𝑡)
𝑅1 + 𝑅2 𝑖
Therefore, the amplifier gain, which is the ratio of the output voltage
to the input voltage, is given by
𝑣𝑜 (𝑡) −𝑔𝑚 𝑅𝐿 𝑅2
=
𝑣𝑖 (𝑡) 𝑅1 + 𝑅2
𝑣𝑜 (𝑡)
= −165.29
𝑣𝑖 (𝑡)
Answer: V0 = 12V.
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E2.28: Find V0 in the circuit below.
Answer: V0 = 8V.
Answer: VA = -12V.
Answer: V1 = -32/3V.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.
E2.31: Find Ix in the circuit below.
Answer: Ix = -1.5mA.
Answer: V0 = 16V.
E2.33: If the power supplied by the 3-A current source in the figure
below, find VS and the power supplied by the 10-V source.
© copyright Wiley. Basic Engineering Circuit Analysis, 11 th Edition, prepared by Mohamad Najem, Ph.D.