Circuit Note

CN-0148
Devices Connected/Referenced
8-Channel DAS with 16-Bit, Bipolar,
AD7606
Simultaneous Sampling ADC
Circuit Designs Using Analog Devices Products
6-Channel DAS with 16-Bit, Bipolar,
Apply these product pairings quickly and with confidence. AD7606-6
Simultaneous Sampling ADC
For more information and/or support call 1-800-AnalogD
(1-800-262-5643) or visit www.analog.com/circuit. 4-Channel DAS with 16-Bit, Bipolar,
AD7606-4
Simultaneous Sampling ADC
Precision, Low Noise XFET® Voltage
ADR421
Reference

Layout Considerations for an Expandable Multichannel Simultaneous Sampling

Data Acquisition System (DAS) Based on the AD7606 16-Bit, 8-Channel DAS

CIRCUIT FUNCTION AND BENEFITS two devices yields a level of integration, channel density, and
In power line measurement and protection systems, there is a accuracy that is unsurpassed in the industry.
requirement to simultaneously sample large numbers of current
CIRCUIT DESCRIPTION
and voltage channels of multiphase power distribution and
transmission networks. In these applications, the channel count The AD7606 is an integrated, 8-channel data acquisition system
can vary from as few as six channels to greater than 64 channels. with input amplifiers; overvoltage protection; second-order
The AD7606 8-channel data acquisition system (DAS) with analog antialiasing filters; analog multiplexer; 16-bit, 200 kSPS
16-bit bipolar simultaneously sampling SAR ADCs with on- SAR ADC; and a digital filter—all included on-chip. The circuit
chip overvoltage protection greatly simplifies signal condi- shown in Figure 1 consists of two AD7606 devices configurable
tioning circuitry and reduces the overall parts count, board with the ability to use either the internal 2.5 V reference or an
real estate, and cost of the measurement and protection board. external 2.5 V ADR421 reference. When the REF SELECT pin
Even with its high level of integration, each AD7606 requires is connected to a logic high, the internal reference is selected.
only nine low value ceramic decoupling capacitors. When the REF SELECT pin is connected to a logic low, the
external reference is selected.
In measurement and protection systems, simultaneous
sampling capability is needed to maintain the phase informa- The power supply requirements are as follows: AVCC = 5 V,
tion between the current and voltage channels on multiphase VDRIVE = 2.3 V to 5 V (depending on external logic interface
power line networks. The wide dynamic range capability of the requirements).
AD7606 makes it ideal for capturing both under voltage/current This circuit note describes the layout and performance
and over voltage/current conditions. The input voltage range is of an evaluation board that contains two AD7606’s,
pin-programmable for either ±5 V or ±10 V. making a 16-channel data acquisition system. Complete
This circuit note describes details of the recommended PC 16-channel DAS PC board documentation is available at
board layout for applications using multiple AD7606 devices. www.analog.com/CN0148_PCB_Documentation.
The layout is optimized for channel-to-channel matching and Symmetrical layout around the analog input channels and
part-to-part matching and will help reduce the complexity of device decoupling is important for good channel-to-channel
calibration routines in high channel count systems. The circuit matching and part-to part matching. Data is shown to support
provides the ability to use the AD7606 2.5 V internal reference the matching performance obtainable with the 16-channel ADC
when channel-to-channel matching is important or an external shown in Figure 1.
ADR421 precision high accuracy (B grade: ±1 mV max), low
Dual AD7606 Board Layout for 16-Channel DAS
drift (B grade: 3 ppm/°C max), low noise (1.75 µV p-p, typical,
0.1 Hz to 10 Hz) reference for high channel applications that In a system that contains multiple AD7606 devices, a
require excellent absolute accuracy. The low noise and the stability symmetrical layout between the AD7606 devices is
and accuracy characteristics of the ADR421 make it ideal for important to ensure good device-to-device performance
high precision conversion applications. The combination of the matching. Figure 2 shows a layout with two AD7606 devices.

Rev. 0
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whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.
 CN-0148

REFIN/REFOUT AVCC

VDRIVE
+
10µF 1µF 100nF
100nF

REFIN/REFOUT REGCAP2 AVCC1 VDRIVE

REFCAPA
PARALLEL
+ DB0 TO DB15 INTERFACE DB[15:0]
10µF REFCAPB
REFGND CONVST A, CONVST B CONVST
CS CS
V1
RD RD
V1GND
V2 AD7606 BUSY BUSY
V2GND RESET ANALOG SUPPLY
RESET
V3 U1 VOLTAGE 5V
OS 2 OS 2
V3GND OS 1 AVCC
V4 OS 1
EIGHT ANALOG OS 0 POWER SUPPLY
INPUTS V1 TO V8 V4GND OS 0
VDRIVE VDRIVE CIRCUITRY
V5 REF SELECT
V5GND SEE TEXT DIGITAL SUPPLY
V6 PAR/SER SEL VOLTAGE 2.5V
V6GND
ADR421 V7 RANGE BUSY
AVCC VDRIVE
V7GND STBY CONVST
+VIN VOUT REFIN/REFOUT V8 CS
+ V8GND AGND RD FPGA
AGND DB[15:0]
10µF 100nF 100nF
REFIN/REFOUT AVCC
CS1
VDRIVE OS 2
+
96 WAY BOARD CONNECTOR

1µF OS 1
10µF 100nF
100nF OS 0
RESET

Rev. 0 | Page 2 of 6
REFIN/REFOUT REGCAP2 AVCC1 VDRIVE CONVERTER EVALUATION &
REFCAPA DEVELOPMENT BOARD
PARALLEL DB[15:0] EVAL-CED1Z
+ DB0 TO DB15 INTERFACE
10µF REFCAPB
REFGND CONVST A, CONVST B CONVST
CS CS1
V1
RD RD
V1GND
V2 AD7606 BUSY
V2GND RESET RESET
V3 U2 OS 2
V3GND OS 2
OS 1 OS 1
EIGHT ANALOG V4 OS 0 OS 0
INPUTS V1 TO V8 V4GND
V5 VDRIVE
REF SELECT
V5GND SEE TEXT
V6 PAR/SER SEL
V6GND
V7 RANGE
V7GND VDRIVE
STBY
V8
V8GND AGND

Connections Between Devices Corresponding to Channel-to-Channel and Part-to-Part Matching Tests)

1DECOUPLING SHOWN ON THE AVCC PIN APPLIES TO EACH AVCC PIN (PIN 1, PIN 37, PIN 38, PIN 48).
DECOUPLING CAPACITOR CAN BE SHARED BETWEEN AV CC PIN 37 AND PIN 38.
2DECOUPLING SHOWN ON THE REGCAP PIN APPLIES TO EACH REGCAP PIN (PIN 36, PIN 39).
08906-001

Figure 1. 16-Channel, 16-Bit Data Acquisition System Using Two AD7606 8-Channel DAS (Simplified Schematic, All Connections Not Shown. See Text for Specific
Circuit Note
Circuit Note CN-0148
The AV CC supply plane runs to the right of both devices. The decoupling capacitors for the REFIN/REFOUT pin and the
The VDRIVE supply track runs to the left of the two AD7606 REFCAPA and REFCAPB pins are critical performance capacitors
devices. The ADR421 reference chip is positioned between both and should be placed as close as possible to their respective
AD7606 devices, and the reference voltage track runs upward to AD7606 pins; where possible, they should be placed on the same
Pin 42 of U2 and downward to Pin 42 of U1. A solid ground side of the board as the AD7606 device. Figure 3 shows the
plane is used. These symmetrical layout principles can be recommended decoupling on the top layer of the AD7606 board.
applied to a system that contains more than two AD7606 The four ceramic capacitors shown are the decoupling caps for the
devices. The AD7606 devices can be placed in a north-south REFIN/REFOUT pin, REGCAP pins, and REFCAPA and
direction with the reference voltage located midway between REFCAPB pins. These capacitors are placed in a north-south
the AD7606 devices and the reference track running in the direction to get as close to their respective pins as possible.
north-south direction, similar to Figure 2.
Good decoupling is also important to lower the supply
impedance presented to the AD7606 and to reduce the
magnitude of the supply spikes seen by the AD7606 devices.
The decoupling capacitors should be placed close to, ideally right
up against, these pins and their corresponding ground pins.

PIN 1
AVCC

REFIN/REFOUT
AD7606

REFCAPA/B
U2
REGCAP

REGCAP
U2

08906-003
Figure 3. Top Layer Decoupling Showing Capacitors on the Two
VDRIVE

REFIN/REFOUT

REGCAP Pins, REFIN/REFOUT Pin, and REFCAPA/B Pins.

REFCAPA/B
REGCAP
REGCAP

ADR421
AVCC
REFERENCE

VDRIVE

AVCC

AVCC

AD7606
U1
U1
AVCC
REFIN/REFOUT

REFCAPA/B

08906-004
REGCAP

REGCAP

08906-002

Figure 4. Bottom Layer Decoupling Showing Capacitors on the

Four AVCC Pins and the VDRIVE Pin.
Figure 2. PCB Layout for 16-Channel DAS Using Two AD7606’s

Rev. 0 | Page 3 of 6
CN-0148 Circuit Note
Figure 4 shows bottom layer decoupling. Bottom layer Using the AD7606 Internal Reference as the System
decoupling is for the four AVCC pins and the VDRIVE pin. Reference
Multiple vias are used to connect the pins to their respective The AD7606 has an internal 2.5 V reference that is internally
decoupling capacitors. Symmetrical layout of the decoupling amplified to provide the AD7606 ADC with an approximate
capacitors around the AD7606 devices will help with part-to- 4.5 V buffered reference. In high channel count applications
part performance matching. Multiple vias are used to connect where channel-to-channel and part-to-part matching
capacitor pads and pin pads to ground and supply planes and performance is critical, the internal reference of one AD7606
the reference track. can be used to provide the reference to the second AD7606
Channel-to-Channel Matching for 16-Channel System device. For this configuration, U1 is configured to operate with
In high channel count systems good channel-to-channel and the internal reference enabled, as shown in Figure 7.
part-to-part performance matching will help to greatly simplify The AD7606 U2 device is configured to operate in the external
calibration routines. Symmetrical layout of the AD7606 devices, reference mode. The 2.5 V reference available at the REFIN/RFOUT
the analog input channels, and the decoupling capacitors will pin of U1 is routed to the REFIN/REFOUT pin of U2. A 10 µF
aid performance matching between multiple devices. The use of decoupling capacitor is placed on the REFIN/REFOUT pins of the
a common system reference will further enhance matching AD7606 devices. On both AD7606 U1 and U2, the REFCAPA and
performance in the system. Figure 5 shows the circuit configu- REFCAPB pins are shorted together and decoupled to GND using
ration used to measure channel-to-channel matching between a 10 µF ceramic capacitor.
the 16 channels on the board when all inputs are grounded. Both AD7606 devices are operating at a sampling rate of
There is a maximum histogram spread of 7 codes with each 200 kSPS, and a 7.5 V dc signal is applied to V1 and V2 of U1,
channel histogram centered on code 0, as shown in Figure 6. as shown in Figure 7. The histogram of codes is recorded and
shown in Figure 8. The difference in the mean output code was
REFIN/REFOUT
10µF
1.2 codes between channels on the same device. All 16 channels
REF SELECT on the board are converting at 200 kSPS.
1kΩ
AD7606
U1
REFIN/REFOUT
V1 10µF VDRIVE
V2 REF SELECT
V3 1kΩ
AVCC AD7606
ADR421 U1

VIN VOUT V8 7.5V V1

V2
GND V3
REFIN/REFOUT AVCC
10µF 100nF 100nF 10µF ADR421
REF SELECT
1kΩ VIN VOUT V8
AD7606
U2 GND
REFIN/REFOUT
V1
10µF 100nF 100nF 10µF REF SELECT
V2
V3 1kΩ
AD7606
U2
08906-005

V8 V1
V2
V3
Figure 5. Simplified Diagram of Circuit Used to Test Channel-to-Channel
Matching in a 16-Channel System Using Two AD7606’s, All Inputs Grounded,
08906-007

Using External ADR421 Reference V8

Figure 7. Simplified Diagram of Circuit Used to Test Channel-to-Channel

Matching in One AD7606 Using Internal U1 Reference
08906-006

08906-008

Figure 6. Histogram of Circuit Shown in Figure 5 Showing Channel-to-

Channel Matching in 16-Channel System Using External ADR421 Reference. Figure 8. Histogram of Circuit Shown in Figure 7

Rev. 0 | Page 4 of 6
Circuit Note CN-0148
The 7.5 V signal was applied to V1 of U1 and V1 of U2; all The value for the actual ideal code will vary over temperature
16 channels on the board are operating at 200 kSPS, as shown depending on the temperature coefficient specification of the
in the simplified configuration circuit of Figure 9. The histo- system reference. In applications where absolute accuracy
gram of codes is recorded in Figure 10. The difference in the is important or in applications that wish to avoid complex
mean output code was 1.4 codes between V1 channels on temperature calibration routines for absolute accuracy and
different devices. channel matching, a tight tolerance low drift 2.5 V reference
REFIN/REFOUT
like the ADR421 should be used as the system reference for the
10µF VDRIVE AD7606 devices.
REF SELECT
1kΩ
A dc voltage of 7.5 V is applied to the input of U1 (V1 and V2),
AD7606
U1 shown in the circuit of Figure 11, using the external reference.
7.5V V1 The histogram of codes of the two channels on U1 is recorded
V2
V3 in Figure 12. The difference in the mean of the histogram of
AVCC
codes for both channels is 0.9 LSB.
ADR421
VIN VOUT V8 REFIN/REFOUT
10µF
GND REF SELECT
REFIN/REFOUT
1kΩ
10µF 100nF 100nF 10µF REF SELECT AD7606
1kΩ U1
AD7606 7.5V V1
U2
V2
V1 V3
AVCC
V2
V3 ADR421
VIN VOUT V8
08906-009

V8 GND
REFIN/REFOUT

10µF 100nF 100nF 10µF REF SELECT

Figure 9. Simplified Diagram of Circuit Used to Test Part-to-Part Matching
1kΩ
Between Two AD7606’s, Internal U1 Reference Used as System Reference AD7606
U2

V1
V2
V3

08906-011
V8

Figure 11. Simplified Diagram of Circuit Used to Test Channel-to-Channel

Matching in One AD7607 Using External Reference
08906-010

Figure 10. Histogram of Circuit Shown in Figure 9

When using the internal reference of one AD7606 as the system

reference, the above plots indicate that the channel-to-channel
matching is very good between channels on a single device and
between channels on multiple AD7606 devices.
08906-012
Absolute Accuracy
When absolute accuracy of the ADC conversion result, in
Figure 12. Histogram of Circuit Shown in Figure 11
addition to channel-to-channel and part-to-part matching, is
critical, an external tight tolerance low drift reference should be The 7.5 V dc is applied to V1 channels on U1 and U2 AD7606
used as the system reference. In this circuit, the ADR421 2.5 V devices in the circuit of Figure 13 to test part-to-part matching
reference is used as the system reference. using the external reference. The histogram of codes of the two
V1 channels for two AD7606 devices is shown in Figure 14. All
The ADC output code will be influenced by the reference
16 channels on the board are running at 200 kSPS throughput
voltage applied to the AD7606 device:
rate. The difference in the histogram mean between the V1
VIN V channels on U1 and U2 is 0.6 LSB.
Actual Ideal Code = × 215 × REF
10 V 2. 5 V

Rev. 0 | Page 5 of 6
CN-0148 Circuit Note
COMMON VARIATIONS
REFIN/REFOUT
10µF The AD7606 is an 8-channel DAS. Also available are the
REF SELECT
1kΩ
AD7606-6 (6-channel DAS) and AD7606-4 (4-channel DAS).
AD7606 The AD7607 is a 14-bit version of the AD7606. Alternate
U1
V1
voltage references can be chosen using the Voltage Reference
7.5V
V2 Selection and Evaluation Tool.
V3
AVCC
ADR421
V8
LEARN MORE
VIN VOUT
MT-021 Tutorial, Successive Approximation ADCs.
GND
REFIN/REFOUT
Analog Devices.
10µF 100nF 100nF 10µF REF SELECT
1kΩ MT-031 Tutorial, Grounding Data Converters and Solving
AD7606
U2 the Mystery of "AGND" and "DGND". Analog Devices.
V1 MT-101 Tutorial, Decoupling Techniques. Analog Devices.
V2
V3 Voltage Reference Selection and Evaluation Tool.
Analog Devices.
08906-013

V8
Data Sheets and Evaluation Boards
Figure 13. Simplified Diagram of Circuit Used to Test Part-to-Part Matching 16-Channel DAS PC Board Documentation
Between Two AD7606’s Using External Reference
AD7606 Data Sheet
AD7606 Evaluation Board
AD7606-4 Data Sheet
AD7606-4 Evaluation Board
AD7606-6 Data Sheet
AD7606-6 Evaluation Board
ADR421 Data Sheet
08906-014

EVAL-CED1Z Converter Evaluation and Development Board

Figure 14. Histogram of the Circuit Shown in Figure 13

The histograms indicate that, with the ADR421 external system

reference, the matching between the mean of the histograms on
REVISION HISTORY
one AD7606 device and between multiple AD7606 devices is 6/10—Revision 0: Initial Version
less than 1 LSB.
Conclusions
This layout ensures good channel-to-channel matching using a
single AD7606 and also good part-to-part matching between
multiple AD7606’s on the same PC board. Symmetrical layout
around the AD7606 devices and, in particular, the decoupling
capacitors will aid with channel-to-channel and part-to-part
matching. Good channel-to-channel and part-to-part matching
will mean less complex calibration routines in high channel
count systems.

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registered trademarks are the property of their respective owners.
CN08906-0-6/10(0)

Rev. 0 | Page 6 of 6