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Ref. 1. (N. G. Palan) VHDL Programming: Half and Full Adder, Full Subractor, Four Bit Binary

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This document outlines the course objectives, learning outcomes, topics, and readings for ELE 603: Advanced Digital System Design using VHDL. The course covers VHDL modeling of combinational and sequential digital circuits, including half adders, full adders, multiplexers, flip flops, counters, and other circuits. Students will learn VHDL coding techniques to design digital circuits and will be able to write VHDL code for circuits of varying complexity. Suggested readings provide additional resources for learning VHDL and digital logic design concepts.

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Ref. 1. (N. G. Palan) VHDL Programming: Half and Full Adder, Full Subractor, Four Bit Binary

Uploaded by

sonawaneulhas292
75 views2 pages
This document outlines the course objectives, learning outcomes, topics, and readings for ELE 603: Advanced Digital System Design using VHDL. The course covers VHDL modeling of combinational and sequential digital circuits, including half adders, full adders, multiplexers, flip flops, counters, and other circuits. Students will learn VHDL coding techniques to design digital circuits and will be able to write VHDL code for circuits of varying complexity. Suggested readings provide additional resources for learning VHDL and digital logic design concepts.

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ELE 6031

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This document outlines the course objectives, learning outcomes, topics, and readings for ELE 603: Advanced Digital System Design using VHDL. The course covers VHDL modeling of combinational and sequential digital circuits, including half adders, full adders, multiplexers, flip flops, counters, and other circuits. Students will learn VHDL coding techniques to design digital circuits and will be able to write VHDL code for circuits of varying complexity. Suggested readings provide additional resources for learning VHDL and digital logic design concepts.

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75 views2 pages

Ref. 1. (N. G. Palan) VHDL Programming: Half and Full Adder, Full Subractor, Four Bit Binary

Uploaded by

sonawaneulhas292
This document outlines the course objectives, learning outcomes, topics, and readings for ELE 603: Advanced Digital System Design using VHDL. The course covers VHDL modeling of combinational and sequential digital circuits, including half adders, full adders, multiplexers, flip flops, counters, and other circuits. Students will learn VHDL coding techniques to design digital circuits and will be able to write VHDL code for circuits of varying complexity. Suggested readings provide additional resources for learning VHDL and digital logic design concepts.

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ELE 603: Advanced Digital System Design using VHDL

Total
Credits: 3
Hours:60
Unit Topics Lectures/
Marks
Course Objective
 Introduction VHDL to students for different combinational and sequential circuits.
 To familiarize students with designing techniques of combinational and sequential
circuits.

Learning outcome
Students will able to design digital circuits according to requirement.
Student will able to write VHDL code for digital circuit with the help of different
modeling style.

UNIT-1 Introduction to VHDL 10P 10M


Introduction, library, entity, architecture, modeling style, concurrent and
sequential statements, identifier, data object and data types, attributes.

UNIT-2 Combinational Logic Circuits 14p 14M


Introduction to combinational circuits, Revision of K-Map, Combinational
logic examples (half and full adder, full subtractor, four bit binary adder,
multiplexer and demultiplexers, any combinational circuit upto 3 input)
Ref. 1. (N. G. Palan)

VHDL Programming: half and full adder, full subractor, four bit binary
adder, multiplexer and demultiplexers

Idea of seven segment display (Common anode, common cathode) and


designing of BCD to seven segment decoder. Ref. 1 (N. G. Palan)

UNIT-3 Flip Flop Circuits 18P 18M


Introduction to R-S, J-K, T and D flip flops, Excitation table of flip flops,
flip flop conversions: R-S to J-K, S-R to T, J-K to D and T to D

VHDL Programming: Flip flops S-R, D, J-K, J-K master Slave and T

Applications of Flip flops Ref. 2 (A. Anandkumar)

UNIT-4 Sequential Logic Design 18P 18M


State table, state diagram, state equation and state reduction in sequential
logic design, Brief revision of counters:

Design of Asynchronous counters - Design of Mod-6 counter using T flip


flop, Design of Mod-10 counter using T flip flop

VHDL Programming: Mod-6 asynchronous counter

Design of Synchronous counters- Design of synchronous 3 bit up-down


counter using J-K flip flop, Design of synchronous 3 bit up counter, Design
of synchronous 3 bit down counter, Design of synchronous Mod-10 bit up-
down counter using T flip flop, Design of synchronous modulo 6 Grey
code counter.

VHDL Programming: 3 bit up-down counter.

Suggested 1. “VHDL Primer”, J. Bhaskar, Pearson Prentice Hall India


Readings 2. “VHDL Programming by Example”, Douglas L Perry, McGraw Hill
Professional.
3. “Digital Electronics and Logic Design”, N. G. Palan, Technova
Publications, Pune.
4. “Fundamentals of Digital Circuits” A. Anand Kumar, PHI Publication
5. “Digital Design”, M. Morris Mano, Michael D. Ciletti, Pearson India
6. “Digital Logic and Computer Design”, M Morris Mano, Prentice Hall
India
7. “Modern Digital Electronics”, R. P. Jain, Tata McGraw Hill Publishing.
8. “Digital Circuits and Design”, S. Shalivahanan, Vikas Publishing House

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