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Lab Manual: Digital System Design (PR) : COT-215 Digital Electronics (P) : IT-211

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Lab Manual

Digital System Design (Pr): COT-215


Digital Electronics (P): IT-211
Lab Instructions
Whether an experiment contains one or
several practicals /programs

Several ?
practicals / programs One
practical / program

 Lab Teacher forms groups of the students based on All Students need to perform the
practical/program

 Assign all practicals /programs among all groups

 Teacher decides whether the completed practicals / programs can be appropriately described
using flow chart, algorithm, query statement, etc.
 Teacher issues necessary instructions to the students for writing practicals / programs
accordingly

 Students write experiments in practical files and get them signed by the lab teacher
 Students make entries in the list of contents of the practical files and get them signed by
the lab teacher

Whether practical has been verified


and signed by the lab teacher?
?
 If a student has not completed a practical, he/she is expected to complete it at his/her
own with the help of his/her fellow students in his/her hostel
 The student completes the practical file and submits it to the concerned teacher in
his/her office or mail box on next working day

 In case of an experiment containing several practicals, a lab teacher needs to think whether a
practical performed by the students in one group needs to be repeated by the other groups in lab on
the same day?
OR
A practical performed by the students in one group needs to be repeated as assignments to be
completed by the students of other groups in their hostels? Here, an assignment includes both
executing a program on computer and also writing the same in practical file.
OR
A practical performed by the students in one group needs to be repeated as assignments, only
writing practicals in their practical files, for the students of other groups in their hostels?

 Teacher issues necessary instructions to the students accordingly.


Lab Manual
Digital System Design (Pr): COT-215
and Digital Electronics (P): IT-211
L T P Practical exam: 40
- - 3 Sessional: 60

Experiment 1 (Truth Table and Logic Gates )

I. To study and verify the truth table of various logic gates (NOT, AND, OR, NAND,
NOR, EX-OR, & EX-NOR).

Experiment 2 (Half Adder)

I. To design and verify a half adder using S= (x+y)(x’+y’) C= xy


II. To design and verify a half adder using S= xy’+x’y C= xy
III. To design and verify a half adder using S= (C+x’y’)’ C=xy
IV. To design and verify a half adder using S= (x+y)(x’+y’) C= (x’+y’)’
V. To design and verify a half adder using S = x X-OR y C=xy

Experiment 3 (Full Adder)

I. To design and verify a full adder using S = x’y’z+x’yz’+xy’z’+xyz C=xy+xz+yz


II. To design and verify a full adder using S = z X-OR(x X-OR y) C=xy’z+x’yz+xy
III. To design and verify a full adder using full adder IC 7483.

Experiment 4 (Half Subtracter)

I. To design and verify a half subtractor using D = x’y +xy’ B=x’y.


II. To design and verify a half subtractor using D = x X-OR y B=x’y.
III. To design and verify a full subtractor using D = x’y’z+x’yz’+xy’z’+xyz B=x’y+x’z+yz
IV. To design and verify a full subtractor using IC 7483.

1
Experiment 5 (Combinational Circiut, BCD, Number Converter etc.)

I. Design a 4 bit magnitude comparator using combinational circuits.


II. Design a BCD to Excess 3 code converter using combinational circuits.
III. Design a BCD to decimal converter using combinational circuits.
IV. Design a octal to binary converter using combinational circuits.
V. Design a 3 bit binary to gray code converter using combinational circuits.
VI. Design a combinational circuit whose output is the 2’s complement of the input
number.

Experiment 6 (Multiplexer)

I. To design and implement a 4:1 multiplexer.


II. To design and implement a 8:1 multiplexer
III. To design and implement a 16:1 multiplexer
IV. To design a multiplexer tree to implement 32:1 multiplexer using two 16:1 multiplexer.

Experiment 7 (Demultiplexer)

I. To design and implement a 2:4 demultiplexer.


II. To design and implement a 3:8 demultiplexer.
III. To design and implement a 4:16 demultiplexer.
IV. To design and implement a 1:4 demultiplexer.
V. To design and implement a 4:16 demultiplexer using two 3:8 demultiplexer.

Experiment 8 (Decoder)

I. To design and verify a 2:4 decoder.


II. To design and verify a 3:8 decoder.
III. To design a BCD to decimal decoder.
IV. To design and verify a 4:16 decoder.
V. Implement a full adder circuit with a decoder

Experiment 9 (Encoder)

I. To design and implement a 4:2 encoder.


II. To design and implement a 8:3 encoder.
III. To design and implement a decimal to BCD encoder.
IV. To design and implement a octal to binary encoder.

2
Experiment 10 (Flip-Flops )

I. To design and verify the operation of RS flip-flops using logic gates.


II To design and verify the operation of T flip-flops using logic gates
III. To design and verify the operation of D flip-flops using logic gates.
IV. To design and verify the operation of JK flip-flops using logic gates.
V. To verify the operation of a RS flip-flop using ICs.
VI. To verify the operation of a T flip-flop using ICs
VII. To verify the operation of a D flip-flop using ICs
VIII. To verify the operation of a JK flip-flop using ICs.

Experiment 11 (Counter)

I. To verify the operation of asynchronous counter.


II. To verify the operation of a synchronous counter
III. To verify the operation of a decade counter.
IV. To design and implement the operation of a Mod-16 counter using JK flip-flops
V. To design and implement a Mod-10 counter using JK flip flops and logic gates.
VI To verify the operation of a ring counter.

Experiment 12 (Shift Register)

I. To verify the operation of a 4 bit shift register using IC 7495.


II. To design and verify the operation of a 4-bit shift left register using D flip-flops
III. To design and verify the operation of a 4-bit shift right register using D flip-flops.

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