A/D Converter (ADC) Basics

A/D Converter (ADC) Introduction

The ideal A/D converter (ADC) produces a digital output code that is a function of the
analog input voltage and the voltage reference input. The figure below shows the basic
ADC measurement circuit.

The formula for the ADC digital output is provided by Equation 1

(1)
OutputCode=FS(VIN+−VIN−)(VREF+−VREF−)

Full-Scale (FS) is defined as analog input voltage range where the ADC digitizes the input
up to the maximum full-scale input voltage. The FS input voltage range is determined by the
voltage reference value. FS range varies from device to device, for an n-bit (n is the
resolution in bits) ADC, FS = (2n) (code width)

ADC Transfer Function

Some ADCs have pseudo-differential configuration, two pins (VIN+ and VIN-) are used
for the signal input. With a pseudo-differential input, the second input pin provides the
reference for the signal. The distinction between pseudo-differential inputs and standard
differential inputs is that the signal on the VIN- can only deviate a small range from the
voltage of the VSS supply rail. Although this restriction requires that a single-ended
source is connected to the ADC, the input stage maintains the ability to cancel small
common-mode fluctuations on the input pins. The voltage reference for the ADC may be
provided internally or by an external source. Since the accuracy of the measurement
results is directly affected by the reference, it is important that the reference source is
stable over time and temperature.
For low cost converters, the reference input is often implemented as a single-ended
input. In this case, one pin is used for the reference input and the input voltage range for
the converter is determined by VSS and VREF. For higher performance converters, two
voltage reference pins are typically provided. The input voltage range for these
converters is determined by the voltage difference between VREF+ and VREF-. In
either case, the voltage range for the reference inputs is usually restricted by the VDD
and VSS power supply rails. Although a “real world” ADC will have higher resolution, a
theoretical 3-bit ADC will be used here to demonstrate the performance of the ideal
converter and the various sources of error. The figure shows the transfer function of the
ideal 3-bit ADC. As the transfer function indicates, the ideal 3-bit ADC provides eight
equally spaced digital output codes over the analog input voltage range. Each digital
output code represents a fractional value of the reference voltage. The largest value
that can be obtained from the ADC is (n-1)/n, where n is the resolution in bits. Referring
to the figure, the largest output value that the 3-bit ADC can produce is 7/8 ths of the full-
scale reference voltage.

ADC Code Width

The width of a given output code (code width) is the range of analog input voltages
between two adjacent transition points of an Analog-to-Digital Converter (ADC) digital
output code. The code widths are referenced to the weight of 1 Least Significant Bit
(LSB), which is defined by the resolution of the converter and the analog reference
voltage (VREF). For example, 1 LSB = VREF/2n, where n is the number of bits of resolution.
For example, if a 4.096 V reference is used with a 12-bit ADC, 1 LSB will have a weight
of 4.096 V/212, or 1 mV. All codes will have a width of 1 LSB for an ideal ADC (i.e,
zero offset error, zero gain error, and zero DNL, LNL errors). The transfer function of an
ideal 3-bit ADC figure below shows the transition points and code width between
adjacent points.

ADC Resolution & Accuracy

Analog-to-Digital Converter (ADC) resolution can be used to describe the general
performance of an ADC. Resolution and accuracy are terms that are often
interchanged.
The resolution of an A/D converter (ADC) is specified in bits and determines how many
distinct output codes (2n) the converter is capable of producing. In other words,
resolution is the smallest voltage increment corresponding to a 1 LSB change. It's an
important ADC specification because it determines the smallest analog input signal an
ADC can resolve.
For example, an 8-bit ADC produces 2 8, or 256 output codes. The accuracy of the ADC
determines how close the actual digital output is to the theoretically expected digital
output for a given analog input. In other words, the accuracy of the converter
determines how many bits in the digital output code represent useful information about
the input signal. The accuracy of the ADC is a function of its internal circuitry and noise
from external sources connected to the ADC input. In some cases, extra bits of
resolution that are beyond the accuracy of the ADC can be beneficial.

ADC Effective Resolutions

Effective resolution describes the useful bits from an Analog to Digital conversion with
respect with the input noise. Effective Number Of Bits (ENOB) is often used to specify
ADC effective resolution. ENOB is NOT the same as the actual resolution of the ADC.
Effective resolution is expressed using two units of measure: the specification of bits
rms (0.707) refers to the output data; Effective resolution predicts the probability of a
conversion level of repeatability of 70.7% for an input signal.

ENOB equation (based on an ideal ADC’s Signal-to-Noise Ratio (SNR):

SNR = (6.02) (ENOB) + 1.76 dB, where N is the ADC’s resolution.
ENOB = (SNR - 1.76)/6.02
ADC AC Specifications
For Analog-to-Digital Converter (ADC) applications where the signal is steady-state or
has an extremely low frequency compared to the ADC sampling frequency, DC
specifications have the most significance. When the signal frequency is increased,
however, other measures must be used to determine the performance of the ADC. In
this case, the performance of the ADC in the frequency domain becomes significant to
the designer. Imperfections of the ADC introduce noise and distortion into the sampled
output. In fact, even the ideal ADC introduces errors into the sampled AC signal in the
form of noise. The AC specifications of an ADC tell the designer how much noise and
distortion has been introduced into the sampled signal and the accuracy of the
converter for a given input frequency and sampling rate.

ADC Quantization Error

ADC Quantization
Quantization is the process where the least significant bit (LSB) is determined if the input analog
voltage lies in the lowest sub-range of the input voltage range. For example, consider an analog-
to-digital coonverter (ADC) with VREF = 2 V and resolution is 3-bit. The 2 V is divided into
eight sub-ranges, so the LSB voltage is within 250 mV. Now an input voltage of 0 V as well as
250 mV is assigned to the same output digital code 000. The input analog voltage range from
251 mV to 500 mV will be assigned the digital code 001 and so on. To define a perfect ADC, the
concept of quantization must be used. Due to the digital nature of an ADC, continuous output
values are not possible. The perfect ADC performs the quantization process during conversion.
This results in a staircase transfer function where each step represents one LSB. This figure
below shows the transfer function of a perfect 3-bit ADC operating in single ended mode.

Quantization Error
From the figure above, we can see that an input voltage of 0 V produces an output code 000. At
the same time, an input voltage of 250 mV also produces the same output code 000. This is the
quantization error due to the process of quantization. As the input voltage rises from 0 V, the
quantization error also rises from 0 LSB and reaches a maximum quantization error of 1 LSB at
250 mV. Again the quantization error increases from 0 to 1 LSB as the input rises from 250 mV
to 500 mV. This maximum quantization error of 1 LSB can be reduced to ±0.5 LSB by shifting
the transfer function towards left through 0.5 LSB.
The figure below shows a quantization adjusted perfect transfer function together with a ideal
transfer function. the perfect ADC equals the ideal ADC on the exact midpoint of every step.
This means that the perfect ADC essentially rounds input values to the nearest output step value.

ADC Signal-to-Noise Ratio

(SNR)
If an AC signal is applied to an ideal A/D converter, noise present in the digitized output
will be due to quantization error. For the ideal converter, the maximum error for any
given input will be +/- ½ LSb. If a linear ramp signal is applied to the converter input and
the output error is plotted for all analog inputs, the result will be a sawtooth waveform
with a peak-to-peak value of 1 LSb as shown in the figure below:
The root-mean-square (RMS) amplitude of the error output can be approximated by the
equation below.
(1)
ERRORRMS=1/(12−−√)∙1LSB
The maximum theoretical signal-to-noise ratio (SNR) for an ADC can be determined
based on the RMS quantization error determined above. If a full-scale (FS) sine wave is
applied to the input of the ADC, the maximum theoretical SNR is determined by the
equation below, where N is the resolution of the ADC in bits. The above formula
assumes that the signal noise is measured over the entire usable bandwidth of the ADC
(0 - fs/2), where fs = sampling frequency. For the case of oversampling where the signal
bandwidth is less than the Nyquist bandwidth, the theoretical SNRof the A/D converter
is increased by 3 dB each time the fs is doubled.
(2)
SNR=6.02∙N+1.76dB

ADC Total Harmonic

Distortion plus Noise
(THD+N)
The Total Harmonic Distortion Value, (THD), is the root-sum-square (RMS) value of
the harmonics produced by the Analog-to-Digital Converter (ADC) relative to the RMS
level of a sinusoidal input signal near full-scale. For example, assuming an input signal
having frequency f, the harmonic frequencies are 2f, 3f, 4f, etc. The non-linearity in the
converter will produce harmonics that were not present in the original signal. These
harmonic frequencies usually distort the output which degrades the performance of the
ADC. This effect can be quantified as THD which is the ratio of the sum of powers of the
harmonic frequency components to the power of the fundamental/original frequency
component (in terms of RMS voltage). In practice, only the first several harmonics of the
input signal are included in the THD measurement because greater-order harmonics
are insignificant compared to the noise floor in the measured FFT output. This ratio is
specified in RMS decibels (dB) or RMS dBc. The formula describing THD is as follow:
(1)
THD=(V22+V23+.....+V2n−−−−−−−−−−−−−−−−√)/V1

The THD should have a minimum value for less distortion. As the input signal amplitude
increases, the distortion increases. The THD value also increases with the increase in
the frequency.

Total Harmonic Distortion plus Noise (THD+N)

Total Harmonic Distortion plus Noise, or THD+N, is the RMS value of the root-sum-
square of the harmonics and noise produced by the ADC relative to the RMS level of a
sinusoidal input near full-scale. THD+N does not necessarily include all data from the
FFT analysis. For a valid THD+N specification, the noise bandwidth must be specified. If
the noise bandwidth is taken over the entire usable bandwidth of the ADC (0 - fs/2),
then the THD+N measurement provides the same results as SINAD.

ADC Effective Number of

Bits
The Effective Number Of Bits (ENOB) value for an Analog-to-Digital Converter (ADC)
is computed by substituting the measured signal-to-noise ratio plus distortion (SINAD)
value into the equation that describes the signal-to-noise ratio (SNR) for an ideal
analog-to-digital (ADC) and solving for N, the number of bits. The equation below shows
the calculation for ENOB.
(1)
ENOB=(SINAD−1.76dB)/6.02
The ENOB is usually presented for a range of input frequencies and tells the designer
how accurate the converter is as a function of input frequency and the chosen sampling
rate. The Figure below shows a graphical example of ENOB data taken from an ADC.
Note that the sampling frequency and operating conditions have been specified.