LTC1435

High Efficiency Low Noise

Synchronous Step-Down
Switching Regulator
U
FEATURES DESCRIPTION
■ Dual N-Channel MOSFET Synchronous Drive The LTC®1435 is a synchronous step-down switching
■ Programmable Fixed Frequency regulator controller that drives external N-channel power
■ Wide VIN Range: 3.5V to 36V Operation MOSFETs using a fixed frequency architecture. Burst
■ Ultrahigh Efficiency ModeTM operation provides high efficiency at low load
■ Very Low Dropout Operation: 99% Duty Cycle currents. A maximum duty cycle limit of 99% provides low
■ Low Standby Current dropout operation which extends operating time in bat-
■ Secondary Feedback Control tery-operated systems.
■ Programmable Soft Start
The operating frequency is set by an external capacitor

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■ Remote Output Voltage Sense allowing maximum flexibility in optimizing efficiency. A
■ Logic Controlled Micropower Shutdown: IQ < 25µA secondary winding feedback control pin, SFB, guarantees
■ Foldback Current Limiting (Optional) regulation regardless of load on the main output by
■ Current Mode Operation for Excellent Line and Load forcing continuous operation. Burst Mode operation is
Transient Response inhibited when the SFB pin is pulled low which reduces
■ Output Voltages from 1.19V to 9V noise and RF interference.
■ Available in 16-Lead Narrow SO and SSOP Packages
U Soft start is provided by an external capacitor which can
APPLICATIONS be used to properly sequence supplies. The operating
current level is user-programmable via an external current
■ Notebook and Palmtop Computers, PDAs
sense resistor. Wide input supply range allows operation
■ Cellular Telephones and Wireless Modems
from 3.5V to 30V (36V maximum).
■ Portable Instruments , LTC and LT are registered trademarks of Linear Technology Corporation.
■ Battery-Operated Devices Burst Mode is a trademark of Linear Technology Corporation.
■ DC Power Distribution Systems

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TYPICAL APPLICATION VIN
4.5V TO 28V
COSC VIN CIN
COSC + 22µF
M1
68pF RUN/SS TG 35V
CSS Si4412DY RSENSE
0.1µF ×2 0.033Ω VOUT
ITH SW 2.9V/3.5A
CC DB L1
330pF LTC1435 CMDSH-3 10µH
R1
RC INTVCC CB 32.4k COUT
10k 0.1µF + 100µF
10V
SGND BOOST R2 ×2
+ D1
22.1k
100pF 4.7µF M2 MBRS140T3
VOSENSE BG Si4412DY

PGND
SENSE – SENSE +
1000pF

1435 F01

Figure 1. High Efficiency Step-Down Converter

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LTC1435
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ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION
Input Supply Voltage (VIN)......................... 36V to – 0.3V
TOP VIEW ORDER PART
Topside Driver Supply Voltage (Boost) ......42V to – 0.3V NUMBER
COSC 1 16 TG
Switch Voltage (SW)............................. VIN + 5V to – 5V
RUN/SS 2 15 BOOST
EXTVCC Voltage ........................................ 10V to – 0.3V LTC1435CG
ITH 3 14 SW
Sense+, Sense– Voltages ......... INTVCC + 0.3V to – 0.3V SFB 4 13 VIN LTC1435CS
ITH, VOSENSE Voltages .............................. 2.7V to – 0.3V SGND 5 12 INTVCC LTC1435IG
SFB, Run/SS Voltages .............................. 10V to – 0.3V VOSENSE 6 11 BG LTC1435IS
Peak Driver Output Current < 10µs (TG, BG) ............. 2A SENSE– 7 10 PGND
INTVCC Output Current ........................................ 50mA SENSE+ 8 9 EXTVCC
Operating Ambient Temperature Range G PACKAGE S PACKAGE
LTC1435C............................................... 0°C to 70°C 16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO

LTC1435I............................................ – 40°C to 85°C TJMAX = 125°C, θJA = 130°C/ W (G)

TJMAX = 125°C, θJA = 110°C/ W (S)
Junction Temperature (Note 1)............................. 125°C

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Storage Temperature Range ................. – 65°C to 150°C Consult factory for Military grade parts.
Lead Temperature (Soldering, 10 sec).................. 300°C

ELECTRICAL CHARACTERISTICS TA = 25°C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop
IIN VOSENSE Feedback Current (Note 2) 10 50 nA
VOSENSE Feedback Voltage (Note 2) ● 1.178 1.19 1.202 V
∆VLINEREG Reference Voltage Line Regulation VIN = 3.6V to 20V (Note 2) 0.002 0.01 %/V
∆VLOADREG Output Voltage Load Regulation ITH Sinking 5µA (Note 2) ● 0.5 0.8 %
ITH Sourcing 5µA ● – 0.5 – 0.8 %
VSFB Secondary Feedback Threshold VSFB Ramping Negative ● 1.16 1.19 1.22 V
ISFB Secondary Feedback Current VSFB = 1.5V –1 –2 µA
VOVL Output Overvoltage Lockout 1.24 1.28 1.32 V
IQ Input DC Supply Current EXTVCC = 5V (Note 3)
Normal Mode 3.6V < VIN < 30V 260 µA
Shutdown VRUN/SS = 0V, 3.6V < VIN < 15V 16 25 µA
VRUN/SS Run Pin Threshold ● 0.8 1.3 2 V
IRUN/SS Soft Start Current Source VRUN/SS = 0V 1.5 3 4.5 µA
∆VSENSE(MAX) Maximum Current Sense Threshold VOSENSE = 0V, 5V 130 150 180 mV
TG Transition Time
TG t r Rise Time CLOAD = 3000pF 50 150 ns
TG t f Fall Time CLOAD = 3000pF 50 150 ns
BG Transition Time
BG tr Rise Time CLOAD = 3000pF 50 150 ns
BG t f Fall Time CLOAD = 3000pF 40 150 ns
Internal VCC Regulator
VINTVCC Internal VCC Voltage 6V < VIN < 30V, VEXTVCC = 4V ● 4.8 5.0 5.2 V
VLDO INT INTVCC Load Regulation IINTVCC = 15mA, VEXTVCC = 4V – 0.2 –1 %
VLDO EXT EXTVCC Voltage Drop IINTVCC = 15mA, VEXTVCC = 5V 130 230 mV
VEXTVCC EXTVCC Switchover Voltage IINTVCC = 15mA, VEXTVCC Ramping Positive ● 4.5 4.7 V
Oscillator
fOSC Oscillator Frequency COSC = 100pF (Note 4) 112 125 138 kHz

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 LTC1435
ELECTRICAL CHARACTERISTICS TA = 25°C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
The ● denotes specifications which apply over the full operating Note 2: The LTC1435 is tested in a feedback loop which servos VOSENSE
temperature range. to the balance point for the error amplifier (VITH = 1.19V).
LTC1435CG/LTC1435CS: 0°C ≤ TA ≤ 70°C Note 3: Dynamic supply current is higher due to the gate charge being
LTC1435IG/LTC1435IS: – 40°C ≤ TA ≤ 85°C delivered at the switching frequency. See Applications Information.
Note 1: TJ is calculated from the ambient temperature TA and power Note 4: Oscillator frequency is tested by measuring the COSC charge and
dissipation PD according to the following formula: discharge currents and applying the formula:

( )( )
LTC1435CG/LTC1435IG: TJ = TA + (PD)(130°C/W) 8.4(108) 1 + 1 –1
LTC1435CS/LTC1435IS: TJ = TA + (PD)(110°C/W) fOSC (kHz) = C (pF) + 11
OSC ICHG IDIS

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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Input Voltage Efficiency vs Input Voltage

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VOUT = 3.3V VOUT = 5V Efficiency vs Load Current
100 100 100
VOUT = 3.3V VOUT = 5V VIN = 10V
95 VOUT = 5V
95 95 RSENSE = 0.033Ω
ILOAD = 1A 90
ILOAD = 1A
85
90 90
EFFICIENCY (%)

EFFICIENCY (%)
EFFICIENCY (%)

80
ILOAD = 100mA
CONTINUOUS
85 85 75
MODE
ILOAD = 100mA Burst Mode
70
OPERATION
80 80
65
60
75 75
55

70 70 50
0 5 10 15 20 25 30 0 5 10 15 20 25 30 0.001 0.01 0.1 1 10
INPUT VOLTAGE (V) INPUT VOLTAGE (V) LOAD CURRENT (A)
1435 G01 1435 G02 1435 G03

VIN – VOUT Dropout Voltage

vs Load Current Load Regulation VITH Pin Voltage vs Output Current
0.5 0 3.0
RSENSE = 0.033Ω RSENSE = 0.033Ω
VOUT DROP OF 5%
– 0.25 2.5
0.4

– 0.50 2.0
VIN – VOUT (V)

∆VOUT (%)

0.3
VITH (V)

– 0.75 1.5
Burst Mode
0.2 OPERATION CONTINUOUS
–1.00 1.0 MODE
0.1
–1.25 0.5

0 –1.50 0
0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 0 10 20 30 40 50 60 70 80 90 100
LOAD CURRENT (A) LOAD CURRENT (A) OUTPUT CURRENT (%)
1435 G04 1435 G05 1435 G06

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 LTC1435
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Supply and Shutdown INTVCC Regulation EXTVCC Switch Drop
Current vs Input Voltage vs INTVCC Load Current vs INTVCC Load Current
2.5 100 0.5 200
VEXTVCC = 0V
180

2.0 80 160 70°C

SHUTDOWN CURRENT (µA)

0.3
SUPPLY CURRENT (mA)

EXTVCC – INTVCC (mV)

140
VOUT = 5V

∆INTVCC (%)
1.5 60 120 25°C
EXTVCC = VOUT 70°C
0 100
– 55°C
1.0 VOUT = 3.3V 40 80
EXTVCC = OPEN 25°C
60
– 0.3
0.5 20 40
20
SHUTDOWN
0 0 – 0.5 0

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0 5 10 15 20 25 30 0 5 10 15 20 0 2 4 6 8 10 12 14 16 18 20
INPUT VOLTAGE (V) INTVCC LOAD CURRENT (mA) INTVCC LOAD CURRENT (mA)
1435 G07 1435 G08 1435 G09

Normalized Oscillator Frequency RUN/SS Pin Current

vs Temperature vs Temperature SFB Pin Current vs Temperature
10 4 0

– 0.25
5 3
RUN/SS CURRENT (µA)

SFB CURRENT (µA)

– 0.50
FREQUENCY (%)

fO 2 – 0.75

–1.00
–5 1
–1.25

–10 0 –1.50
– 40 –15 10 35 60 85 110 135 – 40 –15 10 35 60 85 110 135 – 40 –15 10 35 60 85 110 135
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
1435 G10 1435 G11 1435 G12

Maximum Current Sense

Threshold Voltage vs Temperature Transient Response Transient Response
154
CURRENT SENSE THRESHOLD (mV)

152

VOUT VOUT
50mV/DIV 50mV/DIV
150

148

ILOAD = 50mA to 1A 1435 G14 ILOAD = 1A to 3A 1435 G15

146
– 40 –15 10 35 60 85 110 135
TEMPERATURE (°C)
1435 G13

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 LTC1435
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TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Operation Soft Start: Load Current vs Time

VOUT RUN/SS
20mV/DIV 5V/DIV

INDUCTOR
CURRENT
VITH 1A/DIV
200mV/DIV

ILOAD = 50mA 1435 G16 1435 G17

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U U U
PIN FUNCTIONS
COSC (Pin 1): External capacitor COSC from this pin to ever EXTVCC is higher than 4.7V. See EXTVCC connection
ground sets the operating frequency. in Applications Information section. Do not exceed 10V on
this pin. Connect to VOUT if VOUT ≥ 5V.
RUN/SS (Pin 2): Combination of Soft Start and Run
Control Inputs. A capacitor to ground at this pin sets the PGND (Pin 10): Driver Power Ground. Connects to source
ramp time to full current output. The time is approximately of bottom N-channel MOSFET and the (–) terminal of CIN.
0.5s/µF. Forcing this pin below 1.3V causes the device to BG (Pin 11): High Current Gate Drive for Bottom
be shut down. In shutdown all functions are disabled. N-Channel MOSFET. Voltage swing at this pin is from
ITH (Pin 3): Error Amplifier Compensation Point. The ground to INTVCC.
current comparator threshold increases with this control INTVCC (Pin 12): Output of the Internal 5V Regulator and
voltage. Nominal voltage range for this pin is 0V to 2.5V. EXTVCC Switch. The driver and control circuits are pow-
SFB (Pin 4): Secondary Winding Feedback Input. Nor- ered from this voltage. Must be closely decoupled to power
mally connected to a feedback resistive divider from the ground with a minimum of 2.2µF tantalum or electrolytic
secondary winding. This pin should be tied to: ground to capacitor.
force continuous operation; INTVCC in applications that VIN (Pin 13): Main Supply Pin. Must be closely decoupled
don’t use a secondary winding; and a resistive divider from to the IC’s signal ground pin.
the output in applications using a secondary winding.
SW (Pin 14): Switch Node Connection to Inductor. Volt-
SGND (Pin 5): Small-Signal Ground. Must be routed age swing at this pin is from a Schottky diode (external)
separately from other grounds to the (–) terminal of COUT. voltage drop below ground to VIN.
VOSENSE (Pin 6): Receives the feedback voltage from an BOOST (Pin 15): Supply to Topside Floating Driver. The
external resistive divider across the output. bootstrap capacitor is returned to this pin. Voltage swing
SENSE – (Pin 7): The (–) Input to the Current Comparator. at this pin is from INTVCC to VIN + INTVCC.
SENSE + (Pin 8): The (+) Input to the Current Comparator. TG (Pin 16): High Current Gate Drive for Top N-Channel
Built-in offsets between SENSE– and SENSE+ pins in MOSFET. This is the output of a floating driver with a
conjunction with RSENSE set the current trip thresholds. voltage swing equal to INTVCC superimposed on the
switch node voltage SW.
EXTVCC (Pin 9): Input to the Internal Switch Connected to
INTVCC. This switch closes and supplies VCC power when-

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LTC1435
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FUNCTIONAL DIAGRA

VIN
COSC
+
CIN

1 COSC 4 SFB 13 VIN SGND 5

INTVCC
1.19V
1µA REF DB
BOOST
– 15

CB

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1.19V +
TG
OSC SHUTDOWN 16

DROP
OUT
DET
+ OV
S
Q
R
SWITCH
1.28V – LOGIC
0.6V +

–
SW
VSEC
14
VOSENSE
VFB I2
6 – – – D1
R2 EA I1
4k
1.19V + gm = 1m
Ω + +
180k

VIN +
INTVCC CSEC
+ INTVCC
12
+
SHUTDOWN – 5V
LDO
R1 3µA REG
RUN 4.8V + BG
SOFT 30k
8k
START 11
6V VOUT
–
+
RC PGND COUT
2 RUN/SS 3 ITH SENSE+ 8 7 SENSE – 9 EXTVCC 10

CSS CC
DFB*
RSENSE
1435 • FD

* FOLDBACK CURRENT LIMITING OPTION

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 LTC1435
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OPERATION (Refer to Functional Diagram)

Main Control Loop Low Current Operation

The LTC1435 uses a constant frequency, current mode The LTC1435 is capable of Burst Mode operation in which
step-down architecture. During normal operation, the top the external MOSFETs operate intermittently based on
MOSFET is turned on each cycle when the oscillator sets load demand. The transition to low current operation
the RS latch, and turned off when the main current begins when comparator I2 detects current reversal and
comparator I1 resets the RS latch. The peak inductor turns off the bottom MOSFET. If the voltage across RSENSE
current at which I1 resets the RS latch is controlled by the does not exceed the hysteresis of I2 (approximately 20mV)
voltage on the ITH pin , which is the output of error amplifier for one full cycle, then on following cycles the top and
EA. The VOSENSE pin, described in the Pin Functions bottom drives are disabled. This continues until an induc-
section, allows EA to receive an output feedback voltage tor current peak exceeds 20mV/RSENSE or the ITH voltage
VFB from an external resistive divider. When the load exceeds 0.6V, either of which causes drive to be returned
current increases, it causes a slight decrease in VFB to the TG pin on the next cycle.

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relative to the 1.19V reference, which in turn causes the ITH
Two conditions can force continuous synchronous opera-
voltage to increase until the average inductor current tion, even when the load current would otherwise dictate
matches the new load current. While the top MOSFET is
low current operation. One is when the common mode
off, the bottom MOSFET is turned on until either the voltage of the SENSE+ and SENSE – pins is below 1.4V and
inductor current starts to reverse, as indicated by current the other is when the SFB pin is below 1.19V. The latter
comparator I2, or the beginning of the next cycle.
condition is used to assist in secondary winding regulation
The top MOSFET driver is biased from floating bootstrap as described in the Applications Information section.
capacitor CB, which normally is recharged during each off
cycle. However, when VIN decreases to a voltage close to INTVCC/EXTVCC Power
VOUT, the loop may enter dropout and attempt to turn on Power for the top and bottom MOSFET drivers and most
the top MOSFET continuously. The dropout detector counts of the other LTC1435 circuitry is derived from the INTVCC
the number of oscillator cycles that the top MOSFET pin. The bottom MOSFET driver supply pin is internally
remains on and periodically forces a brief off period to connected to INTVCC in the LTC1435. When the EXTVCC
allow CB to recharge. pin is left open, an internal 5V low dropout regulator
The main control loop is shut down by pulling the RUN/SS supplies INTVCC power. If EXTVCC is taken above 4.8V,
pin low. Releasing RUN/SS allows an internal 3µA current the 5V regulator is turned off and an internal switch is
source to charge soft start capacitor CSS. When CSS turned on to connect EXTVCC to INTVCC. This allows the
reaches 1.3V, the main control loop is enabled with the ITH INTVCC power to be derived from a high efficiency
voltage clamped at approximately 30% of its maximum external source such as the output of the regulator itself
value. As CSS continues to charge, ITH is gradually re- or a secondary winding, as described in the Applications
leased allowing normal operation to resume. Information section.
Comparator OV guards against transient overshoots
> 7.5% by turning off the top MOSFET and keeping it off
until the fault is removed.

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LTC1435
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APPLICATIONS INFORMATION
300
The basic LTC1435 application circuit is shown in Figure
1, High Efficiency Step-Down Converter. External compo- 250
nent selection is driven by the load requirement and
begins with the selection of RSENSE. Once RSENSE is 200

COSC VALUE (pF)

known, COSC and L can be chosen. Next, the power 150
MOSFETs and D1 are selected. Finally, CIN and COUT are
selected. The circuit shown in Figure 1 can be configured 100

for operation up to an input voltage of 28V (limited by the

50
external MOSFETs).
0
0 100 200 300 400 500
RSENSE Selection for Output Current OPERATING FREQUENCY (kHz)

RSENSE is chosen based on the required output current. LTC1435 • F02

Figure 2. Timing Capacitor Value

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The LTC1435 current comparator has a maximum thresh-
old of 150mV/RSENSE and an input common mode range
of SGND to INTVCC. The current comparator threshold losses will be higher, reducing efficiency (see Efficiency
sets the peak of the inductor current, yielding a maximum Considerations). The maximum recommended switching
average output current IMAX equal to the peak value less frequency is 400kHz.
half the peak-to-peak ripple current ∆IL.
Inductor Value Calculation
Allowing a margin for variations in the LTC1435 and
external component values yields: The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
100mV of smaller inductor and capacitor values. So why would
RSENSE =
IMAX anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
The LTC1435 works well with values of RSENSE from frequency generally results in lower efficiency because of
0.005Ω to 0.2Ω. MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
COSC Selection for Operating Frequency
low current operation must also be considered.
The LTC1435 uses a constant frequency architecture with
The inductor value has a direct effect on ripple current. The
the frequency determined by an external oscillator capaci-
inductor ripple current ∆IL decreases with higher induc-
tor COSC. Each time the topside MOSFET turns on, the
tance or frequency and increases with higher VIN or VOUT:
voltage COSC is reset to ground. During the on-time, COSC
is charged by a fixed current. When the voltage on the 1  V 
∆IL = VOUT  1– OUT 
capacitor reaches 1.19V, COSC is reset to ground. The
process then repeats. ( f)(L)  VIN 

The value of COSC is calculated from the desired operating Accepting larger values of ∆IL allows the use of low
frequency: inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
 1.37(104 )  setting ripple current is ∆IL = 0.4(IMAX). Remember, the
COSC (pF) =   – 11
maximum ∆IL occurs at the maximum input voltage.
 Frequency (kHz) 
 
The inductor value also has an effect on low current
A graph for selecting COSC vs frequency is given in Figure operation. The transition to low current operation begins
2. As the operating frequency is increased the gate charge when the inductor current reaches zero while the bottom

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 LTC1435
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APPLICATIONS INFORMATION
MOSFET is on. Lower inductor values (higher ∆IL) will ferrite. A reasonable compromise from the same manu-
cause this to occur at higher load currents, which can facturer is Kool Mµ. Toroids are very space efficient,
cause a dip in efficiency in the upper range of low current especially when you can use several layers of wire. Be-
operation. In Burst Mode operation, lower inductance cause they generally lack a bobbin, mounting is more
values will cause the burst frequency to decrease. difficult. However, designs for surface mount are available
which do not increase the height significantly.
The Figure 3 graph gives a range of recommended induc-
tor values vs operating frequency and VOUT. Power MOSFET and D1 Selection
60
VOUT = 5.0V Two external power MOSFETs must be selected for use
VOUT = 3.3V
50 VOUT = 2.5V with the LTC1435: an N-channel MOSFET for the top
(main) switch and an N-channel MOSFET for the bottom
INDUCTOR VALUE (µH)

40
(synchronous) switch.

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30 The peak-to-peak gate drive levels are set by the INTVCC
20
voltage. This voltage is typically 5V during start-up (see
EXTVCC Pin Connection). Consequently, logic level thresh-
10 old MOSFETs must be used in most LTC1435 applica-
tions. The only exception is applications in which EXTVCC
0
0 50 100 150 200 250 300 is powered from an external supply greater than 8V (must
OPERATING FREQUENCY (kHz)
be less than 10V), in which standard threshold MOSFETs
1435 F03
(VGS(TH) < 4V) may be used. Pay close attention to the
Figure 3. Recommended Inductor Values
BVDSS specification for the MOSFETs as well; many of the
Inductor Core Selection logic level MOSFETs are limited to 30V or less.

Once the value for L is known, the type of inductor must be Selection criteria for the power MOSFETs include the “ON”
selected. High efficiency converters generally cannot af- resistance RSD(ON), reverse transfer capacitance CRSS,
ford the core loss found in low cost powdered iron cores, input voltage and maximum output current. When the
forcing the use of more expensive ferrite, molypermalloy LTC1435 is operating in continuous mode the duty cycles
or Kool Mµ® cores. Actual core loss is independent of core for the top and bottom MOSFETs are given by:
size for a fixed inductor value, but it is very dependent on V
inductance selected. As inductance increases, core losses Main Switch Duty Cycle = OUT
VIN
go down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase. (V − V )
Synchronous Switch Duty Cycle = IN OUT
VIN
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con- The MOSFET power dissipations at maximum output
centrate on copper loss and preventing saturation. Ferrite current are given by:
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is V
PMAIN = OUT (IMAX ) (1 + δ )RDS(ON) +
2
exceeded. This results in an abrupt increase in inductor VIN
ripple current and consequent output voltage ripple. Do
k(VIN ) (IMAX )(CRSS )( f)
1.85
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than V −V
PSYNC = IN OUT (IMAX ) (1 + δ )RDS(ON)
2
Kool Mµ is a registered trademark of Magnetics, Inc. VIN

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LTC1435
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APPLICATIONS INFORMATION
where δ is the temperature dependency of RDS(ON) and k do not offer much relief. Note that capacitor manufacturer’s
is a constant inversely related to the gate drive current. ripple current ratings are often based on only 2000 hours
Both MOSFETs have I2R losses while the topside of life. This makes it advisable to further derate the
N-channel equation includes an additional term for tran- capacitor or to choose a capacitor rated at a higher
sition losses, which are highest at high input voltages. temperature than required. Several capacitors may also be
For VIN < 20V the high current efficiency generally im- paralleled to meet size or height requirements in the
proves with larger MOSFETs, while for VIN > 20V the design. Always consult the manufacturer if there is any
transition losses rapidly increase to the point that the use question.
of a higher RDS(ON) device with lower CRSS actual pro- The selection of COUT is driven by the required effective
vides higher efficiency. The synchronous MOSFET losses series resistance (ESR). Typically, once the ESR require-
are greatest at high input voltage or during a short circuit ment is satisfied the capacitance is adequate for filtering.
when the duty cycle in this switch is nearly 100%. Refer The output ripple (∆VOUT) is approximated by:

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to the Foldback Current Limiting section for further
applications information.  1 
∆VOUT ≈ ∆IL  ESR + 
 4 fC OUT 
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs Temperature curve, but where f = operating frequency, COUT = output capacitance
δ = 0.005/°C can be used as an approximation for low and ∆IL= ripple current in the inductor. The output ripple
voltage MOSFETs. CRSS is usually specified in the MOSFET is highest at maximum input voltage since ∆IL increases
characteristics. The constant k = 2.5 can be used to with input voltage. With ∆IL = 0.4IOUT(MAX) the output
estimate the contributions of the two terms in the main ripple will be less than 100mV at max VIN assuming:
switch dissipation equation.
COUT required ESR < 2RSENSE
The Schottky diode D1 shown in Figure 1 conducts during
the dead-time between the conduction of the two large Manufacturers such as Nichicon, United Chemicon and
power MOSFETs. This prevents the body diode of the Sanyo should be considered for high performance through-
bottom MOSFET from turning on and storing charge hole capacitors. The OS-CON semiconductor dielectric
during the dead-time, which could cost as much as 1% in capacitor available from Sanyo has the lowest ESR(size)
efficiency. A 1A Schottky is generally a good size for 3A product of any aluminum electrolytic at a somewhat
regulators. higher price. Once the ESR requirement for COUT has been
met, the RMS current rating generally far exceeds the
CIN and COUT Selection IRIPPLE(P-P) requirement.
In continuous mode, the source current of the top In surface mount applications multiple capacitors may
N-channel MOSFET is a square wave of duty cycle VOUT/ have to be paralleled to meet the ESR or RMS current
VIN. To prevent large voltage transients, a low ESR input handling requirements of the application. Aluminum elec-
capacitor sized for the maximum RMS current must be trolytic and dry tantalum capacitors are both available in
used. The maximum RMS capacitor current is given by: surface mount configurations. In the case of tantalum, it is
critical that the capacitors are surge tested for use in
[V (V )]
1/ 2 switching power supplies. An excellent choice is the AVX
OUT IN − VOUT TPS series of surface mount tantalum, available in case
CIN required IRMS ≈ IMAX
VIN heights ranging from 2mm to 4mm. Other capacitor types
include Sanyo OS-CON, Nichicon PL series and Sprague
This formula has a maximum at VIN = 2VOUT, where 593D and 595D series. Consult the manufacturer for other
IRMS = IOUT/2. This simple worst-case condition is com- specific recommendations.
monly used for design because even significant deviations

10
 LTC1435
U U W U
APPLICATIONS INFORMATION
INTVCC Regulator additional circuitry is required to derive INTVCC power
from the output.
An internal P-channel low dropout regulator produces the
5V supply which powers the drivers and internal circuitry The following list summarizes the four possible connec-
within the LTC1435. The INTVCC pin can supply up to tions for EXTVCC:
15mA and must be bypassed to ground with a minimum 1. EXTVCC left open (or grounded). This will cause INTVCC
of 2.2µF tantalum or low ESR electrolytic. Good bypassing to be powered from the internal 5V regulator resulting
is necessary to supply the high transient currents required in an efficiency penalty of up to 10% at high input
by the MOSFET gate drivers. voltages.
High input voltage applications, in which large MOSFETs 2. EXTVCC connected directly to VOUT. This is the normal
are being driven at high frequencies, may cause the connection for a 5V regulator and provides the highest
maximum junction temperature rating for the LTC1435 to efficiency.
be exceeded. The IC supply current is dominated by the

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gate charge supply current when not using an output 3. EXTVCC connected to an output-derived boost network.
derived EXTVCC source. The gate charge is dependent on For 3.3V and other low voltage regulators, efficiency
operating frequency as discussed in the Efficiency Consid- gains can still be realized by connecting EXTVCC to an
erations section. The junction temperature can be esti- output-derived voltage which has been boosted to
mated by using the equations given in Note 1 of the greater than 4.8V. This can be done with either the
Electrical Characteristics. For example, the LTC1435 is inductive boost winding as shown in Figure 4a or the
limited to less than 17mA from a 30V supply: capacitive charge pump shown in Figure 4b. The charge
pump has the advantage of simple magnetics.
TJ = 70°C + (17mA)(30V)(100°C/W) = 126°C
4. EXTVCC connected to an external supply. If an external
To prevent maximum junction temperature from being supply is available in the 5V to 10V range (EXTVCC ≤
exceeded, the input supply current must be checked when VIN), it may be used to power EXTVCC providing it is
operating in continuous mode at maximum VIN. compatible with the MOSFET gate drive requirements.
When driving standard threshold MOSFETs, the exter-
EXTVCC Connection
nal supply must always be present during operation to
The LTC1435 contains an internal P-channel MOSFET prevent MOSFET failure due to insufficient gate drive.
switch connected between the EXTVCC and INTVCC pins.
The switch closes and supplies the INTVCC power when- + VIN
ever the EXTVCC pin is above 4.8V, and remains closed CIN

until EXTVCC drops below 4.5V. This allows the MOSFET 1N4148
VSEC
driver and control power to be derived from the output VIN
+
during normal operation (4.8V < VOUT < 9V) and from the TG N-CH
L1
1µF
OPTIONAL 1:N
internal regulator when the output is out of regulation EXT VCC RSENSE
EXTVCC
(start-up, short circuit). Do not apply greater than 10V to CONNECTION
5V ≤ VSEC ≤ 9V
VOUT

the EXTVCC pin and ensure that EXTVCC < VIN. R6 LTC1435
+
COUT
SFB SW
Significant efficiency gains can be realized by powering
INTVCC from the output, since the VIN current resulting R5 BG N-CH

from the driver and control currents will be scaled by a SGND PGND
factor of Duty Cycle/Efficiency. For 5V regulators this LTC1435 • F04a

supply means connecting the EXTVCC pin directly to VOUT.

However, for 3.3V and other lower voltage regulators, Figure 4a. Secondary Output Loop and EXTVCC Connection

11
LTC1435
U U W U
APPLICATIONS INFORMATION
1.19V ≤ VOUT ≤ 9V
+
+ VIN 1µF
CIN R2
VOSENSE
BAT85 0.22µF BAT85
LTC1435 100pF R1
VIN
BAT85 SGND LTC1435 • F05
TG N-CH VN2222LL

EXTVCC L1 RSENSE
VOUT
LTC1435 + Figure 5. Setting the LTC1435 Output Voltage
SW COUT

3.3V OR 5V RUN/SS RUN/SS

BG N-CH
D1
PGND
CSS
LTC1435 • F04b CSS

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Figure 4b. Capacitive Charge Pump for EXTVCC

Topside MOSFET Driver Supply (CB, DB)

Figure 6. RUN/SS Pin Interfacing
LTC1435 • F06

An external bootstrap capacitor CB connected to the Boost Soft start reduces surge currents from VIN by gradually
pin supplies the gate drive voltage for the topside MOSFET. increasing the internal current limit. Power supply se-
Capacitor CB in the Functional Diagram is charged through quencing can also be accomplished using this pin.
diode DB from INTVCC when the SW pin is low. When the An internal 3µA current source charges up an external
topside MOSFET is to be turned on, the driver places the capacitor CSS. When the voltage on RUN/SS reaches 1.3V
CB voltage across the gate source of the MOSFET. This the LTC1435 begins operating. As the voltage on RUN/SS
enhances the MOSFET and turns on the topside switch. continues to ramp from 1.3V to 2.4V, the internal current
The switch node voltage SW rises to VIN and the Boost pin limit is also ramped at a proportional linear rate. The
rises to VIN + INTVCC. The value of the boost capacitor CB current limit begins at approximately 50mV/RSENSE (at
needs to be 100 times greater than the total input capaci- VRUN/SS = 1.3V) and ends at 150mV/RSENSE (VRUN/SS >
tance of the topside MOSFET. In most applications 0.1µF 2.7V). The output current thus ramps up slowly, charging
is adequate. The reverse breakdown on DB must be greater the output capacitor. If RUN/SS has been pulled all the way
than VIN(MAX). to ground there is a delay before starting of approximately
500ms/µF, followed by an additional 500ms/µF to reach
Output Voltage Programming
full current.
The output voltage is set by a resistive divider according
tDELAY = 5(10 5)CSS Seconds
to the following formula:
Pulling the RUN/SS pin below 1.3V puts the LTC1435 into
 R2
VOUT = 1.19V  1 +  a low quiescent current shutdown (IQ < 25µA). This pin
 R1 can be driven directly from logic as shown in Figure 6.
The external resistor divider is connected to the output as Diode D1 in Figure 6 reduces the start delay but allows
shown in Figure 5 allowing remote voltage sensing. CSS to ramp up slowly for the soft start function; this
diode and CSS can be deleted if soft start is not needed.
Run/ Soft Start Function The RUN/SS pin has an internal 6V Zener clamp (See
Functional Diagram).
The RUN/SS pin is a dual purpose pin which provides the
soft start function and a means to shut down the LTC1435.

12
 LTC1435
U U W U
APPLICATIONS INFORMATION
Foldback Current Limiting Efficiency Considerations
As described in Power MOSFET and D1 Selection, the The efficiency of a switching regulator is equal to the
worst-case dissipation for either MOSFET occurs with a output power divided by the input power times 100%. It is
short-circuited output, when the synchronous MOSFET often useful to analyze individual losses to determine what
conducts the current limit value almost continuously. In is limiting the efficiency and which change would produce
most applications this will not cause excessive heating, the most improvement. Efficiency can be expressed as:
even for extended fault intervals. However, when heat Efficiency = 100% – (L1 + L2 + L3 + ...)
sinking is at a premium or higher RDS(ON) MOSFETs are
being used, foldback current limiting should be added to where L1, L2, etc. are the individual losses as a percentage
reduce the current in proportion to the severity of the fault. of input power.
Foldback current limiting is implemented by adding diode Although all dissipative elements in the circuit produce
DFB between the output and the ITH pin as shown in the losses, four main sources usually account for most of the

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Functional Diagram. In a hard short (VOUT = 0V) the losses in LTC1435 circuits. LTC1435 VIN current, INTVCC
current will be reduced to approximately 25% of the current, I2R losses, and topside MOSFET transition losses.
maximum output current. This technique may be used for 1. The VIN current is the DC supply current given in the
all applications with regulated output voltages of 1.8V or electrical characteristics which excludes MOSFET driver
greater. and control currents. VIN current results in a small
(< 1%) loss which increases with VIN.
SFB Pin Operation
2. INTVCC current is the sum of the MOSFET driver and
When the SFB pin drops below its ground referenced
control currents. The MOSFET driver current results
1.19V threshold, continuous mode operation is forced. In from switching the gate capacitance of the power
continuous mode, the large N-channel main and synchro-
MOSFETs. Each time a MOSFET gate is switched from
nous switches are used regardless of the load on the main
low to high to low again, a packet of charge dQ moves
output. from INTVCC to ground. The resulting dQ/dt is a current
In addition to providing a logic input to force continuous out of INT VCC which is typically much larger than the
synchronous operation, the SFB pin provides a means to control circuit current. In continuous mode,
regulate a flyback winding output. Continuous synchro- IGATECHG = f(QT + QB), where QT and QB are the gate
nous operation allows power to be drawn from the auxil- charges of the topside and bottom side MOSFETs.
iary windings without regard to the primary output load. By powering EXTVCC from an output-derived source,
The SFB pin provides a way to force continuous synchro- the additional VIN current resulting from the driver and
nous operation as needed by the flyback winding. control currents will be scaled by a factor of
The secondary output voltage is set by the turns ratio of the Duty Cycle/Efficiency. For example, in a 20V to 5V
transformer in conjunction with a pair of external resistors application, 10mA of INTVCC current results in approxi-
returned to the SFB pin as shown in Figure 4a. The mately 3mA of VIN current. This reduces the midcurrent
secondary regulated voltage, VSEC, in Figure 4a is given by: loss from 10% or more (if the driver was powered
directly from VIN) to only a few percent.
 R6
VSEC ≈ (N + 1)VOUT > 1.19  1 +  3. I2R losses are predicted from the DC resistances of the
 R5 MOSFET, inductor and current shunt. In continuous
where N is the turns ratio of the transformer and VOUT is mode the average output current flows through L and
the main output voltage sensed by VOSENSE. RSENSE, but is “chopped” between the topside main

13
LTC1435
U U W U
APPLICATIONS INFORMATION
MOSFET and the synchronous MOSFET. If the two only solution is to limit the rise time of the switch drive so
MOSFETs have approximately the same RDS(ON), then that the load rise time is limited to approximately
the resistance of one MOSFET can simply be summed (25)(CLOAD). Thus a 10µF capacitor would require a 250µs
with the resistances of L and RSENSE to obtain I2R rise time, limiting the charging current to about 200mA.
losses. For example, if each RDS(ON) = 0.05Ω,
RL = 0.15Ω, and RSENSE = 0.05Ω, then the total Automotive Considerations:
resistance is 0.25Ω. This results in losses ranging Plugging into the Cigarette Lighter
from 3% to 10% as the output current increases from As battery-powered devices go mobile, there is a natural
0.5A to 2A. I2R losses cause the efficiency to drop at interest in plugging into the cigarette lighter in order to
high output currents. conserve or even recharge battery packs during operation.
4. Transition losses apply only to the topside MOSFET(s), But before you connect, be advised: you are plugging into
and only when operating at high input voltages (typi- the supply from hell. The main battery line in an automo-

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cally 20V or greater). Transition losses can be esti- bile is the source of a number of nasty potential transients,
mated from: including load dump, reverse battery and double battery.
Transition Loss = 2.5 (VIN)1.85(IMAX)(CRSS)(f) Load dump is the result of a loose battery cable. When the
cable breaks connection, the field collapse in the alternator
Other losses, including CIN and COUT ESR dissipative can cause a positive spike as high as 60V which takes
losses, Schottky conduction losses during dead-time, several hundred milliseconds to decay. Reverse battery is
and inductor core losses, generally account for less just what it says, while double battery is a consequence of
than 2% total additional loss. tow truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
Checking Transient Response
The network shown in Figure 7 is the most straightfor-
The regulator loop response can be checked by looking at
ward approach to protect a DC/DC converter from the
the load transient response. Switching regulators take
ravages of an automotive battery line. The series diode
several cycles to respond to a step in DC (resistive) load
prevents current from flowing during reverse battery,
current. When a load step occurs, VOUT immediately shifts
while the transient suppressor clamps the input voltage
by an amount equal to (∆ILOAD)(ESR), where ESR is the
during load dump. Note that the transient suppressor
effective series resistance of COUT. ∆ILOAD also begins to
should not conduct during double battery operation, but
charge or discharge COUT which generates a feedback
must still clamp the input voltage below breakdown of the
error signal. The regulator loop then acts to return VOUT to
converter. Although the LT1435 has a maximum input
its steady-state value. During this recovery time VOUT can
voltage of 36V, most applications will be limited to 30V
be monitored for overshoot or ringing which would indi-
by the MOSFET BVDSS.
cate a stability problem. The ITH external components
shown in the Figure 1 circuit will provide adequate com- 12V
50A IPK RATING
pensation for most applications.
VIN
A second, more severe transient is caused by switching in TRANSIENT VOLTAGE
LTC1435
loads with large (>1µF) supply bypass capacitors. The SUPPRESSOR
GENERAL INSTRUMENT
discharged bypass capacitors are effectively put in paral- 1.5KA24A
lel with COUT, causing a rapid drop in VOUT. No regulator
can deliver enough current to prevent this problem if the 1435 F07

load switch resistance is low and it is driven quickly. The Figure 7. Automotive Application Protection

14
 LTC1435
U U W U
APPLICATIONS INFORMATION
Design Example highest at the maximum input voltage. The output voltage
As a design example, assume VIN = 12V(nominal), VIN = ripple due to ESR is approximately:
22V(max), VOUT = 3.3V, IMAX = 3A and f = 250kHz, RSENSE VORIPPLE = RESR(∆IL) = 0.03Ω(1.112A) = 34mVP-P
and COSC can immediately be calculated:
PC Board Layout Checklist
RSENSE = 100mV/3A = 0.033Ω
When laying out the printed circuit board, the following
COSC = 1.37(104)/250 – 11 = 43pF
checklist should be used to ensure proper operation of the
Referring to Figure 3, a 10µH inductor falls within the LTC1435. These items are also illustrated graphically in
recommended range. To check the actual value of the the layout diagram of Figure 8. Check the following in your
ripple current the following equation is used: layout:
V  V  1. Are the signal and power grounds segregated? The
∆IL = OUT  1– OUT 
( f)(L)  VIN 

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LTC1435 signal ground pin must return to the (–) plate
of COUT. The power ground connects to the source of
The highest value of the ripple current occurs at the the bottom N-channel MOSFET, anode of the Schottky
maximum input voltage: diode, and (–) plate of CIN, which should have as short
3.3V  3.3V  lead lengths as possible.
∆IL = 1–  = 1.12A
250kHz(10µH)  22V  2. Does the VOSENSE pin connect directly to the feedback
resistors? The resistive divider R1, R2 must be con-
The power dissipation on the topside MOSFET can be nected between the (+) plate of COUT and signal ground.
easily estimated. Choosing a Siliconix Si4412DY results The 100pF capacitor should be as close as possible to
in: RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum input the LTC1435.
voltage with T(estimated) = 50°C:
3. Are the SENSE – and SENSE + leads routed together with
PMAIN = ( ) [ ( )(
3.3V 2
22V
)](
3 1 + 0.005 50°C − 25°C 0.042Ω ) minimum PC trace spacing? The filter capacitor be-
tween SENSE + and SENSE – should be as close as
+ 2.5 (22V ) (3A )(100pF )(250kHz) = 122mW
1.85 possible to the LTC1435.
4. Does the (+) plate of CIN connect to the drain of the
The most stringent requirement for the synchronous topside MOSFET(s) as closely as possible? This capaci-
N-channel MOSFET occurs when VOUT = 0 (i.e. short tor provides the AC current to the MOSFET(s).
circuit). In this case the worst-case dissipation rises to: 5. Is the INTVCC decoupling capacitor connected closely

( ) (1+ δ ) RDS(ON)
2 between INTVCC and the power ground pin? This ca-
PSYNC = ISC( AVG) pacitor carries the MOSFET driver peak currents.

With the 0.033Ω sense resistor ISC(AVG) = 4A will result, 6. Keep the switching node SW away from sensitive small-
increasing the Si4412DY dissipation to 950mW at a die signal nodes. Ideally the switch node should be placed
temperature of 105°C. at the furthest point from the LTC1435.

CIN is chosen for an RMS current rating of at least 1.5A at 7. SGND should be exclusively used for grounding exter-
temperature. COUT is chosen with an ESR of 0.03Ω for low nal components on COSC, ITH, VOSENSE and SFB pins.
output ripple. The output ripple in continuous mode will be

15
LTC1435
U U W U
APPLICATIONS INFORMATION
+
COSC M1

+
1 16 CIN
COSC TG
CSS 2 15
RUN/SS BOOST
CC1 VIN
RC 3 14
ITH SW
CC2 4 CB
LTC1435 13
SFB VIN DB 0.1µF D1
5 12
SGND INTVCC
–
100pF +
6 M2
11 4.7µF
VOSENSE BG
7 10
SENSE – PGND
1000pF
8 9
SENSE + EXTVCC L1
–

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R1
+ COUT
VOUT
R2 RSENSE

BOLD LINES INDICATE

HIGH CURRENT PATHS + LTC1435 • F08

Figure 8. LTC1435 Layout Diagram

U
TYPICAL APPLICATIONS
Dual Output 5V and Synchronous 12V Application

VIN
5.4V TO 28V

COSC CIN 0.01µF

68pF
+ 22µF
1 16 M1 35V IRLL014
COSC TG
Si4412DY ×2
CSS 4.7k
0.1µF 2 15
RUN/SS BOOST
RC CC1
10k 470pF 3 14
ITH SW
CC2 T1
51pF 4 13 10µH + CSEC
SFB VIN 3.3µF
1:1.42 35V
LTC1435 CMDSH-3 0.1µF RSENSE
5 12 0.033Ω VOUT
SGND INTVCC 5V/3.5A
100pF + R1
6 11 4.7µF
VOSENSE BG 35.7k
M2 1%
MBRS140T3 COUT
Si4412DY + 100µF
7 – 10
SENSE PGND 10V
R2 ×2
1000pF 20k
8 9 1%
SENSE + EXTVCC

100Ω
SGND
100Ω

VOUT2
12V
LTC1435 • TA04
11.3k 100k T1: DALE LPE6562-A236 120mA
1% 1%

16
 LTC1435
U
TYPICAL APPLICATIONS
3.3V/4.5A Converter with Foldback Current Limiting
VIN
4.5V TO 28V

COSC CIN
68pF + 22µF
1 16 M1 35V
COSC TG
Si4410DY ×2
CSS
0.1µF 2 15
RUN/SS BOOST
RC CC1
10k 330pF 3 14
ITH SW
ITH PIN 3
CC2
51pF 4 13 IN4148
INTVCC SFB VIN
LTC1435 0.1µF L1 RSENSE
CMDSH-3
10µH 0.025Ω
5 12 VOUT
SGND INTVCC 3.3V/4.5A
+

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100pF R1
6 11 4.7µF
VOSENSE BG 35.7k
M2 1% COUT
Si4410DY + 100µF
7 10 MBRS140T3
SENSE – PGND 100pF 10V
R2 ×2
1000pF 20k
8 9 OPTIONAL: 1%
SENSE + EXTVCC CONNECT TO 5V

SGND
(PIN 5)

LTC1435 • TA01

Dual Output 5V and 12V Application

VIN
5.4V TO 28V

COSC CIN
68pF
+ 22µF
1 16 M1 35V
COSC TG
IRF7403 ×2
CSS
0.1µF 2 15
RUN/SS BOOST MBRS1100T3
RC CC1
10k 510pF 3 14
ITH SW
24V
CC2 T1
51pF 4 13 10µH
+ CSEC
SFB VIN 3.3µF
1:2.2 25V
LTC1435 CMDSH-3 0.1µF
5 12 VOUT
SGND INTVCC 5V/3.5A
100pF + RSENSE
R1
4.7µF 0.033Ω
6 11 35.7k
VOSENSE BG M2
MBRS140T3 1% COUT
IRF7403 + 100µF
7 10
SENSE – PGND 10V
R2 ×2
1000pF 20k
8 9 1%
SENSE + EXTVCC

100Ω SGND
100Ω

10k 90.9k VOUT2

LTC1435 • TA02
12V
T1: DALE LPE6562-A092

17
LTC1435
U
TYPICAL APPLICATIONS

Constant-Current/Constant-Voltage High Efficiency Battery Charger

E1
VIN + C1* + C2*
R7 C4
22µF 22µF
1.5M 0.1µF C5
E3 35V 35V C11 0.1µF
GND 56pF
E3
SHDN 1 16 Q1
C12 COSC TG
C13 Si4412DY
R5 0.1µF 2 15 L1 R1
0.033µF RUN/SS BOOST D1
1k 3 27µH 0.025Ω
14 E6
ITH U1 SW
C14 4 LTC1435 C6 + C3 BATT
13
1000pF SFB VIN D2 0.33µF 22µF
5 12 35V E7
SGND INTVCC GND
C9 6 11 Q2
100pF VOSENSE BG Si4412DY
7 10
SENSE – PGND

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U2 C15 8 + 9
LT1620 0.1µF SENSE EXTVCC
C8
1 8 C10 C7 100pF
SENSE AVG 100pF 4.7µF
2 7 + 16V
IOUT PROG
3 6 R2
GND VCC 1M
4 5
NIN PIN 0.1%
C16 R3 R4
0.33µF 105k 76.8k
0.1% 0.1%
R6 C18 JP1A JP1B
C17 10k 0.1µF
0.01µF 1%
DC133 F01

E5 E4 *CONSULT CAPACITOR MANUFACTURER FOR RECOMMENDED

GND RPROG IPROG ESR RATING FOR CONTINUOUS 4A OPERATION

Current Programming Equation

(I )(R6) – 0.04
IBATT = PROG
10(R1)

Efficiency
100
VIN = 24V VBATT = 16V

95
VBATT = 12V
EFFICIENCY (%)

90
VBATT = 6V

85

80

75
0 1 2 3 4 5
BATTERY CHARGE CURRENT (A)
1435 TA05

18
 LTC1435
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.

G Package
16-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.239 – 0.249*
(6.07 – 7.33)
16 15 14 13 12 11 10 9

0.205 – 0.212**
(5.20 – 5.38) 0.068 – 0.078
(1.73 – 1.99)
0.301 – 0.311
(7.65 – 7.90)
0° – 8°

0.022 – 0.037 0.0256

0.005 – 0.009
(0.65) 0.002 – 0.008

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(0.13 – 0.22) (0.55 – 0.95)
BSC 0.010 – 0.015 (0.05 – 0.21)
(0.25 – 0.38) 1 2 3 4 5 6 7 8
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH G16 SSOP 0795
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

S Package
16-Lead Plastic Small Outline
(Narrow 0.150)
(LTC DWG # 05-08-1610)

0.386 – 0.394*
(9.804 – 10.008)
16 15 14 13 12 11 10 9

0.228 – 0.244 0.150 – 0.157**

(5.791 – 6.197) (3.810 – 3.988)

1 2 3 4 5 6 7 8
0.010 – 0.020
× 45° 0.053 – 0.069
(0.254 – 0.508)
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
0° – 8° TYP (0.101 – 0.254)
(0.203 – 0.254)

0.014 – 0.019 0.050

0.016 – 0.050
(0.355 – 0.483) (1.270)
0.406 – 1.270 TYP S16 0695

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

19
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1435
U
TYPICAL APPLICATION
Low Dropout 2.9V/3A Converter

VIN
3.5V TO 25V
COSC
68pF CIN
1 16 M1 + 22µF
COSC TG 35V
1/2 Si9925DY
CSS ×2
0.1µF 2 15
RUN/SS BOOST
RC CC1
10k 330pF 3 14
ITH SW
CC2
51pF 4 13
INTVCC SFB VIN
LTC1435 0.1µF L1 RSENSE
CMDSH-3
10µH 0.033Ω
5 12 VOUT
SGND INTVCC 2.9V/3A
+

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100pF R1
6 11 4.7µF
VOSENSE BG 35.7k
M2 100pF 1% COUT
MBRS140T3
1/2 Si9925DY + 100µF
7 10 10V
SENSE – PGND
R2 ×2
1000pF 24.9k
8 9 OPTIONAL: 1%
SENSE + EXTVCC CONNECT TO 5V

SGND
LTC1435 • TA03

L1: SUMIDA CDRH125-10

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LT/GP 0896 7K • PRINTED IN USA

Linear Technology Corporation
20 1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1996