E3S Web of Conferences 16, 14004 (2017 ) DOI: 10.

1051/ e3sconf/20171614004
ESPC 2016

WATKINS-JOHNSON TOPOLOGY INTEGRATED IN A FULL-BRIDGE CONVERTER

Giulio Simonelli (1), Oliver El Korashy (2), Hadrien Carbonnier (3)
(1)
ESA-ESTEC, Keplerlaan 1, 2200AG Noordwijk, The Netherlands, Email:giulio.simonelli@esa.int
(2)
ESA-ESTEC, Keplerlaan 1, 2200AG Noordwijk, The Netherlands, Email:oliver.el.korashy@esa.int
(3)
ESA-ESTEC, Keplerlaan 1, 2200AG Noordwijk, The Netherlands, Email:hadrien.carbonnier@esa.int

ABSTRACT Vout
L1 S1
Electrical thrusters require high power and High L2
Voltage (HV) of 300V to 2000V depending on the C
Vin
thruster technology. A converter suitable for this S2 R

application should have a high power handling

capability (full bridge converter) and a simple output
stage (fly-back converter). Other desirable Figure 1. Watkins-Johnson basic topology
characteristics would be: simplicity, able to supply a
Vout
wide range of loads, low stress on switches, high L1
M1
stability and galvanic isolation between input and the L2
output power. C1
Vin R1
D1
The Watkins-Johnson (W-J) topology is used mainly in
HV applications due to the fact that its magnetic
elements are on the input side. However the power Figure 2. Watkins-Johnson topology practical
output of this converter is constrained by the “single realization
switch topology”. Further downsides of the basic W-J
topology are the relatively high voltage stress on the Its peculiarity is that energy is transferred from input to
switching elements and the fact that is not galvanically output during the ON time of M1, while during the OFF
isolated . time the energy stored in the core of the mutual inductor
L1 L2 is given back to the input source.
This paper will present a new topology of a Full Bridge
Isolated Converter which is based on the W-J topology. It can be shown that in CCM the conversion ratio is of
Steady state behaviour in Continuous Current Mode the basic topology is ( refers to duty cycle):
(CCM) and in Discontinuous Current Mode (DCM) will
be investigated. Dynamic performances of the converter Vout 2G 1
will be investigated with the analysis of its transfer Vin G
(1)
function. An equivalent circuit suitable for PSPICE
simulations will be presented.
Equation (1) is also valid for the practical realization of
fig. 2 but only for CCM greater than 0.5.
The topology presented potentially offers the following
advantages which are suited to providing power
For the practical realization of fig. 2 the max static
conditioning to sub-systems which require high voltage
voltage stress on the switching elements is 2*Vin.
and high power:
Considering that the input voltage for high power
x Simple output stage suitable for HV. satellites is already 100V and could rise higher in the,
x Buck type transfer function, hence simple control this level of voltage stress can seriously limit the choice
scheme. of power components.
x Low stress on components.
x Single stage converter 2. ISOLATED VERSION OF THE WATKINS-
x Suitable for modular high power converter due to JOHNSON TOPOLOGY AND ITS
the simplicity of the output stage INTEGRATION IN A FULL BRIDGE

1. WATKINS-JOHNSON TOPOLOGY The isolated version of the topology under study can be
implemented as a push pull or full bridge that follows a
In figures 1 and 2 the W-J topology and a practical Watkins-Jonson stage, as depicted in figure 3 and 4.
realization of it is presented.

© The Authors, published by EDP Sciences. This is an open access article distributed under the terms of the Creative Commons Attribution
License 4.0 (http://creativecommons.org/licenses/by/4.0/).
E3S Web of Conferences 16, 14004 (2017 ) DOI: 10.1051/ e3sconf/20171614004
ESPC 2016

The strong points of this new converter are:

L D2
Vout
x galvanic isolation
C R x high power handling capability
x low voltage stress on switches
x simplified output stage
Vin
D1 M1 M2
The last point, a simplified output stage, is extremely
D3
valuable in case of HV applications and makes this
converter a promising candidate for applications like
Figure 3. Watkins-Johnson followed by Push-Pull stage electrical propulsion where high power and high voltage
are requested.
Vout
L D2
M3 M4 It can be also shown that the switches M2 and M4 could
C R
operate easily in Zero Voltage Switching (ZVS) mode.
The weakest point of this converter is the high input AC
current, which will require an adequate filter.
Vin
D1 M1 M2
3. CONTINUOUS CURRENT MODE
D3
In continuous current mode, there is always current
circulating in the inductor. In this condition the
Figure 4. Watkins-Johnson followed by Full-Bridge converter operates in 4 phases here described by the
stage names of the switches that are conducting. Referring to
fig. 5:
Despite the introduction of the isolation and the higher x Phase 1: M3, M2, D3 are ON (and primary current
power handling capability of the converters in fig. 3 and flows in upper inductance branch)
4, the conversion ratio is the same as for the basic x Phase 2: D1, D2 are ON (and inductor currents
topology except for a small modification introduced by recirculates on both inductor branches to the input
the transformer ratio n=Np/Ns where Np and Ns are source)
respectively the number of the primary and secondary x Phase 3: M4, M1, D4 are ON (and primary current
turns of the transformer: flows in lower inductance branch)
x Phase 4: D1, D2 are ON (and inductor currents
Vout 2˜G 1
recirculates on both inductor branches to the input
Vin n˜G (2) source)

Also the maximum voltage stress on the switching Even if the switches are different, phase 1 and 3 are
elements is the same as the basic topology, i.e. 2*Vin. essentially the same, so we can study the CVT
considering only phase 1 and 2.
Instead of simply cascading the Watkins-Johnson and a
full bridge stage, we can “integrate” the two topologies, The circuits in phase 1 are depicted in fig. 6 where only
as depicted in figure 5. It can be seen that, at the cost of the conducting switches have been included. To derive
one extra diode on the primary side, the maximum the conversion ratio we will apply the method of the
voltage stress on the Mosfets is reduced from 2*Vin to inductor volt seconds balance and the capacitor charge
Vin, making the converter suitable for systems based on balance under the small ripple approximation [1].
power busses of 100V or higher.
We will use the following convention to distinguish
Vout
M3 M4 D3 between instantaneous, DC and AC values:
C R x = x(t) = X + x(t)
D2
L1 x = x(t) : instantaneous value
Vin
X : DC value
x(t) : AC value
L2
M1 M2

D1
In Phase 1 (see fig.6) the governing equations are:
D4

vL vin  RL ˜ ion  n ˜  vout  Vds (3)

Figure 5. Watkins-Johnson integrated in a Full-Bridge vout
ic n ˜ ion 
stage R (4)

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E3S Web of Conferences 16, 14004 (2017 ) DOI: 10.1051/ e3sconf/20171614004
ESPC 2016

vL12 2 ˜ vL
(9)
Where ion is the inductor current, Vds is the voltage drop
on the diode on the secondary side, RL the parasitic
Substituting (8) and (9) into (5) we have the following
resistance of one inductor winding.
governing equations for phase 2:
Vout
M3 D3 ion vin
C R vL RL ˜  Vdp 
2 2 (10)
L vout
Vin ic
R (6)
L
M2
We can now proceed with the Volt Second balance
using (3) and (10) and charge balance using (4) and (6)
only for the DC values of the concerned variables:
Figure 6. Phase 1 circuit § Ion Vin ·
0 G ˜ ª¬Vin  RL ˜ Ion  n ˜  Vout  Vdsº¼  ( 1  G ) ˜ ¨ RL ˜  Vdp  ¸
© 2 2 ¹ (11)
In Phase 2 (see fig.7) the governing equations are:
§ Vout · Vout
0 G ˜ ¨ n ˜ Ion  ¸  (1  G ) ˜
vL12 2 ˜ RL ˜ ioff  2 Vdp  vin © R ¹ R (12)
(5)
vout
ic From (11) and (12) we can obtain the conversion ratio
R (6) of the full bridge with the Watkins-Johnson topology,
that, in the case the parasitic values RL, Vdp and Vds are
Where ioff is the inductor current, L12 is the inductance zero is:
of the two windings in series of the mutual inductances,
vL12 the voltage across L12,Vdp is the voltage drop on the Vout 3˜G 1
diode on the primary side. Vin n˜2˜G (13)

Vout The conversion ratio modelled by (13) has been plotted

C R
in fig.8
D2
L
Vin

D1

Figure 7. Phase 2 circuit

We now enter in the tricky part of the analysis. In fact

the value of the inductance changes between Phase 1
and 2 and in order to apply the principle of VoltSecond
balance we have to express VL12 in terms of VL.
Considering that:

L12 4 ˜L
Figure &RQYHUVLRQUDWLR9RXW9LQįIRUQ 
(7)
4. CONVERTER MAIN WAVEFORMS AND
(because doubling the number of turn on a core will CHARACTERISTICS IN CONTINUOUS
increase the inductance by a factor of 22), and that at the MODE
transition times between Phase 1 and 2:
In fig. 9 the major waveforms of the converter in CCM
ion are depicted with reference to the electrical scheme in
ioff figure 5.
2 (8)

(because the energy in the inductance can’t change The major characteristics of the converter in CCM are
instantaneously), we can write: reported here after.

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E3S Web of Conferences 16, 14004 (2017 ) DOI: 10.1051/ e3sconf/20171614004
ESPC 2016

Input output relationship: 1 3˜G  1 Vin

IL_avg_on ˜ ˜
x Vout/Vin=(1/n)*(3*-1)/(2*) n 2 2˜G R (15)
Switch ratings:
x Drain voltage: Vin On the other hand we know that at the boundary
x Peak current: I_Lpk condition between CCM and DCM must be:
Primary diodes ratings:
x Voltage: Vin 'I on
x Peak current: I_Lpk/2 IL_avg_on ˜G
2 (16)
Secondary diodes:
x Voltage: 2*Vout
From the fig. 6 we can state that
x Peak current: (n)*I_Lpk
Vin  n ˜ Vout
'I on ˜G ˜T
L (17)


on is the rise of current in the inductor during
phase 1 (t on). Using (13) in (17) and rearranging we
have:

1G
'I on ˜ Vin ˜ T
2˜L (18)

Equation (16) also allow us to set the boundary

condition between the two modes, for CCM must be:

'I on
IL_avg_on ! ˜G
2 (19)

For DCM must be:

'I on
IL_avg_on  ˜G
2 (20)

Substituting in equation (19) equation (15) on the left

side and (18) on the right side, we get:

1 3 ˜ G  1 Vin 1 1G
˜ ˜ ! ˜ ˜ Vin ˜ T ˜ G
Figure 9. Major waveforms of the converter in the n 2 2˜G R 2 2˜L
(21)
switching period (ideal case)
Rearranging (21):
5. CONTINUOUS AND DISCONTINUOUS
MODE BOUNDARY AND Kcrt and Rcrt
2 ˜L (1  G ) ˜ G 2
We know that this converter transfer the current in the !
n2 ˜ R ˜ T 3˜G 1
inductor to the output only during phase 1, in phase 2 (22)
the inductor current goes back to the input source.
Hence the average current of the inductor during phase Defining:
1 must be the same as the average output current
corrected by the transformer ratio. We can then write: 2 ˜L
K
n2 ˜ R ˜ T (23)
1 Vout
IL_avg_on ˜
n R (14) (1  G ) ˜ G 2
Kcrt( G )
3˜G 1 (24)
Using (13) in (14) and rearranging we have:
We have that we are in CCM if:

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E3S Web of Conferences 16, 14004 (2017 ) DOI: 10.1051/ e3sconf/20171614004
ESPC 2016

K ! Kcrt( G ) (25)

Equation (24) predicts that for  crt will be infinite

so the converter will be always in DCM, which is


  


 
current in the inductor at all since the load is zero Watts.


 ! crt equation (25) loses its meaning and the
converter will be always in DCM. Rearranging (22) we
can define Rcrt=Rcrt().

2 ˜L 3˜G 1
R ˜
n ˜ T (1  G ) ˜ G 2
2
(26)

2 ˜L 3˜G 1
Rcrt( G ) ˜
n ˜ T (1  G ) ˜ G 2
2
(27)

Equation (27) has been plotted in fig. 10, under the

assumption of L=70uH, T=5us and n=3. The Y axis is
Rcrt. In order to be in CCM, R of the load must be lower
than Rcrt plotted.

Figure 11. Major waveforms of the converter in the

switching period when in CCM (ideal case).

7. MEASUREMENTS
Figure 8 shows measurements of Vout/Vin compared to
duty cycle, measured at Vin = 100V, n=3, Pout=50W. It
is observed that the measured results follow the derived
formula, allowing for a slight error due to voltage drop
in the output diodes.

A breadboard of the converter in fig. 5 was configured

Figure 10. Plot of Rcrt(į)for L=70uH, T=5us and n=3 in closed loop using a UC1825 PWM controller which
utilises peak current control. The breadboard was
designed for Vin=100V, Vout=30V, fsw=100kHz and
6. CONVERTER MAIN WAVEFORMS AND
max Pout=500W.
CHARACTERISTICS IN DISCONTINUOUS
CURRENT MODE
Although this topology has been identified as suitable
In the following figure the main waveforms of the for HV, for the first iteration a low 30V output voltage
converter in DCM are reported with reference to the was selected in order to simplify the testing and
electrical scheme in figure 5. debugging.

The major characteristics of the converter (Voltage and Figure 12 shows some waveforms measured on the
Current stress levels) in DCM are essentially the same converter working at 113W. It is observed that the
as in CCM, as can be seen in figure 11. general shape of the measured waveforms corresponds
to those found in Figure 9. The discrepancies are due to
The converter gain in DCM is given by the following parasitic effects, in particular, the ~1.8MHz damped
formula in the ideal case: oscillations (seen on the inductor current and VDS(M3))
are due resonance of the transformer leakage inductance
Vout 2
G with the parasitic capacitance of the Mosfets. These
Vin n ˜  K  G 2 oscillations can be reduced or removed using an RC
snubber across each Mosfet.
(28)

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E3S Web of Conferences 16, 14004 (2017 ) DOI: 10.1051/ e3sconf/20171614004
ESPC 2016

Figure 14. Bode plot at 10W (DCM)

Figure 12. Measured waveforms in CCM: IL1(red),

IL2(blue), VD(M2) (pink), VDS(M3) (green) @ Vin=100V,
Vout=30V, Pout=113W, fsw=100kHz,

Figure 13 shows the efficiency curve of the breadboard,

plotted from a selection of measurements from 15-
500W. Above 50W the efficiency is higher than 91%
and from 110W-190W it is >94.5%. Above about 380W Figure 15. Bode plot at 200W (CCM)
the converter was operating at maximum duty cycle
(96.5%), so without regulation and the output voltage 8. CIRCUIT EQUIVALENT MODELLING
gradually drops with increasing power demand. Note We will discuss now a practical and valuable way to
that the breadboard has not been optimised for its model our converter for closed loop simulations without
highest efficiency, improvements could be made by passing through space state averaging and linearization.
reducing leakage inductance and resistance in the
magnetic components and by selection of different Equation (3), (4) for the ON time and (10), (6) for the
switching components. OFF time, allow us to define an “averaged” equivalent
circuit suitable to be simulated in PSPICE.
Averaging equations (3), (4), and (10), (6) and the
expressions of the input voltage get:

(28)

(29)

(30)
Rearranged and simplified they become

Figure 13. Efficiency curve of the converter @

Vin=100V, Vout=30V, fsw=100kHz

The stability of the converter topology is demonstrated (31)

using spectrum analysis which measured phase margin
above 60deg and gain margin above 10dB throughout
the output power range, including at low power (10W) (32)
in DCM. Two bode plots are given to show stability
performance at 10W (fig.14) and 200W (fig.15). (33)
The equivalent circuit described by (31), (32) and (33)
is depicted in fig. 16.

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E3S Web of Conferences 16, 14004 (2017 ) DOI: 10.1051/ e3sconf/20171614004
ESPC 2016

11. REFERENCES
1. Robert W. Erickson (1997), Fundamentals of
Power Electronics. International Thomson
Publishing.
2. F. Tonicello, O. Mourra, B2R (Buck & Boost
Figure 16. equivalent averaged circuit of the Full Regulator) Control Aspects and Small Signal
Bridge Watkin-Johnson converter. Analysis, Space Power Workshop 2011, Los
Angeles, CA.
In the PSPICE model we see three areas: “input filter”,
3. V. Vorperian, Simplified Analysis of PWM
“averaged switching cell” and “output filter”. In the first
Converters Using the Model of the PWM switch:
and latter areas components can be added as wished
without considering “averaging” their value. Parts I and II. IEEE Transaction on Aerospace and
Electronic Systems. Vol. AES-26, pp 490-505,
When adding extra components in the averaged May 1990.
switching cell, we have to “average” them. For example
if we want to add the parasitic capacitance of the output 4. E. van Dijk, J.B. Klaassens, H.J.N. Spruijt, D.M.
diodes, then the actual value to be used in the circuit O’Sullivan, PWM Switch Modelling of DC-DC
will be n*D*Cds, where Cds is the capacitance of the Converter Topologies, Proceedings of the
secondary diodes. European Space Power Conference, Graz August
Using the circuit of figure 16 it is easy simulate a closed 1993, pp 301-306.098
loop converter and plot the transfer functions, enabling
the study the transient response while modelling the
input and output filters. It is worth noting that the circuit
in fig. 16 is a non-linear circuit, and it describes both
DC and AC behaviour.
9. CONCLUSIONS
x A Full Bridge DC/DC converter based on the
Watkins-Johnson topology has been presented and
its static characteristics and waveforms in CCM and
DCM have been analytically derived.

x A breadboard have been built to verify the

analytical work, to study its limitations and to
verify the stability of the converter in voltage
closed loop.

x An average PSPICE model of the converter in

CCM has been also presented.

x The authors believe that this work has confirmed

that the Full Bridge W-J converter is a strong
candidate for converters for Electrical Propulsion
units.

10. SUGGESTIONS FOR FUTURE WORK

Further work should be in the area of:
x loop stability (with current loop)
x study the effect of the “parasitics”
x efficiency optimization (conditions for partial
ZVS operations)
x HV output stage
x develop a modular approach to increase output
power