5-Power Fault
5-Power Fault
5-Power Fault
Debug Guide
Rev 1.1
1. Revision History
3. Introduction
This document describes a process for diagnosing and repairing Power Up
failures from the PCBA tester. The process and groupings below outlines
possible measurements to determine the appropriate component, for repair or
replacement. Core digital errors can also be identified by 3 of the 4 LEDs on the
“ring of light” flashing.
4. Scope
This document has been developed from experience gained on X803158-001
Xenon XDK motherboards. The failure analysis process outlined in this document
should be used in conjunction with the “Motherboard Debug Guide Development
Process” document.
5. Audience
This document is aimed at Engineers and Technicians who are performing first
pass debug of core digital failures from the XBOX360 motherboard PCBA tester.
6. Process
7. Power Errors
7.1 Category A Error Code 0x01
ANA_V12P0_PWRGD was negated unexpectedly
The SMC and Argon are powered by the standby voltages. When the SMC has
detected that the user wishes to turn on the console (go from standby mode to
full power) the SMC asserts the signal PSU_V12P0_EN to the external power
supply. This signal tells the external power supply to turn on the 12volts
(V_12P0). V_12P0 is the main voltage to the motherboard power
controllers/regulators of the CPU, GPU, Memory, and other. ANA (U4B1)
monitors V12P0 for correct tolerance. Out of tolerance conditions are indicated
by ANA on signal ANA_V12P0_PWRGD pin 122. 12V tolerance & trip points are
set with resistors R4B9, R4B8, R4B2 on ANA pin V_12P0_DET. After the SMC
asserts PSU_V12P0_EN it waits xx ms for the power good signal
ANA_V12P0_PWRGD. If it does not detect power good it will de-asserts the
enable line and display ERROR_V_12P0 on the front panel.
On power on the SMC enables the 5V power controller U4V1 with signal
VREG_V5P0_EN then enables CPU power controller U7U1 with signal
VREG_CPU_EN.
If any is not present replace U2C1.
It is important to note that V_5P0 is the pull-up voltage used on the CPU circuit
signal VREG_CPU_PWRGD. If VREG_CPU_PWRGD does not go high it can be
a problem with either U7U1 (V_CPUCORE) or U4V1 (V_5P0) circuits. Using
V_5P0 as a pull-up voltage for the CPU circuit is a means to monitor good status
on both power circuits.
On power on the SMC enables the GPU power controller U8N1 with signal
VREG_GPU_EN_N. The power controller indicates power status on the signal
VREG_GPU_PWRGD. This signal is monitored by the SMC. This signal should
go high indicating good power. If the SMC fails to detect good power it disables
the power controller and displays the above error code.
On power on the SMC enables the GPU power controller U8N1 with signal
VREG_GPU_EN_N. The power controller indicates power status on the signal
VREG_GPU_PWRGD. This signal is monitored by the SMC. This signal should
go high indicating good power. If the SMC fails to detect good power it disables
the power controller and displays the above error code.