AN661

Code Hopping Decoder Using a PIC16C56

KEY FEATURES
Author: Steven Dawson • Stand-alone decoder
Microchip Technology Inc. • Compatible with Microchip HCS200, HCS201,
HCS300, HCS301, and NTQ106 encoders
• Automatic baud rate detection
OVERVIEW • Automatic encoder type detection
This application note fully describes the working of a • Four function outputs
code hopping decoder implemented on a Microchip • Six learnable transmitters
PIC16C56 microcontroller. Background is given on the • RC Oscillator
various KEELOQ® code hopping encoders that can be
used with the decoder, the decoder hardware described,
and descriptions of the various software modules com-
prising the system. The software can be used to imple-
ment a stand-alone decoder or integrated with full
function security systems. The decoder supports the
Microchip HCS200, HCS201, HCS300, HCS301, and
NTQ106 KEELOQ Code Hopping Encoders.

Notice:
This is a non-restricted version of Application Note AN642 which is available under the
KEELOQ License Agreement. The license agreement can be ordered from the Microchip
Literature Center as DS40149.

KEELOQ is a registered trademark of Microchip Technology Inc.

 1997 Microchip Technology Inc. DS00661A-page 1

AN661
INTRODUCTION TO KEELOQ Synchronization Counters
ENCODERS The transmitted word contains a 16-bit synchronization
counter. The synchronization information is used at the
All KEELOQ encoders use the KEELOQ code hopping tech- decoder to determine whether a transmission is valid, or a
nology to make each transmission by an encoder unique. repetition of a previous transmission. Previous codes are
The encoder transmissions have two parts. The first part rejected to safeguard against code grabbers. The
changes each time the encoder is activated and is called HSC300/301 encoder transmits two overflow bits which
the hopping code part. The second part is the serial num- may be used to extend the range of the synchronization
ber of the encoder, identifying it to a decoder. counter from 65,536 to 196,608 button operations.
Hopping Code Fixed Code
The Hopping Code contains function information, a
Serial Number
discrimination value, and a synchronization counter. This
information is encrypted by an encryption algorithm before The encoder’s serial number is transmitted every time the
being transmitted. A 64-bit encryption key is used by the button is pressed. The serial number is transmitted unen-
encryption algorithm. If one bit in the data that is encrypted crypted as part of the transmission, and serves to identify
changes, the result is that an average of half the bits in the the encoder to the decoder. The number can be used dur-
output will change. As a result, the hopping code changes ing learning operations to calculate the key to be used for
dramatically for each transmission and can not be pre- decrypting the transmissions.
dicted.
Other Status and Function Information
Function Information
The HCS300/301 encoders include provision for four bits of
The encoder transmits up to four bits of function function information and two status bits in the fixed code
information. Up to 15 different functions are available portion of its transmission. The two status bits indicate
(0000 is related to the reset condition in all the current whether a repeated transmission is being sent, and
encoders, and can never be transmitted). whether the battery voltage is low. The HCS200/201 does
not send repeated transmission information and the bit is
Discrimination Value
permanently set to ‘0’.
Stored in the encoder EEPROM, this information is used to
Transmission Format
check integrity of decryption operation in the decoder. If
known information is inserted into the transmitted string Table 1 contains a summary of the information contained in
before encryption, the same information can be used at the transmissions from each of the KEELOQ encoders that can
decoder to check whether the information has been be learned by the Microchip decoder.
decrypted correctly. In the NTQ106, 12 such bits are avail-
able, and 12 bits (including overflow bits) are available in
the Microchip HCS encoders.

FIGURE 1: BLOCK DIAGRAM

RF S0
Receiver RFIN S1
S2
S3
PIC16C56

Learn
CS Indication
EEPROM CLK
DIO
Learn
Init

DS00661A-page 2  1997 Microchip Technology Inc.

 AN661
TABLE 1: KEELOQ ENCODER TRANSMISSION SUMMARY
NTQ106 HCS200/201* HCS300/301
Total transmission length 56 bits 66 bits 66 bits
Hopping code portion (total length) 32 bits 32 bits 32 bits
Function bits 4 bits 3 bits (+1*) 4 bits
Discrimination bits 12 bits 12 bits 12 bits
Synchronization 16 bits 16 bits 16 bits
Fixed portion (total length) 24 bits 34 bits 34 bits
Serial number 24 bits 28 bits 28 bits
Function bits — 3 bits (+1*) 4 bits
Status bits
Low Voltage Indicator — 1 bit 1 bit
Repeated Transmission Indicator — — 1 bit
*The HCS200/201 transmissions are padded to retain compatibility with the HCS300/301 encoders.
The code hopping portion is always transmitted first (LSB to MSB), followed by the fixed portion (LSB to MSB).
TABLE 2: HCS200/201* AND HCS300/301 TRANSMISSION FORMAT
Hop code Serial number Function Status
LSB 32 bits MSB LSB 28 bits MSB 4 bits 2 bits
*The HCS200/201 transmissions are padded to retain compatibility with the HCS300/301 encoders
TABLE 3: NTQ106 TRANSMISSION FORMAT
Hop code Serial number
LSB 32 bits MSB LSB 24 bits MSB
Bits are transmitted from left to right (i.e., the code hopping first).

PWM Format Figure 2 shows the sampling points when sampling data.
The first and last elements are used exclusively to verify
In general, all KEELOQ encoders share a common
the integrity of the received signal. The first element (sam-
transmission format.
ple point A) is always high, the second (sample point B) is
• A preamble to improve biasing of decision the complement of the data bit being sent, and the final
thresholds in super-regenerative receivers. The pre- element (sample point C) is always low. Because the
amble consists of alternate on and off periods, each period between the low portion of a bit (sample point C)
lasting as long as a single elemental period. and the rising edge of the following bit (sample point X)
• A calibration header, consisting of a low period of 10 can vary somewhat, the rising edge of the first element
elemental periods. Calibration actions should be (sample point X) is used to resynchronize the receiving
performed on the low period of the header to ensure routine to each incoming bit.
correct operation with header chopping. If random noise is being received, the probability of a set
• A string of 56 or 66 pulse width modulated bits, each of three samples producing a valid combination is only 2-2
consisting of three elements. The first element is = 1/4. For a string of 56 bits, the corresponding figure is
high, the second contains the data transmitted and 2-112 > 2 x 10-34. For longer strings, the probability is con-
is either high or low, the third element is always low. siderably less.
• A guard period is usually left between the Integrity checking on incoming signals is important. Code
transmissions. During this period nothing is hopping signals require significant processing, as well as
transmitted by the encoder. EEPROM access, to decrypt. Unnecessary processing
can be avoided by not attempting to decrypt incoming
codes that have bit errors.

 1997 Microchip Technology Inc. DS00661A-page 3

AN661
TABLE 4: TRANSMISSION FORMATS
Header Code Hopping Fixed Code
Encoder Preamble Chopping Length Length Guard Period
NTQ106 — — 32 bits 24 bits 3.4 ms
HCS200/201 • • 32 bits 34 bits 6.4 ms
HCS300/301 • • 32 bits 34 bits 6.4 ms

FIGURE 2: KEELOQ PWM TRANSMISSION FORMAT

Bit Format I Sampling Points

2te te

1
X A B C

te 2te

IMPLEMENTATION the system. The following section summarizes how the

differences in transmitted data are dealt with by the
The Microchip decoder’s primary hardware components decoder.
are a PIC16C56 RISC microcontroller and a 93C46
As the serial number information follows after the code
EEPROM. However, this solution can be implemented in
hopping portion of the transmission, any number of serial
any PICmicro™ microcontroller with at least 1K words of
number bits can be received and processed. For exam-
programming. The operating frequency of the controller is
ple, to maintain full compatibility between the Microchip
4 MHz. The microcontroller is used to capture transmis-
NTQ106 and HCS encoders transmissions, a specific
sions from the various encoders, decrypt transmissions
manufacturer might decide to disregard all but the first 24
captured, and check the validity of the transmission based
serial number bits. In the Microchip decoder described
on the information in the decrypted transmission and
the complete serial number is stored for both the NTQ106
information stored in the EEPROM. If a transmission from
encoders (24 bits) and the HCS range of encoders (28
a valid encoder is received, the Microchip decoder acti-
bits).
vates the outputs dictated by the transmission.
The serial number is used to identify the memory block
Encoder information, such as serial number,
used to store the 64-bit decryption key for a particular
synchronization information, and decryption key are
encoder because of the relationship between serial num-
stored externally in an EEPROM. The EEPROM used is a
ber and decryption key. In other words, the serial number
Microchip 93C46 CMOS serial EEPROM. The information
is stored with the key. When a transmission is received,
stored in the EEPROM is encrypted to protect the decod-
the decoder finds the correct memory block by checking
ers from cloning. The EEPROM encryption is less secure
all blocks until a matching serial number is found. The key
than the KEELOQ code hopping algorithm.
is then retrieved from that particular memory block. A
A more secure implementation of the decoder would be to serial number of 000000016 is considered invalid.
modify the software in the application note and use a
PIC16CXX with an internal EEPROM such as a
PIC16C84. In this way communication between the
PIC16C56 and EEPROM cannot be monitored.
As can be seen from the section on encoder
transmissions there are differences in the transmission
formats of the different encoders that are compatible with

DS00661A-page 4  1997 Microchip Technology Inc.

 AN661
Validation of a received transmission consists of two FIGURE 3: PINOUTS OF MICROCHIP
parts. The first includes checking the integrity of the KEELOQ DECODER
decryption operation. Here the decoder compares the
12-bit discrimination value received with the stored 1 LEARN INIT RF IN 18
discrimination value. This includes the full 12-bit discrimi- 2 LEARN IND NC 17
nation value of the NTQ106. The discrimination value 3 VCC OSC OUT 16

PIC16C56
stored for the HCS300/301 includes the overflow bits. 4 MCLR OSC IN 15
5 GND VCC 14
The second portion of validation involves checking syn- 6 S0 FUNC OK 13
chronization information for that particular encoder. The 7 S1 EE CS 12
synchronization counter transmitted by all encoders is 16 8 S2 EE CK 11
bits long. Two copies of the full synchronization counter 9 S3 EE DIO 10
are stored for all valid encoders. The storing of two copies
of the synchronization information protects the decoder
from loosing synchronization with an encoder if one of the
counters is corrupted.

FUNCTIONAL INPUTS AND OUTPUTS

TABLE 5: MICROCHIP DECODER FUNCTIONAL INPUTS AND OUTPUTS
Pin Input /
Mnemonic Function
Number Output
RF IN 18 I Demodulated PWM signal from RF receiver. The decoder uses this
input to receive encoder transmissions.
LEARN INIT 1 I Input to initiate learning.
LEARN INDICATION 2 O Output to show the status of the learn process (in an integrated
system this will be combined with the system status indicator).
FUNC OK 13 O Indication that the received button code matches the learned
button code.
S0, S1, S2, S3 6, 7, 8, 9 O Function outputs, correspond to encoder input pins.
EE DIO 10 I/O EEPROM Data.
EE CK 11 O EEPROM Clock.
EE CS 12 I EEPROM Chip Select.

 1997 Microchip Technology Inc. DS00661A-page 5

AN661
PROGRAM FLOW reset. If so, it is assumed the learn cycle was not
successfully completed and the encoder at the learn
The software for the Microchip decoder has been writ- pointer subsequently deleted (WIPE_TX).
ten for the PIC16C56 microcontroller. The compiler
The encoder then enters the main loop where it spends
used is MPASM. The operating frequency of the
most of its time. The main loop checks to see if the learn
PIC16C56 is 4 MHz. The clock speed is important as
button is being activated (TST_LEARN). If so, the
the reception routine (RECEIVE) has some critical tim-
decoder enters the learn mode.
ing specifications. Other decoder functions that rely on
a 4 MHz clock speed are the hold times of the various If learn has not been initiated, the microcontroller then
outputs, time-outs, etc. checks for transmissions from encoders (RECEIVE). If
either 56 bits (NTQ106) or 66 bits (HCS encoders) are
The main program flow is described here. More
received, the microcontroller validates the transmission
detailed descriptions of the modules can be found
received. If the transmission received is a valid trans-
further in the application note. On power-up the
mission from an encoder learned into the system, the
decoder reads the learn pointer from the external
system sets the appropriate outputs (M_BUT).
EEPROM. The status flags are checked to see if a learn
routine was interrupted when the microcontroller was

FIGURE 4: MICROCHIP DECODER MAIN PROGRAM FLOW

Reset

Get Learn
Pointer
MAIN

Delete TX
Yes At Learn
Reset Due To
Failed Learn? Position
WIPE_TX

No
Loop Back
Point
MAIN2

Learn
Pressed?
M_LOOP2-> Learn Routine
TST_LEARN Yes

No

Check For
Encoder TX
RECEIVE

Received 56
Or 66 Bits?
No M_LOOP2

Yes

Transmission
Validation

DS00661A-page 6  1997 Microchip Technology Inc.

 AN661
FUNCTIONAL MODULES sample is not as expected, the attempt at capturing
a transmission is abandoned. In the diagram below
Reception (Figure 5), the data sample points are points
The reception routine (RECEIVE) is based on a reliable 4 through 6. The flow chart describing data recep-
algorithm which has successfully been used in previous tion (Figure 7) shows where in the code the sam-
implementations of KEELOQ decoders. Automatic baud ples are taken.
rate detection is used to compensate for variations in 3. If all 56 or 66 bits have been captured, each with
baud rate of different encoders of a specific type, as well the correct first and third elements, the
as the difference in baud rate between different encoders transmission can be assumed to be correct, and
(NTQ106, HCS200, and HCS300). The reception routine decryption can commence.
is able to handle 56- and 66-bit transmissions. The recep- The receiving routine should be called often enough to
tion routine is able to determine the type of encoder by the ensure that the high portion in the header is not missed
number of bits in the transmission. (Sample 1, Figure 5).
The reception algorithm performs the following functions In systems where the receive routine is called to check if
when an output is detected from the receiver: there is activity on the receiver input, the routine should
1. Calibrate on the header low period to determine poll the input for a valid transmission for at least the time
the actual elemental period for the transmission taken to complete one transmission if activity is detected
being received. The required elemental period is on the input line. This makes provision for the receive rou-
10% of the low header period. In the diagram tine being called while a transmission is in progress. Hav-
below (Figure 5) the header calibration sample ing missed the first header, the first transmission will be
points are marked 1 through 3. The calibration flow invalid and be discarded. The decoder should continue
chart (Figure 6) shows at what points in the source sampling the input through the guard time in order to
code samples 1, 2, and 3 are taken. catch the next header and transmission (i.e., for a
Elemental periods outside the capture range of the decoder designed to capture HCS300 transmissions the
algorithm (either too long or too short) should be time spent polling for a valid transmission should be at
rejected, since they would be due either to noise or least 100 ms if activity is detected in the input line).
to reception of an incomplete signal. The diagram below (Figure 5) gives all the major
2. Using the determined elemental period, three sampling points in the receive algorithm.
samples after the first rising edge following the
header are taken. The first sample is taken half an Note: The sample points are labeled in the
elemental period after the rising edge (Sample 4); receive routine flow diagrams that follow.
the second, one elemental period later (Sample 5),
and the third, another one elemental period later
(Sample 6). The first sample must be high, the sec-
ond could be either high or low, and the third sam-
ple must be low. If either the first or the third

FIGURE 5: SAMPLING POINTS USED IN RECEIVE ALGORITHM

Receive Algorithm Sampling Points

Preamble Header Data

1 2 3 4 5 6 7 4 5

 1997 Microchip Technology Inc. DS00661A-page 7

AN661
Flow Diagrams FIGURE 6: CALIBRATION FLOW CHART
The first flow diagram (Figure 6) describes the calibration
routine which is used to determine the actual transmis- Calibrate
sion rate of the encoder so that the decoder can compen- RECEIVE
sate for deviations from nominal timing. There are four
different exit points, each of which should branch to a
point in the program where housekeeping and input mon-
itoring can be resumed. There is only one exit point for a
Low Invalid
valid calibration operation (RCV7). At this point, it is Input? Header
assumed that a valid header has been received and that RMT_0
a string of data bits will follow.
The second flow diagram (Figure 7) handles the reception High
1
of bits once the calibration routine has been successfully
completed. The data bits are all sampled three times each Reset Time-out
to ensure that a noise free transmission has been Counter
received. The receive routine uses the calibrated elemen-
tal period, determined in the calibration routine, to ensure
that the samples are spaced correctly. The routine resyn- No
chronizes itself on the rising flank of each bit. Provision for
identification of the encoder type, based on the number of High
bits received, is included. A 56-bit transmission emanates Input?
RCV1 Time-out?
from a NTQ106, while a 66-bit transmission comes from Yes
a Microchip HCSXXX encoder. The last two bits of the
HCS300 transmission, VLOW and Repeat, are ignored by Low
2
the Microchip decoder.
If all of the control samples in all of the bits are sampled Clear Calibration
correctly (i.e., the first element is high and the last ele- Counter
RCV2
ment is low), the routine checks whether 56 bits have
been received correctly (NTQ106 transmission). If not, Update Time-out
the routine returns to the calling procedure. Counter
RCV5 No

Input? Low Too

RCV3 Long?
RCV4

High Yes
3
Calibration
Counter/10
RCV6

Too Yes Invalid

Short? Header
RCV6 RMT_0

No

Load
Cal Counter
RCV7

Receive
Data
DL1

DS00661A-page 8  1997 Microchip Technology Inc.

 AN661
FIGURE 7: DATA RECEPTION IN RECEIVE

Receive
Data
RCV7
3

Wait Half
Bit Period
DL1

Low
Input?

High
4

Wait Full
Bit Period
DL2

High
Input?

Low
5

Data = 1 Data = 0

Wait Full
Bit Period
DL3

High
7 Input?

Low
High 6

Low Input? No
RCV9/RCV10 Last Bit?

No Yes

Time-out?

Yes

No Received
Invalid 56 Bits?
RMT0
Yes

Reception
Cleanup Complete
RMT2 RMT1

 1997 Microchip Technology Inc. DS00661A-page 9

AN661
VALIDATION
SYNCHRONIZATION
FUNCTION INTERPRETATION
OUTPUT ACTIVATION
KEY GENERATION
DECRYPTION
LEARN
ROM MEMORY MAP
EEPROM MEMORY MAP
RAM MEMORY MAP

The confidential and proprietary information contained in this section of AN642 has
been removed. The full application note is available under a license agreement and
can be ordered as DS40149 from Microchip Technology Inc.

DS00661A-page 10  1997 Microchip Technology Inc.

 AN661
DEVICE PINOUTS
The device used in the application note is a PIC16C56 PDIP.
TABLE 6: DEVICE PINOUTS
PIN PIC16C56 Function Decoder Function PIN PIC16C56 Function Decoder Function
1 PORTA Bit2 LEARN Input Active Low 18 PORTA Bit1 RF Input
2 PORTA Bit3 LRN IND Output Active 17 PORTA Bit0 Not used
High
3 TIME Connect to VDD 16 Osc In RC osc (4 MHz)
4 MCLR Brown out detect 15 Osc Out
5 GND Ground 14 VDD +5V supply
6 PORTB Bit0 S0 13 PORTB Bit7 FUNC OK
7 PORTB Bit1 S1 12 PORTB Bit6 EEPROM CS (1)
8 PORTB Bit2 S2 11 PORTB Bit5 EEPROM CLK (2)
9 PORTB Bit3 S3 10 PORTB Bit4 EEPROM DIO (3+4)

TIMING PARAMETERS
TABLE 7: TIMING PARAMETERS
Parameter Typical Unit
Output activation duration 524 ms
Output pause if new function code received 131 ms
Erase all duration 8.4 s
Learn mode time-out 33.6 s
Learn successful LED flash duration 4.2 s
Learn successful LED flash rate 3.8 Hz
Learn failure LED on duration 1 s

SOURCE CODE LISTING

A diskette is supplied containing source code for the Microchip decoder in the file mcdec12.asm. The code has been
compiled using MPASM v01.30.01. Certain functions are dependent on the oscillator speed for correct functioning.
Examples of time dependent functions include RECEIVE and TST_RTCC. The PIC16C56 Microcontroller should run at
4 MHz.

LIST OF IMPORTANT FUNCTIONS

Function Name Description Line Number Function Length
CALC_KEY Key generation routine. 1219 62
DECRYPT Decryption routine for Code Hop. 469 61
EEREAD The data in the EEPROM at ADDRESS is read and decrypted 945 31
to TMP1 and TMP2. Note that TMP1, TMP2 and ADDRESS
are user defined registers.
EEWRITE The data in TMP1 and TMP2 is encrypted and written to the 860 48
EEPROM at ADDRESS. Note that TMP1, TMP2 and
ADDRESS are user defined registers.
M_DIS Check discrimination value. 1605 19
M_CNT Check synchronization (counter) values. 1633 69
RECEIVE Start of the RF receive routine. 580 121
TST_LEARN1 Check for learn mode and entry to learn. 775 21
TST_RTCC Check TIMER0 and do whatever real time tasks are required. 397 38

 1997 Microchip Technology Inc. DS00661A-page 11

 DS00661A-page 12

FIGURE A1:
APPENDIX A:

AN661
U2 VCC
J1 D5 LM7805
12V 1 VO
VI G
VCC U4 2
1N4004/7 C2 N C3
LOW VOLTAGE DETECTOR 3
100 µF D 100 µF

SCHEMATIC DIAGRAM OF MICROCHIP KEELOQ DECODER

GND
VI G VO CON3

APPENDIX SCHEMATIC DIAGRAMS

N
D POWER SUPPLY

J2
R3 VCC
1k 1 D6 LEARN
R8
RF INPUT

R4 D1 S0
U5
14 R5 D3 S1
R1 4 17
10k MCLR V RA0 R6 D4
18 S2
3
C RA1
T0CKI C RA2 1
2 R7 D2 S3
16 RA3
OSC1 R9 D7 FUNC OK
RB0 6
15 7
CLKOUT RB1
RB2 8
RB3 9
RB4 10
G RB5 11
C1 N RB6 12
10 pF D RB7 13

5 VCC VCC
PIC16C56
U1
 1997 Microchip Technology Inc.

R2
10k 1 CS VCC 8
2 SK NC 7
3 DI NC 6
4 DO GND 5
2
S1 93C46
LEARN INIT SERIAL EEPROM
1
 1997 Microchip Technology Inc.

FIGURE A2:
12V U2 VCC
J1 D5 LM7805
12V
12V 1 VO
VI G MOTOR CONTROL OUT J2
2 N 1
3 1N4004/7 C2 C3
GND 100 µF D 100 µF K2 CON1

TYPICAL GARAGE DOOR OPENER SCHEMATIC

CON3 D8
VCC
POWER SUPPLY 1N4004/7
J3 RELAY SPST
ANTENNA 1
VCC U4 2
S0 Q1
LOW VOLTAGE DETECTOR 3
4 NPN
VI G VO VCC 5
N 6
D 7
R3
1K 8 DOOR MOTOR
9
10
U5 11
14
R1 12
4 17 13
10k MCLR V RA0 RF INPUT
C RA1 18 14
3 1 15
T0CKI C RA2 L1
RA3 2
16 RF RECEIVER MODULE GARAGE LIGHT
OSC1 S0
RB0 6
15 7 S1 12V
CLKOUT RB1
RB2 8
9 V1
RB3 110VAC
RB4 10
G RB5 11
C1 12 D9 K1
N RB6
10 pF D RB7 13
VCC
VCC 1N4004/7
PIC16C56 5 RELAY SPST
R2 U1
R4 10k 1 8
1k CS VCC
2 SK NC 7 S1 Q2
3 6
DS00661A-page 13

DI NC NPN

AN661
D10 2 4 5
LEARN DO GND
S1
LEARN INIT 93C46
SERIAL EEPROM
1 GARAGE LIGHT
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 1997 Microchip Technology Inc.