Lab Power Amplifier
Lab Power Amplifier
Lab Power Amplifier
BENG 3211
LAB SESSION 5
POWER AMPLIFIER
Lab 1 Voltage Regulators BENE2163
1.0 Objectives
3.0 Theory
Power amplifiers must have the capability of providing higher level of current to
the load. For this reason, the last stage of most operational amplifiers IC is a power
amplifier. Power amplifiers can be stand alone when the level of output current needed is
high. The transistors used for this purpose are different from the one used for voltage
amplifier. They must be able to furnish high current and also be able to operate at higher
temperature. Normally, heat sink is used to make sure that the heat dissipated in the
transistor is removed quickly to the surrounding area.
Power amplifiers are classified based on their conduction angle. A Class-A power
amplifier is biased so that the transistor conducts continuously. The transistor of Class-A
amplifier is biased in the active region during the entire operation. The operation of a
transistor in active region is almost linear, thus the Class-A amplifier is a linear amplifier.
Class A amplifiers are inefficient (maximum efficiency=25%).
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Lab 1 Voltage Regulators BENE2163
4.0 Procedure
1. Simulate the circuit as shown in Figure 1. Do not connect anything across Vin and
V0. Measure VC, VE and VB and ICQ. These are the DC operation point.
3. Using Vin in step 2, measure ICQ, VC, VE and VB using a multimeter (multimeter
shows reading in rms value).
4. Continued from step 2, place a load resistor RL = 470Ω between point a and b.
Measure ICQ, VC, VE and VB using a multimeter. Also, record the pk-pk value of
Vin and V0 from the oscilloscope.
5. Remove the load resistor RL from point a and b. Vary the frequency of the
function generator between 50 Hz and 20 kHz. Use at least 20 different frequency
values. For each frequency, record the pk-pk value of Vin and V0 from the
oscilloscope in a Table. If V0 shows distortion, reduce the pk-pk value of Vin
until V0 is no longer distorted. Then, calculate the voltage gain for each reading,
where Voltage Gain = 20log10(V0/Vin).
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Lab 1 Voltage Regulators BENE2163
Figure 1
5.0 Discussion
1. Using the values of VC, VE, VB and ICQ from step 1 of the PROCEDURES and
given β = 100, plot DC and AC load line of the transistor (plot IC vs. VCE). To plot
DC load line, use VCE = VCC - IC(RC+RE). To plot AC load line, when IC = 0, use
VCEQ = VCC – ICQ(RC+RE) and VCE(cutoff) = VCEQ + ICQRC. When VCE = 0, use IC(sat)
= ICQ+VCEQ/RC. Then, from this graph, find the Q-point (VCEQ, ICQ).
4. From the simulated ICQ, VC, VE and VB values in step 3 of the PROCEDURES,
calculate all parameters mentioned in question 3. Then, compare these results
with question 3. Explain why there are differences between the two values.
5. From the simulated ICQ, VC, VE and VB values in step 4 of the PROCEDURES,
draw the new AC and DC load lines of the transistor (IC vs. VCE). Observe and
explain how new load affects the output power, Q-point and the distortion.
6. From the voltage gain calculated in step 5 of the PROCEDURES, plot the
frequency response of the circuit (Voltage Gain vs. Frequency). Then, determine
the cut-off frequency from the graph.
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