1996 Motorola Master Selection Guide
1996 Motorola Master Selection Guide
1996 Motorola Master Selection Guide
A
SG73/D
REV 10
MOTOROLA SEMICONDUCTOR
MASTER SELECTION GUIDE
Introduction
Semicustom Application Specific Ifl
Integrated Circuits (ASIC) L!J
The information in this book has been carefully checked and is believed to be accurate; however, no responsibility is assumed
for inaccuracies. Furthermore, this information does not convey to the purchaser of semiconductor devices any license under the
patent rights to the manufacturer.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty.
representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including ''Typicals'' must be validated for each customer application by customer's technical experts. Motorola does not convey
any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use
as components in systems intended for surgical implant Into the body, or other applications intended to support or sustain life, or
for any other application in which the failure of the Motorola product could create a situation where personal injury or death may
occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall
indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design
or manufacture of the part. Motorola and ® are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
-NOTE-
REV. 9 WAS PUBLISHED ELECTRONICALLY ONLY
NO BOOKS WERE PRINTED
All brand names and product names appearing in this document are registered trademarks or trademarks of their
respective holders.
In Brief ...
Motorola supports strategic programs and Page
ASIC Preview ............................... 1.1-1
co--development partnerships to accelerate the availability
Bipolar ..................................... 1.1-1
of advanced processes (CMOS, BiCMOS, Bipolar),
ECl& ETlSeriesArrays ................... 1.1-1
packaging and CAD technology. Extensive research,
CMOS ..................................... 1.1-1
manufacturing and financial resources are focused to
1.0 Micron HDC Series
develop and maintain leading edge capabilities.
Sub-Micron H4C & H4CPlus Series. . . . . . . .. 1.1-1
Design Automation Software (OACSTM) ......... 1.1-1
Advanced Packaging ......................... 1.1-1
Architecture for the 90's CDATM
(Customer Defined Arrays) ................... 1.1-1
CDA - The Architecture of the '90s ......... 1.1-1
Bipolar ECl & ETl Series Arrays ................. 1.1-2
Third Generation ............................ 1.1-2
ETl Series Arrays Extend Design Flexibility . .. 1.1-2
ETl Series Features Mixed ECl-TTL Interface 1.1-2
CMOS ........................................ 1.1-3
1.0 Micron CMOS HDCTM Series .............. 1.1-3
Triple-layer Metal ........................ 1.1-3
Sub-Micron CMOS H4CTM Series ............. 1.1-4
CDATMArchitecture ........................ 1.1-4
Sub-Micron CMOS H4CPlus™ Series
Mixed 3.3 V/5.0 V levels ..................... 1.1-5
DeSign Automation Software ..................... 1.1-6
The Open Architecture CAD System™ .......... 1.1-6
OACSTM 2.2 and 3.1 M Features . . . . . . . . . . . . . . .. 1.1-6
Advanced Packaging ........................... 1.1-7
Quad Flat Pack Molded Carrier Ring
(QFP-MCR) ................................ 1.1-7
MicroCoolTM Quad Flat Pack. . . . . . . . . . . . . . . . . .. 1.1-7
Over-Molded Pad Array Carrier (OMPACTM) ..... 1.1-7
Literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1.1-8
ASIC Regional DeSign Centers - United States .... 1.1-8
ASIC Regional Design Centers - International ..... 1.1-8
Motorola Master Selection Guide 1.0-1 Application Specific Integrated Circuits (ASICs)
Application Specific Integrated Circuits (ASICs) 1.0-2 rviotoroia iviH:Sier Seiectlofi Guide
ASIC Preview
Bipolar Architecture for the 90's CDA™
ECl & ETl Series Arrays (Customer Defined Arrays)
Motorola's MOSAIC IIITM technology features modified Performance, density and power dissipation are critical
transistor structures to reduce series base resistance and issues for next generation ASIC designs. The integration of
collector-base junction capacitance. The result is enhanced large diffused blocks and embedded memory enhances
switching speed. Mixed ECLfITL interface compatibility and intra-chip communication and saves board area. The
high frequency (over 2.5 GHz) operation highlights the ETL Customer Defined Array (CDA) concept lets designers
Series. combine array-based, cell based, and full custom logic with
diffused memory blocks on a die. The concept equally
CMOS supports Bipolar and CMOS, each with the capability to
incorporate BiCMOS modules.
1.0 Micron HOC Series
COA - The Architecture of the '90s
Sub-Micron H4C & H4CPlus Series
High density CMOS arrays (HOC Series) are built on 1.0 Architecture Methodology Technology
micron drawn, triple-layer-metal CMOS process. By utilizing
three layers of metal for signal routing, designers can achieve
greater utilization on a channelless architecture.
The sub-micron (0.7IlLeff) H4C Series enables densities
I PROG~~~~ABLEH,_.P.AL_. . I BIPOLAR
over 300 K gates with 365 picosecond typical gate delay
performance. It's available in Custom Defined Architecture
(CDA). Customer
Motorola's highest performance 0.6 micron CMOS arrays, Defined Arrays
the H4CPlus Series, are targeted for mixed 3.3 V and 5 V
applications. The H4CPlus arrays range in density from CMOS
28,400 to 178,000 available gates with packages ranging from
128 QFP to 313 OMPAC.
Advanced Packaging
OMPAC: (Over-Molded Pad Array Carrier), a surface
mount plastic package with solder bumps instead of traditional
pins for interfacing to printed circuit boards.
QFP-MCR: Quad Flat Package in lead counts from 64 to 304
in optional Molded Carrier Ring which provides coplanarity and
lead protection during manufacturing, testing and shipping.
MicroCool QFP: A new QFP-compatible plastic package
with heat slug attached for improved heat dissipation capacity.
Motorola Master Selection Guide 1.1-1 Application Specific Integrated Circuits (ASICs)
Bipolar
Eel & Ell Series Arrays
Third Generation
ETL Series Arrays
Extend Design Flexibility
The ETl Series is flexible enough to simplify translation
between high speed logic families.
Three. base arrays:
MCA750ETl, MCA3200ETl, MCA6200ETl
• 848 to 6915 Equivalent Gates
• Channelled Architecture for up to 100% Utilization
• Input and Internal ECl Gate Delays - 0.20 ns (Typical)
• TIL Input'Translation Cell Delay - 0.55 ns (Typical)
• Up to 168 Universal I/O Signal Ports
• Bidirectional ECl and TIL I/O Macros
• ECl 100 K, Pseudo ECl and TIL logic Interfaces
• Programmable Speed/Power levels
Figure 1. MCA6200ETl In Multi-Layer Ceramic
• Three-level Series Gated Macros
• MCA2 and MCA3 ECl Series Library Compatible
224 Pln-Grld-Array Designed for High Frequency,
Mlxed-Mode Applications
Motorola's MOSAIC III bipolar process offers unexcelled
mixed TIUECl interface capability in a high performance,
mature technology.
Application Specific Integrated Circuits (ASiCsj i.i-2 MQtoiQla Mast6i Selection Guide
CMOS
1.0 Micron CMOS
HDCTM Series
Triple-Layer Metal
Built on a 1.0 micron, triple-layer metal CMOS process, the
HDC Series represents a significant advancement in
microchip technology. By utilizing three layers of metal for
signal routing and power distribution, designers can achieve
maximum utilization on a channelless architecture having
minimum chip dimensions. The result is high performance
combined with 1/0 flexibility and density.
The HDC Series is available in a wide variety of plastic
surface mount packages. The diversity of package style and
pin count lets the designer best match system size, cost and Figure 3. Triple-Layer Metal Signal Routing
performance requirements. Enhances Utilization
Features
• 3,000 to 49,OOO available gates
• Up to 70% utilization
• Channelless Sea-Of-Gates architecture
• 1.0 micron drawn gate length (0.8 ~Leff)
• Triple layer metal routing and power distribution
• Eight transistor, fully utilizable, oxide isolated primary cell QFP-MCR
MOLDED CARRIER RING
• 475 picosecond typical gate delay (2-input NAND)
64-208 PINS
• Fixed RAM blocks (single, dual and quad)
• 5 V CMOS and TTL compatible 1/0 options
• Low power consumption of 6 ~W/gate IMHz
• 110 cells can be paralleled on-chip for 48 mA drive
• Pin functions are 100% programmable as 1/0 or power
on plastic packages
• 1000 V ESD protection, latchup immunity to 100 mA
• Comprehensive workstation based CAD support
Motorola Master Selection Guide 1.1-3 Application Specific Integrated Circuits (ASICs)
Sub-Micron CMOS ¥"" FIXED I/O RING U
H4CTM Series
CDA Architecture
The H4C Series of CMOS Customer Defined ArraysTht (CDA)
B RAM
~
I/OCELLS--
Application Specific Integrated Circuits (A::il(;s) ;.i-4 Motoiola Mastei Selection Guide
Product Preview SELF-TERMINATING
DIFFERENTIAL
Sub-Micron CMOS
H4CPluS™ Series ENABLE
Mixed 3.3 V/S.O V Levels DATA OUT
The new sub-rnicron CMOS H4CPlus Series is targeted for DATA IN
mixed 3.3 V and 5 V applications, as well as low-power 3.3 V
systems. The H4CPlus arrays range in density from 28,400 to HIGH-SPEED HIGH-SPEED
178,000 available gates with packages initially ranging from 128 OUTPUT INPUT
QFP to 313 OMPAC. HIGH-SPEED HIGH-SPEED
A key feature of this family is a powerful I/O buffer aimed at INPUT OUTPUT
meeting the requirement for GTl VO levels and capable of
driving backplanes of 50 n transmission lines in today's SELF-TERMINATED
high-performance RISC/CISC microprocessor-based systems. SINGLE-ENDED
For the highest possible chip--to-chip operating frequencies,
the H4CPlus family introduces Current Mode Transceiver Figure 7. Interfacing H4CPlus Series with Current
logic™ (CMTUM) buffers. This new self-terminating I/O method Mode Transceiver Logic
permits CMOS chip--to-chip interface speeds (using typical
differential or single-ended inputs) to 250 MHz, at low power
dissipation. It also provides a differential interface directly to
industry standard ECLinPSTM logic when used with a +5 V rail.
OFP-MCR
Features: MOLDED CARRIER
RING
• 0.6 micron effective gate length
• Typical gate delay of 280 ps for a NAN2, FO 2 at 5 V =
• Power dissipation of 1 IlW/gate/MHz at 3.3 V
d ~ '* ~
• Standard 5 V high performance or 2.7 V to 3.6 V low 4 ... " " ......
~ .. J> I> "
.
........... .. J> ..
....................
f! . . . . . . . ..
~
BALL GRID ARRAY
• Single I/O site, 2 rnA to 24 rnA drive, TTL and CMOS .. . . . .. . .. ...... " .." ~
output macros
"
; : ; : : : : : : : ; : :~!
. . . '" .. ., . . . f ~ ........ "<
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
Motorola Master Selection Guide 1.1-5 Application Specific Integrated Circuits (ASICs)
Design Automation Software
Motorola has worked closely with several leading
CAD/CAE vendors to integrate the best design tools in the
industry into one system. In many cases, Motorola has been
instrumental in the definition and refining of key third-party
design tools.
To satisfy specific CAD requirements, Motorola has
developed several design tools to perform netlisting and
translation, rule checking, delay and timing calculation, fault
grading and automatic test pattern generation, floorplanning, Open Architecture
test vector analysis and processing.
The OACS 2.2 and 3.1 M features chart briefly describes
CAD System
Motorola's OACSTM ASIC design system options.
into a standard EDIF based CAD environment. The release of
The Open Architecture CAD this Design Reference Guide corresponds to the release of
two major versions of OACS: OACS 2.2 and OACS 3.1 M.
System™ OACS 2.2 is Motorola's point tool CAE solution based on
Cadence's ConceptTM schematic editor, Synopsys' synthesis
The Open Architecture CAD System (OACS) offers a highly tools, and Cadence's Verilog™ logic simulator.
versatile and powerful design environment for the design of OACS 3.1 M is Motorola'S framework based CAE solution
Motorola's H4CPlus, HC4 Series, and HOC Series CMOS using Mentor's Falcon Framework™. This solution provides
arrays. The OACS integrates several of the industry's most support of Mentor's design entry tools and QuickSim II logic
powerful design tools with Motorola's high-performance tools simulation.
AtJJJii(;aliun Specific liitegiated Ciicuits (AS!C::;) 1.1-6 Motorola Master Selection Guide
Advanced Packaging
Low cost, high performance systems require excellence in
ASIC packaging technology. MicroCool, QFP-MCR (Quad
Flat Pack in an optional Molded Carrier Ring), and
Over-Molded Pad Array Carrier (OM PAC) packages illustrate
cost effective manufacturing solutions for high lead count,
high frequency applications.
DIE ATTACH
EPOXY
GOLD PLATED
DIE ATTACH
SOLDER BALL
Motorola Master Selection Guide 1.1-7 Application Specific Integrated Circuits (ASICs)
Literature
To order any literature item, call or write:
Motorola Semiconductor Products
Literature Distribution Center
P.O. Box 20912, Phoenix, Arizona 85036
(602) 994-6561
Appiication Specific Intsgiat6d Ciicuits (AS!Cs) 1.1-8 Motorola Master Selection Guide
Microcomputer Components
In Brief ...
Motorola continues to be a leading supplier of components Page
Digital Signal Processors ....................... . 2.1-1
for microcomputer systems. The product portfolio includes
The M68000 Family ........................... . 2.2-1
digital signal processors; CISC and RISC and PowerPC
The M88000 RISC Family ...................... . 2.3-1
advanced microprocessors and complementary fulHunction
The PowerPC RISC Family Microprocessors ...... . 2.4--1
peripherals; a comprehensive selection of high-performance
Single-Ghip Microcontrollers (CSIC) ............. . 2.5-1
microcontrollers; VLSI functions for Local Operating Network
Single-Chip Microcontrollers (AMCU) ........... . 2.6--1
applications; and a broad range of fast static RAM and dynamic
LonWorks Products ............................ . 2.7-1
RAM chips and modules.
Memory Products ............................. . 2.8-1
Our commitment is to provide state-of-the-art devices
as well as continuing support of established products, with
six-sigma quality and total customer satisfaction.
In Brief ...
Drawing on both design excellence and expertise in Page
manufacturing, Motorola has created a range of DSP56100 - 16-Bit Digital Signal Processors 2.1-2
architecturally compatible Digital Signal Processing chips. DSP56800 - 16-Bit Digital Signal Processors 2.1-3
The philosophy behind the DSP families has been to create DSP56000 - 24-Bit Digital Signal Processors 2.1-3
compatibility between products as well as conformance to DSP56300 - 24-Bit Digital Signal Processors 2.1-6
international standards. DSP96002 - 32-Bit Digital Signal Processors 2.1-9
Motorola offers a complete portfolio of 16- and 24-bit DSP56ADC16 - The Analog-To-Digital
fixed point and 32-bit floating point DSPs. Converter ................................ . 2.1-10
In addition, we offer a comprehensive array of DSP Development Tools ....................... . 2.1-10
development tools to give the designer access to the full Application Development Systems ........... . 2.1-10
power and versatility of the DSPs with minimum fuss. All the Graphical User Interface .................... . 2.1-12
tools were designed for ease of use and functionality. They DSP Development Software ................... . 2.1-12
provide a low-cost means of evaluation and greatly simplify Design-In Software Packages ............... . 2.1-12
the design and development phase of a DSP project. C-Compiler Packages ...................... . 2.1-13
C-Compiler Upgrades ...................... . 2.1-13
DSP56100 Features
AG--A15 ,;.:==~ 28erial • Up to 30 Million Instructions per Second (MIPS) at 60
Interfaces MHz - 33.3 ns Instruction cycle
8810& • Single-cycle 16 x 16--bit parallel Multiply-Accumulate
DD-D15 '';;.=0.=-1
8811 • 2 x 4G-bit accumulators with extension byte
or • Fractional and integer arithmetic with support for
PortCl/O
multi precision arithmetic
• Highly parallel instruction set with unique DSP addressing
Tout} Timer or
Tin PortCl/O modes
Power • Nested hardware DO loops including infinite loops and
Ground DO zero loop
• Two instruction LMS adaptive filter loop
• Fast auto-return interrupts
1«1"'
~~~ 1°1>-[l3CIOci< ou;ae::
~~QICl • Three external interrupt request pins
< '" ° e:: and jou;
888 PLL ~Cl
:::; :::; :::; '---v---J
• Three 16--bit internal data and three 16-bit internal
address buses
'---v---J • Individual programmable wait states on the external bus
Interrupt and OnCETM
Mode Control for program, data, and peripheral memory spaces
• Off-chip memory-mapped peripheral space with
programmable access time and separate peripheral
PART NUMBERS
enable pin
Part Description • On-chip memory-mapped peripheral registers
XC56156FV40 40 MHz in TQFP • Low Power Wait and Stop modes
• On-Chip Emulation(OnCE) for unobtrusive, processor
XC56156FV50 50 MHz in TQFP speed independent debugging
XC56156FE60 60 MHz in CQFP • Operating frequency down to DC
XC56166FV60 60 MHz in TQFP • 5 V single power supply
• Low Power (HCMOS)
ig~}Note
• Byte-wide Host Interface (HI) with Direct Memory Access
(DMA) support
Bus
SCK 3 Synchronous Serial Interface (SSI) to communicate with
Control
SRD codecs and synchronous serial devices
STD - 8-, 12-, 16-, 24-bit word sizes
PINIT~Note
PLOCK
- Up to 32 software-selectable time slots in network
mode
CKP 4
- Serial Communication Interface (SCI) for full-duplex
L,-r-T"""'1r-r-r--r,...r-PCAP
asynchronous communications
I'"ol~-IF-~ i:!:-'-' 't!:.$l-;ff'
1«o~~g~~>< -'Cl (/) - 24-bit Timer/Event Counter also generates and
measures digital waveforms
880 - Up to 25 general-purpose 110 (GPIO) pins
~ - Three external interrupt request pins; one
Interrupt and Mode Control non-maskable
NOTES: - 3.3 V (DSP56L002) and 5 V (DSP56002) power
1. On-Chip Emulator Port (OnCE'M) supply options
2. SCI Serial or Port CliO
3. SSI Serial or Port CliO DSP56004/DSP56007 Features
4. Phase-Locked Loop
• Serial Audio Interface (SAl) includes 2 receivers and
DSP56000 Family Features 3 transmitters, master or slave capability, and
implementation of 12 S, Sony, and Matshushita audio
• On--chip Harvard architecture permitting simultaneous
protocols; two sets of SAl interrupt vectors
accesses to program and two data memories
• Serial Host Interface (SHI) features single master
• Two 56-bit accumulators including extension byte
capability, lo-word receive FIFO, and support for 8-,
• Parallel 24 x 24-bit multiply-accumulate in 1 instruction
16-, and 24-bit words
cycle (2 clock cycles)
• External Memory Interface (EMI) peripheral providing
• Double precision 48 x 48-bit multiply with 96-bit result in
glueless connection to DRAM, SRAM, and/or EPROM for
6 instruction cycles
audio delay buffering
• 56-bit addition/subtraction in 1 instruction cycle
• Four dedicated, independent, programmable General
• Fractional arithmetic with support for multiprecision
Purpose 110 (GPIO) lines
arithmetic
• DSP56004 memory: 512 words PRAM, 2 x 256 words
• Hardware support for block-floating point FFT
data RAM, 2 x 256 words data ROM
• Hardware nested DO loops
• DSP56007 memory: 6400 words PROM, 3200 words
• Zero-overhead fast interrupts (2 instruction cycles)
data RAM, 1024 words data ROM
• On-Chip Emulation (OnCE) port for unobtrusive,
• 3.3 V power supply option available (DSP56L007)
processor speed-independent debugging
• Bootstrap loading via 12 C, SPI, or byte-wide memory
• Software-programmable, Phase-Locked Loop (PLL)
modes available
based frequency synthesizer for the core clock
• Up to 25 general-purpose 1/0 (GPIO) pins
• On-chip peripheral registers memory mapped in data
memory space
~
(/) ~
I~I~I~
\..... ;;;: C3 <3
Bezier Cubic Evaluation for
Font Compilation
13
oQ () ~Cl 0 0
en Ci5 wla:::
Cl Cl Cl Cl
wOO 0
a::2:2:2
[4x4][4x4] = [4x4] 67
DSP96002 Features
• DSP96000 family architecture
- Full IEEE Standard 754 compatible for 32-bit (SP)
and 44-bit (SEP) arithmetic
- 20 MIPS, 50 ns instruction cycle at 40 MHz
- 60 million floating-point operations per second
(MFLOPS) at 40 MHz
14 14 - Single cycle 32 x 32 --7 96-bit multiply/accumulate
Port A Control PortB Control - Ten 96-bit general-purpose data registers
- Zero-overhead nested DO loops
3
- Two instruction--<:ycle fast interrupts
PortA Host PortB Host - Low-power Wait and Stop Modes
Interface Interlace - On-Chip Emulation for unobtrusive, fuli-speed
and Control and Control debugging
""
--'
0 - 4K byte instruction cache
- Integer mode available
- Single precision mode available
- Timer/Event Counter
• DSP96002 peripherals
PART NUMBERS - Two 32-bit address and data host ports
- Dual channel DMA controller
Part Description
• DSP96002 memories
XC96002RC33 33 MHz in PGA - 1024 x 32 program RAM
XC96002RC40 40MHzin PGA - 2 x 512 x 32 data RAM
- 2 x 512 x 32 data ROM (sine and cosine tables)
In Brief ...
An MPU For All Functions Page
Microprocessors ............................... 2.2-2
To designers of the most advanced microcomputer
Embedded Controllers .......................... 2.2-5
systems, the Motorola M68000 Family of microprocessors
Integrated Processors. . . . . . . . . . . . . . . . . . . . . . . . . .. 2.2-7
needs no introduction. Products based on its members have
Coprocessors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.2-9
become the standard for systems utilizing the UNIX
DMA Controllers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.2-9
operating system and for CAD/CAM engineering
Network Devices ............................... 2.2-9
workstations. They are invading the next generation designs
Data Communication Devices . . . . . . . . . . . . . . . . . .. 2.2-10
of personal computers and color graphics systems, and they
General Purpose 110 ........................... 2.2-11
find widespread implementation in multi-user/multi-tasking
Fiber Distributed Data Interface ................. 2.2-11
applications and in small business systems. M68000 MPUs
Development Tools ............................ 2.2-12
are found in the leading products in fault-tolerant systems
Support Software .. . .. .. . .. .. . .. .. . .. . .. . .. . ... 2.2-12
requiring high performance and parallel processing, and
they are the preferred components for artificial intelligence
engines requiring large linear addressing capabilities.
Control applications include graphics, numerical controllers,
robotics, telecommunications switching and PBX voice/data
transmission.
Upward Compatibility
The M68000 MPU Family consists of a line of processors
based on a 32-bit flexible register set, a large linear address
space, a simple yet powerful instruction set and flexible
addreSSing modes. The intemal architecture of the 8-, 16-, and
32-bit MPU versions, and the common instruction set, provide
software compatibility and offer an easy upward migration path
for products requiring increasing levels of processing power.
A Host of Peripherals
A large selection of full--function peripheral chips
complements the processor family. Compatible LSI and VLSI
chips for memory management, data communications, DMA
control, network control, system interfacing, general 110 and
graphics, all simplify system design and reduce design and
manufacturing cost while improving system performance.
*Separate Instruction/Data
INTEGER UNIT
-
INSTRUCTION FETCH CONTROLLER
r--- /'-- IA
BRANCH~ GENERATE
INSTRUCTION
I INSTRUCTION
ATC
INSTRUCTION
CACHE
I
CACHE - - - , / INSTRUCTION
FETCH
'--- EARLY
DECODE
fl" fl" ADDRESS
INSTRUCTION )
INSTRUCTION
{} I CACHE CONTROLLER
I B
U
BUFFER S
C
"'7 V 0 DATA
N ADDRESS
DECODE DECODE
FLOATING- T
POINT
UNIT
EA
EA
GENERATE
EA
EA
GENERATE
EA
<= DATA
R
0
~
INSTRUCTION EXECUTION CONTROLLER
U U
I ATC CACHE I CONTROL
)
DATA AVAILABLE
WRITE-BACK I
Table 2.
68ECOOO 68EC02O 68EC030 68EC040
MC68EC030 MC68EC020
32-Bit Enhanced Embedded 32-Bit Embedded Controller
Controller The 68EC020, with a complete 32-bit intemal
implementation, has a 32-bit data bus and an on--chip instruction
The MC68EC030 is a 32-bit embedded controller that
cache to provide dramatically increased performance over 8-
streamlines the functionality of an MC68030 for the
and 16-bit microprocessors. In addition, upward migration to
requirements of embedded control applications. The the EC020 is made simple with dynamic bus sizing, allowing
MC68EC030 is optimized to maintain performance while 8, 16 and 32-bit peripherals to communicate with the
using cost-effective memory subsystems. The rich instruction microprocessor.
set and addressing mode capabilities of the MC68020, Other performance features include advanced bit
MC68030, and MC68040 have been maintained, allowing a manipulation capabilities that provide multiple bit shift operations
clear migration path for M68000 systems. The MC68EC030 in a single instruction cycle. This capability greatly simplifies
is object-code compatible with the MC68020, MC68030, and and accelerates the bit operations required in graphics
earlier M68000 microprocessors. Burst-mode bus interface is processing and optical recognition applications.
provided for efficient DRAM access.
The MC68EC030 has an on--chip data cache and on-chip MC68ECOOO
instruction cache with 256 bytes each. Dynamic bus sizing is
available for direct interfacing to 8-, 16-, and 32-Bit Devices.
Low-Powered HCMOS
The MC68EC030 includes 32-bit nonmultiplexed address Embedded Controller
and data buses, sixteen 32-bit general-purpose data and The 68ECOOO is a low-power HCMOS derivative of the
address registers, and two 32-bit supervisor stack pOinters 68000 optimized for cost-effective embedded processing.
and eight special-purpose control registers. The EC030 The ECOOO has a flexible data bus that can operate in either
provides complete support for coprocessors with the M68000 8- or 16-bit modes and a 24-bit address bus that provides
coprocessor interface. There are two access control registers 16 Mbytes of memory addressing capability. Electrical
that allow blocks to be defined for cacheability protection. The characteristics of the 68ECOOO have been optimized to
pipelined architecture, along with increased parallelism, ensure easy access to low--cost memories.
allows internal caches accesses in parallel with bus transfers The 68ECOOO represents the lowest cost entry point to any
and overlapped instruction execution. The enhanced bus 32-bit architecture. Coupled with efficient support for
controller supports asynchronous bus cycles (three clocks high-level languages and real-time operating systems, the
minimum), synchronous bus cycles (two clocks minimum), 68ECOOO provides unparalleled compatible migration paths to
and burst data transfers (one clock). higher performance.
Table 3
68302 68306 68330 68331 68332 68333 68334 68340
Core Processor 68000 680ECOO CPU32 CPU32 CPU32 CPU32 CPU32 CPU32
Speeds (MHz) 16,20 16 16,25 16 16 16 16 16,25
DMA Yes - - - - - Yes
Serial Processor Yes - - - - -
Time Processor Unit - - - - Yes Yes Yes
Flash EEPROM - - - - - 64K
Serial 1/0 Yes Yes - Yes Yes Yes Yes
Timers 1 - - 1 - - 2
AID Converter - - - - - Yes Yes
SRAM 1K - - - 2K 4K 1K
DRAM Controlier - Yes - - - -
Glue Logic (SIM) Yes Yes Yes Yes Yes Yes Yes Yes
3.3 Volts Available - - - - - - Yes
storage RAM and dual time bases. In addition to the TPU and
MC68306 CPU32, the 68332 features the QSM, a 81M and 2-Kbytes of
Integrated 68ECOO Processor standby static RAM.
Support Software
M68KESW-PC1 M68040FPSP
This Intermetrics software package is for the 68K Family This software provides 68040 floating point emulation of
(68000, 68008, 68HC001, 68010, 68020, 68030, 68EC030, unimplemented 68881/68882 functions. Contact factory for
68040, 683xx). The M68KESW InterTools package includes license agreement.
C compiler, assemblerllinker, run-time libraries, and one year
of support from Intermetrics.
In Brief ...
Motorola's 88000 Family comes from the only company Page
committed to long-term upward software compatibility Architecture, Performance,
through such features as hardware interlocked and and Software Compatibility ..................... . 2.3-2
protected pipelines. Our goal is to make sure each Microprocessors .............................. . 2.3-2
generation of the 88000 RISC family delivers a high Cache/Memory Management Units .............. . 2.3-3
performance level while maintaining software compatibility.
Compatibility
Although high performance is recognized as a key feature
MC88110RC
for systems design, software compatibility is also important. 32-Bit RISC Microprocessor
Motorola's 88000 Family comes from the only company
committed to long term upward software compatibility through The MC8811 0 is the second implementation of the 88000
such features as hardware interlocked and protected family of reduced instruction set computer (RISC)
pipelines. Our goal is to make sure each generation of the microprocessors. The MC88110 is a Symmetric Superscalar
88000 RISC family delivers a high performance level while machine capable of issuing and retiring two instructions per
maintaining software compatibility. This gives the opportunity clock without any special alignment, ordering, or type
for designing one of the industry's highest performance restrictions on the instruction stream. Instructions are issued
systems, while leveraging your largest dollar investment in to multiple execution units, execute in parallel, and can
new systems, your software. complete out of order, with the machine automatically keeping
Software compatibility is also promoted through standards results in the correct program sequence. The SymmetriC
to provide an open systems environment benefitting system Superscalar design allows sustained performance to
companies, software developers, and end users because approach the peak performance capability.
88000 based systems from different vendors will run all of the The MC88110 uses dual instruction issue and simple
same software. instructions with extremely rapid execution times to yield
maximum efficiency and throughput for 88000 systems.
Instructions either execute in one clock cycle, or effective one
Microprocessors clock cycle execution is achieved through internal pipelining.
Ten independent execution units communicate with a general
MC88100RC register file and an extended register Ii Ie through multiple
80-bit internal buses. Each of the register files has sufficient
32-Bit RISC Microprocessor bandwidth to supply four operands and receive two results per
The MC881 00 is the first processor in the 88000 Family of clock cycle. Each of the pipelined execution units, including
RISC (reduced instruction set computer) microprocessors. those that execute floating-point and data movement
Implemented with Motorola's HCMOS technology, the instructions, can accept a new instruction and retire a previous
MC88100 incorporates 32-bit registers, data paths, and instruction on every clock cycle.
addresses. In designing the MC881 00, Motorola has In a single chip implementation, the MC88110 integrates
incorporated a high degree of fine-grain parallelism; four the central processing unit, floating point unit, graphics
independent execution units maintain separate, fully processing unit, virtual memory address translation,
concurrent execution pipelines. Most instructions operate in instruction cache, and data cache. The MC88110 maintains
one machine cycle or effective concurrent execution can be compatibility with MC88100 user application software.
accomplished through internal pipelines in one machine cycle.
In Brief ...
The PowerPC architecture is derived from the IBM Page
Performance Optimized with Enhanced RISC (POWER) PowerPCTM RISC Microprocessors. . . . . . . . . . . . . . .. 2.4-2
architecture. The PowerPC architecture shares all of the MPC601 RISC Microprocessor. . . . . . . . . . . . . . . . . .. 2.4-2
benefits of the POWER architecture but is optimized for MPC602 RISC Microprocessor . . . . . . . . . . . . . . . . . .. 2.4-3
single-chip implementations. The architecture design MPC603 RISC Microprocessor .. . . . . . . . . . . . . . . . .. 2.4-3
emphasizes parallel instruction execution and high MPC603e RISC Microprocessor. . . . . . . . . . . . . . . . .. 2.4-6
throughput and allows for exceptional floating-point MPC604 RISC Microprocessor . . . . . . . . . . . . . . . . . .. 2.4-9
performance. The PowerPC architecture is powerful MPC604e RISC Microprocessor. . . . . . . . . . . . . . . . .. 2.4-9
today and is scalable from palmtops to mainframes. MPC620 RISC Microprocessor .................. 2.4-13
MPC105 PCI Bridge/Memory Controller .......... 2.4-15
MPC106 PCI Bridge/Memory Controller .......... 2.4-16
Motorola Master Selection Guide 2.4-1 The PowerPC RISC Family Microprocessor
PowerPCTM RISC • A flexible architecture definition that allows certain
features to be performed in either hardware or with
assistance from implementation-specific software
Microprocessors depending on the needs of the processor design.
• User-level instructions for explicitly storing, flushing, and
The PowerPC Architecture™, developed jointly by
invalidating data in the on-chip caches. The architecture
Motorola, IBM, and Apple, is based on the POWER
also defines special instructions (cache block touch
Architecture™ implemented by the RISC Systeml6000™
instructions) for speculatively loading data before it is
family of computers. The PowerPC architecture takes
needed, potentially reducing the effect of memory latency.
advantage of recent technological advances in such areas as
• Definition of a memory model that allows weakly-ordered
process technology, compiler design, and RISC (reduced
memory accesses. This allows bus operations to be
instruction set computer) microprocessor design to provide
reordered dynamically, which improves overall
software compatibility across a diverse family of
performance and in particular reduces the effect of
implementations, primarily single-chip microprocessors,
memory latency on instruction throughput.
intended for a wide range of systems, including
• Support for separate instruction and data caches
battery-powered personal computers, embedded controllers,
(Harvard architecture) and for unified caches.
high-end scientific and graphics workstations, and
• Support for both big- and little-endian addressing modes.
multiprocessing, microprocessor-based mainframes.
• Support for 64-bit addressing. The architecture supports
To provide a single architecture for such a broad
both 32-bit or 64-bit implementations. This document
assortment of processor environments, the PowerPC
typically describes the architecture in terms of the 64-bit
architecture is both flexible and scalable.
implementations in those cases where the 32-bit subset
The flexibility of the PowerPC architecture offers many
can be easily deduced.
price/performance options. Designers can choose whether to
implement architecturally-defined features in hardware or in
software. For example, a processor designed for a high-end MPC601 RISC
workstation has greater need for the performance gained from
implementing floating-point normalization and Microprocessor
denormalization in hardware than a battery-powered,
general-purpose computer might. The MPC601 is the first implementation of the PowerPC
The PowerPC architecture is scalable to take advantage of architecture. The MPC601 implements the 32-bit portion of
continuing technological advances - for example, the the PowerPC architecture, which provides 32-bit effective
continued miniaturization of transistors makes it more feasible (logical) addresses, integer data types of 8, 16, and 32 bits,
to implement more execution units and a richer set of and floating-point data types of 32 and 64 bits. For 64-bit
optimizing features without being constrained by the PowerPC implementations, the PowerPC architecture
architecture. provides 64-bit integer data types, 64-bit addressing, and
The PowerPC architecture defines the following features: other features required to complete the 64-bit architecture.
• Separate 32-entry register files for integer and The MPC601 is a superscalar processor capable of issuing
floating-point instructions. The general-purpose registers and retiring three instructions per clock, one to each of three
(GPRs) hold source and target data for integer arithmetic execution units. Instructions can complete out of order for
instructions, and the floating-point registers (FPRs) hold increased performance; however, the MPC601 makes
source and target data for floating-point arithmetic execution appear sequential.
instructions. The MPC601 integrates three execution units-an integer
• Instructions for loading and storing data between the unit (IU), a branch processing unit (BPU), and a floating-point
memory system and either the FPRs or GPRs. unit (FPU). The ability to execute three instructions in parallel
• Uniform-length instructions to allow simplified instruction and the use of simple instructions with rapid execution times
pipelining and parallel processing instruction dispatch yield high efficiency and throughput for MPC601-based
mechanisms. systems. Most integer instructions execute in one clock cycle.
• Nondestructive use of registers for arithmetic instructions The FPU is pipelined so a single-precision multiply-add
in which the second, third, and sometimes the fourth instruction can be issued every clock cycle.
operand, typically specify source registers for calculations The MPC601 includes an on-Chip, 32-Kbyte, eight-way
whose results are typically stored in the target register set-associative, phYSically addressed, unified instruction and
specified by the first operand. data cache and an on-chip memory management unit (MMU).
• A precise exception model (with the option of treating The MMU contains a 256-entry, two-way set-associative,
floating-point exceptions imprecisely). unified translation look-aside buffer (UTLB) and provides
• Floating-point support that includes IEEE-754 support for demand paged virtual memory address translation
floating-point operations. and variable-sized block translation. Both the UTLB and the
• The ability to perform both single- and double-precision cache use least recently used (LRU) replacement algorithms.
floating-point operations.
The PowerPC RISC Family Microprocessor 2.4-2 Motorola Master Selection Guide
The MPC601 has a 64-bit data bus and a 32-bit address The MPC602 has a single bus interface used for
bus. The MPC601 interface protocol allows multiple masters transferring both 32-bit addresses and either 32- or 64-bit
to compete for system resources through a central external data. This bus is time-multiplexed. The MPC602 interface
arbiter. Additionally, on-chip snooping logic maintains cache protocol allows multiple masters to compete for system
coherency in multiprocessor applications. The MPC601 resources through a central external arbiter. The MPC602
supports single-beat and burst data transfers for memory provides a three-state coherency protocol that supports the
accesses; it also supports both memory-mapped I/O and I/O modified, exclusive, and invalid (MEl) cache states. This
controller interface addressing. protocol is a compatible subset of the MESI
The MPC601 uses an advanced, 3.6--volts (601) or 2.5 (modified/exciusive/shared/invalid) four-state protocol and
volts (601v) CMOS process technology and maintains full operates coherently in systems that contain four-state
interface compatibility with TTL devices. caches.
The MPC602 uses an advanced, 3.3-V CMOS process
Block Diagram
technology and maintains full interface compatibility with TTL
Figure 1 provides a block diagram of the MPC601 that
devices.
illustrates how the execution units - IU, FPU, and BPU -
operate independently and in parallel. Block Diagram
The MPC602 block diagram in Figure 2 illustrates how the
execution units - IU, FPU, BPU, and LSU - operate
MPC602 RISC independently and in parallel.
Microprocessor
MPC603 RISC
The MPC602 is a low-cost, low-power implementation of
the PowerPC RISC architecture. The MPC602 implements Microprocessor
the 32-bit portion of the PowerPC architecture, which
provides 32-bit effective addresses, integer data types of 8, The MPC603 is the first low-power implementation of the
16, and 32 bits, and floating-point data types of 32 and 64 bits. PowerPC architecture. The MPC603 implements the 32-bit
Floating-point operations involving either 32- or 64-bit data portion of the PowerPC architecture, which provides 32-bit
types in single--precision format are supported; however, effective (logical) addresses, integer data types of 8, 16, and
floating;>oint operations involving 64-bit data types in 32 bits, and floating-point data types of 32 and 64 bits. For
double-precision format are not implemented in hardware 64-bit PowerPC implementations, the PowerPC architecture
and are instead trapped for emulation in software. provides 64-bit integer data types, 64-bit addressing, and
The MPC602 has four execution units-an integer unit (IU), other features required to complete the 64-bit architecture.
a floating;>oint unit (FPU), a branch processing unit (BPU), The MPC603 provides four software controllable
and a load/store unit (LSU). The ability to execute four power-saving modes. Three of the modes (the nap, doze, and
instructions in parallel and the use of simple instructions with sleep modes) are static in nature, and progressively reduce
rapid execution times yield high efficiency and throughput for the amount of power dissipated by the processor. The fourth
MPC602-based systems. Most integer instructions execute is a dynamic power management mode that causes the
in one clock cycle. The FPU is pipelined such that typically functional units in the MPC603 to automatically enter a
when the FPU pipeline is full, a single-precision instruction low-power mode when the functional units are idle without
can complete every clock cycle. affecting operational performance, software execution or any
The MPC602 provides dynamic and static power-saving external hardware.
modes. The three static modes - nap, doze, and The MPC603 is a superscalar processor capable of issuing
sleep - progressively reduce the amount of power and retiring a maximum of three instructions per clock.
dissipated by the processor. Instructions can execute out of order for increased
The MPC602 provides independent on-chip, 4-Kbyte, performance; however, the MPC603 makes completion
two-way set-associative, physically addressed caches for appear sequential.
instructions and data and on-chip instruction and data The MPC603 integrates five execution units - an integer
memory management units (MMUs). The MPC602 MMUs unit (IU), a floating-point unit (FPU), a branch processing unit
contain 32-entry, two-way set-associative, data and (BPU), a load/store unit (LSU) and a system register unit
instruction translation lookaside buffers (DTLB and ITLB). The (SRU). The ability to execute five instructions in parallel and
MPC602 provides an additional memory protection the use of simple instructions with rapid execution times yield
mechanism not defined by the PowerPC architecture. The high efficiency and throughput for MPC603--based systems.
602's protection--only mode can control whether instructions Most integer instructions execute in one clock cycle. The FPU
can be fetched from 4-Kbyte instruction pages and whether is pipelined so a single-precision multiply-add instruction can
data can be written to 4-Kbyte data pages. be issued every clock cycle.
Motorola Master Selection Guide 2.4-3 The PowerPC RISC Family Microprocessor
64-8IT DATA BUS
The PowerPC RISC Family Microprocessor 2.4-4 Motorola Master Selection Guide
32 BIT
+
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FETCHER ~ PROCESSING
UNIT
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Motorola Master Selection Guide 2.4--5 The PowerPC RISC Family Microprocessor
The MPC603 provides independent on--chip, 8-Kbyte, the amount of power dissipated by the processor. The fourth
two-way set-associative, physically addressed caches for is a dynamic power management mode that causes the
instructions and data and on--chip instruction and data functional units in the MPC603e to automatically enter a
memory management units (MMUs). The MMUs contain low-power mode when the functional units are idle without
64-entry, two-way set-associative, data and instruction affecting operational performance, software execution, or any
translation lookaside buffers (DTLB and ITLB) that provide external hardware.
support for demand-paged virtual memory address The MPC603e is a superscalar processor capable of
translation and variable-sized block translation. issuing and retiring as many as three instructions per clock.
The MPC603 has a selectable 32- or 64-bit data bus and Instructions can execute out of order for increased
a 32-bit address bus. The MPC603 interface protocol allows performance; however, the MPC603e makes completion
multiple masters to compete for system resources through a appear sequential.
central extemal arbiter. The MPC603 provides a three-state The MPC603e integrates five execution units - an integer
coherency protocol that supports the Exclusive, Modified, and unit (IU), a floating-point unit (FPU), a branch processing unit
Invalid cache states. This protocol is a compatible subset of (BPU), a load/store unit (LSU), and a system register unit
the MESI four-state protocol and operates coherently in (SRU). The ability to execute five instructions in parallel and
systems that contain four-state caches. The MPC603 the use of simple instructions with rapid execution times yield
supports single-beat and burst data transfers for memory high efficiency and throughput for MPC603e-based systems.
accesses; it also supports both memory-mapped I/O and I/O Most integer instructions execute in one clock cycle. The FPU
controller interface addressing. is pipelined so a single-precision multiply-add instruction can
The MPC603 uses an advanced, 3.3-V CMOS process be issued every clock cycle.
technology and maintains full interface compatibility with TTL The MPC603e provides independent on--chip, 16-Kbyte,
devices. four-way set-associative, physically addressed caches for
instructions and data and on--chip instruction and data
Block Diagram
memory management units (MMUs). The MMUs contain
Figure 3 provides a block diagram of the MPC603 that
64-entry, two-way set-associative, data and instruction
illustrates how the execution units -IU, FPU, BPU, LSU, and
translation lookaside buffers (DTLB and ITLB) that provide
SRU - operate independently and in parallel.
support for demand-paged virtual memory address
The MPC603 provides address translation and protection
translation and variable-sized block translation.
facilities, including an ITLB, DTLB, and instruction and data
The MPC603e has a selectable 32- or 64-bit data bus and
BAT arrays. Instruction fetching and issuing is handled in the
a 32-bit address bus. The MPC603e interface protocol allows
instruction unit. Translation of addresses for cache or external
multiple masters to compete for system resources through a
memory accesses are handled by the MMUs.
central external arbiter. The MPC603e provides a three-state
coherency protocol that supports the exclusive, modified, and
invalid cache states. This protocol is a compatible subset of
the MESI (modified/exclusive/shared/invalid) four-state
MPC603e RISC protocol and operates coherently in systems that contain
four-state caches. The MPC603e supports single-beat and
Microprocessor burst data transfers for memory accesses, and supports
memory-mapped I/O accesses.
The MPC603e is a low-power implementation of the The MPC603e uses an advanced CMOS process
PowerPC RISC architecture. The MPC603e implements the technology and maintains full interface compatibility with TTL
32-bit portion of the PowerPC architecture, which provides devices. The MPC603e is implemented in both a 2.5-V
32-bit effective addresses, integer data types of 8, 16, and 32 version (PID7V--603e) and a 3.3-V version (PID6--603e).
bits, and floating-point data types of 32 and 64 bits. Block Diagram
The MPC603e provides four software controllable Figure 4 provides a block diagram of the MPC603e that
power-saving modes. Three of the modes (the nap, doze, and illustrates how the execution units-IU, FPU, BPU, LSU, and
sleep modes) are static in nature, and progressively reduce SRU - operate independently and in parallel.
The PowerPC RISC Family Microprocessor 2.4-6 Motorola Master Selection Guide
64-BIT
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Motorola Master Selection Guide 2.4-7 The PowerPC RISC Family Microprocessor
64 BIT
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The PowerPC RISC Family Microprocessor 2.4-8 Motorola Master Selection Guide
MPC604 RISC MPC604e RISC
Microprocessor Microprocessor
The MPC604 is an implementation of the PowerPC family The MPC604e is an implementation of the PowerPC family
of RISC microprocessors. The MPC604 implements the of RISC microprocessors. The MPC604e implements the
PowerPC architecture as it is specified for 32-bit addressing, PowerPC architecture as it is specified for 32-bit addreSSing,
which provides 32-bit effective (logical) addresses, integer which provides 32-bit effective (logical) addresses, integer
data types of 8, 16, and 32 bits, and floating-point data types data types of 8, 16, and 32 bits, and floating-point data types
of 32 and 64 bits (single-precision and double-precision). For of 32 and 64 bits (single-precision and double-precision). For
64-bit PowerPC implementations, the PowerPC architecture 64-bit PowerPC implementations, the PowerPC architecture
provides additional 64-bit integer data types, 64-bit provides additional 64-bit integer data types, 64-bit
addressing, and related features. addressing, and related features.
The MPC604 is a superscalar processor capable of issuing The MPC604e is a superscalar processor capable of
four instructions simultaneously. As many as six instructions issuing four instructions simultaneously. As many as seven
can finish execution in parallel. The MPC604 has six instructions can finish execution in parallel. The MPC604e has
execution units that can operate in parallel-floating-point seven execution units that can operate in
unit (FPU), branch processing unit (BPU), load/store unit parallel - floating-point unit (FPU), branch processing unit
(LSU), two single-cycle integer units (SCI Us), and one (BPU), condition register unit(CRU), load/store unit (LSU), two
multiple-cycle integer unit (MCIU). single-cycle integer units (SCI Us), and one multiple-cycle
This parallel design, combined with the PowerPC integer unit (MCIU).
architecture's specification of uniform instructions that allows This parallel deSign, combined with the PowerPC
for rapid execution times, yields high efficiency and architecture's specification of uniform instructions that allows
throughput. The MPC604's rename buffers, reservation for rapid execution times, yields high efficiency and
stations, dynamic branch prediction, and completion unit throughput. The MPC604e's rename buffers, reservation
increase instruction throughput, guarantee in-order stations, dynamic branch prediction, and completion unit
completion, and ensure a precise exception model. (Note that increase instruction throughput, guarantee in-order
the PowerPC architecture specification refers to all exceptions completion, and ensure a precise exception model. (Note that
as interrupts.) the PowerPC architecture specification refers to all exceptions
The MPC604 has separate memory management units as interrupts.)
(MMUs) and separate 18-Kbyte on-chip caches for The MPC604e has separate memory management units
instructions and data. The MPC604 implements two (MMUs) and separate 32-Kbyte on-chip caches for
128-entry, two-way set (64-entry per set) associative instructions and data. The MPC604e implements two
translation lookaside buffers (TLBs), one for instructions and 128-entry, two-way set associative translation lookaside
one for data, and provides support for demand-paged virtual buffers (TLBs), one for instructions and one for data, and
memory address translation and variable-sized block provides support for demand-paged virtual memory address
translation. The TLBs and the cache use least-recently used translation and variable-sized block translation. The TLBs
(LRU) replacement algorithms. and the cache use least-recently used (LRU) replacement
The MPC604 has a 64-bit external data bus and a 32-bit algorithms.
address bus. The MPC604 interface protocol allows multiple The MPC604e has a 64-bit external data bus and a 32-bit
masters to compete for system resources through a central address bus. The MPC604e interface protocol allows multiple
external arbiter. Additionally, on-chip snooping logic masters to compete for system resources through a central
maintains data cache coherency for multiprocessor external arbiter. Additionally, on--chip snooping logic
applications. The MPC604 supports single-beat and burst maintains data cache coherency for multiprocessor
data transfers for memory accesses and memory-mapped applications. The MPC604e supports single-beat and burst
I/O accesses. data transfers for memory accesses and memory-mapped
The MPC604 uses an advanced, 3.3--V CMOS process I/O accesses.
technology and is fully compatible with TTL devices. The MPC604e uses an advanced, 2.5-V CMOS process
technology and is fully compatible with TTL devices.
Block Diagram
Figure 5 provides a block diagram showing features of the Block diagram
MPC604. Note that this is a conceptual block diagram Figure 6 provides a block diagram of the MPC604e.
intended to show the basic features rather than an attempt to
show how these features are physically implemented on the
chip.
Motorola Master Selection Guide 2.4-9 The PowerPC RISC Family Microprocessor
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New Features of the MPC604e
Features of the MPC604e that are not implemented in the advantage of the pipelined system bus to provide
MPC604 are as follows: more efficient handling of cache copyback, block
• Additional special-purpose registers invalidate operations caused by the data cache block
- HID1 provides four read-only Pll_CFG bits for flush (debf) instruction, and cache block clean
indicating the processor/bus clock ratio. operations resulting from the data cache block store
- Three additional registers support the performance (debst) instruction.
monitor-MMCR1 is a second control register that - Coherency support for instruction fetching. Instruction
includes bits to support the use of two additional fetching coherency is controlled by HIOO[23]. In the
counter registers, PMC3 and PMC4. default mode, HIOO[23] is 0, GBl is not asserted for
• Instruction execution instruction accesses, as is the case with the 604. If
- Separate units for branch and condition register (CR) the bit is set, and instruction translation is enabled
instructions. The BPU is now split into a CR logical =
(MSR[IR] 1), the GBl signal is set to reflect the M bit
unit and a branch unit, which makes it possible for for this page or block. If instruction translation is
branch instructions to execute and resolve before =
disabled (MSR[IR] 0), the GBl signal is asserted.
preceding CR logical instructions. The MPC604e can • System interface operation
still only dispatch one CR logical or branch instruction - The MPC604e has the same pin configuration as the
per cycle, but it can execute both branch and CR MPC604; however, on the MPC604e VOD and AVOD
logical instructions at the same time. must be connected to 2.5 Vdc and OVOD must be
- Branch correction in decode stage. Branch correction connected to 3.3 Vdc. The MPC604e uses split
in the decode stage can now predict branches whose voltage planes, and for replacement compatibility,
target is taken from the count or link registers if no MPC604/MPC604e designs should provide both
updates of the count and link register are pending. 2.5-V and 3.3-V planes and the ability to connect
This saves at least one cycle on branch correction those two planes together and disable the 2.5-V
when the mtspr instruction can be sufficiently plane for operation with an MPC604.
separated from the branch that uses the SPR as a - Support for additional processor/bus clock ratios (5:2
target address. and 4:1). Configuration of the processorlbus clock
- Ability to disable the branch target address cache ratios is displayed through a new MPC604e-specific
(BTAC)-HIDO[30] has been defined to allow the register, HID1.
BTAC to be disabled. When HIDO[30] is set, the BTAC - To support the changes in the cloc!illllLconfiguration,
contents are invalidated and the BTAC behaves as if it different precharge timings for the ABB, DBB, ARTRY,
were empty. New entries cannot be added until the and SHO Signals are implemented internally by the
BTAC is enabled. processor. The precharge timings for ARTRY and
• Improvements to cache implementation SHO can be disabled by setting HIOO[7].
- 32-Kbyte split data and instruction caches. Like the - No-ORTRY mode. In addition to the normal and fast
604, both caches are four-way set associative; l2 modes implemented on the 604, a no-DRTRY
however, each cache has twice as many sets, mode is implemented on the MPC604e that improves
logically separated into 128 sets of odd lines and 128 performance on read operations for systems that do
sets of even lines. not use the DRTRY signal. No-DRTRY mode makes
- Data cache line-fill buffer forwarding. In the 604 only read data available to the processor one bus clock
the critical double word of a burst operation was made cycle sooner than in normal mode. In no-ORTRY
available to the requesting unit at the time it was burst mode, the DRTRY signal is no longer sampled as part
into the line-fill buffer. Subsequent data was of a qualified bus grant.
unavailable until the cache block was filled. On the • Full hardware support for little-endian accesses.
MPC604e, subsequent data is also made available as Little-endian accesses take alignment exceptions for
it arrives in the line-fill buffer. only the same set of causes as big-end ian accesses.
- Additional cache copyback buffers. The MPC604e Accesses that cross a word boundary require two
implements three copyback write buffers (as opposed accesses with the lower-addressed word accessed first.
to one in the 604). Having multiple copyback buffers • Additional enhancements to the performance monitor.
provides the ability for certain instructions to take fuller
The PowerPC RISC Family Microprocessor 2.4-12 Motorola Master Selection Guide
The MPC620 has separate memory management units
MPC620 RISC (MMUs) and separate 32-Kbyte on-chip caches for
instructions and data. The MPC620 implements a 128-entry,
Microprocessor two-way set-associative translation lookaside buffer (TLB)
for instructions and data, and provides support for
The MPC620 is an implementation ofthe PowerPCTM family
demand-paged virtual memory address translation and
of RISC microprocessors. The MPC620 implements the
variable-sized block translation. The TLB and the cache use
PowerPC architecture as it is specified for 64-bit addressing,
least-recently used (LRU) replacement algorithms.
which provides 64-bit effective (logical) addresses, integer
The MPC620 has a 40-bit address bus, and can be
data types of 8, 16, 32, and 64 bits, and floating-point data
configured with either a 64- or 128-bit data bus. The MPC620
types of 32 and 64 bits (single-precision and
interface protocol allows multiple masters to compete for
double-precision). The MPC620 is software compatible with
system resources through a central external arbiter.
the 32-bit versions of the PowerPC microprocessor family.
Additionally, on-chip snooping logic maintains data cache
The MPC620 is a superscalar processor capable of issuing
coherency for multiprocessor applications. The MPC620
four instructions simultaneously. As many as six instructions
supports single-beat and burst data transfers for memory
can finish execution in parallel. The MPC620 has six
accesses and memory-mapped I/O accesses.
execution units that can operate in parallel - floating-point
The MPC620 uses an advanced, 3.3-V CMOS process
unit (FPU), branch processing unit (BPU), load/store unit
technology and is compatible with 3.3-V CMOS devices.
(LSU), two single-cycle integer units (SCIUs), and one
multiple-cycle integer unit (MCIU). Block Diagram
This parallel design, combined with the PowerPC Figure 7 provides a block diagram showing features of the
architecture's specification of uniform instructions that allows MPC620. Note that this is a conceptual block diagram
for rapid execution times, yields high efficiency and intended to show the basic features rather than an attempt to
throughput. The MPC620's rename buffers, reservation show how these features are physically implemented on the
stations, dynamic branch prediction, and completion unit chip.
increase instruction throughput, guarantee in-order
completion, and ensure a precise exception model.
Motorola Master Selection Guide 2.4-13 The PowerPC RISC Family Microprocessor
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write-back L2 cache. The L2 cache interface supports either
MPC105 PCI burst SRAMs or asynchronous SRAMs, and L2 data a
per-byte basis. The MPC1 05 features on-chip byte decoding
Bridge/Memory Controller for L2 data write enables or can be configured to use external
logic for data write enable generation.
The MPC105 PCI bridge/memory controller (PCIS/MC)
The PCI interface connects the processor and memory
provides a PowerPC reference platform---compliant bridge
buses to the PCI bus, to which 1/0 components are connected,
between the PowerPC microprocessor family and the
without the need for "glue" logic. This interface acts as both a
peripheral component interconnect (PCI) bus. PCI support
master and slave device.
allows system designers to rapidly design systems using
The memory interface controls processor and PCI
peripherals already designed for PCI and the other standard
interactions to main memory. It is capable of supporting a
interfaces available in the personal computer hardware
variety of DRAM or SDRAM, and ROM or Flash ROM
environment. The MPC105 integrates secondary cache
configurations as main memory. The maximum supported
control and a high-performance memory controller that
memory size is 1 Gbyte of DRAM or SDRAM, with 16 Mbytes
supports DRAM, SDRAM, ROM, and Flash ROM. The
of ROM or 1 Mbyte of Flash ROM.
MPC105 uses an advanced, 3.3-V CMOS process
The MPC1 05 provides hardware support for four levels of
technology and is fully compatible with TTL devices.
power reduction; the doze, nap, and sleep modes are invoked
The MPC105 provides an integrated high bandwidth, high
by register programming, and the suspend mode is invoked by
performance, TTL---compatible interface between a 60x
assertion of an external signal. The design of the MPC105 is
processor, a secondary (L2) cache or secondary 60x
fully static, allowing internal logic states to be preserved during
processor, the PCI bus, and main memory.
all power saving modes. The following sections describe the
The MPC105 supports a programmable interface to a
programmable power modes provided by the MPC1 05.
variety of PowerPC microprocessors operating at various bus
speeds. The 60x processor interface uses a subset of the 60x Block Diagram
bus protocol, which enables the interface between the Figure 8 shows the MPC105 in a typical system
processor and MPC1 05 to be optimized for performance. The implementation. The major functional units within the MPC1 05
MPC105's 60x interface allows for a variety of system are also shown in Figure 1. Note that this is a conceptual block
configurations by providing support for either a diagram intended to show the basic features rather than an
direct-mapped, lookaside, L2 cache or a secondary 60x attempt to show how these features are physically
processor. The L2 cache interface generates the arbitration implemented on the device.
and support signals necessary to maintain a write-through or
CONTROL L2 CACHE
OR
SECONDARY
60X
PROCESSOR
Motorola Master Selection Guide 2.4-15 The PowerPC RISC Family Microprocessor
The internal L2 cache controller generates the arbitration
MPC106 PCI and support signals necessary to maintain a write-through or
write-back l2 cache. The internal l2 cache controller
Bridge/Memory Controller supports either asynchronous SRAMs, pipelined burst
SRAMs, or synchronous burst SRAMs, using byte parity for
The MPC106 provides a PowerPC common hardware
data error detection. When a second 60x ·processor is used,
reference platform (CHRP). compliant bridge between the
three signals of the L2 interface (BR1, BG1, and DBG1)
PowerPC microprocessor family and the Peripheral
change their functions to allow for arbitration between the 60x
Component Interconnect (PC I) bus. PCI support allows
processors. AII60x interface signals of the MPC106, except
system designers to rapidly design systems using peripherals
the bus request, bus grant, and data bus grant signals, are
already designed for PCI and the other standard interfaces
shared by the 60x processors. When an external L2 controller
available in the personal computer hardware environment.
(or integrated L2 cache module) is used, three signals of the
The MPC106 integrates secondary cache control and a
l2 interface (BRl2, BGl2, and DBGL2) changetheirfunctions
high-performance memory controller. The MPC106 uses an
to allow the MPC106 to arbitrate between the external cache
advanced, 3.3-V CMOS process technology and is fully
and the 60x processor(s).
compatible with TTL devices.
The MPC106 provides an integrated high-bandwidth, Memory Interface
high-performance, TTL--compatible interface between a 60x The memory interface controls processor and PCI
processor, a secondary (L2) cache or secondary 60x interactions to main memory and is capable of supporting a
processor, the PCI bus, and main memory. variety of DRAM, or extended data-out (EDO) DRAM and
ROM or Flash ROM configurations as main memory. The
60x Processor Interface
maximum supported memory size is 1 Gbyte of DRAM or EDO
The MPC106 supports a programmable interface to a
DRAM, with 16 Mbytes of ROM or Flash ROM. The memory
variety of PowerPC microprocessors operating at select bus
controller of the MPC1 06 supports the various memory sizes
speeds. The 60x processor interface of the MPC106 uses a
through software initialization of on--chip configuration
subset of the 60x bus protocol, supporting single-beat and
registers. Parity or ECC is provided for error detection.
burst data transfers. The address bus is 32 bits wide and the
data bus is 64 bits wide. The address and data buses are PCI Interface
decoupled to support pipelined transactions. PCI bus The MPC106's PCI interface is compliant with the PCI
accesses to system memory space are passed to the 60x Local Bus Specification, Revision 2.1, and follows the
processor bus for snoo~poses. Two signals on the guidelines in the PCI System Design Guide, Revision 1.0for
MPC106, LBCLAIM, and DBGLB, are provided for an optional host bridge architecture. The PCI interface connects the
local bus slave. The local bus slave must be capable of processor and memory buses to the PCI bus, to which I/O
generating AACK and TA signals to interact with the 60x components are connected. The PCI bus uses a 32-bit
processor(s). Depending on the system implementation, the multiplexed address/data bus, plus various control and error
processor(s) may operate at the PCI bus clock rate, or at two signals.
orthree times the PCI bus clock rate. The bus is synchronous, Figure 9 shows the major functional units within the
with all timing relative to the rising edge of the bus clock. MPC106. Note that this is a conceptual block diagram
intended to show the basic features rather than an attempt to
L2 Cache/Multiple Processor Interface
show how these features are physically implemented on the
The MPC106 provides support for the following
device.
configurations of 60x processors and L2 cache:
• A single 60x processor with no l2 cache
• A single 60x processor plus a direct-mapped, lookaside,
l2 cache
• A single 60x processor plus an external l2 cache
controller or integrated L2 cache module such as the
Motorola MPC2604GA integrated L2 lookaside cache
• Two 60x processors with no L2 cache
• Two 60x processors plus an externall2 cache controller
or integrated L2 cache module such as the Motorola
MPC2604GA integrated l2 lookaside cache
The PowerPC RISC Family Microprocessor 2.4-16 Motorola Master Selection Guide
L2 CACHE
INTERFACE
L2
POWER MANAGEMENT
ERROR/INTERRUPT
CONTROL
CONFIGURATION
REGISTERS
Motorola Master Selection Guide 2.4-17 The PowerPC RISC Family Microprocessor
The PowerPC RISC Family Microprocessor 2.4-18 Motorola Master Selection Guide
Single-Chip
Microcontrollers (CSIC)
In Brief ...
Motorola offers the most comprehensive selection of Page
high-performance single-chip control systems available M68HCOS CSIC Family ......................... 2.S-2
from a single source. Microcontroller device families range M68HC08 Family .............................. 2.S-13
from industry-standard 8-bit controllers to state-of-the-art Development Tools ........................... 2.5-14
16- and 32-bit modular controllers. Within the price and On-Line Help ........ . . . . . . . . . . . . . . . . . . . . . . . .. 2.S-22
performance categories of each family, there are a variety of
on-chip capabilities to match specific applications.
Motorola device families are structured so that upward
migration need not involve complete code development.
The M68HC11 Family is upward code compatible with
M6800 and M6801 software, while the M68HC16 family is
source-code compatible with the M68HC11 family.
Motorola's newest 8-bit MCU product line, the M68HC08
family, is fully upward object code compatible with the
M68HCOS and M680S families. In addition, M68300 and
M68HC 16 devices share standard internal modules and
bus configurations.
ARITHMETIC/LOGIC
CPU CONTROL UNIT
ACCUMULATOR
IRQ
M68HCOS
11 111 11 1 1 <Xl
0::
RESET MCU INDEX REGISTER LU
t;:; PBS
11 111 1 11 1 a
LU PB4
STACK POINTER 0:: <Xl
Z
b: PB3
101010101010101011111 1 1 0
F 0
a. PB2
()
PROGRAM COUNTER LU
0:: PBI
10101010101 1 1 1 1 1 1 1 1 1 1 1 is
PBO
CONDITION CODE
~
REGISTER '"
COP WATCHDOG
AND
ILLEGAL ADDRESS
DETECT
POWER
OSCI
OSC2
PB7JSCK
PB6/SDI
RAM - 128 BYTES
PB5/SDO
IRQlVpp
PC7/VRH
PC6/ANO
RESET _~J""""'
PC5/AN1
M68HC05CPU PC4/AN2
PC3/AN3
CPU REGISTERS
PC2
I ACCUMULATOR I
PCl
I INDEX REGISTER I
10 10 I 010 10 I 010 1011 11 I STACK POINTER I PCO
10 10 101 PROGRAM COUNTER I
CONDITION CODE 11111 llH II I NIZICI
REGISTER
TOADC
OSC1 AND PD5
OSC2 SlOP PD7!TCAP
TCAP
VDD -----..j
VSS ----+I POWER TIMER
CLOCK
TCMP
MC68HC05B6 6K 176 256 l6-bit: 8CI+ 8ch 2ch 24 Vo t/ On-Chip Charge Pump 56SDIP-B
(2IC,20C) (IH:>H) (IH:>II) 8i EEPROM Write Protect 52 PLCC- FN
20 64QFP-FU
MC6BHC05B8 7.2SK 176 256 16-bil: SCI+ 8ch 2ch 24 Va t/ On-Ghip Charge Pump 56SDIP-B
(2IC,20C) (IH:>H) (IH:>II) 8i EEPROM Write Protect 52 PLCC- FN
20 64QFP-FU
MC6BHC05B16 15K 352 256 l6-bit: SCI+ Bch 2ch 24 Va t/ On-Ghip Charge Pump S6SDIP-B
(2IC,20C) (IH:>H) (IH:>H) 8i EEPROM Write Protect 52 PLCC-FN
20 64 QFP- FU
MC68HCOSBD3 3.7SK 12B MFT, RTI 12C 16ch 24 Va t/ Horizontal and Vertical Sync 40DIP-P
(lH:>it) Signal Processor 42SDIP-B
MC68HC05C5 5K 176 128 16-blt: SlOP 32 Vo t/ 8 High Current Pins (10 rnA 40DIP-P
(1IC,10C) sink) LV?I, On-Chip Charge 44 PLCC-FN
Pump
MC68HC05CC2 31.5K 92B IH:>H: 12C 1 ch 8ch OSD 31 ilo Closed Caption Television 42SDIP-B
Pulse (5-bit) (IH:>H) (127 Char NTSC Data Slicer wlint Sync Sep 40DIP-P
Accum, ROM) 32 MHz PLL
MFT 8 Open Drain 1/0 Pins, 5 V Only
MC68HC05D9 16K 352 11H:>H: SCI Sch 31 Vo t/ 8 High Current Pins (25 rnA sink) 40DIP-P
(1IC.10C) (6-bit) 30 kHz PWM 44 PLCC- FN
MC68HC05D24 24K 352 16-b~: SCI 5ch 31 Va t/ 8 High Current Pins (24 rnA sink) 4ODIP-P
(1IC.10C) (6-bit) 30kHz PWM 44PLCC-FN
XC6BHCOSD32 32K 352 16-bH: SCI 5ch 31 Vo t/ 8 High Current Pins (24 rnA sink) 40 DIP-P
(1IC,1OG) (IH:>H) 30 kHz PWM 44 PLCC-FN
MCBBHC05E1 4K 368 MFT. RTI 201/0 t/ 32 kHz PLL Clock Synthesizer 28DIP-P
28S0IC-DW
MC68HC05G1 8K 176 16-bit: SPI 4 ch 40 i/o 01 32 kHz PLL - Standby modes 56SDIP-B
(1IC, WC) (8--bit) 8I 64 QFP - FU
RTC
MC68HC05KO O.5K 32 MFT, RTI 10 i/o 01 4 High Current Pins (8 mA sink) 16 DIP - P
Programmable Pulldowns 16S0IC-DW
(10 pins)
Low Voltage Reset Mask Option
Low power version (HCL05KO):
(1.8 V minimum)
MC68HC05K1 O.5K 32 MFT, RTI 10 ilo 01 4 High Current Pins (8 mA sink) 16DIP-P
PEP (64 bits) 16 SOIC-DW
Programmable Pulldowns
(10 pins)
Low Voltage Reset Mask Option
MC68HC05L5 8K 256 16..-.bit: SlOP 156 Segment 14 ilo 01 KBI (8 pins), Dual Oscillators 80 QFP - FU
(1IC, tOC) LCD: 10i 8 High Current Pins (10 mA sink)
RTI (1-4 x 27-39) 150 Programmable Putlups (24 pins),
B-bit: Open Drain (31 pins), 2.2 V
(1IC,10C)
MC68HC05L7 6K 176 16-bit: SCI 960 Segment 15 i/o Mux EBI (13..-.bit Address), 128 QFP - FT
(tiC, WC) LCD: 32 kHz PLL, KBI (8 pins), Die
RTC (8116 x 60) LVI Tone Generator
MC68HC05L9 6K 176 16-bit: SCI 640 Segment 27 i/o Mux EBI (16..-.bit Address), 128 QFP - FT
(1IC,10C) LCD: 2I 32 kHz PLL, KBI (8 pins), Die
RTC (8116 x 40) LVI Expand LCD to 3K Segments
w/68HC68L9, Tone Generator
MC68HC05L 10 13K 352 l6-bit: SPI 5K - 20K Pixel 28 ilo Mux EBI w/MMU (20-bit 128 QFP- FT
(lIC,10C) SCI LCD Address) Die
RTC 4 Chip Selects, KBI (8 pins)
Tone Generator/OTMF, 32 kHz
PLL
LCD Expansion w/MC141511
(68HCL05P4):
(1.8 V minimum)
4 ch
4i
20 i/o
'" On-Chip Charge Pump 28S0IC-DW
28DIP-P
MC68HC05PEO 2K 128
(1IC, toG)
l6-bit:
(8-bit) Ii
20 ilo
'" 1 High Current Pin (20 mA sink)
28 SOIC-DW
28DIP-P
(tiC, toG) '" PEP (64 bits), KBI (8 pins)
Mask Option Pulldowns (8 pins)
28 SOIC- DW
RC Oscillator Option
XC68HC05RC16 16K 350 Infrared 12 i/o Mask Option Pullups (12 pins) 28 DIP- P
Timer '" KBI (12 pins), Low Power Stop
Pin
28 SOIC- DW
XC68HC05T2 15K 320 l6-bit: SlOP 1 ch 9 ch OSD 29 ilo Open Drain PWM Outputs 40 DIP- P
(1IC, toC) (6-bit) (6-bit) (64 Char
ROM)
Ii '" 5 V Only 42SDIP-B
MC68HC05Tl0 12K 320 l6-bit: 12C 1 ch 8 ch OSD 20i/o Open Drain PWM Outputs 56SDIP-B
(1IC, toG) (8--lJit) (&-bit) (64 Char 4i KBI (8 pins)
RTC 1 ch ROM) 5 VOnly
(14--lJit)
MC68HC05X1 12K 336 16--bit: SSI 24 i/o tI' KBI (8 pins) 44 PLCC-FN
(1IC,20C) SAE Jl850 Serial Mux Interface
MFT, RTI 5 V Operation Only
MC68HC05X4 4K 176 l6-bit: 16 i/o tI' CAN (Controller Area Network) 28S0IC-OW
(1IC, tOC) KBI (t6 pins)
MFT, RT!
MC68HC05X16 15K 352 255 16-bit: SCI+ 8ch 2 ch 32 i/o tI' CAN (Controller Area Network) 64QFP-FU
(2IC,20C) (8-bit) (8-bit) KBI (8 pins)
EEPROM Write Protect
On-Chip Charge Pump
MC68HC05X32 32K 528 255 16-bit: SCI+ 8ch 2 ch 32 i/o tI' CAN (Controller Area Network) 64QFP-FU
(2IC,20C) (8-bit) (8-bit) KBI (8 pins)
EEPROM Write Protect
On-Chip Charge Pump
MC68HC70SBD3 7.75K 256 MFT, ATI 12C 16ch Horizontal and Vertical Sync 42 SDIP-B
'"
24i1o
(S-bit) Signal Processor *42 Cersdip - K
40DIP-P
*40Cerdip-S
MC68HC705C9A 16K 352 1S-b.: SPI 31 ilo Mask Option Pullups (8 pins) 40 DIP- P
(1IC,1OC) SCI '" KBI (8 pins)
1 High Current Pin (20 rnA sink)
"40 Cerdip-S
"44 Cerquad-FS
EPROM Security 44PLCC-FN
42 SDIP- B
44QFP-FB
XC68HC705D9 16K 352 SCI 5ch 31 Vo 8 High Current Pins (25 rnA sink) 40DIP-P
'"
16-bit:
(1IC,1OC) (6-bit) 30 kHz PWM '44 Cerquad- FS
44 PLCC- FN
MC68HC705l5 8K 256 16-bit: SlOP 156 Segment 14 i/o KBI (8 pins), Dual Oscillators SOQFP-FU
(1IC, WC) LCD: 10 i 8 High Current Pins (10 rnA sink) 'SOCQFP-FZ
RTI (1-4 x 27-39) 150 Programmable Pullups (24 pins)
8-bit: Open Drain (31 pins)
(1IC, WC)
MC68HC705L16 16K 512 16-1>~: SlOP 156 Segment 16 ilo KBI (8 pins), Dual Oscillators 80QFP- FU
(HC,10C)
RTI
LCD:
(1-4 x 27-39)
8i
150
'" B High Current Pins (10 rnA sink)
Programmable Pullups (24 pins)
'SO CQFP- FZ
MC68HC705T10 12K 320 l6-bit: 12C 1 ch 8ch OSD 20 ilo Open Drain PWM Outputs 56 SDIP-B
(HC, WC) (8-1>~) (6-1>it) (64 Char 4i KBI (8 pins) *56 Cersdip - K
RTC 1 ch EPROM) 5 V Only
(14-b~)
"
'Wlndowed packages available only In sample quantities.
~::>
library of on--chip peripherals. The flagship 68HC(7)08X36
OTP and ROM versions for general purpose use are the first
two devices in the family.
SERIAL
Features RAM
COMMUNICATIONS
• Architecturally Enhanced 8-Bit CPU INTERFACE
• 8 MHz bus speed yields 125 ns minimum instruction
cycle
• 18-bit stack with stack pointer operations and
addressing modes
• 16-bit index register
• 78 new instructions including advanced looping control
• Eight new addressing modes
K==> TIMING
• Fully upward object code compatible with the M68HC05 INTERFACE
CPU08 MODULE
and M6805 families
• Direct Memory Access Module
• Memory-ta-memory transfer
• Peripheral-ta-memory and memory-ta-peripheral
~r
transfer
• Timing Interface Module
• Four independently programmable channels
• Input capture, output compare, buffered, and
unbuffered PWM configurations
• Interface Modules
• Serial Communications Interface (UART)
• Serial Peripheral Interface
e CLOCK
GENERATOR
MODULE
(
V
SYSTEM
CONTROL
MODULE
DIRECT
MEMORY
ACCESS
MODULE
68HCOSL7/L9 Refer to the Configuration and Order Information for Other Motorola Development Tools Section to select a development tool for
68HC705L10 the 68HCOSL7/L9, 68HCOSL 10, 68HC05L11, or 66HCOSM4.
68HCOSL11
68HCOSM4
68HCOSP3 M68MMPFBOS08 OR M68EMOSP3 28 DIP-P M68CBLOSA M68TAOSX4P28
M68MMDSOS
28S0IC-DW M68CBLOSA M68TAOSX4P28 M68DIP28S0lC
68HC05P8 M68MMPFB0508 M68HCOSJPEM 28 DIP- P M68CBLOSA M68TAOSP8P28
28S0IC-DW M68CBLOSA M68TAOSP8P28 M68DIP28S0lC
68HCOST11T2 Refer to the Configuration and Order Information for Other Motorola Development Tools Section to select a development tool for
the 68HC05T11T2.
68HC05KO/KI M68HC705KICS 16 DIP-P 16 DIP Ribbon Cable Assembly Included With M68HC705KICS M68HC705KICS In-Circuit
68HC705Kl Simulator
16S0IC-DW See Above M68DIP16S0lC For the SOIC package, user
may order M68DIPI 6S01C,
which is a 16 pin DIP to SOIC
adapter.
68HC05Tt IT2 M68HC05T2EVS 40 DIP- P Not Available For DIP/SDIP package, user
must supply a ribbon cable
assembly to intertace to user's
target system.
42 SDIP-B Not Available
44 PLCC- FN Not Available For PLCC package, user has
the option to order
44PLCC05M, which is the
old--iltyle ribbon cable assembly
with PLCC target adapter.
The Latest News and Press Releases 2. Dial (512) 891-FREE (512-891-3733)
Product, Market, and Development Tool Overviews 3. Follow directions from the system
On-Line MCU and Development Tool Selector Guides The Freeware files are also accessible by anonymous FTP
server:
On-Line Datasheets and Application Notes
freeware.aus.mot.com
Development Tool Software Upgrades
(use email address for password)
Free Development Software
Applications Software
3rd Party Development Tool Information
On-Line Technical Support
In Brief ...
Motorola offers the most comprehensive selection of Page
high-performance single-chip control systems available M68HCll Family ............................... 2.6-2
from a single source. Microcontroller device families range Modular Microcontroller ........................ 2.6-12
from industry-standard 8-bit controllers to state-<>f-the-art The M68HC16 Family ....................... 2.6-14
16- and 32-bit modular controllers. Within the price and The M68300 Family ......................... 2.6-19
performance categories of each family, there are a variety of Development Tools ........................... 2.6-23
on-chip capabilities to match specific applications. Fuzzy Logic .................................. 2.6-26
Motorola device families are structured so that upward On-Line Help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.6-26
migration need not involve complete code development. Third-Party Support ........................... 2.6-27
The M68HC11 Family is upward code compatible with
M6800 and M6801 software, while the M68HC16 family is
source-code compatible with the M68HC11 family.
Motorola's newest 8-bit MCU product line, the M68HC08
family, is fully upward object code compatible with the
M68HC05 and M6805 families. In addition, M68300 and
M68HC16 devices share standard internal modules and
bus configurations.
On-Chip Memory
Since its introduction, the M68HC11 Family has provided
Digital va and .Special Functions
M68HC11 Family I/O is extremely flexible, allowing pins to
versatile combinations of popular memory technologies, be configured to match application requirements. Most I/O
including the first EEPROM on a CMOS microcontroller. The lines are controlled by bits in a Data Direction Register (DDR)
family has a memory option to fit virtually any application. which can configure pins for either input or output. Most lines
• ROM sizes range from 0 to 32K bytes. ROM is typically have a dedicated port data latch.
factory programmed to contain custom software. Some M68HC11 Family members include a 4--channel
ROMless versions of most M68HC11 Family members Direct Memory Access (DMA) and a Memory Management
are also available. Unit (MMU). The DMA provides fast data transfer between
• RAM sizes range from 192 bytes to 1.2SK bytes. memories and registers, and includes externally mapped
M68HCII RAM utilizes a fully static design, and all memory in the expanded mode. The MMU allows up to 1
devices feature a standby power supply pin for battery megabyte of address space in a physical 64 kbyte allocation.
back-up of RAM contents. Integrated chip selects help to reduce glue logic.
• EPROM sizes range from 4K to 32K bytes. EPROM is Several members of the M68HC11 Family also include
especially suited to prototype development and small programmable chip select circuits. These circuits can be used
production runs. EPROM versions are available in both to enable external peripherals whenever an access to a
windowed and OTP packaging. predefined block of memory addresses is made. These
• EEPROM sizes range from 0 to 2K bytes. EEPROM is circuits help to reduce extemallogic requirements.
ideal for storage of calibration, diagnostic, data logging,
and security information. Each M68HC11 device with Math Coprocessor
EEPROM includes an on-chip charge pump to facilitate New M68HCll Family members offer a 16-bit on--chip
single-supply programming and erasing. math coprocessor that accelerates multiply and divide
operations by as much as 10 times. The coprocessor
Digital-to-Analog Conversion functions independently of the CPU and requires no special
The M68HCII Family provides powerful, on-chip, instructions. The coprocessor is well-suited to low-bandwidth
multi-channel AID converter systems. Multi-conversion and DSP functions such as closed loop control, servo positioning,
multi--channel options allow single or continuous conversion and signal conditioning.
on single or multiple channels. M68HC11 AID systems have
OC4
OCS
-0:
Ii:
~
PA4
PA3
IC1 PA2
PERIODIC INTERRUPT IC2 PA1
RAM-2S6 BYTES COP WATCHDOG IC3 PAO
PDS
SPI PD4
EEPR0M-512 BYTES PD3
PD2
VRH
VRL
RESET
XIRQ r
IRQ I
I
I
XTAL I
EXTAL I
I
E I
I
I
M.QQA I
(LlR) I
MODB I a.. a.. a.. a.. a.. a.. a.. a.. ~~~~~~~~ 1-1-
(VSTBY)
~-------------------~~
INTERRUPT
MODE CONTROL
LOGIC
12 KBYTES ROM
SERIAL
COMMUNICATION
L VDD
INTERFACE I Vss
....--_---l ...L
SCI
-VRH
- VRL
AID CONVERTER
VSS~
16-8n-3/4IC,
415OC, RTI, SPI, BCh, 52-FN
XC6BHCll E20 20K 768 512
WDOG,
3B
SCI 8-Bit
- 64-FU
3 MHz Mux Bus
Pulse Accumulator
18-B~-3I4IC,
SPI, 8Ch, 52-FN EEPROM Block Protect,
PC68HC711 E9 12K 512 512 4/5 OC, RTI, WDOG, 38
SCI 8-B~
- 64-FU 64K External Address Bus
Pulse Accumulator
16-Bit-314IC, 68-FN
SPI, 8Ch, - EEPROM Block Protect,
PC68HC711L6 16K 512 512 415 OC, RTI, WDOG, 46 68-FS
SCI B-Bit 64K Extemal Address Bus
Pulse Accumulator 64-FU
ADC Analog to Digital Converter Module FB 1Oxl0 mm Quad Flat Pack (QFP)
ND Analog to Digital Converter FC Fine Pitch Plastic Quad Flat Pack (PQFP)
CPU16 16 bit Central Processing Unit FD Plastic Quad Flat Pack in Molded Carrier Ring
CPU32 32 bit Central Processing Unit FE Ceramic Quad Flat Pack (CQFP)
D/A Digital to Analog Converter FM Molded Carrier Flat Pack (CQFP)
DMA Direct Memory Access FN Plastic Leaded Chip Carrier (PLCC)
GPT General-Purpose Timer FS Windowed Cerquad (Ceramic LCC)
IC Input Capture FT 28x28 mm Quad Flat Pack (QFP)
"C Inter-Integrated Circuit FU 14x14 mm Quad Flat Pack (QFP)
MCCI Multi-Channel Communication Interlace FV 20x20 mm Quad Flat Pack (QFP)
PLL Phase Lock Loop Ceramic
OC Output Capture P Dual-in-Line Plastic
POQ Preferred Order Quantity Multiple PB Thin Quad Flat Pack (TQFP) 10xl0 mm
PWM Pulse Width Modulation PU Thin Quad Flat Pack (TQFP) 14x14 mm
QSM Queued Serial Module PV Thin Quad Flat Pack (TQFP) 20x20mm
RPSCIM Reduced Pin Count SCIM S Cerdip (windowed or non-windowed)
RTC Reaf-Time Clock TH 16x16 mm Quad Flat Pack (QFP)
RTI Reaf-Time Interrupt
SCI Serial Communication Interface
SCIM Single Chip Integration Module
SIM System Integration Module
SPI Serial Peripheral Interlace
TPU Ttme Processing Unit
UART Universal Asynchronous Receiverffransmitter
WDOG Watch Dog Timer
MC68B09E 40 P MC6809 With External Clock Input for External Sync. 2MHz
MC6845 40 P CRT Ctrl, Refresh Memory Addressing; 2nd Source HD6845R 1 MHz
MC68HC24 40,44 P, FN MC68HCll Port Replacement (Expanded Mode) for A8. E9 2 MHz
40-P
MC680SR3 4K 112 0 8-Bit - Yes 32 0.1-1.0
44-FN
70SR3 7-Bit Prescaler, LVI Option
41}-P
MC680SR6 4K 112 0 8-Bit, WDOG - Yes 32 0.1-1.0 70SR3 7-Bit Prescaler, LVI Option
44-FN
MC680SS2 lK 64 0 16-Bit, 6-Bit SPI Yes 16 0.1-1.0 26-P 70SS3 lS-Bit Prescaler, LVI
26-Bit,
MC680SS3 4K 104 0 SPI Yes 21 0.1-1.0 28-P 70SS3 1 Extra 8-Bit Timer
16-Bit
41}-P
MC680SU2 2K 64 0 6-Bit - No 32 0.1-1.0 70SU3 LVI Option
44-FN
41}-P
MC680SU3 4K 112 0 6-Bit - No 32 0.1-1.0
44-FN
70SU3 7-Bit Prescaler, LVI Option
OC1 r--
OC1
~ I r - - r--- - BRiCSO
OC2/0C1 OC2/0C1 CHIP BGlCS1
OC3/0C1 OC3/0C1 SELECT CSO-CS10 BGACKlCS2
0..--' I--- BR
~
FCO/CS3
OC4/0C1 <!J~ OC4/0C1
IC4/0C5/OC1 >->- IC4/0C5/0C1 BG --' FC1/GS!
Il:z GPT 0
IC3 00 IC3 BGACK Il: FC2/CS5
0..0 >-0
IC2 IC2 FCO z>- ADDR19/CSfi
Oil:
IC1 IC1 FC1 00 ADDR20/W
0..
SIM FC2 ADDR21/.csa
U
"--
ADDR22LCS9
RXD
r--
- ADDR23/CS10
TXD ArR119:23]
PCSO/SS
TXD
PCSO
-
PSC1 PSC1 ADDR 0:18
PSC2 ~g PSC2
OSM
PSC3 >- f-
Il:z
PSC3
SCK 00 SCK DSACKO -~ [)i':Ar.KO
0..0
MISO MISO DS~CK1 DSACK1
MOSI MOO AVEC AVEC
--'
SS EBI PF3 Ow
~-
Il:f-
OS f-Il: OS
VDD Zo
VSS
-' 1MB
Ai':
_SilO
00..
0 AS
SIZO
VDDA
- SIZ1
~~
SIZ1
~ DATA [0:15]
VSSA ~ R/W
ADAO
-- ADAO RESET
ADA1 ADA1 HA
ADA2 ADA2 BERR
0--' r-r-
ADA3 ...:0 ADA3 MODCK
ADA4 b:g: ADA4 A IR01
ADA5 ~8 ADA5 ADC SRAM IR011:71 --'
IR02
ADA6 ADA6 Ou..
Il:f-
IR03
ADA7 ADA7 >-Il: IR04
VRH
-- CPU16
- Zo
80.. IR05
~
MODCK IR06
VRL IRQ7
~ ~~
CLKOUT
XTAL
CLOCK EXTAL
'--
XFC
DSCLK
VDDSYN
DSO
--'
IPIPEO/DSO 0
Il:
DSI - TSC r-
--
IPIPE1/DSI f-
Z
IPIPE1 TSTME TSTMEfTSC
BKPTlDSCLK 0 IPIPEO TEST QUOT FREEZE/OUOT
0 --'
BKPT 0
Il:
-
~
f-
z
VSTBY I FREEZE
0
0
IC1IPGPO ,- ICl
~ , BRJCSD
CHIP BGlCSl
IC2IPGPl IC2
SELECT CS[10:0[ " BGACKlCS2
IC3/PGP2 IC3 v
OCl/PGP3 ,,---' BR FCO/QWPCO
(!:lo OCl
OC2IOC1/PGP4 li:g: OC2IOCl GPT ~ --'
FC1/~PCl
OZ
OC3/0Cl/PGP5 ,,-8 OC3/0Cl BGACK 1£
1-0
FC2/CS5IPC2
OC4/0Cl/PGP6 OC4/0Cl FCO ZI- ADDR191l&§iPC3
FCl Oa: ADDR20l!&ZlPC4
IC4/0C5/0Cl/PGP7 IC4IOC5/0Cl 0:;(
SIM FC2 ADDR21/CS8/PC5
'---
ADDR~9/PC6
RXD
MISO/PQSO
MOSl/PQSl
,- MISO
MOSI
UI "
ADDRJ?3:1!1)
v "-
~DDR23/CSl O/ECLK.
VSTBY I FREEZE °
'--
ADDR[18:11yPA[7:0]
PAl PAl
PGP7/1C4/OC5/0C1 IC4iOCSiOC1 ADDR[23:0]
PGP6/0C4/0C1 OC4IOC1 ADDR[10:3]/PB[7:0]
PGPS/OC3/0C1 OC3/0C1
PGP4IOC2iOC1 OC210C1
PGP3/0C1 OC1
PGP2/1C3 1C3 ADDR[2:0]
PGP1/1C2 IC2
PGPO/IC1 IC1 SIZ1/PE7
SlZO/PE6
PWMA PWMA ASiPES
PWMB PWMB DSIPE4
PCLK PCLK ffL
A\lECL2E2
llSACK1iPE1
DSACKOIPEO
1MB EBI
DATA[1S:8yPG[7:0]
PADA7/AN7 DATA[7:0YPH[7:0]
PADA6/AN6
PADAS/ANS
PADM/AN4
PADA3/AN3
PADA2iAN2
8ML
BESET
PADA1/AN1 I:IAI.L
PADAO/ANO BERR
ADC
2 KYBTES
SRAM J8Q1fPF7
VRH
VRL l8Q6IPF6
1805iPFS
JBQ4fPF4
VDDA CPU 16 l8Q3fPF3
VSSA 18Q2IPF2
IRQ1/PF1
MODCLKlPFO
VSTBY VSTBY CLKOUT
XTAL
BKPT/DSCLK CLOCK EXTAL
BKEL
XFC
g.... JeIEE1
IPIPEO VDDSYN
IPIPE1/DSI z DSI TEST
8 DSO TSC TSC
IPIPEO/DSO DSCLK QUOT
FREEZE FREEZE/QUOT
ADDR23/GS.1.0/ECLK
FC2 ADDR221CS91PC6
TPUCH[15:0] FCI ADDR21/CS91PC5
T2CUK FCO ADDR20lCSllPC4
ADDB19JCS6/PC3
FC2ICS5/PC2
VSTBY VSTBY FCl/Eill
FCO/CS3JPCO
PADA7/AN7 CPU16
PADA6/AN6 ADDR[l B:l1YPA[7:0]
PADAS/AN5
PADA4IAN4
PADA3/AN3 TPU ADDR[23:0]
PADA2/AN2 2 KBYTES 2KBYTES ADDR[10:3]/PB[7:0]
PADAlIANI STBRAM TPURAM
PADAO/ANO
ADC
ADDR[2:0]
VRH
VRL SIZ1/PE7
S1Z01PE6
AS/PE5
VDOA DS/PE4
VSSA EEL
AllECIff2
VDD~
DSACK1IPEI
DSACKO/PEO
PMC2/SCK 28 SS
SCK
TSC
QUOT
TSC
vPP
20 Address Lines,
8Ch, 132-FC
MC68HC16Z2 8K 2K - GPT 46 QSM
lo-Bit
SIM
132-FD
12 Chip Selects,
Synthesized Clock
20 Address Lines,
8Ch, 16o-FT
MC68HC16Yl 48K 2K - TPU+GPT 95 MCCI
lo-Bit
SCIM
16o-FM
9 Chip Selects, Single
Chip or Expanded Mode
20 Address Lines,
2KBEFIash 8Ch,
XC68HC916Xl lK GPT 70 QSM RPSCIM 12o-TH 5 Chip Selects, Single
48KFIash IO-Bit
Chip or Expanded Mode
20 Address Lines,
XC68HC916Yl - 8Ch, SCIM 16o-FT
4K 48K Flash TPU +GPT 95 MCCI 9 Chip Selects, Single
IO-Bit 16o-FM
Chip or Expanded Mode
-G-
0::
$1 ~
0..
~l
~
-
--
I-
CSBGGT
CHIP CSO-CS1 BRieso
SELECTS :;:=::: BG/CS1-
BGACKICS2
- .BE
~ agou =: FCOlCS3
FC1/CS4
BGACK
=: FC2ICS5
RAM TPU
FCO
FC1
F2
~li:
u~
-
=:
A19/CSS
A20/cr,2
A21/CS8
~
A22/CS9-
A23/CS10
AD-A23 AD-A1B)
r- __
EBI
DSACK'
DSACK1
AVEC
RMC
-'
Ow
"'l-
-
:::::
OSACKO
DSACK1
mE
BMC
:::::
1-",
DS 20
--
OS
AS 80..
AS
1MB SIZO SIZO
SIZ1 SIZ1
DD-D15
R/W
--
RFf;FT
lAI r - _ MOOCK
BERR 1BQ1
IRD1-R
a
?go :=:::::
l8Q2
JBQ3.
-
~::::: JB.Q5
8
--
QSM CPU32 IIlQ4
MODCK
-
CLOCK ~LKOUT
XTAl
EXTAl
XFC
Vnn~vN
---
r::;
lBQ6
IRQ?
TEST ~
TSTME ~I-- TSTMEITSC
DUOT
~I--
u
FREEZE/QUaT
II~ I~ ~I
L-
N ~
8", eng :5
ou'" en
xen
uu en ~~ ~:iE IgJ en en Ci51~
uo
1-0.. 0..0.. 0 0 o!!:
CONTROL aNTRal
oen r:s
PORTD
IgJ ~I~ ~
8~
I~ ~ I~
N ~
ou
xen
'" uu enu ~ft.l
1-0.. ~~ 0.. en ::;;::;;
CHIP
RXD SELECTS CS800T
...IXQfOS7
ECS3/QS6 llI3ICS!L
ECS2IOS5 8GICSM-
-----ECS1JQS4 BGACKlCSE
PCSOISSlOS3
SCKlOS2 ADDR23JCSWIECLK
MOSI/OS1 FC2 ADDR22!CS9IPC6
MISO/OSO FC1 ADDR21/CSBIPCS
FCO ADDR20/CS1IPC4
ADDB19iCS6IPC3
FC2/CS5IPC2
FClIEl::1
FCO/CS3JPCO
512 3.5 16KBYTES
OSM BYTES KBYTES TPU FLASH
SRAM SRAM EEPROM
ADDR[18:11]/PA[7:0]
ADDR[23:0]
ADDR[10:3]IPB[7:0]
ADDR[2:0]
SIZ1/PE7
SJZOIPE6
ASlPE5
IlSIEE4
BMCIPE3
AllEC.lEE2
DSACKlIPE1
DSACKOIPEO
1MB EBI
DATA[15:8]IPG[7:0]
AN7/PADA7
AN6/PADA6 DATA[7:0YPH[7:0]
AN5/PADA5
AN4IPADM
AN3JPADA3
AN2/PADA2 BlW.-
AN1IPADA1 BESET
ANO/PADAO HAlT
BERRISCENB
VRH
VRL IRO[7:1] lBOZIPF7
PADB7 ADC 48
1BQ6/PF6
PADB6 BYTES
CPU 32 18Q5/PF5
PADB5 In FLASH J8Q4/PF4
c
PADB4 <C EEPROM 18Q3/PF3
PADB3 li=
0 lBQ2/PF2
PADB2 "- IROllPF1
PADB1 MODCLKlPFO
PADBO
CLKOUT
VDDA CLOCK XTAL
VSSA EXTAL
XFC
VDDSYN
VFPE48K
132-FC,
132-FD 12 Chip Selects,
MC68332 - 2K - TPU 47 QSM - SIM
144-FM. Synthesized Clock
144-FV
16K Flash.
8Ch. 16G-FT, 9 Chip Selects,
PC68F333 - 4K 48K Flash TPU 96 QSM
lG-Bit
SCIM
16G-FM Synthesized Clock
Emulator
MC68701 M68701EVM
MC68701U4 M68701EVM
MC6803 M68701EVM
MC6803U4 M68701EVM
M68HC05 Development Tools
MC68HC05B4/B6/B8/B16 M68HC05X16EVS 52PLCCU: 52 Pin PLCC Target Cable
MC68HC705B5 M68HC05X16EVS M68HC05BPGMR
MC68HC705B16 M68HC05X16EVS M68HC05BPGMR Use M68HC05X16PGMR for 64 QFP
MC68HC05C5 M68HC05C5EVS 44 PLCC05M: 44 Pin PLCC Target Cable
XC68HC705C5 M68HC05C5EVS
MC68HC05C4/C4A1C8/C9/C12 M68HC05C9EVS 44 PLCC05M: 44 Pin PLCC Target Cable
XC68HC05C4
MC68HC705C8 M68HC05C9EVS M68HC05PGMR-2
XC68HC705C
XC68HC05L2 M68HC05L2EVS
XC68HC705L2 M68HC05L2EVS M68HC705L2PGMR
MC68HC05L7/L9 M68HC05L9EVM2
MC68HC05L10 M68HC05L1OEVM
XC68HC05L11 M68HC05L11 EVM
XC68HC05M4 M68HC05M4EVM
XC68HC05P3 M68HC05P3EVS
MC68HC05P8 M68HC05P8EVS
XC68HC05T4 M68HC05T4EVM
MC68HC05T71T1 0 M68HC05T7EVM
XC68HC705Tl0 M68HC05T7EVM M68HC705Tl0PGMR
XC68HC05T12 M68HC05T12EVM
XC68HC705T12 M68HC05T12EVM M68HC705T12PGMR
XC68HC05X4 M68HC05X4EVS
XC68HC705X4 M68HC05X4EVS M68HC705X4PGMR
On-Line Help
• Press releases and updates concerning new and
Microcontroller Electronic phase-out products
Bulletin Board • Contests, promotions and seminars
• Electronic mail service
Freeware Data Service provides a direct line to the latest
information and software for Motorola microcontrollers. The
Freeware bulletin board provides access to: How to Access Freeware
• Development Software for PC and Macintosh You can access Freeware from anywhere in the world. To
Computers log on, you'll need the following eqUipment:
• Cross Assemblers
1. 2400/1200/300 baud modem
• Small C Compiler for 68HC11
2. Terminal, MS-DOS personal computer or Macintosh
• EVM and EVB Monitor/Debugger Object Code
computer
• Development software
3. Telephone line
• Floating Point Routines
This equipment will allow the user to read files and post
• Fast Fourier Transform Routines
questions. However, with a file transfer program such as
• 16-Bit Math Packages
XMODEM, YMODEM or Kermit, all information can be
• Utility Programs
downloaded to your terminal or PC.
• User Group Library Routines and User-Donated
Programs To log on:
• Kermit File Transfer Program 1. Dial (512) 891-FREE (891-3733). Be sure to set the
• Terminal Emulation Program character format to 8 data, no parity, 1 stop bit.
• Masked ROM information 2. Follow directions from the system.
• MCU literature listings 3. Read log-on messages, then follow the directions on the
• Updates/Erratas to existing literature screen display. A log-on session is limited to 120 minutes.
TECi
Assemblers
2500AD Software, Inc. 2500AD Software, Inc. 2500AD Software, Inc. Avocet Systems, Inc.
American Arium Archimedes Software, Inc. Byte Craft Ltd. Eyring Systems Software Division
Byte Craft Ltd. Avocet Systems, Inc. Eris Systems, Inc. Introl Corp.
Computer Systems Consultants, Computer Systems Consultants, Inc Introl Corp. Micro Dialects, Inc.
Inc.
Eris Systems, Inc. Eris Systems, Inc. Micro Dialects, Inc. Microtec Research, Inc.
Introl Corp. Introl Corp. P&E Microcomputer Systems, Inc. Oasys, Inc.
LOGISOFT LOGISOFT
PseudoCorp.
TECi
Symbolic Oebuggers
2500AD Software, Inc. 2500AD Software, Inc. Byte Craft Ltd. Eyring Systems Software Division
P&E Microcomputer Systems, Inc. P&E Microcomputer Systems, Inc. JMI Software Consultants, Inc.
TECi TECi
Wytec Company
Compilers
American Arium 2500AD Software, Inc. Byte Craft Ltd. Eyring Systems Software Division
Byte Craft Ltd. Archimedes Software, Inc. Intermetrics Microsystems Software, Forth, Inc.
Inc.
Yokogawa Digital Computer Corp. Intermetrics Microsystems Software, Intermetrics Microsystems Software, Eyring Systems Software Division
Inc. Inc.
Introl Corp. Introl Corp. GreenSpring Computers, Inc.
Yokogawa Dignal Computer Corp. Yokogawa Dignal Computer Corp. Huntsville Microsystems, Inc.
Integrated Systems, Inc.
Intermetrics Microsystems Software,
Inc.
Introl Corp.
Microtec Research, Inc.
Sierra Systems
Yokogawa Digital Computer Corp.
Real-Time Executives
Accelerated Technology, Inc. A. T. Barrett & Associates Accelerated Technology, Inc.
A. T. Barrett & Associates U S Software Corporation A. T. Barrett & Associates
U S Software Corporation Eyring Systems Software Division
GreenSpring Computers, Inc.
Integrated Systems, Inc.
JMI Software Consultants, Inc.
Microware Systems Corp.
Ready Systems
U S Software Corporation
Other
PsuedoCorp Logic Automation Inc. Momentum Data Systems, Inc. Avocet Systems, Inc.
LOGISOFT U S Software Corporation CARDIools Systems Corp.
PsuedoCorp Eyring Systems Software Division
U S Software Corporation GreenSpring Computers, Inc.
Integrated Systems, Inc.
JMI Software Consultants, Inc.
Logic Automation Inc.
Microware Systems Corp.
U S Software Corporation
Step Engineering
Tektronix, Inc.
Emulators
American Arium Advance Electronic Diagnostics, Inc. Embedded Support Tools Corp. Advance Electronic Diagnostics, Inc.
Applied Microsystems
Orion Instruments, Inc. American Arium Huntsville Microsystems, Inc. Embedded Support Tools Corp.
Sophia Systems & Technology MetaLink Corp. Pentica Systems, Inc. HUntsville Microsystems, Inc.
TECi Nohau Corp. Yokogawa Digital Computer Corp. Microtek Intemational
Yokogawa Digital Computer Corp. Sophia Systems & Technology Yokogawa Digital Computer Corp.
TECi
Wytec Company
Evaluation Boards
Elan Digital Systems Elan Digital Systems New Micros, Inc. GreenSpring Computers, Inc.
Other
3M Electronic Products Division 3M Electronic Products Division AMP Inc. Emulation Technology, Inc
AMP Inc. AMP Inc. P&E Microcomputer Systems, Inc. Pentica Systems Inc.
In Brief ..
Motorola's NEURON@ CHIP processors are Page
NEURON CHIPS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2.7-2
sophisticated VLSI devices that make it possible to
LONWORKS Technology Overview and Architecture .. 2.7-5
implement low-cost Local Operating Network applications.
LONBulLDER Developer's Workbench .............. 2.7-6
The unique combination of hardware and firmware provides
LONWORKS Support Tools ........................ 2.7-7
all the key functions necessary to process inputs from
LONWORKS Literature ............................ 2.7-9
sensors and control devices intelligently, and propagate
control information across a variety of network media.
Used in conjunction with the LONBulLDER™ Developer's
Workbench or the NODEBulLDER™ Development Tool, the
NEURON CHIPS make available to a system designer an
object-oriented, high-level environment providing for the
easy implementation of distributed sense and control
networks, flexible reconfiguration capability after network
installation, and management of LONTALK™ protocol
messages on the network.
Applications include distributed sense and control
systems, instrumentation, machine automation, processor
control, diagnostic equipment, environmental monitoring
and control, power distribution and control, production
control, lighting control, building automation and control,
security systems, data collection/acquisition, robotics, home
automation, consumer electronics, and automotive
electronics.
"'- r-
CP4
MAC CP3
PROCESSOR NETWORK
COMM. CP2
CJ)
::::l PORT CPl
CJ)
::::l '"~ CPO
'"
CJ)
CJ) ;§
w !::
a:
NETWORK Cl
Cl
...:
'"
ob
PROCESSOR
>-
APPLICATIONS
~ 1/0:
GENERAL
APPLICATION 1/0
PROCESSOR 1010
PARAllEL
PORT
SERIAL 100
RAM PORT
1K12K BYTES
2TIMERJ
COUNTERS
EEPROM
51212K BYTES
ClK1
ROM CLOCKING
10K BYTES ClK2
AND
SERVICE
"- "\. CONTROL
RESET
Integrated Circuits
Motorola Leads-
Part No. Description Package Samples Production Document#
MC143120DW NEURON IC lK RAM/512 EEPROM/10K ROM, 10 MHz, 1.2 11m 32-50G PhaseOut Phase Out BRl134/D
DL159/D
MC143120B1DW NEURON IC lK RAM/512 EEPROM/10K ROM, 10 MHz, 0.8 11m 32--50G Now Now
MC143150FU NEURON IC 2K RAM/512 EEPROM, 10 MHz, 1.2 11m 64-POFP Phase Out Phase Out
MC143150FUl NEURON IC 2K RAM/512 EEPROM, 5 MHz, 1.2 11m 64-POFP Now Now
MC143150B1FU NEURON IC 2K RAM/512 EEPROM, 10 MHz, 0.8 11m 64-POFP Phase Out Phase Out
MC143150B1FUl NEURON IC 2K RAM/512 EEPROM, 10 MHz, 0.8 11m 32-S0G 1095 1095
MC143120E2DW NEURON IC 2K RAM/2K EEPROM, 10 MHz, 0.71 11m 32-S0G 4095 1096
GENERAL
APPLICATION 1/0
PROCESSOR 1010
PARALLEL
PORT
SERIAL 100
RAM PORT
2K BYTES
2TIMERI
COUNTERS
EEPROM
512 BYTES
ADDRESS
CLK1
DATA CLOCKING CLK2
"- ""- AND
SERVICE
RIV!' CONTROL
E RESET
LONWORKS
Router
(1) Motorola supports these tools, but they should be purchased through Echelon Corporation (1-800-258-4566).
RJ45
M143204EVK
DIFFERENTIAL I/O
DIRECT
CONNECT
TRANSCEIVER
GIZMO 4
M143207EVK
I/O INTERFACE
BOARD
GIZMO 3
RJ45 MC143120
M143206EVK
I/O INTERFACE
BOARD
NEURON CHIP
EVALUATION BOARD
MC143120/50 sockets
RJ45 sockets
P3~~.~.1
111~ ~ too .'d . .
1;31~il
ll {~:~"d':f:'.{
:"::; i .:;: : x: ':
MEMORY
~! : : .:.
I/O
M143205EVK
NEURON CHIP
TEST/PROGRAMMING
M143208EVK
I/OTESBOARD
BOARD
Motorola
Part No. Description Production Document#
M143120EVK 143120 NEURON IC Custom Node Development Board with Socket, Supports all BR1139
MC143120 NEURON Chips
M143120B1EVBU MC143120B1 DW NEURON IC Custom Node Development Board
M143150EVK MC143150FU NEURON IC Custom Node Development Board
M143150B1EVBU MC143150B1FU NEURON IC Custom Node Development Board
M143204EVK Direct Connect Transceiver Board
M143206EVK NEURON IC I/O Interface Board (Gizmo 3)
M143207EVK NEURON IC I/O Interface Board (Gizmo 4)
M143208EVK NEURON IC I/O Interface Test Board (Gizmo 5)
M143213EVK5 NEURON IC RF Radio with EIA-232 Interface (US Version)
M143213EVK6 NEURON IC RF Radio with EIA-232 Interface (European Version)
M143214EVK5 NEURON IC RF Radio with I/O Interface (US Version)
M143214EVK6 NEURON IC RF Radio with I/O Interface (European Version)
M143215EVK5 RF Radio for Router Interface (US Version)
M143215EVK6 RF Radio for Router Interface (European Version)
M143221EVK EIA-232 EVBU Interface Board
M143222EVK Intelligent Neuron IC Cards (5 Cards, to be used w~h M143223EVK Card Reader)
M143223EVK NEURON Chip Card Reader Board (to be used with M143222EVK Cards)
M143226EVK Intelligent NEURON IC Kit with UART Port
M143232EVK ADPCM Voice Application Kit
Current versions (Q4/95) of the following Engineering Bulletins and Application Notes are incorporated into Motorola
publication DL 159/0, LON WORKS Technology Device Data.
In Brief ...
Motorola's memory product portfolio has been expanded Page
to support a broad range of engineering applications. Fast Static RAMs ... , ............... , .......... . 2.8-2
Included in this portfolio are asynchronous devices with Introduction ................................ . 2.8-2
access times of 6 ns at 256K-bit density, 6 ns at 5 V 1 Application Specific Static RAMs .............. . 2.8-2
Megabit density, 8 ns at 3.3 V 1 Megabit density, as well as Asynchronous 6 to 15 ns 5 V Fast Static RAMs .. 2.8-3
synchronous FSRAMs with access times as fast as 6 ns and Asynchronous 12 to 35 ns 5 V Fast Static RAMs. 2.8-3
8.5 ns. Fast Static RAM Modules .................... . 2.8-4
Motorola's Fast Static RAM Division goal is simple: Dynamic RAMs ............................... . 2.8-5
speed. All of our SRAMs are designed to provide the highest Introduction ................................ . 2.8-5
performance, cost efficient solutions available. DRAM Modules ............................ . 2.8-5
The Dynamic Memory Products Division utilizes Dynamic RAMs (HCMOS) ................... . 2.8-6
alliances as a vehicle for global customer support in the
DRAM and memory module markets. The product portfolio
consists of high-density DRAMs, standard and custom
memory modules, and PCMCIA Flash cards.
SYNCHRONOUS
APPLICATION SPECIFIC FAST STATIC RAMs (5 to 35 ns)
3.3 V Supply
Organi- Motorola Pin Access Time Tech- Pro-
Description zatlon Part Number Count Packaging (ns Max) nology duction Comments
BurstRAMsTM 32Kx32 MCM63P532 100 (TO) TOFP 7/8/9 HCMOS 1096 Pipelined BurstRAM for PowerPCTM /Pentiumnt MPUs.
32Kx36 MCM69F536A 100 (TO) TOFP 8.519110112 BiCMOS Now Flow-through BurstRAM for PowerPC/Pentium MPUs.
MCM69P538A 100 (TO) TOFP 5/617 BiCMOS Now Pipelined BurstRAM for PowerPc/Pentium MPUs.
64Kx18 MCM69F618A 100 (TO) TOFP 8.519/10/12 BiCMOS Now Row-through BurstRAM tor PowerPClPentium MPUs.
MCM69P618A 100 (TO) TOFP 5/617 BiCMOS Now Pipelined BurstRAM for PowerPC/Pentium MPUs.
Tag RAM 64Kx18 MCM69T618 119 (ZP) PBGA 5/617 BiCMOS 2096 100 MHz Cache Tag RAM.
SV Supply
Organi- Motorola Pin AccessTlme Tech- Pro-
Description zatio" Part Number Count Packaging (nsMax) nology duct'on Comments
Integrated 32Kx36 MPC2604GA 357 (ZP) PBGA 66 MHz BiCMOS 1096 Integrated L2 cache for PowerPC processors.Two components
Cache for 256KB solution. and four for 512KB.
Solutions
BurstRAMs 64Kx18 MCM67B618A 52 (FN) PLCC 9/10112 BiCMOS Now BurstRAM (flow-through) for 4861Pentium. 3.3 V output levels.
MCM67C618A 52 (FN) PLCC 517 BiCMOS Now BurstRAM (pipelined) for 4861Pentium. 3.3 V output levels.
MCM67H61BA 52 (FN) PLCC 9110112 BiCMOS Now Supports Pentium pipelined address mode.
MCM67J618A 52 (FN) PLCC 517 BiCMOS Now Supports Pentium pipelined address mode.
MCM67M61BA 52 (FN) PLCC 9/10112 BiCMOS Now BurstRAM (flow-through) for PowerPC. 3.3 V output levels.
32Kx18 MCM67B518 52 (FN) PLCC 9/10/12 BiCMOS Now BurstRAM (flow-through) for 486/Pentium. 3.3 V output levels.
Not recommended for new designs.
MCM67C518 52 (FN) PLCC 617/9 BiCMOS Now BurstRAM (pipelined) for 486/Pentium. 3.3 V output levels. Not
recommended for new designs.
MCM67H518 52 (FN) PLCC 9/10/12 BiCMOS Now Supports Pentium pipelined address mode. Not recommended
for new designs.
MCM67J518 52 (FN) PLCC 617/9 BiCMOS Now Supports Pentium pipelined address mode. Not recommended
for new designs.
MCM67M518 52 (FN) PLCC 9/11/14 BiCMOS Now BurstRAM (flow-through) for PowerPC. 3.3 V output levels.
Not recommended for new designs.
DSPRAMTM 8Kx24 MCM56824A 52 (FN) PLCC 20125/35 HCMOS Now Designed for DSP56001 applications. replaces 3 8Kx8's.
General 128Kx9 MCM670709 B6 (ZP) PBGA 516 BiCMOS Now General synchronous separate 1/0 with write pass through.
Synchronous 3.3 V output levels.
256Kx4 MCM670B04 38 400 (WJ) SOJ 5/6 BiCMOS Now Graphics; general RISC. Register to register. Revolutionary
pinout. 3.3 V output leve~. Write pass through. Separate I/O.
16Kx16 MCM62990A 52 (FN) PLCC 12/15120125 HCMOS Now Designed for advanced RISC-CSIC cache applications
MPC27T416 80 (TO) TOFP 9/10112 BiCMOS 2096 14 tag bits. 2 status bits. Sampling 2096.
8Kx8 MCM62X3OB 28 300 (J) SOJ 15/17 HCMOS Now Une buffer for processing digital data.
4Kx12 MCM62973A 44 (FN) PLCC 18/20 HCMOS Now Pipelined SRAM with chip select.
MCM62974A 44 (FN) PLCC 18/20 HCMOS Now Pipe lined SRAM with output enable.
MCM62975A 44 (FN) PLCC 25130 HCMOS Now Output enable.
5VSupply
Organi- Motorola Pin Packaging Access Time Tech- Pro-
Density zalion Part Number Count Package width in mils (ns Max) nology duction Comments
1M 64Kx18 MCM67A618A 52 (FN) PLCC 10112115 SiCMOS Now General asynchronous, latched address and data.
128Kx8 MCM6726B 32 400 (WJ) SOJ 8110/12 BiCMOS Now Use for new quais and design. Revolutionary
pinout.
MCM6726C 32 400 (WJ) SOJ 6f7 BiCMOS Now Revolutionary pinout.
256Kx4 MCM6729B 32 400 (WJ)SOJ 8110/12 SiCMOS Now Use for new quais and design. With output enable.
Revolutionary pinout.
MCM6729C 32 400 (WJ) SOJ 6f7 BiCMOS Now Revolutionary pinout.
256K 32Kx8 MCM6706B 28 300 (J) SOJ 8110 BiCMOS Now Not recommended for new designs. Potential
substitute MCM6706BR.
MCM6706BR 32 300 (J) SOJ 6m8 BiCMOS Now Revolutionary pinout.
5V Supply
Organi- Motorola Pin Packaging Access Time Tech- Pro-
Density zatlon Part Number Count Package width in mils (ns Max) nology duction Comments
4M 512KxB MCM6246 36 400 (WJ) SOJ 20/25135 HCMOS Now Output enable. Revolutionary pinout.
lMx4 MCM6249 32 400 (WJ) SOJ 20/25135 HCMOS Now Output enable. Revolutionary pinout.
1M 64Kx16 MCM6223 44 400 (J) SOJ 12/15 HCMOS 2096 Revolutionary pinout. Samples 1096. 3.3 V lias.
128Kx8 MCM62268 32 400 (WJ) SOJ 15117/20/25 HCMOS Now Not for new designs. Suggest MCM6226BB.
MCM62268A 32 400 (WJ) SOJ 17120125 HCMOS Now Not for new designs. Suggest MCM6226BB.
MCM6226BB 32 300 (J), 400 (WJ) SOJ 15117120/25 HCMOS 1096 Samples 4095.
MCM6326 32 400 (J) SOJ 12/15 HCMOS 3096 Revolutionary pinout. Samples 2096. 3.3 V lIas.
256Kx4 MCM62298 28 400 (WJ) SOJ 15117/20/25 HCMOS Now Not for new designs. Suggest MCM6229BB.
MCM62298A 28 400 (WJ) SOJ 17120/25 HCMOS Now Not for new designs. Suggest MCM6229BB.
MCM6229BB 28 300 (J), 400 (WJ) SOJ 15/17120125 HCMOS 1096 Samples 4095.
lMxl MCM62278 28 300 (J), 400 (WJ) SOJ 15117/20/25 HCMOS Now Separate 110. Replaces 6227A
256K 16Kx16 MCM62996 52 (FN) PLCC 12115120125 HCMOS Now Choice of 5 V or 3.3 V power supplies for output
buffers. For wide bus applications.
MCM62995A 52 (FN) PLCC 12115120125 HCMOS Now DSP96000 and RISC applications. Latched address
inputs.
32Kx8 MCM6206BA 28 300 (J) SOJ 12115/20/25 HCMOS Now Replaces MCM6206D.
32Kx9 MCM620S0 32 300 (J) SOJ 15120/25 HCMOS Now
~~~~~enl
MC=Oualified
SC= Special
Memory
62=5VCMOS
63 = 3.3 V CMOS
67 = 5 V BiCMOS
!fC]7 IB ~t
Die
Speed (ns)
Pacl\age" (WJ = Wide SOJ,
J = SOJ, FN = PLCC,
TB = TAB)
Revi::~~lutiOnary Pinout*
Blank =First qualified Motorola device
MotorolaCompone~ntM
(Qualified)
Memory
62=5V CMOS
63 = 3.3 V CMOS
67 = 5 V BiCMOS
69 = 3.3 V BiGMOS
PL¥-~ .
Pacl\age (WJ = WIde SOJ,
FN = PLCC, J = SOJ,
ZP = PBGA, TO = TOFP)
Ole Revision
Width:
04=x4
69 = 3.3 V BiCMOS A = First die size change/spec change A = Async w/Address and 08=x8
B =Second die size change/spec change
Density: Data Latch 09=x9
SA = First qualified foundry device
o=256K B = x86 Burst COunt 16=x 16
2=IM Width: C x86 Burst Count and 18=x18
4=4M 5=x9 Output Register 24=x24
6= 16K 6""x8 o Dual 110 32=x32
8=64K 7=x1 F Flow-Through BurstRAM 36=x36
8=x4 H x86 Burst Count with Address
9=x4withOE Disable ' - - - - - Deplh:
x86 Burst Count with Address Disable 3 = 8K Address Depth
NOTE: There are some exceptions to these device numbering schemes, i.e., and Output Register 4 = 16K Address Depth
M MolOroIa (PowerPC) Bursl Count 5 = 32K Address Depth
MCM62990A is a CMOS 16Kx 16 and NOT a 512Kx 90 device. MPC designates
P Pipellned BurstRAM 6 = 64K Address Depth
devices designed to work with PowerPC microprocessors and support chips.
o Sep.1I0 7 = 128K Address Deplh
T Cache Tag 8 = 256K Address Depth
" These deSignators apply to current products - future products will not necessarily
X Line Buffer
follow this scheme.
FAST STATIC RAM MODULES (Contact Fast Static RAM Marketing for Custom Fast SRAM Modules)
PowerPC Processor Applications
Access Time Pro- Motorola
Description Chip Sot Functionality Cache Size (Max) ductlon Packaging Part Number
PowerPOM Cache Motorola MPC105, Flow-Through Burst 512KB Cache 66 MHz 1096 136 Pin DIMM (SG) MPC21 03
Modules Motorola MPC106 Asynchronous 256KB Cache 1096 MPC2101
15 ns
PowerPC Cache Motorola MPC105, Flow-Through Burst 256KB Cache 66 MHz TBD 182 Pin Card Edge (SG) MPC2104
Modules with 16K x 15 Motorola MPC106 Flow-Through Burst 512KB Cache 66 MHz 1096 MPC2105
CacheTag
Flow-Through Burst 1MB 66 MHz 1096 MPC2106
Asynchronous 256KB Cache 15ns TBD MPC2107
' .. ':,:: ':" ;:,>:~~~~~~,,::: r:::;:;~:"::'" :~~,i~~~ tF:! t"i fit ,:.:!;:f!: ( tl i!:rr\)O~:< ,:.~~;::;. ':-::~\~"". "':""~.~pn,,G~~Q~<,"·
..'\.'
':>:>":'
8Mx40 MCM40800 72 (SH). (SHG) 50/60/70 1320/1120/970 Now 72-pad SIMM for EGG application; SOJ version
forEDG
lMx64 8MB MGM64100 168 (OG) 60/70 2050/1715 Now 16B-pad DIMM package; SOJ version
MCM64Tl00 168 (AOG) 60/70 828/700 Now 166-pad DIMM package; Using 16M DRAM
In Brief ...
This selector guide is a quick reference to Motorola's vast Page
Motorola Logic Families: Which Is Besllor You? .... 3.1-1
offering of standard logic integrated circuits. In TTL, popular
Motorola Programmable Arrays (MPA) ............ 3.1-5
due to its ease of use, low cost, medium-to-high speed
Selection by Function
operation and good output drive capability, Motorola offers
Logic Functions ............................ 3.1-13
both LS and FAST. Motorola's CMOS portfolio includes
Device Index .................................. 3.1-40
MC14000B standard CMOS series devices, High-Speed
Ordering Information ........................... 3.1-49
CMOS consisting of a full line of products that are pinout-
Case Outlines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3.1-53
compatible with many LSTTL and MC14000B standard
Packaging Information ......................... 3.1-86
CMOS logic devices which offers designers a solution to the
Surface Mount ............................. 3.1-86
long-standing combined barrier - high speed and low
Pin Conversion Tables. . . . . . . . . . . . . . . . . . . . . .. 3.1-86
power. Motorola's Emitter Coupled Logic (MECL) is a
Tape and Reel. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3.1-87
non-saturated form of digital logic which eliminates
Logic Literature Listing ......................... 3.1-88
transistor storage time permitting very high speed operation.
Motorola offers five versions of MECL: MECL 10K, MECL
1OH, MECL III, and the recently introduced families ECLinPS
(ECL in picoseconds) and ECLinPS Lite. Also included are
timing solution products such as clock drivers, clock
generators and programmable delay chips, high
performance and communications products such as VCO's,
prescalers, and synthesizers, and a wide variety of
translators, low-voltage bus interface and serial data
transmission devices. Field programmable logic and in
particular, field programmable arrays, have become the
solution of choice for logic design implementation in
applications where time to market is a critical product
development factor. In addition, reconfigurable arrays have
been used to enhance Customer product flexibility in ways
that no other technology can match.
The Logic I.C. Division publishes a New Product Calendar
quarterly that reflects any recent device releases and the
approximate dates new devices are expected to be released.
This New Product Calendar, BR13321D, can be ordered from
your nearest Motorola Sales Office or from the Motorola
Literature Distribution Center.
Motorola Master Selection Guide 3.0-1 Logic: Standard, Special and Programmable
Logic: Standard. Special and Programmable 3.0-2 Motorola Master Selection Guide
Motorola Logic Families, Which Is Best for You?
By Gary Tharalson, Motorola, Chandler, AZ
Relative 1-25 Price/Gate 0.9 1 1.6 1 0.9 0.9 1.4 1.8 1.8 2 10 25 32
NOTES:
1. Typical noise margin expressed as a percentage of typical output voltage 3. ECLinPS is Available in both 10KH and lOOK compatible versions.
swing. 4. A "YES" may not include all devices within a family.
2. Announced plans for Motorola offering.
Motorola Master Selection Guide 3.1-1 logic: Standard, Special and Programmable
Logic Families CMOS
Although there are many family technologies available, Complementary Metal-Oxide Semiconductor (CMOS)
they can be divided into roughly three broad categories: field--effect transistors differ from bipolar both in structure and
Transistor-Transistor Logic (TTL), Complementary Metal- operation. The primary advantages of CMOS are its low power
Oxide Semiconductor logic (CMOS), and Emitter-Coupled dissipation and small physical geometry. Advances in design
Logic (ECL). TTL and ECL are bipolar technologies differing and fabrication have brought CMOS devices into the same
in implementation techniques, while CMOS (an MOS speed and output drive capability as TTL. Again,
technology) differs in fundamental transistor structure and enhancements have resulted in the evolvement of additional
operation. classifications: MG (Metal-Gate CMOS), HC (High-speed
silicon-gate CMOS), and FACl'M (Advanced CMOS).
TTL
The most recent evolution in CMOS logic has been in
The designation "bipolar" essentially refers to the basic reducing supply voltage without sacrificing performance. The
component utilized to build this family of integrated circuits, the new LCX family is one outgrowth of this trend. This family
bipolar transistor. By employing a bipolar transistor in a logic results from the joint efforts of a triumvirate of companies
function's output driver as well as the input buffer, it results in including Motorola, National, and Toshiba. Although each
a Transistor-to-Transistor (TTL) direct connection. Older company has done its own design and fabrication, they have
technologies were interconnected via passive components mutually agreed to provide identical performance
such as resistors or diodes. specifications. In addition to the 3V operating voltage, LCX
Since the original TTL design, several enhancements have inputs and outputs are tolerant of interfacing with 5V devices.
been employed to reduce power and increase speed.
Common to these has been the use of Schottky diodes which, TYPICAL OF ALL OUTPUTS
ironically, no longer result in strictly TTL connections. VCC
Consequently, the two names, Schottky and TTL, are used in TTL
combination: LS (Low power Schottky), ALS (Advanced Low
power Schottky), and FAST'M (Advanced Schottky) TTL.
The superior characteristics of TTL compared to CMOS, in EQUIVALENT OF EACH INPUT
the past, have been its relatively high speed and high output VCC
drive; these advantages are rapidly diminishing as described OUTPUT
in the next section. One family of devices, ABT (Advanced
INPUT --.-~I-+-...
BiCMOS Technology), utilizes TTL circuitry at the inputs and
outputs, and CMOS technology in between-attempting to
combine the advantages of both bipolar and CMOS.
INPUTS
CMOS
VSS
Logic: Standard, Special and Programmable 3.1-2 Motorola Master Selection Guide
Eel
OUTPUT
---1----1--0 A. B
Ao-~-------+----~
INPUTS
Bo--+-t-{
VEEO-~--~--------~------4-----------~----~
ECl (edge) rate is highly load dependent, and again, data sheet
specifics must be compared.
Emitter-coupled logic (ECl) derives its name from the
differential-amplifier configuration in which one side of the Power Consumption
diff-amp consists of multiple-input bipolar transistors with The amount of power an application consumes (and the
their emitters tied together. An input bias on the opposite side subsequent heat generated) is frequently of prime
of the diff-amp causes the amplifier to operate continuously in importance. One of the major differences between the three
the active mode. Consequently, ECl consumes a relatively families, the power parameter may also limit the designer's
substantial amount of power in both states (one or zero) but choices.
also results in the fastest switching speeds of all logic families. TTL consumes a moderate amount of power and is nearly
An inherent benefit of ECl is the narrow switching level swing constant over operating frequencies up to about 10 MHz;
between devices (approximately 800 mY) which helps to above 10 MHz it begins to climb rapidly. Although only a few
reduce noise generation. milliwatts are consumed by each device, in a complete system
a substantial amount of power may be used.
There have also been many evolutionary advancements in
ECl, the following being some of the most prominent: 100K CMOS power consumption, on the other hand, is highly
(1975), 10KH (1981), and ECLinPSTM (1987). Of most recent frequency dependent. In quiescent mode (zero frequency), it
vintage is the ECLinPS Lite™ family of single function devices. consumes almost no power at all, being measured in
By focusing on simplicity, this family achieves very high microwatts/device. However, its consumption grows almost
performance, while at the same time reducing package size. linearly with frequency so that at maximum operating
frequency it may be several milliwatts/device. The great power
Speed reduction advantage of CMOS derives from the fact, that in
most applications, the percentage of the total number of
Speed is typically the first parameter at which a designer devices operating at high frequencies at any given time is
looks, and when design engineers are asked what features of small; consequently, the average total power consumed by
a logic family they would like enhanced, usually they want the system is greatly diminished.
more speed. But increased speed often brings along many Since power consumption is proportional to the square of
potential problems such as: increased noise generation, supply voltage, simply redUCing the operating voltage will
higher power consumption, increased component and system have desirable effects. Unfortunately, speed generally falls off
cost, more difficult board layout, etc. An assessment of the as well. By designing the lCX family specifically for a lower
other family parameters is usually required before a final supply voltage, it was possible to maintain high overall
selection is possible. performance. The lCX family is also designed to interface with
In Table 24. ,family speed is compared for three five volt devices, being tolerant of the differences in I/O levels.
parameters using typical values: propagation delay through a Because of its inherent deSign, ECl is the highest power
simple OR gate, flip-flop toggle frequency, and output consumer at frequencies below approximately 50 MHz;
switching time. Typical values can be misleading as they are however, at higher frequencies, TTL and CMOS power
frequently specified according to different vendor's criteria, but consumption can exceed ECL. The amount of power used by
they are usually close to an average of min and max values. ECl is fairly constant over its entire operating frequency
For final assessment of a particular component's range. DeSigners of large, high performance ECl systems
performance, the min/max spec's provided in most vendor's may have to employ somewhat more complex cooling and
data sheets should be examined. Furthermore, switching power distribution techniques.
Motorola Master Selection Guide 3.1-3 logic: Standard, Special and Programmable
Supply Voltage Packaging
The power supply voltage required for TTL and ECL is
The venerable Dual-Inline package (DIP) is rapidly being
restricted to fixed values; only a narrow voltage variation is
replaced by Small Outline (SO), Shrink Small Outline (SSOP),
allowed for the device to remain within specifications. Since
Thin Shrink Small Outline (TSSOP), and Leadless Chip
these families also consume substantial amounts of power,
Carrier (LCG) packages for surface mounting. Savings in
there is a large current flow through the power lines. To avoid
footprint area of up to 90% are possible with these newer
unacceptable voltage fluctuation, various preventive
packages.
measures may be necessary such as remote sensing by the
supply regulator, beefing up power buses and filters, and Device Types
utilizing multi-layer PC boards with separate power and
ground planes. Typically, a high-speed energy storage In general, the older the family the larger the quantity of
capacitor is required near each logic device; this capacitor differentfunctional devices available. This is only natural since
maintains the correct device voltage during high-current it takes time (and substantial resource investment) to design
switching. and reliably manufacture increaSingly more complex devices.
An important advantage of CMOS is the large range of The newer TTL and CMOS families will undoubtedly grow, but
supply voltage over which operation is specified. By allowing because of competition from higher integrated devices, will be
systems to be operated at voltages as low as 2V, not only is more limited in scope.
power consumption lowered, but noise generation from fast
signal switching is reduced. It must be noted, however, that Cost
operating speed drops off rapidly as the voltage is reduced. As
Here again, the age of a family has a substantial bearing on
mentioned previously, this was a significant reason for
its relative selling price. The older families have benefited
developing the LCX family.
longer from manufacturing learning and volume curve cost
Output Drive reductions. Newer technologies, because of their inherently
An important characteristic of a logic device is its ability to more complex process requirements, increased performance
drive relatively large loads without significant speed improvements, and higher cost of production, are priced
degradation. The older families within TTL, and especially higher but should decline over time.
CMOS, had only limited drive capability (below 10 mAl. All
advanced logic family versions have significantly increased Mix and Match
drive capacity, and several (FACT, LCX and all ECL) are
Many designers have found that the best approach to
capable of driving 50 ohm transmission lines directly.
achieving their particular application performance goal is to
Furthermore, because of the symmetrical sink/source
combine devices from several families. The obvious
capability of FACT and LCX, their rise and fall times are nearly
advantage of this is to optimize the requirements of selected
equal, resulting in balanced delay times.
portions of a design, whether it is for speed, power
5V Tolerant Input/Output consumption, output drive, cost, etc. Some disadvantages are
Because of the limited number of functions available in the that devices must be analyzed and tested for compatibility,
new low voltage CMOS families, a designer might might have inventories may increase, and some performance parameters
to mix 3V and 5V devices, each operating from 3V and 5V rails, may be compromised.
respectively. Unless the 3V device was specifically designed
with proper protection to tolerate 5V at its input or output, it may Conclusion
not survive.
The diversity of logic families available to today's logic
Noise Margin designer may be likened to a bad news/good news scenario.
Noise immunity refers to the resistance of a logic device to The bad news is that you have huge ratios between the
undesired switching. Depending on the input level, a noise highest and lowest performance values-speeds of 500:1,
glitch that causes a transient across the input switch pointfrom power at 100,000:1, output drive at 24:1, etc. The good news
either a high or low level can result in erroneous operation. is that you have lots of choices-it wasn't too many years ago
Clearly, the more voltage difference there is between the that there were very few. By examining and comparing each
switch point and the normal input high and low levels, the more family's parameters, an optimal selection can result.
immunity a logic family has to erroneous switching. In
Table 24. ,these differences are expressed as a percentage A few potential users of standard logic devices may worry,
of the swing between typical output high and low voltage logic that because of the trends towards higher-integration chips,
some vendors will abandon the older product lines. This may
levels. High input noise margin is calculated from the formula:
eventually happen; however, the current demand, prOjected
VOH - VIH for at least the next decade, indicates that these families have
HNM = , and for low input noise margin,
VOH - VOL a very solid future. The diverse applications that keep arising
for semiconductor products that are inexpensive and reliable
VIL - VOL continue to mount. Until some totally revolutionary
LNM =
VOH - VOL development should occur, these "oldies, but goodies" will be
around for a long time to come.
Logic: Standard, Special and Programmable 3.1-4 Motorola Master Selection Guide
INTRODUCTION TO
MOTOROLA PROGRAMMABLE ARRAYS
Field programmable logic and in particular, field To reduce design cycles, designers have also turned
programmable arrays, have become the solution of choice towards high level design languages and logic synthesis
for logic design implementation in applications where time to tools. Many programmable logic solutions are poorly suited
market is a critical product development factor. In addition, to this design methodology, however. An incompatibility
reconfigurable arrays have been used to enhance exists between logic synthesis algorithms originally
Customer product flexibility in ways that no other technology developed for gate level deSign and the block-like
can match. structures found on many programmable logic devices. This
can result in significant under utilization or degraded
Microprocessors have traditionally been used to satisfy
performance. In either case a more expensive device is
time to market and end product flexibility needs. This
required. Real gate level programmable devices are ideally
solution may not meet performance constraints and lacks
suited to this design methodology.
the concurrency possible in an unconstrained hardware
design. Typical design processes, therefore, reach a pOint When schematic based design methods are used, some
where the overall design is partitioned into hardware and programmable logic solutions impose significant constraints
software components. An interface is defined and the on design implementation to insure satisfactory results. This
design process continues along two parallel paths. imposition tends to bind the design to a particular
Sometime later, the software and hardware components programmable device and requires a significant learning
must be integrated. Problems usually develop at this point investment. Any design specification changes which impact
because of interface misinterpretation or partitioning that design decisions made to fit this imposed structure can
cannot meet design requirements. This impacts the have disastrous effects on utilization and performance and
hardware, the software and the schedule. If the hardware potentially require a more expensive device or even a costly
design is realized in programmable logic, the hardware can redesign. Gate level programmable devices coupled with
be manipulated as easily as the software. sophisticated, timing driven, implementation tools minimize
device specific optimization.
Products which adapt to the end users particular Any design process includes a significant amount of
requirements through self directed or end user directed learning. Usually engineers spend most of this time learning
reconfiguration are becoming more prevalent. As the about product requirements or prototyping critical portions of
number of modes of operation increases, mode specific the design to prove implementation feasibility. Many
hardware becomes a less cost effective solution. In the case programmable logic solutions are not push bullon; time
where the end user is truly directing the adaptation, must be spent learning programmable device architecture or
predetermined hardware solutions become untenable. implementation tool quirks. Worse yet, the design may
Reconfigurable logic enables design solutions where require modification or manual component placement to
dynamic hardware-software repartitioning is possible. meet design targets. The cost? Time to market.
Programmable logic not only vastly improves the time The reconfigurable Motorola Programmable Array (MPA)
necessary to implement a static design, but significant time and MPA design system maximize application flexibility and
to market and product feature benefits can be realized when minimize time to market by delivering a gate level, push
hardware can be dynamically altered as easily as software. bUllon, programmable logic solution.
621621
1EEIEE IEmIEmI
§!II§!I 11111
11111
Motorola Master Selection Guide 3.1-5 Logic: Standard, Special and Programmable
MPA1000
Programmable Arrays MPA1016
MPA1036
Motorola Programmable Array (MPA) products are a high density, high MPA1064
performance, low cost, solution for your reconfigurable logic needs. When
used with our automatic high performance design tools, MPA delivers MPA1100
custom logic solutions in minutes rather than weeks. And the low cost
keeps those solutions competitive throughout the product lifecycle.
The MPA architecture has solved the historical problems associated
with fine grain devices without sacrificing re-programmability, reliability, or
cost. MPA1000 devices are reprogrammable SRAM based products PROGRAMMABLE ARRAY
manufactured on a standard 0.511 Leff CMOS process with logic
capacities from 3,500 to more than 22,000 equivalent FPGA gates. MPA 3,500 to 22,000 GATES
Logic resources hold a single gate or storage element providing a highly
efficient, adaptable, design implementation medium. Gate level logic
resources, abundant hierarchical interconnection resources and
automatic, timing driven, tools work together to quickly provide design
implementations that meet timing constraints without sacrificing device • Multiple I/O from 80-200 I/O Pins
utilization. • Programmable 3V/5V I/O at Any Site
Staying focused on end product design rather than implementation • Multiple Packaging Options
tools or device architecture gets the design done faster and, unlike other • Fine Grain Structure Is Optimized for
programmable solutions, without programmable logic device specificity to Logic SyntheSis
impede future design migration efforts. The combination of automatic • Programmable Output Drive,
tools and gate level architecture is ideal for traditional schematic driven or 6/12mA @ 5.0V
high level language based design methodologies. In fact, logiC synthesis • High Register Count, with 560-2,900
tools were originally designed for and produce the most efficient results Flip-Flops
when targeting gate level devices. • IEEE 1149.1 JTAG Boundary Scan
High MPA1000 register count and controlled clock skew is ideal for • Eight Low-Skew «1ns) Clocks
designs employing pipelining techniques such as communications. The
unique set of MPA1000 I/O programming options make these devices
suitable for industrial and computer InterfaCing circuits.
Logic: Standard, Special and Programmable 3.1-6 Motorola Master Selection Guide
MPA1000 Design System Product Description
Overview
The Motorola Programmable Array (MPA) design system is a bridge between a design capture environment and Motorola
field programmable arrays. The MPA design system automatically transforms designs into device configurations which, when
loaded into an MPA device, realize a design. A design is automatically analyzed, optimized, transformed into MPA cells,
partitioned, placed and routed based on timing constraints for every path in the design. MPA design tools understand and
optimally utilize the MPA device ·architecture; this eliminates the need to learn a new set of rules and makes these tools ideally
suited for use with logic synthesis. Full incremental design support reduces design implementation time and powerful library
retargeting capabilities allow you to reuse designs which may have been implemented on less capable devices. The MPA
design system operates on existing hardware platforms and supports design capture and simulation tools from more than 10
vendors. All these features plus on-line, hypermedia, help make the MPA design system a powerful yet extremely easy to use
design implementation engine.
Features
• Push Button Implementation • Layout Delay extraction for post layout simulation
• Optimal Use of MPA Device Resources • Layout viewer
• Optimal Results with Gate Level Design Input • Incremental design support
• Library of Common MSI Functions • On-line, hypermedia, documentation
• Design Flow Manager • Supports all popular design capture and simulation tools
• Design Retargeter • Lowest cost FPGA development systems.
• Timing Driven with Integrated Static Timing Analysis • Instant access; Downloading via the internet (WWW, tip).
Design Importation
• Read Appropriate Rules File
• Retarget to MPA Primitives
• Macro Expansion
• Design Optimization
• Design Rule Checks
Constraint Generation
• Read User Constraints
• Path Enumeration
• Path Constraint Generation
1---++---1 Configuration
• Read Stored Layout
• Construct Bitstream
MPA
Device
Motorola Master Selection Guide 3.1-7 Logic: Standard, Special and Programmable
Push Button Design Implementation within the design to specify timing and design pinout
constraints.
The MPA design system minimizes training investment
A retargetting rules file is read and the input netlist is
and automatically generates design implementations which
transformed into a series of MPA cells and associated
meet timing constraints.
interconnections. Rules files provide a mechanism to
The gate level logic and abundant hierarchical routing perform attribute mapping, cell mapping and macro
resources of the MPA device present a rich implementation expansion. By creating custom rule files, the user can
media for design implementation. MPA design tools extend the importation process from arbitrary sources. The
understand and optimally utilize the MPA device resources MPA design system comes with rules for it's native
so there are no elaborate rules to learn or design library/EDIF. The resulting netlist is optimized to clip unused
modifications required to begin design capture. Staying logic and remove redundant logic. For example: each MPA
focused on end product design rather than implementation cell has programmable input inversion capability. All
tools or device architecture gets the design done faster and, Inverters or non-inverting buffers can be removed from the
unlike other programmable solutions, without programmable nellist and replaced with signal sense information attached
logic device specificity to impede future design migration to each input.
efforts. The combination of automatic tools and gate level A series of design rule checks are performed to insure
architecture is ideal for traditional schematic driven or high design integrity before the layout process begins.
level language based design capture methods. In fact, logic
synthesis tools were originally designed for and produce the Constraint Generation
most efficient results for targeting gate level devices. Timing constraints, the optimized MPA nellist and static
A design is analyzed, optimized, transformed into MPA timing analysis is used to generate path slack constraints for
cells, partitioned, placed and routed based on timing all paths in the design. Each unique signal pathway
constraints for all paths in the design - automatically. A between a register output and a register input throughout
netlist from one of the popular design capture systems or an the design are enumerated. The total logic and estimated or
existing XNF or LPM netlist is imported into the MPA design real wire delays along the path are summed. The time
system. The logic is mapped to a series of MPA cells and between the active upstream register clock edge and the
the entire resulting nellist is optimized and checked. Based next active downstream clock edge minus the downstream
on a Simple clock specification, the MPA design system register setup time is subtracted from the total path delay.
generates timing constraints for all paths in the design. This difference is called path slack. If any path in the design
During automatic partitioning, placement and routing path has a negative slack value, the implementation will not
slack time is constantly redistributed insuring only the function at the required clock rate(s).
resources required to meet timing requirements are Path constraints are utilized throughout the layout
consumed. Because MPA tools implement the design process to insure that a design implementation which meets
according to constraints, tool induced design iterations are timing constraints is automatically generated. If no clock or
virtually eliminated. Completed layouts can be transformed timing specifications are provided, the MPA design system
into device configurations, as well as annotated simulation uses the fastest possible clock based on very small net
netlists. A layout browser is also available. delay estimates to generate the path constraints. This
The MPA design system also includes complete on-line, usually results in the best possible implementation, but may
hypermedia, help covers the device, the design system and take longer than the time required to generate a satisfactory
the integration kits. Integration kits for Viewlogic, Exemplar, rather than best possible result.
VHDL (1076), Verilog (OVI) and OrCAD are included Contrast this to other programmable logic design tools
(contact your vendor for additional kits).AII these features which only provide manual net constraint annotation or net
add up to a powerful yet extremely easy to use design criticality assignment. In these cases significant effort is
implementation engine for the MPA product family. necessary to generate constraints and many costly
iterations are required to tune these constraints for a given
Design Importation design. If any changes are made to the deSign, another
costly round of iterations is required.
Designs can be captured using schematics, a high level
language, or a combination of these entry methods using Autolayout
commercially available design capture and logic synthesis The autolayout process makes use of the hierarchical
software and the appropriate interface kit. Alternatively, organization of the MPA device to minimize run time and
existing designs can be retargeted from other deliver implementations that meet timing requirements.
programmable logic devices to the MPA device using Designs which have diverse timing requirements are ideally
commercial logic synthesis tools or the powerful retargetting implemented because path slack estimates are refined
capabilities provided with MPA design system. throughout the autolayout process insuring only the
DeSign importation begins with a netlist and an optional resources required to meet timing requirements are
clock specification file. The clock specification file provides a consumed.
mechanism for the user or design capture tools to document The process begins by flattening the design and
system level timing requirements. In addition, a rich set of partitioning it into small component groups of approximately
attributes can be attached to specific components or nets the same size called clusters. A cluster boundary delay
Logic: Standard, Special and Programmable 3.1-8 Motorola Master Selection Guide
estimation is applied to pull the most tightly constrained transformed into an appropriately formatted delay
paths into a minimum number of clusters. The clusters are annotation file or annotated nellist quickly and easily. The
then assigned to zones talking into account zonal boundary annotated delay information represents the worst case
delay cost and relative zone placement delay costs. Other delays for a given device speed grade.
costs like total number of port connections per zone and are
also considered. As assignment proceeds, cluster and zone Chipview
boundary delay costs are added to each path and slack is While the MPA design system provides a rich set of
recomputed. reports describing the implementation of a deSign, a
Next global placement and routing is done. Global routes graphical view of the implementation can be indispensable
begin and end on either I/O cells or port cells. Intrazone for reviewing overall layout quality. Chipview provides a
placement and routing is deferred to a later phase. During graphical view of a completed layout. Chipview can be
global routing all the port cell and I/O cell locations are fixed useful during initial design iterations to visually verify I/O pin
and the connections between them established. High fanout placements before commencing PCB layout, for example.
nets are constructed in a highly regular manner to insure
efficient resource utilization. As in partitioning, slack Configuration
estimates are refined throughout global routing. A layout can be transformed into a device configuration
Finally the intrazonal placement and routing is done. Cells which, when loaded into the appropriate MPA device,
assigned to a particular zone are placed and routed to other produces a physical design realization. Many formatting
zone cells or zone port cells. Port cells and core cells are options are available. The MPA download pod can be used
constructed to allow port swapping. Core cells can be to emulate a serial PROM. Using the pod, device
routed through if necessary. Allowing core cells to act as configuration files can be downloaded to a device directly
routing cells allows dynamic adjustment of routing resources from the PC or workstation development environment.
within the zone. Dynamic resource adjustment is a powerful
design specific adaptation mechanism. Integration Kits
This process produces a layout from which device The MPA design system can be used with a large number
configurations, delay back annotations, and chipviews can of commercial electronic design automation software. Figure
be generated. X-X shows the currently supported vendors and tools. For
each supported vendor, an integration kit is provided which
Incremental Design Support facilitates MPA design within that vendors' environment.
Many of these kits are available from Motorola and included
When specification changes necessitate design at no charge on the MPA design system CD-ROM. Other
iterations, simply push the button again. Constraints are kits can be acquired directly from the vendor. Refer to the
automatically recalculated and auto layout only reworks MPA Design System Product List for more irformation.
those portions of the design which have changed. Full
incremental design support means simple design changes Low Cost, Easy Access
to facilitate design verification can be made quickly and
MPA Design systems are easy to use, competitively
easily.
priced and widely available. Copies of MPA deSign system
software supporting up to 8000 gates can be downloaded
Delay Back Annotation
from the World Wide Web (WWW) @
Designs can be verified through numerous methods. One hUp://Design-NET.com/fpga. Complete kits including
particularly useful method is the annotation of device and download pod, evaluation board, MPA device, CD-ROM
implementation specific delays back into the original and documentation can be ordered from your local
simulation environment to improve system or device level authorized Motorola distributor or Motorola sales
simulation accuracy. A MPA device layout can be representative (see appendix Z).
F~, ~~'~W~H~'NI~.
T~/4 HPAt
Motorola Master Selection Guide 3.1-9 Logic: Standard, Special and Programmable
c8
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Design System Product List
MPA Design Kits and Options
Part Number Description
MPA1E1P Entry Level PC with 6 Months Maintenance
MPA1EJW Entry Level Workstation with 6 Months Maintenance
Motorola Master Selection Guide 3.1-11 Logic: Standard, Special and Programmable
MPA17000 Serial EPROMs
MPA17128
The MPA17128, MPA 1765 serial OTP EPROMs provide a compact,
low pin count, non-volatile configuration store for MPA1000 devices.
MPA1765
MPA 17000 devices can be cascaded for increased memory capacity
when needed. They are available in the standard 8-pin plastic DIP (N
suffix), 8-pin SOIC (D suffix) and 2o-pin PLCC (FN suffix) packages.
8-Lead Pinouts
(Top View)
8~
1
DSUFFIX
PLASTIC SOIC PACKAGE
CASE 751--05
2D-Lead Pinout
(Top View)
NC Vpp NC NC CEO
• 3
FNSUFFIX
4
PlCC PACKAGE
CASE 775--02
PIN NAMES
NC NC
Pins Function
VCC NC DATA Data 1/0
ClK - Clock
NC NC BESETIOE Reset Input and Output Enable
CE Chip Enable Input
DATA Vss ~ Ground
CEO Chip Enable Output
NC NC VPP Programming Voltage Supply
VCC +4.5 to 6.0V Power Supply
NC Not Connected
ClK NC RESETI NC CE
OE
logic: Standard, Special and Programmable 3.1-12 Motorola Master Selection Guide
Selection by Function
In order to better serve our customers, we have made some modifications to the Selection by Function portion of the Logic
Selector Guide. For easy selection of Logic's newer, more complex functions, as well as standard family functions, refer to the
subject index below. Within the Selection by Function tables on the next 23 pages, you will find functions sorted by these broad
subjects, and then broken down alphabetically into more precise functions.
Logic Functions
Motorola Master Selection Guide 3.1-13 Logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) Pins I DIP I SM
ARITHMETIC OPERATORS
low-Voltage CMOS Octal Buffer, 3-State, Non-Inverting With 5V CMOS MC74lCX244 - 20 DW,M,
Tolerant Inputs and Outputs DT
low-Voltage CMOS Octal Buffer, 3-State, Inverting With 5V CMOS MC74lCX240 - 20 DW,M,
Tolerant Inputs and Outputs DT
low-Voltage CMOS Octal Buffer Flow Through Pinout, 3-State, CMOS MC74lCX541 - 20 DW,M,
Non-Inverting With 5V Tolerant Inputs and Outputs DT
low-Voltage CMOS Octal Buffer Flow Through Pinout, 3-State, CMOS MC74lCX540 - 20 DW,M,
Inverting With 5V Tolerant Inputs and Outputs DT
low-Voltage Quiet CMOS Octal Buffer CMOS MC74lVQ541 - 20 D,M,
SD,DT
low-Voltage Quiet CMOS Octal Buffer, 3-State, Non-Inverting CMOS MC74lVQ244 - 20 DW,M,
SD,DT
low-Voltage Quiet CMOS Octal Buffer, 3-State, Inverting CMOS MC74lVQ240 - 20 DW,M,
SD,DT
low-Voltage Quiet CMOS Quad Buffer, 3-State, Non-Inverting CMOS MC74LVQ125 - 14 D,M,
SD,DT
BUS INTERFACE
logic: Standard, Special and Programmable 3.1-14 Motorola Master Selection Guide
Selection by Function
I Description Tech. Device(s) Pins I DIP I SM
BUS INTERFACE
Motorola Master Selection Guide 3.1-15 logic: Standard, Special and Programmable
Selection by Function
Description Tech. Device(s) Pins I DIP I SM
BUS INTERFACE
Octal BufferlLine Driver With 3-State Outputs TTL SN54LS540 SN74LS540 20 N,J DW
TTL SN54LS541 SN74LS541 20 N,J DW
CMOS MC74AC241 - 20 N DW
CMOS MC74AC244 - 20 N DW
CMOS MC74ACT244 - 20 N DW
CMOS MC74AC540 - 20 N DW
CMOS MC74ACT540 - 20 N DW
CMOS MC74AC541 - 20 N DW
CMOS MC74ACT541 - 20 N DW
CMOS MC74AC240 - 20 N DW
CMOS MC74ACT240 - 20 N DW
CMOS MC74ACT241 - 20 N DW
Octal Bus Transceiver TTL SN54LS245 SN74LS245 20 N,J DW
TTL SN54LS623 SN74LS623 20 N,J DW
Octal Bus Transceiver, With 3-State Outputs TTL MC74F623 - 20 N DW
Octal Bus Transceiverllnverting With 3-5tate Outputs TTL SN54LS640 SN74LS640 20 N,J DW
TTL MC74F620 - 20 N DW
TTL MC74F640 - 20 N DW
Octal Bus Transceiver/Non-Inverting With 3-State Outputs TTL SN54LS645 SN74LS645 20 N,J DW
Octal Bus Transceiver/Register With 3-State Outputs CMOS MC74AC652 - 24 N DW
Non-Inverting
CMOS MC74ACT652 - 24 N DW
Octal Registered Transceiver Inverting, With 3-State Outputs TTL MC74F544 - 24 N DW
Octal Registered Transceiver Non-Inverting, With 3-State Outputs TTL MC74F543 - 24 N DW
Octal Transceiver/Register With 3-State Outputs Non-Inverting CMOS MC74AC646 - 24 N DW
CMOS MC74ACT646 - 24 N DW
Octal Transceiver/Register With 3-5tate Outputs Inverting CMOS MC74AC648 - 24 N DW
CMOS MC74ACT648 - 24 N DW
Octal Transceiver/Register, With 3-5tate Outputs TTL MC74F646 - 24 N DW
Octal With 3-State Non-Inverting Buffer/Line Driver/Line Receiver CMOS MC54HC241A MC74HC241A 20 N,J DW
Octal With 3-State Non-Inverting Buffer/Line Driver/Line Receiver CMOS MC54HCT241A MC74HCT241A 20 N,J DW
With LSTTL Compatible Inputs
CMOS MC54HCT244A MC74HCT244A 20 N,J DW,
SD,DT
Octal With 3-State Outputs Inverting Buffer/Line Driver/Line CMOS MC54HC240A MC74HC240A 20 N,J DW,
Receiver DT
CMOS MC54HC540A MC74HC540A 20 N,J DW
Octal With 3-5tate Outputs Inverting Buffer/Line Driver/Line CMOS MC74HCT240A - 20 N DW,
Receiver With LSTTL Compatible Inputs SD,DT
Octal With 3-State Outputs Inverting Bus Transceiver CMOS MC54HC640A MC74HC640A 20 N,J DW
Octal With 3-State Outputs Non-Inverting Buffer/Line Driver/Line CMOS MC54HC541A MC74HC541A 20 N,J DW
Receiver
Octal With 3-State Outputs Non-Inverting Buffer/Line DriverlLine CMOS MC74HCT541A - 20 N DW
Receiver With LSTTL Compatible Inputs
Octal With 3-State Outputs Non-Inverting Buffer/Line DriverlLine CMOS MC54HC244A MC74HC244A 20 N,J DW,
Receiver SD,DT
Octal With 3-State Outputs Non-Inverting Bus Transceiver CMOS MC54HC245A MC74HC245A 20 N,J DW
Octal With 3-State Outputs Non-Inverting Bus Transceiver & D CMOS MC54HC646 MC74HC646 24 N,J DW
Flip-Flop
Quad Buffers With 3-State Outputs TTL SN54LS125A SN74LS125A 14 N,J D
Logic: Standard, Special and Programmable 3.1-16 Motorola Master Selection Guide
Selection by Function
I Description Tech. Device(s) Pins I DIP I SM
BUS INTERFACE
Motorola Master Selection Guide 3.1-17 Logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s)
CLOCK DRIVERS
logic: Standard, Special and Programmable 3.1-18 Motorola Master Selection Guide
Selection by Function
I Description Tech. Device(s) Pins I DIP I SM
CONVERTERS
Motorola Master Selection Guide 3.1-19 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) I Pins I DIP I SM
COUNTERS
logic: Standard, Special and Programmable 3.1-20 Motorola Master Selection Guide
Selection by Function
Description Device(s)
COUNTERS
Motorola Master Selection Guide 3.1-21 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) I Pins I DIP I SM
DETECTORS
Phase-Frequency Detector
+ 2 Divider
+4 Divider
Logic: Standard, Special and Programmable 3.1-22 Motorola Master Selection Guide
Selection by Function
Description Device(s)
FLIP-FLOPS
3-Bit Differential Flip-Flop ECL MC10E431 MC100E431 28 FN
4-Bit D Flip-Flop Individual Clock, Reset Differential Output ECl MC10E131 MC100E131 28 FN
4-Bit D Flip-Flop With Enable TIL SN54LS379 SN74lS379 16 N,J D
4-Bit D-Type Register With With 3-State Outputs TIL SN54lS173A SN74lS173A 16 N,J D
5--Bit Differential Register ECl MC10E452 MC100E452 28 FN
6-Bit 2:1 Mux-Register With Common Clock, Asynchronous ECl MC10E167 MC100E167 28 FN
Master Reset Single Ended
6-Bit D Register With Common Clock, Asynchronous Master ECl MC10E151 MC100E151 28 FN
Reset, Differential Outputs
6-Bit D Register, With Differential Inputs, (Data & Clock) , VBB, ECl MC10E451 MC100E451 28 FN
Common Reset
6-Bit Parallel D Register With Enable CMOS MC74AC378 - 16 N D
CMOS MC74ACT378 - 16 N D
9-Bit Hold Register, 700MHz, With Asynchronous Master Reset ECl MC10E143 MC100E143 28 FN
Clocked Flip-Flop DTl MC845 - 14 P,l
Clocked Flip-Flop DTl MC945 - 14 P,l
D Flip-Flop With Set & Reset ECl MC10El31 MC100El31 8 D
Differential Clock D Flip-Flop ECl MC10El51 MC100El51 8 D
Differential Data & Clock D Flip-Flop ECl MC10El52 MC100El52 8 D
Dual D Flip-Flop CMOS MC74AC74 - 14 N D
CMOS MC74ACT74 - 14 N D
CMOS MC14013B - 14 P,l D
Dual D Flip-Flop With Set and Reset CMOS MC54HC74A MC74HC74A 14 N,J D,DT
Dual D Flip-Flop With Set and Reset With lSTIl Compatible CMOS MC74HCT74A - ,14 N D
Inputs
Dual D-Type Positive Edge-Triggered Flip-Flop TIL MC74F74 - 14 N D
TIL SN54lS74A SN74lS74A 16 N,J D
Dual Differential Data and Clock D Flip-Flop With Set and Reset ECl MC100lVEl29 MC100EL29 20 DW
Dual J-K Negative Edge-Triggered Flip-Flop TIL SN54lS112A SN74lS112A 16 N,J D
TIL SN54lS113A SN74lS113A 14 N,J D
TIL SN54lS114A SN74lS114A 14 N,J D
Dual J-K Positive Edge-Triggered Flip-Flop TIL SN54lS109A SN74lS109A 16 N,J D
Dual J-K Flip-Flop HTl MC663 - 14 P,l
TIL SN54lS107A SN74lS107A 14 N,J D
Dual J-K Flip-Flop (Common Clock and CD Separate SD) DTl MC952 - 14 P,l
Dual J-K Flip-Flop (Separate Clock and SD, No CD) DTl MC953 - 14 P,L
Dual J-K Flip-Flop Negative Edge Trigger CMOS MC74AC112 - 16 N D
CMOS MC74ACT112 - 16 N D
Dual J-K Flip-Flop Negative Edge Trigger CMOS MC74AC113 - 14 N D
CMOS MC74ACT113 - 14 N D
Dual J-K Flip-Flop With Set and Clear TIL SN54lS76A SN74lS76A 16 N,J D
Dual J-K Flip-Flop With Set and Reset CMOS MC74HC112 - 16 N D,DT
Dual J-K Flip-Flop CMOS MC14027B - 16 P,l D
Dual J-K Flip-Flop With Reset CMOS MC74HC73 - 14 N D
CMOS MC74HC107 - 14 N D
Dual J-K Flip-Flop With Set and Reset CMOS MC74HC76 - 16 N D
Dual J-K Master-8lave Flip-Flop ECl MC10135 - 16 P,l FN
ECl MC10H135 - 16 P,l FN
Motorola Master Selection Guide 3.1-23 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) I Pins I I
DIP SM
FLIP-FLOPS
Dual J-K Negative Edge-Triggered Flip-Flop TTL MC74F112 - 16 N D
TTL SN54LS73A SN74lS73A 14 N,J D
Dual J-K Positive Edge-Triggered Flip--:-Flop With Set & Clear CMOS MC74AC109 - 16 N D
CMOS MC74ACT109 - 16 N D
Dual J-K Flip--:-Flop With Set and Reset CMOS MC74HC109 - 16 N D
Dual J-K Positive Edge-Triggered Flip-Flop TTL MC74F109 - 16 N D
Dual Type-D Master-Slave Flip--:-Flop ECl MC10131 - 16 P,l FN
ECl MC10H131 - 16 P,l FN
Hex D Flip-Flop TTL SN54lS174 SN74lS174 16 N,J D
Hex D Flip--:-Flop With Enable TTL SN54lS378 SN74lS378 16 N,J D
Hex D Flip-Flop With Master Reset CMOS MC74AC174 - 16 N D
TTL MC74F174 - 16 N D
CMOS MC74ACT174 - 16 N D
Hex D Flip--:-Flop CMOS MC14174B - 16 P,l D
Hex D Flip--:-Flop With Common Clock & Reset CMOS MC54HC174A MC74HC174A 16 N,J D
Hex D Flip--:-Flop With Common Clock & Reset CMOS MC74HCT174A - 16 N D
Hex D Master-8lave Flip--:-Flop ECl MC10H176 - 16 P,l FN
Hex D Master-8lave Flip--:-Flop With Reset ECl MC10H186 - 16 P,l FN
ECl MC10186 - 16 P,l FN
Hex D Master-8lave Flip--:-Flop ECl MC10176 - 16 P,l FN
High Speed Dual D Master-Slave Flip--:-Flop ECl MC10231 - 16 P,l FN
J-K Flip-Flop ECl MC10El35 MC100El35 8 D
low-Voltage CMOS Octal D-Type Flip--:-Flop, 3-State, CMOS MC74lCX374 - 20 DW,M,
Non-Inverting With 5V Tolerant Inputs and Outputs DT
low-Voltage CMOS Octal D-Type Flip--:-Flop Flow Through Pinout, CMOS MC74lCX574 - 20 DW,M,
3-8tate, Non-Inverting With 5V Tolerant Inputs and Outputs DT
low-Voltage Quiet CMOS Octal D-Type Flip--:-Flop CMOS MC74lVQ374 - 20 DW,M,
SD,DT
Low-Voltage Quiet CMOS Octal D-Type Flip--:-Flop Flow Through CMOS MC74lVQ574 - 20 DW,M,
Pinout SD,DT
Master-8lave Flip--:-Flop ECl MC1670 - 16 l
Master-Slave R-S Flip-Flop HTl MC664 - 14 P,l
Octal 3-8tate Inverting D Flip--:-Flop CMOS MC54HC534A MC74HC534A 20 N,J DW
Octal 3-State Non-Inverting D Flip--:-Flop With lSTTl Compatible CMOS MC54HCT374A MC74HCT374A 20 N,J DW
Inputs
Octal D Flip Flop, With 3-8tate Outputs TTL MC74F374 - 20 N DW
Octal D Flip-Flop CMOS MC74AC273 - 20 N DW
CMOS MC74ACT273 - 20 N DW
Octal D Flip-Flop With 3-8tate OutputsiBroadside Pinout, F374 TTL MC74F574 - 20 N DW
Octal D Flip--:-Flop With Clear TTL SN54lS273 SN74lS273 20 N,J DW
Octal D Flip--:-Flop With Clock Enable CMOS MC74AC377 - 20 N DW
CMOS MC74ACT377 - 20 N DW
Octal D Flip--:-Flop With Common Clock & Reset CMOS MC54HC273A MC74HC273A 20 N,J DW,
DT
Octal D. Flip--:-Flop With Common Clock and Reset With lSTTl CMOS MC74HCT273A - 20 N DW
Compatible Inputs
Octal D Flip--:-Flop With Enable TTL MC74F377 - 20 N DW
Octal D Flip--:-Flop With Enable! Non-Inverting TTL SN54lS377 SN74lS377 20 N,J DW
Octal D Type Flip-Flop With 3-State Outputs CMOS MC74AC374 - 20 N DW
logic: Standard, Special and Programmable 3.1-24 Motorola Master Selection Guide
Selection by Function
Description Device(s)
FLIP-FLOPS
Motorola Master Selection Guide 3.1-25 Logic: Standard, Special and Programmable
Selection by Function
Description Device(s)
GATES, AND/NAND
Low-Voltage CMOS Quad 2-lnput AND Gate, 5V-Tolerant Inputs CMOS MC74LCX08 - 14 D,DT
Low-Voltage CMOS Quad 2-lnput NAND Gate, 5V-Tolerant Inputs CMOS MC74LCXOO - 14 D,DT
Low-Voltage Quiet CMOS Quad 2-lnput NAND Gate CMOS MC74LVQOO - 14 D,M,
DT,SD
Quad 2-lnput AND Gate CMOS MC74AC08 - 14 N D
CMOS MC74ACT08 - 14 N D
TTL MC74F08 - 14 N D
CMOS MC54HC08A MC74HC08A 14 N,J D,DT
TTL SN54LS08 SN74LS08 14 N,J D
TTL SN54LS09 SN74LS09 14 N,J D
ECL MC10Hl04 - 16 P,L FN
Quad 2-lnput AND Gate ECL MC10l04 - 16 P,L FN
CMOS MC14081B - 14 P,L D
Quad 2-lnput AND Gate With LSTTL-Compatible Inputs CMOS MC54HCT08A MC74HCT08A 14 N,J D
Quad 2-lnput NAND Buffer TTL MC74F37 - 14 N D
TTL SN54LS26 SN74LS26 14 N,J D
TTL SN54LS37 SN74LS37 14 N,J D
Quad 2-lnput NAND Buffer Open-Collector TTL MC74F38 - 14 N D
Quad 2-lnput NAND Buffer Open-Collector TTL SN54LS38 SN74LS38 14 N,J D
Quad 2-lnput NAND Gate DTL MC846 - 14 P,L
DTL MC849 - 14 P,L
DTL MC946 - 14 P,L
CMOS MC74ACOO - 14 N D
Quad 2-lnput NAND Gate CMOS MC74ACTOO - 14 N D
TTL MC74FOO - 14 N D
CMOS MC54HCOOA MC74HCOOA 14 N,J D,DT
TTL SN54LSOO SN74LSOO 14 N,J D
TTL SN54LSOI SN74LSOI 14 N,J D
TTL SN54LS03 SN74LS03 14 N,J D
CMOS MC14011B - 14 P,L D
Quad 2-lnput NAND Gate (Unbuffered) CMOS MC14011UB - 14 P,L D
Quad 2-lnput NAND Gate With LSTTL-Compatible Inputs CMOS MC54HCTOOA MC74HCTOOA 14 N,J D
Quad 2-lnput NAND Gate With Open-Drain Outputs CMOS MC74HC03A - 14 N D,DT
Triple 3-lnput AND Gate CMOS MC74ACII - 14 N D
CMOS MC74ACTII - 14 N D
TTL MC74Fli - 14 N D
CMOS MC74HCli - 14 N D
TTL SN54LSli SN74LSII 14 N,J D
TTL SN54LS15 SN74LS15 14 N,J D
CMOS MC14073B - 14 P,L D
Triple 3-lnput NAND Gate CMOS MC74AC10 - 14 N D
CMOS MC74ACT10 - 14 N D
TTL MC74Fl0 - 14 N D
CMOS MC74HC10 - 14 N D
TTL SN54LS10 SN74LS10 14 N,J D
TTL SN54LS12 SN74LS12 14 N,J D
CMOS MC14023B - 14 P,L D
Triple 3-lnput NAND Gate (Unbuffered) CMOS MC14023UB - 14 P,L D
Logic: Standard, Special and Programmable 3.1-26 Motorola Master Selection Guide
Selection by Function
Description Tech.
GATES, COMPLEX
Motorola Master Selection Guide 3.1-27 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) Pins I DIP I SM
GATES, EXCLUSIVE OR/EXCLUSIVE NOR
logic: Standard, Special and Programmable 3.1-28 Motorola Master Selection Guide
Selection by Function
Description Device(s)
GATES,OR
Motorola Master Selection Guide 3.1-29 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) Pins I DIP I SM
INVERTER/BUFFERS,2-STATE
Low-Voltage CMOS Hex Inverter, With 5V-Tolerant Inputs CMOS MC74LCX04 - 14 D,DT
Low-Voltage QUiet CMOS Hex Inverter CMOS MC74LVQ04 - 14 D,M,
SD,DT
Quad 2-lnput Gate (Active Pullup) HTL MC672 - 14 P,L
Quad 2-lnput Gate (Passive Pullup) HTL MC668 - 14 P,L
Quad Driver ECL MC10E112 MC100E112 28 FN
Strobed Hex InverteriBuffer CMOS MC14502B - 16 P,L DW
Triple 3-lnput Gate (Active Pullup) HTL MC671 - 14 P,L
Triple 3-lnput Gate (Passive Pull up) HTL MC670 - 14 P,L
LATCHES
3-Bit 4:1 Mux-Latch (Integrated E156 & E171) ECL MC10E256 MC100E256 28 FN
3-Bit 4:1 Mux-Latch, With Common Enable, Asynchronous Master ECL MC10E156 MC100E156 28 FN
Reset, Differential Output
4-Bit D Latch TTL SN54LS75 SN74LS75 16 N,J D
TTL SN54LS77 SN74LS77 14 N,J D
TTL SN54LS375 SN74LS375 16 N,J D
5-Bit 2: 1 Mux-Latch, With Common Enable, Asynchronous Master ECL MC10E154 MC100E154 28 FN
Reset Differential Output
6-Bit 2: 1 Mux-Latch, With Common Enable, Asynchronous Master ECL MC10E155 MC100E155 28 FN
Reset Single Ended
6-Bit D Latch ECL MC10E150 MC100E150 28 FN
8-Bit Addressable Latch CMOS MC74AC259 - 16 N D
CMOS MC74ACT259 - 16 N D
TTL MC74F259 - 16 N D
TTL SN54LS259 SN74LS259 16 N,J D
8-Bit Addressable Latch CMOS MC14099B - 16 P DW
CMOS MC14599B - 18 P
8-Bit Bus Compatible Addressable Latch CMOS MC14598B - 18 P,L
9-Bit Latch, With Parity ECL MC10E175 MC100E175 28 FN
Dual Latch ECL MC10H130 - 16 P,L FN
Dual 2-Bit Transparent Latch CMOS MC74HC75 - 16 N D
Dual 4-Bit Addressable Latch CMOS MC74AC256 - 16 N DW
CMOS MC74ACT256 - 16 N DW
TTL MC74F256 - 16 N D
TTL SN54LS256 - 16 N,J D
Dual 4-Bit Latch CMOS MC14508B - 24 P,L DW
Dual Latch ECL MC10130 - 16 P,L FN
Low-Voltage CMOS Octal Transparent Latch, 3-State, CMOS MC74LCX373 - 20 DW,M,
Non-Inverting With 5V Tolerant Inputs and Outputs DT
Low-Voltage CMOS Octal Transparent Latch Flow Through Pinout, CMOS MC74LCX573 - 20 DW,M,
3-State, Non-Inverting With 5V Tolerant Inputs and Outputs SD,DT
Low-Voltage Quiet CMOS Octal Transparent Latch CMOS MC74LVQ373 - 20 DW,M,
SD,DT
Low-Voltage Quiet CMOS Octal Transparent Latch Flow Through CMOS MC74LVQ573 - 20 DW,M,
Pinout SD,DT
Octal 3-State Non-Inverting Transparent Latch With LSTTL CMOS MC54HCT373A MC74HCT373A 20 N,J DW,
Compatible Inputs SD,DT
Octal D Latch With 3-State Outputs CMOS MC74AC563 - 20 N DW
CMOS MC74ACT563 - 20 N DW
CMOS MC74AC573 - 20 N DW
Logic: Standard, Special and Programmable 3.1-30 Motorola Master Selection Guide
Selection by Function
Description Device(s)
LATCHES
Motorola Master Selection Guide 3.1--31 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) Pins I DIP I 8M
MULTIPLEXER/DATA SELECTORS
logic: Standard, Special and Programmable 3.1-32 Motorola Master Selection Guide
Selection by Function
Description Tech. Device(s) Pins I DIP I SM
MULTIPLEXER/DATA SELECTORS
Motorola Master Selection Guide 3.1-33 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) I Pins I DIP I SM
MULTIVIBRATORS
logic: Standard, Special and Programmable 3.1--34 Motorola Master Selection Guide
Selection by Function
Description Device(s)
PRESCALERS
1.1 GHz +64/65, +128/129 low Voltage Dual Modulus Prescaler ECl MC12022TVA - 8 P D
ECl MC12022TVB - 8 P D
1.1 GHz +64165, +128/129 Super low Power Dual Modulus ECl MC12052A - 8 D,SD
Prescaler
1.1 GHz +64/65, + 128/129 Super low Power Dual Modulus ECl MC12053A - 8 D,SD
Prescaler With Stand-By Mode
1.3GHz +64 Prescaler ECl MC12075 - 8 P D
1.3GHz +256 Prescaler ECl MC12076 - 8 P D
ECl MC12078 - 8 P D
2.0GHz +32/33, +64/65 Dual Modulus Prescaler ECl MC12034A - 8 P D
ECl MC12034B - 8 P D
2.0GHz +32/33, +64/65 low Voltage Dual Modulus Prescaler ECl MC12033A - 8 P D
ECl MC12033B - 8 P D
2.0GHz +64/65, +128/129 Dual Modulus Prescaler ECl MC12032A - 8 P D
ECl MC12032B - 8 P D
2.0GHz +64165, +1281129 low Voltage Dual Modulus Prescaler ECl MC12031A - 8 P D
ECl MC12031B - 8 P D
2.0GHz +64/65, +128/129 Super low Power Dual Modulus ECl MC12054A - 8 D,SD
Prescaler
2.5GHz +2, +4 low Power Prescaler With Satnd-By Mode ECl MC12095 - 8 D,SD
2.8GHz +64/128/256 Prescaler ECl MC12079 - 8 P D
ECl MC12089 - 8 P D
225MHz +20/21 Dual Modulus Prescaler ECl MC12019 - 8 P,l D
225M Hz +32/33 Dual Modulus Prescaler ECl MC12015 - 8 P,l D
225MHz +40/41 Dual Modulus Prescaler ECl MC12016 - 8 P,l D
225MHz +64 Prescaler ECl MC12023 - 8 P D
225MHz +64/65 Dual Modulus Prescaler ECl MC12017 - 8 P,l D
480MHz +5/6 Dual Modulus Prescaler ECl MC12009 - 16 P,l
520MHz + 128/129 Dual Modulus Prescaler ECl MC12018 - 8 P,l D
520MHz +64/65 Dual Modulus Prescaler ECl MC12025 - 8 P D
550MHz+10111 Dual Modulus Prescaler ECl MC12013 - 16 P,l
550MHz +8/9 Dual Modulus Prescaler ECl MC12011 - 16 P,l
750MHz +2 UHF Prescaler ECl MC12090 - 16 P,l
PROGRAMMABLE DELAY CHIPS
Motorola Master Selection Guide 3.1-35 logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Devlce(s) Pins I DIP I SM
RECEIVERS
Quad Line Receiver ECl MC10Hl15 - 16 P,l FN
ECl MC10115 - 16 P,l FN
ECl MC1692 - 16 l
Quint Differential Line Receiver ECl MC10El16 MC100El16 28 FN
ECl MC10E416 MC100E416 28 FN
Triple Line Receiver ECl MC10Hl16 - 16 P,l D,FN
ECl MC10114 - 16 P,l FN
ECl MC10116 - 16 P,l FN
REGISTERS
4 X 4 Multiport Register
Hex Parallel D Register With Enable
REGISTER FILES
logic: Standard, Special and Programmable 3.1-36 Motorola Master Selection Guide
Selection by Function
Description Tech. Device(s) Pins I DIP I SM
SHIFT REGISTERS
~~~-
CMOS MC74ACT350 - 16 N D
4-Bit Shifter, With 3-State Outputs TTL MC74F350 - 16 N D
-- -
4-Bit Universal Shift Register CMOS MC74HC195
_.- 16 N
ECL MC10H141 - 16 P,L FN
ECL MC10141 - 16 P,L FN
CMOS MC14194B
.- 16 P,L D
8-Bit Bidirectional Universal Shift Register With parallel 1/0 CMOS MC74HC299 - 20 N DW
B-Bit Parallel-to-Serial Shift Register TTL SN54LS165 SN74LS165 16 N,J D
8-Bit Scannable Register ECL MC10E241 MC100E241 28 FN
8-Bit Serial In-Serial Out Shift Register TTL MC74F164 - 14 N D
8-Bit Serial or Paraliel-lnpuVSerial-Output Shift Register CMOS MC54HC165 MC74HC165 16 N,J D
B-Bit Serial or Paraliel-lnpuVSerial-Output Shift Register With CMOS MC54HC589 MC74HC589 16 N,J D
3-State Outputs
B-Bit Serial or Paraliel-lnpuVSerial-Output Shift Register With CMOS MC54HC597 MC74HC597 16 N,J D
Input Latch
B-Bit Serial-ln/Paraliel-Out Shift Register TTL SN54LS164 SN74LS164 14 N,J D
B-Bit Serial-lnpuVParaliel-Output Shift Register CMOS MC54HC164 MC74HC164 14 N,J D
8-Bit Serial-lnpuVSerial or Parallel-Output Shift Register With CMOS MC54HC595A MC74HC595A 16 N,J D,DT
Latched 3-State Outputs
B-Bit Shift Register E~L MC10E141 MC100E141 2B FN
TTL SN54LS166 SN74LS166 16 N,J D
8-Bit Shift Registers With Sign Extend TTL SN54LS322A SN74LS322A 20 N,J DW
B-Bit Shift/Storage Register With 3-State Outputs TTL SN54LS299 SN74LS299 20 N,J DW
TTL SN54LS323 SN74LS323 20 N,J DW
8-Bit Static Shift Register CMOS MC14014B - 16 P,L D
CMOS MC14021B - 16 P,L D
B-Input Shift/Storage Register WISynchronous Reset and Common TTL MC74F323 - 20 N DW
1/0 Pins
8-lnput Universal Shift/Storage Register With Common Parallel 1/0 CMOS MC74AC299 - 20 N DW
Pins: With 3-State Outputs - N DW
CMOS MC74ACT299 20
B-Input Universal Shift/Storage Register With Syn ReseVCommon CMOS MC74AC323 - 20 N DW
Parallel 1/0 Pins: With 3-State Outputs
CMOS MC74ACT323 - 20 N DW
8-lnput Universal Shift/Storage Register, W/Common Parallel 1/0 TTL MC74F299 - 20 N DW
Pins
B-Stage Shift/Store Register With 3-State Outputs CMOS MC14094B - 16 P,L D
9-Bit Shift Register, 700MHz, With Asynchronous Master Reset ECL MC10E142 MC100E142 2B FN
Dual 5-Bit Shift Register CMOS MC14015B - 16 P,L D
Dual 64-Bit Static Shift Register CMOS MC14517B - 16 P DW
Motorola Master Selection Guide 3.1-37 Logic: Standard, Special and Programmable
Selection by Function
I Description Tech. Device(s) Pins I DIP I SM
SHIFT REGISTERS
1.1 GHz Serial Input Synthesizer With +64/65, + 128/129 Prescaler ECl MC12202 - 16,20 D,M,
DT
2.0GHz Serial Input Synthesizer With +64/65, +1281129 Prescaler ECl MC12206 - 16,20 D,DT
2.5GHz Serial Input Synthesizer With +32133, +64/65 Prescaler ECl MC12210 - 16,20 D,DT
2.7GHz Frequency Synthesizer ECl MC12179 - 8 D
TRANSCEIVERS
logic: Standard, Special and Programmable 3.1-38 Motorola Master Selection Guide
Selection by Function
Description Device(s)
TRANSLATORS
Motorola Master Selection Guide 3,1-39 logic: Standard, Special and Programmable
Device Index
MC100E016 3.1-19 MC100EL12 3.1-29 MC100LVEL14 3.1-17
MC100E101 3.1-27 MC100EL13 3.1-14 MC100LVEL17 3.1-35
MC100E104 3.1-27 MC100EL14 3.1-17 MC100LVEL29 3.1-23
MC100E107 3.1-27 MC100EL15 3.1-17 MC100LVEL30 3.1-25
MC100E111 3.1-17 MC100EL16 3.1-35 MC100LVEL38 3.1-18
MC100E112 3.1-30 MC100EL17 3.1-35 MC100LVEL39 3.1-18
MC100E116 3.1-36 MC100EL29 3.1-23 MC100LVEL56 3.1-32
MC100E122 3.1-29 MC100EL30 3.1-25 MC100LVEL59 3.1-33
MC100E131 3.1-23 MC100EL31 3.1-23 MC100LVEL90 3.1-39
MC100E136 3.1-19 MC100EL32 3.1-22 MC100LVEL92 3.1-39
MC100E137 3.1-19 MC100EL33 3.1-22 MC100SX1230 3.1-22
MC100E141 3.1-37 MC100EL34 3.1-18 MC10100 3.1-28
MC100E142 3.1-37 MC100EL35 3.1-24 MC10101 3.1-27
MC100E143 3.1-23 MC100EL38 3.1-18 MC10102 3.1-28
MC100E150 3.1--30 MC100EL39 3.1-18 MC10103 3.1-29
MC100E151 3.1-23 MC100EL51 3.1-23 MC10104 3.1-26
MC100E154 3.1-30 MC100EL52 3.1-23 MC10105 3.1-27
MC100E155 3.1-30 MC100EL56 3.1-32 MC10106 3.1-28
MC100E156 3.1-30 MC100EL57 3.1-31 MC10107 3.1-27
MC100E157 3.1-33 MC100EL58 3.1--31 MC10109 3.1-27
MC100E158 3.1-31 MC100EL59 3.1-33 MC10110 3.1-28
MC100E160 3.1-34 MC100EL90 3.1--39 MC10111 3.1-28
MC100E163 3.1-31 MC100ELT20 3.1-39 MC10113 3.1-28
MC100E164 3.1-31 MC100ELT21 3.1-38 MC10114 3.1-36
MC100E166 3.1-18 MC100ELT22 3.1-38 MC10115 3.1--36
MC100E167 3.1-23 MC100ELT23 3.1-38 MC10116 3.1-36
MC100E171 3.1-31 MC100ELT24 3.1--39 MC10117 3.1-27
MC100E175 3.1-30 MC100ELT25 3.1-38 MC10118 3.1-27
MC100E193 3.1-34 MC100ELT28 3.1-39 MC10119 3.1-27
MC100E195 3.1-35 MC100H600 3.1-38 MC10121 3.1-27
MC100E196 3.1-35 MC100H601 3.1-38 MC10123 3.1-17
MC100E210 3.1-14 MC100H602 3.1-38 MC10124 3.1-38
MC100E211 3.1-17 MC100H603 3.1-38 MC10125 3.1-38
MC100E212 3.1-36 MC100H604 3.1-38 MC10128 3.1-15
MC100E241 3.1-37 MC100H605 3.1-38 MC10129 3.1-35
MC100E256 3.1-30 MC100H606 3.1-39 MC10130 3.1-30
MC100E310 3.1-14 MC100H607 3.1-38 MC10131 3.1-24
MC100E336 3.1-14 MC100H640 3.1-17 MC10132 3.1-32
MC100E337 3.1-15 MC100H641 3.1-18 MC10133 3.1-31
MC100E404 3.1-27 MC100H642 3.1-17 MC10134 3.1-32
MC100E416 3.1-36 MC100H643 3.1-18 MC10135 3.1-23
MC100E431 3.1-23 MC100H644 3.1-17 MC10136 3.1-21
MC100E445 3.1-19 MC100H646 3.1-18 MC10137 3.1-20
MC100E446 3.1-19 MC100H660 3.1-31 MC10138 3.1-19
MC100E451 3.1-23 MC100H680 3.1-38 MC10141 3.1-37
MC100E452 3.1-23 MC100H681 3.1-38 MC10153 3.1-31
MC100E457 3.1-33 MC100LVE111 3.1-17 MC10154 3.1-19
MC100EL01 3.1-27 MC100LVE164 3.1--32 MC10158 3.1-32
MC100EL04 3.1-27 MC100LVE210 3.1-14 MC10159 3.1--32
MC100EL05 3.1-27 MC100LVE310 3.1-14 MC10160 3.1-34
MC100EL07 3.1-27 MC100LVEL11 3.1-14 MC10161 3.1-21
MC100EL11 3.1-17 MC100LVEL13 3.1-14 MC10162 3.1-21
Logic: Standard, Special and Programmable 3.1-40 Motorola Master Selection Guide
Device Index
MC10163 3.1-22 MC10E157 3.1-33 MC10ELT25 3.1-38
MC10164 3.1-32 MC10E158 3.1-31 MC10ELT28 3.1-39
MC10165 3.1-22 MC10E160 3.1-34 MC10Hl00 3.1-28
MC10166 3.1-18 MC10E163 3.1-31 MC10Hl0l 3.1-27
MC10168 3.1-31 MC10E164 3.1-31 MC10Hl02 3.1-28
MC10170 3.1-34 MC10E1651 3.1-18 MC10Hl03 3.1-29
MC10171 3.1-21 MC10E1652 3.1-18 MC10Hl04 3.1-26
MC10172 3.1-21 MC10E166 3.1-18 MC10Hl05 3.1-27
MC10173 3.1-33 MC10E167 3.1-23 MC10Hl06 3.1-28
MC10174 3.1-32 MC10E171 3.1-31 MC10Hl07 3.1-27
MC10175 3.1-31 MC10E175 3.1-30 MC10H109 3.1-27
MC10176 3.1-24 MC10E193 3.1-34 MC10H113 3.1-28
MC10177 3.1-39 MC10E195 3.1-35 MC10Hl15 3.1-36
MC10178 3.1-19 MC10E196 3.1-35 MC10H116 3.1-36
MC10180 3.1-14 MC10E197 3.1-31 MC10H117 3.1-27
MC10181 3.1-14 MC10E211 3.1-17 MC10Hl18 3.1-27
MC10186 3.1-24 MC10E212 3.1-36 MC10Hl19 3.1-27
MC10188 3.1-29 MC10E241 3.1-37 MC10H121 3.1-27
MC10189 3.1-29 MC10E256 3.1-30 MC10H123 3.1-17
MC10190 3.1-38 MC10E336 3.1-14 MC10H124 3.1-38
MC10191 3.1-38 MC10E337 3.1-15 MC10H125 3.1-38
MC10192 3.1-17 MC10E404 3.1-27 MC10H130 3.1-30
MC10193 3.1-22 MC10E411 3.1-17 MC10H131 3.1-24
MC10195 3.1-29 MC10E416 3.1-36 MC10H135 3.1-23
MC10197 3.1-25 MC10E431 3.1-23 MC10H136 3.1-21
MC10198 3.1-33 MC10E445 3.1-19 MC10H141 3.1-37
MC10210 3.1-28 MC10E446 3.1-19 MC10H145 3.1-36
MC10211 3.1-28 MC10E451 3.1-23 MC10H158 3.1-33
MC10212 3.1-27 MC10E452 3.1-23 MC10H159 3.1-33
MC10216 3.1-35 MC10E457 3.1-33 MC10H16 3.1-19
MC10231 3.1-24 MC10ELOl 3.1-27 MC10H160 3.1-34
MC10804 3.1-38 MC10EL04 3.1-27 MC10H161 3.1-21
MC10805 3.1-38 MC10EL05 3.1-27 MC10H162 3.1-21
MC10E016 3.1-19 MC10EL07 3.1-27 MC10H164 3.1-32
MC10El0l 3.1-27 MC10EL11 3.1-17 MC10H165 3.1-22
MC10El04 3.1-27 MC10EL12 3.1-29 MC10H166 3.1-18
MC10El07 3.1-27 MC10EL15 3.1-17 MC10H171 3.1-21
MC10E111 3.1-17 MC10EL16 3.1-35 MC10H172 3.1-21
MC10El12 3.1-30 MC10EL31 3.1-23 MC10H173 3.1-32
MC10El16 3.1-36 MC10EL32 3.1-22 MC10H174 3.1-32
MC10E122 3.1-29 MC10EL33 3.1-22 MC10H175 3.1-31
MC10E131 3.1-23 MC10EL34 3.1-18 MC10H176 3.1-24
MC10E136 3.1-19 MC10EL35 3.1-24 MC10H179 3.1-14
MC10E137 3.1-19 MC10EL51 3.1-23 MC10H180 3.1-14
MC10E141 3.1-37 MC10EL52 3.1-23 MC10H181 3.1-14
MC10E142 3.1-37 MC10EL57 3.1-31 MC10H186 3.1-24
MC10E143 3.1-23 MC10EL58 3.1-31 MC10H188 3.1-29
MC10E150 3.1-30 MC10EL89 3.1-22 MC10H189 3.1-29
MC10E151 3.1-23 MC10ELT20 3.1-39 MC10H209 3.1-27
MC10E154 3.1-30 MC10ELT21 3.1-38 MC10H210 3.1-28
MC10E155 3.1-30 MC10ELT22 3.1-38 MC10H211 3.1-28
MC10E156 3.1-30 MC10ELT24 3.1-39 MC10H330 3.1-17
Motorola Master Selection Guide 3.1-41 Logic: Standard, Special and Programmable
Device Index
MC10H332 3.1-15 MC12028A 3.1-34 MC14012B 3.1-25
MC10H334 3.1-17 MC12028B 3.1-34 MC14012UB 3.1-25
MC10H350 3.1-38 MC12031A 3.1-35 MC14013B 3.1-23
MC10H351 3.1-38 MC12031B 3.1-35 MC14014B 3.1-37
MC10H352 3.1-38 MC12032A 3.1-35 MC14015B 3.1-37
MC10H423 3.1-17 MC12032B 3.1-35 MC14016B 3.1-33
MC10H424 3.1-38 MC12033A 3.1-35 MC14017B 3.1-20
MC10H600 3.1-38 MC12033B 3.1-35 MC14018B 3.1-20
MC10H601 3.1-38 MC12034A 3.1-35 MC14020B 3.1-19
MC10H602 3.1-38 MC12034B 3.1-35 MC14021B 3.1-37
MC10H603 3.1-38 MC12036A 3.1-34 MC14022B 3.1-20
MC10H604 3.1-38 MC12036B 3.1-34 MC14023B 3.1-26
MC10H605 3.1-38 MC12038A 3.1-34 MC14023UB 3.1-26
MC10H606 3.1-39 MC12040 3.1-22 MC14024B 3.1-19
MC10H607 3.1-38 MC12052A 3.1-35 MC14025B 3.1-28
MC10H640 3.1-17 MC12053A 3.1-35 MC14025UB 3.1-28
MC10H641 3.1-18 MC12054A 3.1-35 MC14027B 3.1-23
MC10H642 3.1-17 MC12058 3.1-34 MC14028B 3.1-21
MC10H643 3.1-18 MC12061 3.1-34 MC14029B 3.1-20
MC10H644 3.1-17 MC12073 3.1-34 MC14035B 3.1-37
MC10H645 3.1-17 MC12074 3.1-34 MC14038B 3.1-14
MC10H646 3.1-18 MC12075 3.1-35 MC14040B 3.1-19
MC10H660 3.1-31 MC12076 3.1-35 MC14042B 3.1-31
MC10H680 3.1-38 MC12078 3.1-35 MC14043B 3.1-31
MC10H681 3.1-38 MC12079 3.1-35 MC14044B 3.1-31
MC10SX1130 3.1-18 MC12080 3.1-34 MC14046B 3.1-34
MClOSX1130 3.1-22 MC12083 3.1-34 MC14049B 3.1-29
MC10SX1189 3.1-18 MC12089 3.1-35 MC14049UB 3.1-29
MC12002 3.1-21 MC12090 3.1-35 MC14050B 3.1-29
MC12009 3.1-35 MC12093 3.1-34 MC14051B 3.1-31
MC12011 3.1-35 MC12095 3.1-35 MC14052B 3.1-32
MC12013 3.1-35 MC12100 3.1-33 MC14053B 3.1-33
MC12014 3.1-20 MC12101 3.1-33 MC14060B 3.1-19
MC12015 3.1-35 MC12147 3.1-39 MC14066B 3.1-33
MC12016 3.1-35 MC12148 3.1-34 MC14067B 3.1-31
MC12017 3.1-35 MC12149 3.1-39 MC14068B 3.1-25
MC12018 3.1-35 MC12179 3.1-38 MC14069UB 3.1-29
MC12019 3.1-35 MC12202 3.1-38 MC14070B 3.1-28
MC12022A 3.1-34 MC12206 3.1-38 MC14071B 3.1-29
MC12022B 3.1-34 MC12210 3.1-38 MC14072B 3.1-28
MC12022LVA 3.1-34 MC12429 3.1-18 MC14073B 3.1-26
MC12022LVB 3.1-34 MC12439 3.1-18 MC14075B 3.1-29
MC12022SLA 3.1-34 MC14000UB 3.1-28 MC14076B 3.1-25
MC12022SLB 3.1-34 MC14001B 3.1-28 MC14077B 3.1-27
MC12022TSA 3.1-34 MC14001UB 3.1-28 MC14078B 3.1-28
MC12022TSB 3.1-34 MC14002B 3.1-28 MC14081B 3.1-26
MC12022TVA 3.1-35 MC14002UB 3.1-28 MC14082B 3.1-25
MC12022TVB 3.1-35 MC14006B 3.1-36 MC14093B 3.1-36
MC12023 3.1-35 MC14007UB 3.1-29 MC14094B 3.1-37
MC12025 3.1-35 MC14008B 3.1-14 MC14099B 3.1-30
MC12026A 3.1-34 MC14011B 3.1-26 MC14106B 3.1-36
MC12026B 3.1-34 MC14011UB 3.1-26 MC14161B 3.1-19
Logic: Standard, Special and Programmable 3.1-42 Motorola Master Selection Guide
Device Index
MC14163B 3.1-19 MC14566B 3.1-20 MC54HC27 3.1-28
MC14174B 3.1-24 MC14568B 3.1-20 MC54HC273A 3.1-24
MC14175B 3.1-25 MC14569B 3.1-20 MC54HC32A 3.1-29
MC14194B 3.1-37 MC14572UB 3.1-27 MC54HC354 3.1-32
MC14415 3.1-34 MC14580B 3.1-36 MC54HC365 3.1-15
MC14490 3.1-14 MC14583B 3.1-36 MC54HC366 3.1-15
MC14500B 3.1-29 MC14584B 3.1-36 MC54HC367 3.1-15
MC14501UB 3.1-27 MC14585B 3.1-18 MC54HC373A 3.1-31
MC14502B 3.1-30 MC14598B 3.1-30 MC54HC374A 3.1-25
MC14503B 3.1-15 MC14599B 3.1-30 MC54HC390 3.1-20
MC14504B 3.1-38 MC1648 3.1-34 MC54HC393 3.1-20
MC14506UB 3.1-27 MC1650 3.1-19 MC54HC4016 3.1-33
MC14508B 3.1-30 MC1651 3.1-19 MC54HC4040A 3.1-19
MC14510B 3.1-20 MC1658 3.1-34 MC54HC4049 3.1-29
MC14511B 3.1-22 MC1660 3.1-27 MC54HC4050 3.1-29
MC14512B 3.1-31 MC1662 3.1-28 MC54HC4051 3.1-31
MC14513B 3.1-22 MC1670 3.1-24 MC54HC4053 3.1-33
MC14514B 3.1-21 MC1672 3.1-28 MC54HC4060 3.1-19
MC14515B 3.1-21 MC1692 3.1-36 MC54HC4060A 3.1-19
MC14516B 3.1-20 MC4016 3.1-20 MC54HC4066 3.1-33
MC14517B 3.1-37 MC4018 3.1-20 MC54HC4351 3.1-31
MC14518B 3.1-20 MC4024 3.1-33 MC54HC4353 3.1-33
MC14519B 3.1-27 MC4044 3.1-21 MC54HC4538A 3.1-33
MC14520B 3.1-20 MC4316 3.1-20 MC54HC533A 3.1-31
MC14521B 3.1-34 MC4324 3.1-34 MC54HC534A 3.1-24
MC14522B 3.1-20 MC4344 3.1-21 MC54HC540A 3.1-16
MC14526B 3.1-20 MC54HCOOA 3.1-26 MC54HC541A 3.1-16
MC14527B 3.1-14 MC54HC02A 3.1-28 MC54HC563 3.1-31
MC14528B 3.1-33 MC54HC04A 3.1-29 MC54HC573A 3.1-31
MC14529B 3.1-32 MC54HC08A 3.1-26 MC54HC574A 3.1-25
MC14530B 3.1-27 MC54HC132A 3.1-36 MC54HC589 3.1-37
MC14531B 3.1-34 MC54HC138A 3.1-21 MC54HC595A 3.1-37
MC14532B 3.1-22 MC54HC139A 3.1-21 MC54HC597 3.1-37
MC14534B 3.1-19 MC54HC14A 3.1-36 MC54HC640A 3.1-16
MC14536B 3.1-34 MC54HC154 3.1-21 MC54HC646 3.1-16
MC14538B 3.1-33 MC54HC157A 3.1-32 MC54HC688 3.1-18
MC14539B 3.1-32 MC54HC158 3.1-32 MC54HC74A 3.1-23
MC14541B 3.1-34 MC54HC160 3.1-20 MC54HC86 3.1-28
MC14543B 3.1-22 MC54HC161A 3.1-20 MC54HCTOOA 3.1-26
MC14544B 3.1-22 MC54HC162 3.1-20 MC54HCT08A 3.1-26
MC14547B 3.1-22 MC54HC163A 3.1-20 MC54HCT14A 3.1-36
MC14549B 3.1-38 MC54HCl64 3.1-37 MC54HCT161A 3.1-20
MC14551B 3.1-32 MC54HC165 3.1-37 MC54HCT163A 3.1-20
MC14553B 3.1-19 MC54HC174A 3.1-24 MC54HCT241A 3.1-16
MC14555B 3.1-21 MC54HC175 3.1-25 MC54HCT244A 3.1-16
MC14556B 3.1-21 MC54HC175A 3.1-25 MC54HCT245A 3.1-15
MC14557B 3.1-36 MC54HC240A 3.1-16 MC54HCT32A 3.1-29
MC14558B 3.1-22 MC54HC241A 3.1-16 MC54HCT373A 3.1-30
MC14559B 3.1-38 MC54HC244A 3.1-16 MC54HCT374A 3.1-24
MC14560B 3.1-14 MC54HC245A 3.1-16 MC54HCT574A 3.1-25
MC14561B 3.1-14 MC54HC251 3.1-31 MC660 3.1-22
MC14562B 3.1-36 MC54HC259 3.1-21 MC661 3.1-22
Motorola Master Selection Guide 3.1-43 Logic: Standard, Special and Programmable
Device Index
MC662 3.1-22 MC74AC259 3.1-30 MC74ACT160 3.1-20
MC663 3.1-23 MC74AC273 3.1-24 MC74ACT161 3.1-20
MC664 3.1-24 MC74AC299 3.1-37 MC74ACT162 3.1-20
MC667 3.1-33 MC74AC32 3.1-29 MC74ACT163 3.1-20
MC668 3.1-30 MC74AC323 3.1-37 MC74ACT174 3.1-24
MC669 3.1-22 MC74AC350 3.1-37 MC74ACT175 3.1-25
MC670 3.1-30 MC74AC352 3.1-32 MC74ACT194 3.1-37
MC671 3.1-30 MC74AC353 3.1-32 MC74ACT20 3.1-25
MC672 3.1-30 MC74AC373 3.1-31 MC74ACT240 3.1-16
MC677 3.1-29 MC74AC374 3.1-24 MC74ACT241 3.1-16
MC678 3.1-29 MC74AC377 3.1-24 MC74ACT244 3.1-16
MC68150'33 3.1-15 MC74AC378 3.1-23 MC74ACT245 3.1-15
MC68150'40 3.1-15 MC74AC4020 3.1-19 MC74ACT251 3.1-32
MC68194 3.1-17 MC74AC4040 3.1-19 MC74ACT253 3.1-32
MC74ACOO 3.1-26 MC74AC533 3.1-31 MC74ACT256 3.1-30
MC74AC02 3.1-28 MC74AC534 3.1-25 MC74ACT257 3.1-33
MC74AC04 3.1-29 MC74AC540 3.1-16 MC74ACT258 3.1-33
MC74AC05 3.1-29 MC74AC541 3.1-16 MC74ACT259 3.1-30
MC74AC08 3.1-26 MC74AC563 3.1-30 MC74ACT273 3.1-24
MC74AC10 3.1-26 MC74AC564 3.1-25 MC74ACT299 3.1-37
MC74AC109 3.1-24 MC74AC573 3.1-30 MC74ACT32 3.1-29
MC74AC11 3.1-26 MC74AC574 3.1-25 MC74ACT323 3.1-37
MC74AC112 3.1-23 MC74AC620 3.1-15 MC74ACT350 3.1-37
MC74AC113 3.1-23 MC74AC623 3.1-15 MC74ACT352 3.1-32
MC74AC125 3.1-17 MC74AC640 3.1-15 MC74ACT353 3.1-32
MC74AC126 3.1-17 MC74AC643 3.1-15 MC74ACT373 3.1-31
MC74AC132 3.1-36 MC74AC646 3.1-16 MC74ACT374 3.1-25
MC74AC138 3.1-21 MC74AC648 3.1-16 MC74ACT377 3.1-24
MC74AC139 3.1-21 MC74AC652 3.1-16 MC74ACT378 3.1-23
MC74AC14 3.1-36 MC74AC74 3.1-23 MC74ACT521 3.1-18
MC74AC151 3.1-31 MC74AC810 3.1-27 MC74ACT533 3.1-31
MC74AC153 3.1-32 MC74AC86 3.1-27 MC74ACT534 3.1-25
MC74AC157 3.1-33 MC74ACTOO 3.1-26 MC74ACT540 3.1-16
MC74AC158 3.1-33 MC74ACT02 3.1-28 MC74ACT541 3.1-16
MC74AC160 3.1-20 MC74ACT04 3.1-29 MC74ACT563 3.1-30
MC74AC161 3.1-20 MC74ACT05 3.1-29 MC74ACT564 3.1-25
MC74AC162 3.1-20 MC74ACT08 3.1-26 MC74ACT573 3.1-31
MC74AC163 3.1-20 MC74ACT10 3.1-26 MC74ACT574 3.1-25
MC74AC174 3.1-24 MC74ACT109 3.1-24 MC74ACT620 3.1-15
MC74AC175 3.1-25 MC74ACT11 3.1-26 MC74ACT623 3.1-15
MC74AC190 3.1-21 MC74ACT112 3.1-23 MC74ACT640 3.1-15
MC74AC194 3.1-37 MC74ACT113 3.1-23 MC74ACT643 3.1-15
MC74AC20 3.1-25 MC74ACT125 3.1-17 MC74ACT646 3.1-16
MC74AC240 3.1-16 MC74ACT126 3.1-17 MC74ACT648 3.1-16
MC74AC241 3.1-16 MC74ACT132 3.1-36 MC74ACT652 3.1-16
MC74AC244 3.1-16 MC74ACT138 3.1-21 MC74ACT74 3.1-23
MC74AC245 3.1-15 MC74ACT139 3.1-21 MC74ACT810 3.1-27
MC74AC251 3.1-32 MC74ACT14 3.1-36 MC74ACT86 3.1-28
MC74AC253 3.1-32 MC74ACT151 3.1-31 MC74FOO 3.1-26
MC74AC256 3.1-30 MC74ACT153 3.1-32 MC74F02 3.1-28
MC74AC257 3.1-33 MC74ACT157 3.1-33 MC74F04 3.1-29
MC74AC258 3.1-33 MC74ACT158 3.1-33 MC74F08 3.1-26
Logic: Standard, Special and Programmable 3.1-44 Motorola Master Selection Guide
Device Index
MC74F10 3.1-26 MC74F352 3.1-32 MC74HC10 3.1-26
MC74F109 3.1-24 MC74F353 3.1-32 MC74HC107 3.1-23
MC74F11 3.1-26 MC74F365 3.1-15 MC74HC109 3.1-24
MC74Fl12 3.1-24 MC74F366 3.1-15 MC74HC11 3.1-26
MC74F1245 3.1-15 MC74F367 3.1-15 MC74HCl12 3.1-23
MC74F125 3.1-17 MC74F368 3.1-15 MC74HC125A 3.1-17
MC74F126 3.1-17 MC74F37 3.1-26 MC74HC126A 3.1-17
MC74F13 3.1-36 MC74F373 3.1-31 MC74HC132A 3.1-36
MC74F132 3.1-36 MC74F374 3.1-24 MC74HC133 3.1-25
MC74F138 3.1-21 MC74F377 3.1-24 MC74HC137 3.1-21
MC74F139 3.1-21 MC74F378 3.1-36 MC74HC138A 3.1-21
MC74F14 3.1-36 MC74F379 3.1-25 MC74HC139A 3.1-21
MC74F148 3.1-22 MC74F38 3.1-26 MC74HC147 3.1-22
MC74F151 3.1-31 MC74F381 3.1-14 MC74HC14A 3.1-36
MC74F153 3.1-32 MC74F382 3.1-14 MC74HC151 3.1-31
MC74F157A 3.1-32 MC74F3893A 3.1-38 MC74HC153 3.1-32
MC74F158A 3.1-32 MC74F398 3.1-33 MC74HC154 3.1-21
MC74F160A 3.1-19 MC74F399 3.1-33 MC74HC157A 3.1-32
MC74F161A 3.1-19 MC74F40 3.1-25 MC74HC158 3.1-32
MC74F162A 3.1-19 MC74F51 3.1-27 MC74HC160 3.1-20
MC74F163A 3.1-19 MC74F521 3.1-18 MC74HC161A 3.1-20
MC74F164 3.1-37 MC74F533 3.1-31 MC74HC162 3.1-20
MC74F168 3.1-19 MC74F534 3.1-25 MC74HC163 3.1-20
MC74F169 3.1-19 MC74F537 3.1-21 MC74HCl64 3.1-37
MC74F174 3.1-24 MC74F538 3.1-21 MC74HC165 3.1-37
MC74F175 3.1-25 MC74F539 3.1-21 MC74HC173 3.1-25
MC74F1803 3.1-17 MC74F543 3.1-16 MC74HC174A 3.1-24
MC74F181 3.1-14 MC74F544 3.1-16 MC74HC175 3.1-25
MC74F182 3.1-14 MC74F568 3.1-19 MC74HC175A 3.1-25
MC74F194 3.1-37 MC74F569 3.1-19 MC74HC194 3.1-37
MC74F195 3.1-37 MC74F574 3.1-24 MC74HC195 3.1-37
MC74F20 3.1-25 MC74F579 3.1-19 MC74HC20 3.1-25
MC74F21 3.1-25 MC74F620 3.1-16 MC74HC237 3.1-21
MC74F240 3.1-15 MC74F623 3.1-16 MC74HC240A 3.1-16
MC74F241 3.1-15 MC74F64 3.1-27 MC74HC241A 3.1-16
MC74F242 3.1-17 MC74F640 3.1-16 MC74HC242 3.1-17
MC74F243 3.1-17 MC74F646 3.1-16 MC74HC244A 3.1-16
MC74F244 3.1-15 MC74F657A 3.1-15 MC74HC245A 3.1-16
MC74F245 3.1-15 MC74F657B 3.1-15 MC74HC251 3.1-31
MC74F251 3.1-31 MC74F74 3.1-23 MC74HC253 3.1-32
MC74F253 3.1-32 MC74F779 3.1-19 MC74HC257 3.1-32
MC74F256 3.1-30 MC74F803 3.1-17 MC74HC259 3.1-21
MC74F257A 3.1-33 MC74F823 3.1-15 MC74HC27 3.1-28
MC74F258A 3.1-33 MC74F827 3.1-14 MC74HC273A 3.1-24
MC74F259 3.1-30 MC74F828 3.1-14 MC74HC280 3.1-34
MC74F269 3.1-19 MC74F85 3.1-18 MC74HC299 3.1-37
MC74F280 3.1-34 MC74F86 3.1-28 MC74HC30 3.1-25
MC74F283 3.1-14 MC74HCOOA 3.1-26 MC74HC32A 3.1-29
MC74F299 3.1-37 MC74HC02A 3.1-28 MC74HC354 3.1-32
MC74F32 3.1-29 MC74HC03A 3.1-26 MC74HC365 3.1-15
MC74F323 3.1-37 MC74HC04A 3.1-29 MC74HC366 3.1-15
MC74F350 3.1-37 MC74HC08A 3.1-26 MC74HC367 3.1-15
Motorola Master Selection Guide 3.1-45 Logic: Standard, Special and Programmable
Device Index
MC74HC368 3.1-15 MC74HCTOOA 3.1-26 MC836 3.1-29
MC74HC373A 3.1-31 MC74HCT04A 3.1-29 MC837 3.1-29
MC74HC374A 3.1-25 MC74HCT08A 3.1-26 MC840 3.1-29
MC74HC390 3.1-20 MC74HCT138A 3.1-21 MC844 3.1-22
MC74HC393 3.1-20 MC74HCT14A 3.1-36 MC845 3.1-23
MC74HC4002 3.1-28 MC74HCT157A 3.1-32 MC846 3.1-26
MC74HC4016 3.1-33 MC74HCT161A 3.1-20 MC849 3.1-26
MC74HC4017 3.1-20 MC74HCT163A 3.1-20 MC88913 3.1-18
MC74HC4020A 3.1-19 MC74HCT174A 3.1-24 MC88914 3.1-18
MC74HC4024 3.1-34 MC74HCT240A 3.1-16 MC88915*55 3.1-18
MC74HC4040A 3.1-19 MC74HCT241A 3.1-16 MC88915*70 3.1-18
MC74HC4046A 3.1-39 MC74HCT244A 3.1-16 MC88915T*100 3.1-18
MC74HC4049 3.1-29 MC74HCT245A 3.1-15 MC88915T*133 3.1-18
MC74HC4050 3.1-29 MC74HCT273A 3.1-24 MC88915T*160 3.1-18
MC74HC4051 3.1-31 MC74HCT32A 3.1-29 MC88915T*55 3.1-18
MC74HC4052 3.1-32 MC74HCT373A 3.1-30 MC88915T*70 3.1-18
MC74HC4053 3.1-33 MC74HCT374A 3.1-24 MC88916*70 3.1-18
MC74HC4060 3.1-19 MC74HCT541A 3.1-16 MC88916*80 3.1-18
MC74HC4060A 3.1-19 MC74HCT573A 3.1-31 MC88920 3.1-17
MC74HC4066 3.1-33 MC74HCT574A 3.1-25 MC88921 3.1-17
MC74HC4075 3.1-29 MC74HCT74A 3.1-23 MC88LV926 3.1-18
MC74HC4078 3.1-27 MC74HCU04 3.1-29 MC88PL117 3.1-17
MC74HC42 3.1-21 MC74LCXOO 3.1-26 MC936 3.1-29
MC74HC4316 3.1-33 MC74LCX02 3.1-28 MC937 3.1-29
MC74HC4351 3.1-31 MC74LCX04 3.1-30 MC944 3.1-22
MC74HC4353 3.1-33 MC74LCX08 3.1-26 MC945 3.1-23
MC74HC4511 3.1-22 MC74LCX240 3.1-14 MC946 3.1-26
MC74HC4514 3.1-21 MC74LCX244 3.1-14 MC951 3.1-33
MC74HC4538A 3.1-33 MC74LCX245 3.1-38 MC952 3.1-23
MC74HC51 3.1-27 MC74LCX32 3.1-28 MC953 3.1-23
MC74HC533A 3.1-31 MC74LCX373 3.1-30 MCCS142233 3.1-36
MC74HC534A 3.1-24 MC74LCX374 3.1-24 MCCS142234 3.1-36
MC74HC540A 3.1-16 MC74LCX540 3.1-14 MCCS142235 3.1-36
MC74HC541A 3.1-16 MC74LCX541 3.1-14 MCCS142237 3.1-36
MC74HC563 3.1-31 MC74LCX573 3.1-30 MCH12140 3.1-22
MC74HC564 3.1-25 MC74LCX574 3.1-24 MCK12140 3.1-22
MC74HC573A 3.1-31 MC74LVQOO 3.1-26 MCM10139 3.1-35
MC74HC574A 3.1-25 MC74LVQ04 3.1-30 MCM10143 3.1-36
MC74HC58 3.1-27 MC74LVQ125 3.1-14 MCM10145 3.1-36
MC74HC589 3.1-37 MC74LVQ138 3.1-21 MCM10146 3.1-35
MC74HC595A 3.1-37 MC74LVQ240 3.1-14 MCM10149*25 3.1-35
MC74HC597 3.1-37 MC74LVQ244 3.1-14 MCM10152 3.1-35
MC74HC640A 3.1-16 MC74LVQ245 3.1-38 MPC903 3.1-17
MC74HC646 3.1-16 MC74LVQ373 3.1-30 MPC904 3.1-17
MC74HC688 3.1-18 MC74LVQ374 3.1-24 MPC930 3.1-18
MC74HC7266 3.1-27 MC74LVQ541 3.1-14 MPC931 3.1-18
MC74HC73 3.1-23 MC74LVQ573 3.1-30 MPC947 3.1-17
MC74HC74A 3.1-23 MC74LVQ574 3.1-24 MPC948 3.1-17
MC74HC75 3.1-30 MC74LVQ646 3.1-38 MPC950 3.1-18
MC74HC76 3.1-23 MC74LVQ652 3.1-38 MPC951 3.1-18
MC74HC85 3.1-18 MC830 3.1-25 MPC956 3.1-18
MC74HC86 3.1-28 MC832 3.1-14 MPC970 3.1-18
Logic: Standard, Special and Programmable 3.1-46 Motorola Master Selection Guide
Device Index
SN54LSOO 3,1-26 SN54LS191 3,1-20 SN54LS373 3,1-31
SN54LS01 3,1-26 SN54LS192 3,1-20 SN54LS374 3,1-25
SN54LS02 3,1-28 SN54LS193 3,1-20 SN54LS375 3,1-30
SN54LS03 3,1-26 SN54LS194A 3,1-37 SN54LS377 3,1-24
SN54LS04 3,1-29 SN54LS195A 3,1-38 SN54LS378 3,1-24
SN54LS05 3,1-29 SN54LS196 3,1-19 SN54LS379 3,1-23
SN54LS08 3,1-26 SN54LS197 3,1-19 SN54LS38 3,1-26
SN54LS09 3,1-26 SN54LS20 3,1-25 SN54LS386 3,1-28
SN54LS10 3,1-26 SN54LS21 3,1-25 SN54LS390 3,1-20
SN54LS107A 3,1-23 SN54LS22 3,1-25 SN54LS393 3,1-20
SN54LS109A 3,1-23 SN54LS221 3,1-33 SN54LS398 3,1-33
SN54LS11 3,1-26 SN54LS240 3,1-15 SN54LS399 3,1-33
SN54LSl12A 3,1-23 SN54LS241 3,1-15 SN54LS40 3,1-25
SN54LSl13A 3,1-23 SN54LS242 3,1-17 SN54LS42 3,1-21
SN54LSl14A 3,1-23 SN54LS243 3,1-17 SN54LS47 3,1-22
SN54LS12 3,1-26 SN54LS244 3,1-15 SN54LS48 3,1-22
SN54LS122 3,1-33 SN54LS245 3,1-16 SN54LS490 3,1-20
SN54LS123 3,1-33 SN54LS247 3,1-22 SN54LS51 3,1-27
SN54LS125A 3,1-16 SN54LS248 3,1-22 SN54LS54 3,1-27
SN54LS126A 3,1-17 SN54LS249 3,1-22 SN54LS540 3,1-16
SN54LS13 3,1-36 SN54LS251 3,1-31 SN54LS541 3,1-16
SN54LS132 3,1-36 SN54LS253 3,1-32 SN54LS55 3,1-27
SN54LS133 3,1-25 SN54LS256 3,1-30 SN54LS569A 3,1-19
SN54LS137 3,1-21 SN54LS2578 3,1-33 SN54LS623 3,1-16
SN54LS138 3,1-21 SN54LS2588 3,1-33 SN54LS640 3,1-16
SN54LS139 3,1-21 SN54LS259 3,1-30 SN54LS641 3,1-38
SN54LS14 3,1-36 SN54LS26 3,1-26 SN54LS642 3,1-38
SN54LS145 3,1-21 SN54LS260 3,1-28 SN54LS645 3,1-16
SN54LS147 3,1-22 SN54LS266 3,1-27 SN54LS669 3,1-20
SN54LS148 3,1-22 SN54LS27 3,1-28 SN54LS670 3,1-36
SN54LS15 3,1-26 SN54LS273 3,1-24 SN54LS682 3,1-18
SN54LS151 3,1-31 SN54LS279 3,1-31 SN54LS684 3,1-18
SN54LS153 3,1-32 SN54LS28 3,1-28 SN54LS688 3,1-18
SN54LS155 3,1-21 SN54LS280 3,1-34 SN54LS73A 3,1-24
SN54LS156 3,1-21 SN54LS283 3,1-14 SN54LS748 3,1-22
SN54LS157 3,1-32 SN54LS290 3,1-20 SN54LS74A 3,1-23
SN54LS158 3,1-32 SN54LS293 3,1-19 SN54LS75 3,1-30
SN54LS160A 3,1-19 SN54LS298 3,1-33 SN54LS76A 3,1-23
SN54LS161A 3,1-19 SN54LS299 3,1-37 SN54LS77 3,1-30
SN54LS162A 3,1-19 SN54LS30 3,1-25 SN54LS795 3,1-15
SN54LS163A 3,1-19 SN54LS32 3,1-29 SN54LS796 3,1-15
SN54LS164 3,1-37 SN54LS322A 3,1-37 SN54LS797 3,1-15
SN54LS165 3,1-37 SN54LS323 3,1-37 SN54LS798 3,1-15
SN54LS166 3,1-37 SN54LS33 3,1-28 SN54LS83A 3,1-14
SN54LS168 3,1-19 SN54LS348 3,1-22 SN54LS848 3,1-22
SN54LS169 3,1-20 SN54LS352 3,1-32 SN54LS85 3,1-18
SN54LS170 3,1-36 SN54LS353 3,1-32 SN54LS86 3,1-28
SN54LS173A 3,1-23 SN54LS365A 3,1-15 SN54LS90 3,1-20
SN54LS174 3,1-24 SN54LS366A 3,1-15 SN54LS92 3,1-20
SN54LS175 3,1-25 SN54LS367A 3,1-15 SN54LS93 3,1-19
SN54LS181 3,1-14 SN54LS368A 3,1-15 SN54LS958 3,1-37
SN54LS190 3,1-20 SN54LS37 3,1-26 SN74LSOO 3,1-26
Motorola Master Selection Guide 3,1-47 Logic: Standard, Special and Programmable
Device Index
SN74LS01 3.1-26 SN74LS191 3.1-20 SN74LS374 3.1-25
SN74LS02 3.1-28 SN74LS192 3.1-20 SN74LS375 3.1-30
SN74LS03 3.1-26 SN74LS193 3.1-20 SN74LS377 3.1-24
SN74LS04 3.1-29 SN74LS194A 3.1-37 SN74LS378 3.1-24
SN74LS05 3.1-29 SN74LS195A 3.1-38 SN74LS379 3.1-23
SN74LS08 3.1-26 SN74LS196 3.1-19 SN74LS38 3.1-26
SN74LS09 3.1-26 SN74LS197 3.1-19 SN74LS386 3.1-28
SN74LS10 3.1-26 SN74LS20 3.1-25 SN74LS390 3.1-20
SN74LS107A 3.1-23 SN74LS21 3.1-25 SN74LS393 3.1-20
SN74LS109A 3.1-23 SN74LS22 3.1-25 SN74LS395 3.1-37
SN74LS11 3.1-26 SN74LS221 3.1-33 SN74LS398 3.1-33
SN74LS112A 3.1-23 SN74LS240 3.1-15 SN74LS399 3.1-33
SN74LS113A 3.1-23 SN74LS241 3.1-15 SN74LS40 3.1-25
SN74LS114A 3.1-23 SN74LS242 3.1-17 SN74LS42 3.1-21
SN74LS12 3.1-26 SN74LS243 3.1-17 SN74LS47 3.1-22
SN74LS122 3.1-33 SN74LS244 3.1-15 SN74LS48 3.1-22
SN74LS123 3.1-33 SN74LS245 3.1-16 SN74LS490 3.1-20
SN74LS125A 3.1-16 SN74LS247 3.1-22 SN74LS51 3.1-27
SN74LS126A 3.1-17 SN74LS248 3.1-22 SN74LS54 3.1-27
SN74LS13 3.1-36 SN74LS249 3.1-22 SN74LS540 3.1-16
SN74LS132 3.1-36 SN74LS251 3.1-31 SN74LS541 3.1-16
SN74LS133 3.1-25 SN74LS253 3.1-32 SN74LS55 3.1-27
SN74LS136 3.1-28 SN74LS257B 3.1-33 SN74LS569A 3.1-19
SN74LS137 3.1-21 SN74LS258B 3.1-33 SN74LS623 3.1-16
SN74LS138 3.1-21 SN74LS259 3.1-30 SN74LS640 3.1-16
SN74LS139 3.1-21 SN74LS26 3.1-26 SN74LS641 3.1-38
SN74LS14 3.1-36 SN74LS260 3.1-28 SN74LS642 3.1-38
SN74LS145 3.1-21 SN74LS266 3.1-27 SN74LS645 3.1-16
SN74LS147 3.1-22 SN74LS27 3.1-28 SN74LS669 3.1-20
SN74LS148 3.1-22 SN74LS273 3.1-24 SN74LS670 3.1-36
SN74LS15 3.1-26 SN74LS279 3.1-31 SN74LS682 3.1-18
SN74LS151 3.1-31 SN74LS28 3.1-28 SN74LS684 3.1-18
SN74LS153 3.1-32 SN74LS280 3.1-34 SN74LS688 3.1-18
SN74LS155 3.1-21 SN74LS283 3.1-14 SN74LS73A 3.1-24
SN74LS156 3.1-21 SN74LS290 3.1-20 SN74LS748 3.1-22
SN74LS157 3.1-32 SN74LS293 3.1-19 SN74LS74A 3.1-23
SN74LS158 3.1-32 SN74LS298 3.1-33 SN74LS75 3.1-30
SN74LS160A 3.1-19 SN74LS299 3.1-37 SN74LS76A 3.1-23
SN74LS161A 3.1-19 SN74LS30 3.1-25 SN74LS77 3.1-30
SN74LS162A 3.1-19 SN74LS32 3.1-29 SN74LS795 3.1-15
SN74LS163A 3.1-19 SN74LS322A 3.1-37 SN74LS796 3.1-15
SN74LS164 3.1-37 SN74LS323 3.1-37 SN74LS797 3.1-15
SN74LS165 3.1-37 SN74LS33 3.1-28 SN74LS798 3.1-15
SN74LS166 3.1-37 SN74LS348 3.1-22 SN74LS83A 3.1-14
SN74LS168 3.1-19 SN74LS352 3.1-32 SN74LS848 3.1-22
SN74LS169 3.1-20 SN74LS353 3.1-32 SN74LS85 3.1-18
SN74LS170 3.1-36 SN74LS365A 3.1-15 SN74LS86 3.1-28
SN74LS173A 3.1-23 SN74LS366A 3.1-15 SN74LS90 3.1-20
SN74LS174 3.1-24 SN74LS367A 3.1-15 SN74LS92 3.1-20
SN74LS175 3.1-25 SN74LS368A 3.1-15 SN74LS93 3.1-19
SN74LS181 3.1-14 SN74LS37 3.1-26 SN74LS95B 3.1-37
SN74LS190 3.1-20 SN74LS373 3.1-31
Logic: Standard, Special and Programmable 3.1-48 Motorola Master Selection Guide
Ordering Information
Device Nomenclatures
Standard Prefix
Temperature
J T
Range~
• N for Plastic (74 Series Only)
• J for Ceramic
• 0 for 150 mil Plastic SOIC (74 Series Only)
• OW for 300 mil Plastic SOIC (74 Series Only)
• 74 Series (0 to +70°C)
• 54 Series (-55 to +125°C) Function Type
Family - - - - - - - - - - - - - - - - - '
• LS = Low Power Schottky
FAST
MC VV w XXXX V
L
Package Type
• N for Plastic (74 Series Only)
.-
Circuit Identifier ~T 1 • 0 for 150 mil Plastic SOIC (74 Series Only)
• OW for 300 mil Plastic SOIC (74 Series Only)
Temperature Range
• 74 Series (0 to +70°C) Function Type
Family - - - - - - - - - - - - - - - - - '
• F= FAST
Function Type
• 100H = lOOK Compatible (0 to +85°C)
Motorola Master Selection Guide 3.1-49 Logic: Standard, Special and Programmable
ECLinPS, ECLinPS Lite
Motorola
Circuit Identifier ----.JT
MC
1: ZZ
1 Package Type
• FN =PLCC
• D = Plastic SOIC
• L = Ceramic DIP
• P = Plastic DIP
Function Type
• yvy = 3-DigHs for ECLinPS
• yv= 2-Digits for ECLinPS Lite
• 10 = 10H Compatible (0 to +85°C)
• 100 = 100K Compatible (0 to +85°C) ' - - - - - - - - - - - ECLinPS Family Identifier
• E = ECLinPS
• EL = ECLinPS Lite
• ELT = ECLinPS Lite Translator
• LVE = Low Voltage ECLinPS
• LVEL = Low Voltage ECLinPS Lite
High-Speed CMOS
MC VV WWW XXXX Y
--c...- Package Type
.-.
Circuit Identifier I I • N for Plastic (74 Series Only)
• J for Ceramic (54 Series Only)
• D for 150 mil Plastic SOIC (74 Series Only)
Temperature Range • DW for 300 mil Plastic SOIC (74 Series Only)
• 74 Series (-55 to +125°C)
• 54 Series (-55 to +125°C) Function Type
• XXIX) Same Function and Pin Configuration as
High-Speed CMOS
LSTIL
Specification Identifier
• HC = Buffered High-Speed CMOS • 4XXX Same Function and Pin Configuration as
• HCU = Unbuffered High-Speed CMOS' CMOS 14000
• HCT = High-Speed CMOS TIL Compatible • 7XX(X) Variation of LSTIL or CMOS 14000
Device
'Not Available On All Devices
FACT
._.
Circuit Identifier
~T
Temperature Range Family
• 74AC = FACT (-40 to +85°C)
• 74ACT = TIL Compatible (-40 to +85°C)
xxx YY
-,-- Package Type
• N for Plastic
• D for Narrow SOIC
• DW for Wide SOIC
Function Type
Logic: Standard, Special and Programmable 3.1-50 Motorola Master Selection Guide
Other Logic Circuits
Motorola
MC/MCCS
I
wwwwww x VV
Package Type
Circuit Identifier ----l
• N for Plastic
• MC = Standard Circuit Identifier
• D for Narrow SOIC
• MCCS = Circuit Chip-Set Identifier
• FNforPlCC
• FJ forClCC
Function Type _ _ _ _ _ _ _ _---l
MECL IIIIHTUDTL
MC XXXX V
L: Package Type
-----.JT
Motorola • P for Plastic
Circuit Identifier • l for Ceramic
• D for Narrow SOIC
• FN for PlCC
Function Type
LCX Products
MC 74 LCX VVVV zz
.~.
~ Package Type
LVQ Products
MC 74 LVQ VVVV zz
~ Package Type
.-
Circuit Identifier
Temperature Range
I I • D for Plastic Narrow JEDEC SOIC
• DW for Plastic Wide JEDEC SOIC
• M for Plastic EIAJ SOIC
• SD for Plastic SSOP
• 74 = -40 to +85°C • DT for Plastic TSSOP
Function Type
Family Identifier
• lVQ =low-Voltage Quiet CMOS
Motorola Master Selection Guide 3.1-51 logic: Standard, Special and Programmable
Motorola Programmable Arrays (MPA)
Motorola Programmable
Array Circuit Identifier
~
MPA 1XXXX vv
C Z -I
Temperature Range
• Blank = 0 to + 70'C
• -I = --40 to +85'C (Planned)
Speed Grade
• Consult Factory
Family Identifier
• 1XXX = 1000 Series Programmable Array
• 17XXX = 17000 Series Serial EPROM L-_ _ _ _ _ _ Package Types
• P = 8-Pin DIP • DH = 160-Pin PQFP
• D = 8-Pin SOIC • DK = 208-Pin PQFP
• FN = 20-Pin PLCC • HI = 181-Pin PGA
• FN = 84--Pin PLCC • KE = 224-Pin PGA
• DD = 128-Pin PQFP • HV = 299-Pin PGA
Motorola Programmable
Array Circuit Identifier
Logic: Standard, Special and Programmable 3.1-52 Motorola Master Selection Guide
Case Outlines
8-Pin Packages
L SUFFIX
CERAMIC DIP PACKAGE
CASE 693-03
ISSUE C
P SUFFIX
PLASTIC DIP PACKAGE
CASE 626-05
ISSUE K
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1962.
NOTE 2
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 9.40 10.16 0.370 Q.400
B 6.10 6.60 0.240 0.260
C 3.94 .45 0.165 0.175
0 0.38 0.51 0.Q15 0.020
F 1.02 1.78 0.040 0.070
-T- G 2.54BSC 0.100 BSC
H 0.76 1.27 0.030 0.050
SEATING
PLANE J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
L 7.62 Bse 0.300 Bse
H M 10° 10°
N 0.76 1.01 0.030 0.040
Motorola Master Selection Guide 3.1-53 Logic: Standard, Special and Programmable
8-Pin Packages
DSUFFIX
PLASTIC SOIC PACKAGE
•
CASE 751-Q5
ISSUE N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B 00 NOT INCWDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION 0 DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
m,
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE 0 DIMENSION AT MAXIMUM
MATERIAL CONDIllON
IIILLIllETERS INCHES
Dill MIN MAX MIN !lAX
A 4.80 5.00 0.189 .196
1 r- RX450
/" -1 F L
8
C
D
3.80
1.35
0.35
4.00
1.75
0.49
0.150 0.157
0.054 0.068
0.014 0.019
LJ,c
~MO
€h"uT
.......... J
G
J
K
F 0.40
1.27BSC
0.18
0.10
1.25
0.25
0.25
0.016 0.049
O.05OBSC
0.007 O. 9
0.004 0.009
M 0° 7° 0° 7°
P 5.80 6.20 0.229 0.244
R 0.25 O~O 0.010 0.019
SDSUFFIX
PLASTIC SSOP PACKAGE
CASE 94D-03
ISSUE B
1 1-- 8xKREF
I 1$10.12(0.005)®lrlu ®lv®1
0.25 (0.010) NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1962.
ITi8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCWDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
Ll_ DETAILE
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
5. DIMENSION K DOES NOT INCWDE DAMBAR
PIN 1 PROTRUSION/INTRUSION. ALLOWABLE
IDENT DAMBAR PROTRUSION SHALL BE 0.13 (0.005)
TOTAL IN EXCESS OF K DIMENSION AT
MAXIMUM MATERIAL CONDITION. DAMBAR
INTRUSION SHALL NOT REDUCE DIMENSION K
BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL
CONDIllON.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
SECTIONN-N MILLIMETERS INCHES
DIM MIN MAX IIIN MAX
A 2.87 3.13 0.113 0.123
B 5.20 5.38 0.205 0.212
C 1.73 1.99 0.068 0.078
D 0.05 0.21 0.002 0.008
F 0.63 0.95 0.024 0.037
G O. 0.026
H 0.44 0.60 001 0.023
0.09 0.20 0.003 0.008
Jl 0.09 0.6 0.003 0.006
H K 0.25 0.38 0.010 0.015
Kl 0.25 0.33 0.010 0.013
L 7.65 7. .301 0.311
M 0° 8° 0° 8°
Logic: Standard, Special and Programmable 3.1-54 Motorola Master Selection Guide
14-Pin Packages
L,J SUFFIX
CERAMIC DIP PACKAGE
CASE 632--08
ISSUEY NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
c BODY.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.94
B 0.245 0.2BO 6.23 7.11
~
C 0.155 0.200 3.94 5.08
D 0.Q15 0.020 0.39 0.50
SEA1lNG F 0.055 0.065 1.40 1.65
1"::;$cTl':'-'0.2":-5(::-0.0:C-:
10"-;)@"I-=-rIrA-;;®"'1 1$10.25(0.010)@lrl B ® 1
M 0° 15° 0° 15°
N 0.020 0.040 0.51 1.01
P,N SUFFIX
PLASTIC DIP PACKAGE
CASE 646-06
ISSUE L NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
B FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
!-r'T"TT"T"T"11""T"t"..~7r!---.i FLASH.
4. ROUNDED CORNERS OPTIONAL
.1 DIM
A
MIN
INCHES
MAX
0.715 0.770
MILLIMETERS
MIN MAX
18.16 19.56
B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
G O.l00SSC 2.54 BSC
H 0.082 0.095 1.32 2.41
J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
L 0.300 SSC 7.82 BSC
K M 0° 10° 0° 10°
N 0.Q15 0.039 0.39 1.01
DSUFFIX
PLASTIC SOIC PACKAGE
CASE 751A--03
NOTES:
ISSUE F 1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION 0 DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE 0 DIMENSION AT
MAXIMUM MATERIAL CONDITION
MILLIMETERS INCHES
-jGi- DIM MIN MAX MIN MAX
c A 8.55 8.75 0.337 0.344
I~~~
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 om
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 127BSC 0.050 SSC
J 0.19 0.25 0.008 0.009
PLANE 1$1 0.25(0.010)@lrl B ® 1A®I K 0.10 0.25 0.004 0.009
M 0° 7° 0° 7°
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.Q19
Motorola Master Selection Guide 3.1-55 Logic: Standard. Special and Programmable
. 14-Pln Packages
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 965-01 NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
ISSUE 0 YI4.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOUD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE RARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (h) DOES NOT
INCLUOE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE O.OB (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL
CONDITION. DAMBAR CANNOT BE LOCATED ON
THE LOWER RADIUS OR THE FOOT. MINIMUM
DETAILP SPACE BETWEEN PROTRUSIONS AND
ADJACENT LEAD TO BE 0.46 (O.OIB).
MILLIMETERS INCitES
DIM MIN MAX MIN MAX
VIEWP, A 2.05 0.081
~i]
AI 0.05 0.20 0.002 o.oOB
-II-b A 1 - .....
())I b
c
D
E
e
0.35
0.18
9.90
5.10
0.50
0.27
10.50
5.45
1.27 BSC
0.014 0.020
0.007 0.011
0.390 0.413
0.201 0.215
0.050 BSC
H. 7.40 B.20 0291 0.323
1-$1 0.13 (0.005)@1 0.50 0.50 0.B5 0.020 0.033
L. 1.10 1.50 0.043 0.059
M 0° 10° 0° 10°
Q 0.70 0.90 0.02B 0.035
Z 1.42 0.056
SDSUFFIX
PLASTIC SSOP PACKAGE
•
CASE 940A-Q3
ISSUE B
fIr"
3. DIMENSION A DOES NOT INCLUDE MOLD
l ----- I
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
L B FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.15 (0.006)
A~-L
PER SIDE.
PIN 1 5. DIMENSION K DOES NOT INCLUDE DAMBAR
IDENT DETAILE PROTRUSIONIINTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13 (0.005)
TOTAL IN EXCESS OF K DIMENSION AT
MAXIMUM MATERIAL CONDITION. DAMBAR
INTRUSION SHALL NOT REDUCE DIMENSION K
I-v-I BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -'1-/-.
MILLIMETERS INCHES
SECTIONN-N DIM MIN MAX MIN MAX
A 6.07 6.33 0.238 0249
B 5.20 5.38 0.205 0.212
C 1.73 1.99 0.06B 0.07B
D 0.05 0.21 0.002 O.OOB
F 0.63 0.95 0.024 0.037
G 0.65 BSC O.026BSC
H 1.08 1.22 0.042 0.048
J 0.09 0.20 0.003 0.008
Jl 0.09 0.16 0.003 0.006
K 0.25 0.3B 0.010 0.015
Kl 0.25 0.33 0.010 0.013
L 7.65 7.90 0.301 0.311
M 0° BO 0° BO
Logic: Standard, Special and Programmable 3,1-56 Motorola Master Selection Guide
14-Pin Packages
DT SUFFIX
14X K REF
PLASTIC TSSOP PACKAGE
CASE 948G-Q1
ISSUE 0
NOTES: •
1. DIMENSIONING ANDTOLERANCING PER ANSI
Y14.5M,1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
:J:Bl
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH
OR PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAM BAR
PIN1 PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
IDENT. EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
DETAILE 6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
L; }jf
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
J J1 C 120 0.047
r --SECTION N-N
D
F
G
H
0.05
0.50
0.15
0.75
0.65 BSC
0.50 0.60
0.002
0.020
0.020
0.006
0.030
0.026BSC
0.024
J 0.09 0.20 0.004 0.008
Jl 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
Kl 0.19 0.25 0.007 0.010
L 6.40 SSC 0.252 BSC
M 0' 8' 0' 8'
16-Pin Packages
L,J SUFFIX
CERAMIC DIP PACKAGE
CASE 620-10
ISSUE V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
I'S
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
/1 B
C
0.240 0295
0.200
6.10 7.49
5.08
1/
fjUL
D 0.015 0.020 0.39 0.50
E 0.050 BSC 1.27BSC
F 0.055 0.065 1.40 1.65
M G 0.100 BSC 2.54BSC
J 16 PL H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
""I
$-'TI""0.2"-5(-0.0-10--:)@"'"'Ir-Tr-IB--:®=:-'
S 11 L 0.300 BSC 7.62 SSC
M 0' 15' 0' 15'
1$10.25(0.010)@ITIA ®I N 0.020 0.040 0.51 1.01
Motorola Master Selection Guide 3.1-57 Logic: Standard, Special and Programmable
16-Pin Packages
P,N SUFFIX
PLASTIC DIP PACKAGE
CASE 648-08
-
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
.7 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 SSC
H 0.050BSC 1.27 BSC
J 0.008 0.Q15 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0° 10° 0° 10°
S 0.020 0.040 0.51 1.01
o
SUFFIX
PLASTIC SOIC PACKAGE
CASE 7518-05
ISSUEJ
~---ll±ll---~
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
~O ~OD- - - -D~Pc
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
Logic: Standard, Special and Programmable 3.1-58 Motorola Master Selection Guide
16-Pin Packages
DWSUFFIX
PLASTIC WIDE SOIC PACKAGE
CASE 751G-02
ISSUE A
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.SM,1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIM ENS 10M 0 DOES NOT INCLUDE DAM BAR
PROTRUSION. ALLOWABLE DAM BAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF 0 DIMENSION AT MAXIMUM
MATERIAL CONDITION.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 10.15 10.45 0.400 0,411
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.278SC 0.050BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0° 7° 0° 7°
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 966-01
ISSUE a
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M.1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS 0 AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DETAIL P DIMENSION AT MAXIMUM MATERIAL
CONDITION. DAMBAR CANNOT BE LOCATED ON
THE LOWER RADIUS OR THE FOOT. MINIMUM
SPACE BETWEEN PROTRUSIONS AND
ADJACENT LEAD TO BE 0 46 ( 0 018)
VIEWP~
~r- ?-, MILLIMETERS INCHES
fimt#ml~
A c DIM MIN MAX MIN MAX
(JI): ll~
A - 2.05 - 0.081
A 0.05 0.20 0.002 0.008
-II-b A1
T c
D
0.18
9.90
0.27
10.50
0.007
0.390
0.011
0.413
E 5.10 5.45 0.201 0.215
e
1$1 0.13(0.005)@ 1 HE
L
1.27BSC
7.40
0.50
8.20
0.85
0.050BSC
0.291
0.020
0.323
0.033
L< 1.10 1.50 0.043 0.059
M 0° 10° 0° 10°
a 0.70 0.90 0.028 0.035
Z 0.78 0.031
Motorola Master Selection Guide 3.1-59 Logic: Standard, Special and Programmable
16-Pin Packages
SO SUFFIX
PLASTIC SSOP PACKAGE
CASE 9408-03
ISSUE B
1 t--
I
16X K REF
1$10.12 (0.005)(01 TI u ® I v ® I 0.25(0.010)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI YI4.5M. 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE
BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION.INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.15 (0.006) PER SIDE.
5. DIMENSION K ODES NOT INCLUDE DAMBAR
PROTRUSION/INTRUSION. ALLOWABLE DAM BAR
L PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF K
DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR
INTRUSION SHALL NOT REDUCE DIMENSION K BY MORE
PIN1 THAN 0.07 (0.002) AT LEAST MATERIAL CONDITION.
IDENT DETAIL E
6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM
PLANE -W-.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 6.07 6.33 0.238 0.249
B 5.20 5.38 0.205 0.212
C 1.73 1.99 0.068 0.078
SECTION N-N 0 0.05 0.21 0.002 0.008
F 0.63 0.95 0.024 0.037
JJ E =s-~
G 0.65 BSC 0.026BSC
H 0.73 0.90 0.028 0.035
II/ \00
J 0.09 0.20 0.003 0.008
J1 0.09 0.16 0.003 0.006
K 0.25 0.38 0.010 0.015
DETAILE~"""
KI 0.25 0.33 0.010 0.013
L 7.65 7.90 0.301 0.311
M 0' 8' 0' 8'
OTSUFFIX
PLASTIC TSSOP PACKAGE
CASE 948F-01
,.~
ISSUE 0
16X KREF
1
SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
B 5. DIMENSION K DOES NOT INCLUDE DAMBAR
I±I PROTRUSION. ALLOWABLE DAM BAR PROTRUSION
SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K
~~J
PIN 1
DIMENSION AT MAXIMUM MATERIAL CONDITION.
IDENT. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE
ONLY.
7 DIMENSION A AND B ARE TO BE DETERMINED AT
,---,--------,-~~ ~
DATUM PLANE -W-.
A MILLIMETERS INCHES
DIM MIN MAX MIN MAX
[±] A
B
4.90 5.10
4.50
0.193
0.169
0.200
0.177
4.30
C 1.20 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 SSC 0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
KI 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0' 8' 0' 8'
Logic: Standard, Special and Programmable 3.1-60 Motorola Master Selection Guide
18-Pin Packages
L,J SUFFIX
CERAMIC DIP PACKAGE
CASE 726-04
ISSUE G
I- EB -I NOTES:
1. DIMENSIONING AND TOLERANCING PER
[:::::]~
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL
OPTIONAL LEAD 4. DIMENSION F FOR FULL LEADS. HALF
CONFIGURATION (I, 9,10,18) LEADS OPTIONAL AT LEAD POSITIONS 1,
9, 10,AND 18.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
~~~"~
A 0.880 0.910 22.35 23.11
B 0240 0.295 6.10 7.49
C - 0.200 - 5.08
D 0.015 0.021 0.38 0.53
F 0.055 0.070 1.40 1.78
SEATING -------a G 0.100 BSC 2.54BSC
jt
PLANE F D 18:L T
J
K
L
M
0.008
0.125
0.012
0.170
0.300 BSC
0" IS"
0.20
3.18
0.30
4.32
7.82 BSC
0" IS"
'I$:-iI=--O.:":'25:"'::(O'-.01-0)--=®"I-'TIr-A--:®~I 1$lo.25(O.010)®ITI B ®I N 0.020 0.040 0.51 1.02
P,N SUFFIX
PLASTIC DIP PACKAGE
CASE707-Q2
ISSUEC
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D),
f~ ::::::::IJ
SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM
MATERIAL CONDITION, IN RELATION TO
SEATING PLANE AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
I- A -I DIM
MILUMETERS
MIN MAX MIN
INCHES
MAX
A 22.22 23.24 0.875 0.915
B 6.10 6.60 0.240 0.260
C 3.56 4.57 0.140 0.160
D 0.36 0.56 0.014 0.022
F 1.27 1.78 0.050 0.070
G 2.54 SSC 0.100 BSC
H 1.02 1.52 0.040 0.060
J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
L 7.82 BSC 0.300 BSC
M 0" IS" 0" IS"
N 0.51 1.02 0.020 0.040
Motorola Master Selection Guide 3.1-61 Logic: Standard, Special and Programmable
2D-Pin Packages
L,J SUFFIX
CERAMIC DIP PACKAGE
CASE 732-03
ISSUE E NOTES:
-
1. LEADS WITHIN 0.25 (0.010) DIAMETER. TRUE
POSITION AT SEATING PLANE. AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEl.
3. DIMENSIONS A AND B INCLUDE MENISCUS.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
c A
B
23.88
6.60
25.15
7.49
0.940
0.260
0.990
0.295
C 3.81 5.08 0.150 0.200
I~~):: :~):t,~
0 0.38 0.56 0.Q15 0.022
F 1.40 1.65 0.055 0.065
H- t--ll-D -IG~ K K
L
J 0.20
3.18
0.30
4.06
7.62 BSC
0.008 0.012
0.125 0.160
0.300 BSC
SEATING M 0° 15° 0° 15°
PLANE N 0.25 1.02 0.Q10 0.040
-
P,N SUFFIX
PLASTICC DIP PACKAGE
CASE 738-03
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSIY14.5M,1962.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEl.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 1.010 1.070 25.66 27.17
B 0.240 0.260 6.10 6.60
C 0.150 0.180 3.81 4.57
0 0.015 0.022 0.39 0.55
E O.osa BSC 1.27BSC
0.050 0.070 1.27 177
G 0.100 BSC 2.54 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.140 2.80 3.55
L 0.300 BSC 7.62 BSC
M 0° 15° 0° 15°
N 0.020 0.040 0.51 1.01
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 7510-04
ISSUE E NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150 (0.006)
PER SIDE.
5. DIMENSION 0 DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF 0 DIMENSION
AT MAXIMUM MATERIAL CONDITION.
-11-1r-:$-rlo-.O-10-(O-.2S--:)®=I-Tr-1A--:®=-Sr-IB--;®"'I
20X D
DIM
MILLIMETERS
MIN MAX
INCHES
MIN MAX
A 12.65 12.95 0.499 0.510
B 7.40 7.60 0292 0.299
C 2.35 2.65 0.093 0.104
0 0.35 0.49 0.014 0.Q19
F O.sa 0.90 0.020 0.035
G 1.27BSC O.osa BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0° 7° 0° 7°
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
Logic: Standard. Special and Programmable 3.1--62 Motorola Master Selection Guide
2o-Pin Packages
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967-01
NOTES:
ISSUE 0 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M.1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY,
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAM BAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL
CONDITION. DAM BAR CANNOT BE LOCATED ON
THE LOWER RADIUS OR THE FOOT. MINIMUM
SPACE BETWEEN PROTRUSIONS AND
DETAILP ADJACENT LEAD TO BE 0 46 (0018)
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A - 2.05 - 0.081
VIEWP---... A, 0.05 0.20 0.002 0.008
;>-, b 0.35 0.50 0.014 0.020
c 0.18 0.27 0.007 0.011
(;1) :
--
D 12.35 12.80 0.486 0.504
E 5.10 5.45 0.201 0.215
•
H.
1.27BSC
7.40 8.20
0.050 SSC
0.291 0.323
L 0.50 0.85 0.020 0.033
L. 1.10 1.50 0.043 0.059
0.13(0.005)@ M 0" 10" 0" 10"
Q 0.70 0.90 0.028 0.035
Z 0.81 0.032
SO SUFFIX
•
PLASTIC SSOP PACKAGE
CASE 940C-03
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1982.
2. CONTROLLING DIMENSION: MILLIMETER.
0.25 (0.010) 3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTER LEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION/INTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13 (0.005)
TOTAL IN EXCESS OF K DIMENSION AT
DETAILE MAXIMUM MATERIAL CONDITION. DAMBAR
INTRUSION SHALL NOT REDUCE DIMENSION K
BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
Lr-K---J~ REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
J W//4 J1
AT DATUM PLANE -W-.
MILLIMETERS INCHES
T~K1-1 t DIM
A
MIN
7.07
MAX
7.33
MIN MAX
0.278 0.288
B 5.20 5.38 0.205 0.212
C 1.73 1.99 0.068 O.D7B
SECTIONN-N O.OOB
D 0.05 021 0.002
F 0.63 0.95 0.024 0.037
G 0.65BSC 0.026 BSC
H 0.59 0.75 0.023 0.030
J 0.09 020 0.003 0.008
J1 0.09 0.16 0.003 0.006
K 0.25 0.38 0.010 0.015
K1 0.25 0.33 0.010 0.013
L 7.65 7.90 0.301 0.311
M 0" 8" 0" 8"
Motorola Master Selection Guide 3.1-63 Logic: Standard, Special and Programmable
20-Pin Packages
OTSUFFIX
PLASTIC TSSOP PACKAGE
•
CASE 948E-02
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14,5M,1982,
2, CONTROLLING DIMENSION: MILLIMETER,
3, DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS, MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0,15 (0,006) PER SIDE,
4, DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION, INTERLEAD FLASH
OR PROTRUSION SHALL NOT EXCEED 0,25
(0,010) PER SIDE,
5, DIMENSION K DOES NOT INCLUDE DAM BAR
SECTION N-N PROTRUSION, ALLOWABLE DAM BAR
PROTRUSION SHALL BE 0,08 (0,003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION,
6, TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY,
7, DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-,
MILliMETERS INCHES
DIM MIN MAX MIN MAX
A 6.40 6,60 0,252 0,260
B 4,30 4,50 0,169 0,177
e - 1.20 - 0,047
0 0,05 0,15 0,002 0,006
F 0,50 0,75 0,020 0,030
DETAILE G 0,65 Bse 0,026BSC
H 0,27 0,37 0,011 0.Q15
J 0,09 0,20 0,004 0,008
J1 0,09 0,16 0,004 0,006
K 0,19 0,30 0,007 0,012
K1 0,19 0,25 0,007 0,010
L 6,40 Bse 0,252 BSC
M 0° 8° 0° 8°
Logic: Standard, Special and Programmable 3.1-64 Motorola Master Selection Guide
20-Pin Packages
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775--02
ISSUE C
I+----+t---AI$I O.007(O.180)@ITIL-M®IN®1
~
HI$lo.007(O.180)@ITIL-M®IN®1
+
K1
K
NOTES: MILLIMETERS
INCHES
1. DATUMS -L-, -M-, AND -N- DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS DIM MIN MAX MIN MAX
PLASTIC BODY AT MOLD PARTING LINE. A 0.385 0.395 9.78 10.03
2. DIMENSION G1, TRUE POSITION TO BE B 0.385 0.395 9.78 10.03
MEASURED AT DATUM -T-, SEATING PLANE. C 0.165 0.180 4.20 4.57
3. DIMENSIONS RAND U 00 NOT INCLUDE MOLD E 0.090 0.110 2.29 2.79
•
FLASH. ALLOWABLE MOLD FLASH IS 0,010 F 0.013 0.019 0.33 0.48
(0.250) PER SIDE. G 0.050BSC 1.27BSC
4. DIMENSIONING AND TOLERANCING PER ANSI H 0.02 0.032 0.66 0.81
Y14.5M,1982. J 0.020 0.51
5. CONTROLLING DiMENSION: INCH. K 0.025 0.84
6. THE PACKAGE TOP MAY BE SMALLER THAN THE R 0.350 0.356 8.89 9.04
PACKAGE BOTTOM BY UP TO 0.012 (0.300). U 0.350 0.356 8.89 9.04
DIMENSIONS R AND U ARE DETERMINED AT THE
V 0.042 0.048 1.07 1.21
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, W 0.042 0.048 1.07 1.21
GATE BURRS AND INTERLEAD FLASH, BUT X 0.042 0.056 1.07 1.42
INCLUDING ANY MISMATCH BETWEEN THE TOP Y 0.020 0.50
AND BOTTOM OF THE PLASTIC BODY. Z 2° 10° 2° 10°
7. DIMENSION H DOES NOT INCLUDE DAMBAR G1 0.310 0.330 7.88 8.38
PROTRUSION OR INTRUSION. THE DAM BAR K1 0.040 1.02
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
Motorola Master Selection Guide 3.1-65 Logic: Standard, Special and Programmable
22-Pin Packages
J SUFFIX
CERAMIC DIP PACKAGE
CASE 736-05
ISSUE E
~------~-A-r-------~
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M,1982.
~
OPTIONAL 2. CONTROlLING DIMENSION: INCH.
LEAD 3. DIMENSION L TO CENTER OF LEAD WHEN
CONFIGURATION FORMED PARALLEL
4. DIMENSION F FOR FULL LEADS. HALF LEADS
OPTIONAL AT LEAD POSITIONS " 1" 12, AND 22.
5. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES IILLIMETERS
Dill IIIN MAX IIIN MAX
A 1.060 1.095 2693 27.81
B 0.360 0.390 9.15 9.90
C 0.150 0.215 3.81 5.46
D 0.15 0.021 0.39 0.53
F 0.050 0.065 1.27 1.65
G 0.100 esc 2.54BSC
J 0.008 0.015 020 0.39
K 0.125 0.170 3.18 4.31
L 0.400 BSC 10.16SSC
M O' 15' O' 15'
N 0.20 0.050 0.51 127
N SUFFIX
PLASTIC DIP PACKAGE
CASE 708-04
ISSUE D
NOTES:
1. PDSITIONAL TOLERANCE OF LEADS (D), SHALL
BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL
f::::::::::: IJ
CONDITION, IN RELATION TO SEATING PLANE
AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MeLD
FLASH.
MILLIMETERS INCHES
Dill IIIN MAX MIN MAX
A 27.56 28.32 1.085 1.115
iLl
, ,
B
C
8.64
3.94
9.14
5.08
0.340 0.360
0.155 0.200
D 0.6 0.56 0.014 0.022
fl
F 1.27 1.76 0.050 0.070
G 2.54BSC 0.100BSC
H 1.02 1.52 0.040 0.060
J 0.20 0.38 0.008 0.D15
K 2.82 3.43 0.115 0.135
L 10.16BSC 0.400BSC
II O' IS' O' 15°
N 0.51 0.020 0.040
Logic: Standard. Special and Programmable 3.1-66 Motorola Master Selection Guide
24-Pin Packages
J SUFFIX
CERAMIC DIP PACKAGE
CASE 758-02
ISSUE A
NOTES:
1, DIMENSIONING AND TOLERANCING PER ANSI
YI4,5M,1982,
2, CONTROLLING DIMENSION: INCH,
3, DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEl.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 1.240 1,285 31,50 32,64
B 0,285 0,305 7,24 7,75
C 0,160 0,200 4,07 5,08
D 0,015 0,021 0,38 0,53
F 0,045 0,062 1,14 1,57
G 0,100BSC 2,64 BSC
J 0,008 0,013 0,20 0,33
K 0,100 0,185 2,54 4,19
L 0,300 0,310 7,62 7,87
N 0,020 0,050 0,51 1,27
P 0,360 0,400 9,14 10,16
L,J,JW SUFFIX
CERAMIC DIP PACKAGE
CASE 623-{)5
ISSUE M
13
1 NOTES:
1, DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEl.
2, LEADS WITHIN 0,13 (0,005) RADIUS OF TRUE
B POSITION AT SEATING PLANE AT MAXIMUM
~nrnnnnnnnn""TTTTTTrI2~~
MATERIAL CONDITION (WHEN FORMED
PARALLEL),
MILLIMETERS INCHES
A -----+1.1
DIM MIN MAX MIN MAX
A 31,24 32,77 1,230 1.290
B 12.70 15,49 0,500 0,610
C 4,06 5,59 0,160 0,220
D 0,41 0,51 0,016 0,020
F 1.27 1,52 0,050 0,060
G 2,64BSC 0,100BSC
J 0,20 0,30 0,008 0,012
K 3,18 4,06 0,125 0,160
L 15,24BSC 0,600 BSC
0° 15°
N 0,51 1,27 0,020 0,050
Motorola Master Selection Guide 3.1-67 Logic: Standard, Special and Programmable
24-Pln Packages
N SUFFIX
PLASTIC DIP PACKAGE
CASE 709-02 NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D),
ISSUE C SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM
MATERIAL CONDITION, IN RELATION TO
SEATING PLANE AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
MlLUMETERS INCHES
DIM MIN MAX MIN MAX
A 31.37 32.13 1.235 1.265
B 13.72 14.22 0.540 0.550
c C 3.94 5.08 0.155 0.200
D 0.36 0.56 0.014 0.022
F 1.02 1.52 0.040 0.050
G 2.54BSG O.I00BSG
H 1.65 2.03 0.065 0.080
J 0.20 0.38 0.008 0.015
H K 2.92 3.43 0.115 0.135
L 15.24 BSC 0.600BSG
M 0° 15° 0° 15°
N 0.51 1.02 0.020 0.040
P,N SUFFIX
PLASTIC DIP PACKAGE
CASE 724-03
ISSUE D
I" [±] lJ NOTES:
1. CHAMFERED CONTOUR OPTIONAL.
1~:::::::::::loo
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M,1982.
t 4. CONTROLLING DIMENSION: INCH.
INCHES MILUMETERS
~c JLJ~-,
DIM MIN MAX MIN MAX
A 1.230 1.265 31.25 32.13
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.020 0.38 0.51
. j '~M
E 0.050 BSC 1.27BSC
F 0.040 0.050 1.02 1.52
G 0.100 BSC 2.54 BSC
J 0.007 0.012 0.18 0.30
K 0.110 0.140 2.80 3.55
o 24PL 1$-1 O.25(O.010)@iTi B @I L
M
0.300 BSC
0° 15°
7.62 BSC
0° 15°
1$-1 o.25(o.010)@ITI A @I N 0.020 0.040 0.51 1.01
P,N,PW SUFFIX
PLASTIC DIP PACKAGE
p CASE 649-03 NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
ISSUE D POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
Q
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 31.50 32.13 1.240 1.265
B 13.21 13.72 0.520 0.540
C 4.70 5.21 0.185 0.205
0 0.38 0.51 0.015 0.020
F 1.02 1.52 0.040 0.080
G 2.54BSC 0.100BSG
c H 1.65 2.16 0.065 0.085
J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
L 14.99 15.49 0.590 0.610
M 10 10°
N 0.51 1.02 0.020 0.040
P 0.13 0.38 0.005 0.015
Q 0.51 0.76 0.020 0.030
Logic: Standard, Special and Programmable 3.1-68 Motorola Master Selection Guide
24-Pin Packages
OW SUFFIX
PLASTIC WIDE SOIC PACKAGE
CASE 7S1E-04
ISSUE E
NOTES:
1. OIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0,15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
JL 24X 0
r:1$"1"'=0.""'01"""0("""0.2:-: :5)-;:®: T1::1TI--:-A--;®""'IB--;®~I
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 15.25 15.54 0.601 0.612
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
=-~~
F 0.41 0.90 0.016 0.035
G 1.27BSC O.osa BSC
J 0.23 0.32 0.009 0.013
K 0.13 0.29 0.005 0.011
l T::
SEATING
PLANE -.J
I
22X G K
M
P
R
0'
10.05
0.25
8'
10.55
0.75
0'
0.395
0.010
8'
0.415
0.029
SO SUFFIX
PLASTIC SSOP PACKAGE
•
CASE 940D-03
ISSUE B
1 1--
I
24X KREF
1$10.12(0.005)®ITlu®lv®1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1982.
I B T l -W/4
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
~
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
1 1124 13 J J1 4. DIMENSION B DOES NOT INCLUDE INTERLEAD
L l - t K1-J
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
~12~
SECTIONN-N 5. DIMENSION K DOES NOT INCLUDE DAM BAR
PINl PROTRUSION/INTRUSION. ALLOWABLE
IDENT DAMBAR PROTRUSION SHALL BE 0.13 (0.005)
+---1rU A~ b 0.25(0.010)
TOTAL IN EXCESS OF K DIMENSION AT
MAXIMUM MATERIAL CONDITION. DAMBAR
INTRUSION SHALL NOT REDUCE DIMENSION K
BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL
N~~
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
L-.l...-0-'---'----'---J[±]'------'V- AT DATUM PLANE -W-.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 8.07 8.33 0,317 0.328
B 5.20 5.38 0.205 0.212
DETAILE C 1.73 1.99 0.068 0.D78
D 0.05 0.21 0,002 0.008
F 0.63 0.95 0.024 0.037
G 0.65 BSC 0.026 BSC
H 0.44 0.60 0,017 0.024
J 0.09 0.20 0.003 0.008
Jl 0.09 0.16 0.003 0.006
K 0.25 0.38 0.010 0.015
Kl 0.25 0.33 0.010 0.013
L 7.65 7.90 0.301 0.311
M 0' 8' 0' 8'
Motorola Master Selection Guide 3,1-69 Logic: Standard, Special and Programmable
24-Pin Packages
DTSUFFIX
PLASTIC TSSOP PACKAGE
CASE 948H-Q1
•
ISSUE 0
24XKREF
1
Y14.5M,1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
B MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15(0.006) PER SIDE.
8B 4. DIMENSION B DOES NOT INCLUDE INTERLEAD
1bfr=r;=rr=;=;=;=;=;=;="i"Fi"F'FF~J
FLASH OR PROTRUSION. INTERLEAD FLASH
OR PROTRUSION SHALL NOT EXCEED
0.25(0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
ri·
-T-
10 (0.004) I
SEAllNG
8
e
D
F
4.30
0.05
0.50
4.50
1.20
0.15
0.75
0.169 o.m
0.047
0.002 0.006
0.020 0.030
PLANE
G 0.65 BSC 0.026Bse
H 0.27 0.37 0.011 0.015
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
~I (t:) K1
L
rot
0.19
6.40BSC
0°
0.25
8°
0.007 0.010
0.252 Bse
0° 8°
DETAIL E..-/~
'N~~ '~:~ 1
DETAILE - ,
logic: Standard, Special and Programmable 3.1-70 Motorola Master Selection Guide
28-Pin Packages
J SUFFIX
CERAMIC DIP PACKAGE
CASE 733-04
ISSUE C
NOTES:
1. DIMENSIONS A AND S INCLUDES MENISCUS.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4. C0tffi10LLING DIMENSION: INCH.
INCHES MILLIMETERS
ruM MIN MAX MIN MAX
A 1.435 1.490 36.45 37.84
I" [±] ~I c B 0.500 0.605 12.70 15.36
;;!;.;."l~L S
C 0.160 0.230 4.06 5.84
D 0.015 0.022 0.38 0.55
F 0.050 0.065 1.27 1.65
G 0.100BSC 2.54BSC
J 0.008 0.012 0.20 0.30
K 0.125 0.160 3.18 4.06
PLANE ~
-J l!J f-G D2:PL
L
M
0.600BSC
0° 15°
15.24 SSC
0° 15°
N 0.020 0.050 0.51 1.27
1$10 o.25(o.o10)®ITI A ®I
N SUFFIX
PLASTIC DIP PACKAGE
CASE 710-02
ISSUE B
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D), SHALL
BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL
CONDITION, IN RELATION TO SEATING PLANE
AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
MILUMETERS INCHES
DIM MIN MAX MIN MAX
A 36.45 37.21 1.435 1.465
B 13.72 14.22 0.540 0.560
C 3.94 5.08 0.155 0.200
D 0.36 0.56 0.014 0.022
F 1.02 1.52 0.040 0.060
G 2.54BSC 0.100 BSC
H 1.65 2.16 0.065 0.085
J 0.20 0.38 0.008 0.015
K 2.92 3.43 0.115 0.135
L 15.24BSC 0.600 BSC
M 0° 15° 0° 15°
N 0.51 1.02 0.020 0.040
Motorola Master Selection Guide 3.1-71 Logic: Standard, Special and Programmable
28-Pin Packages
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 776-<l2
ISSUE D
~
1
if----=---;L:l
~t-t D G11$1 0.010(0.250)®ITI L-M®I N®I
VIEWD-D
~ I- F 1$10.o07(o.180)@ITIL-M®IN®1
VIEWS
1$1 0.010 (o.250)®1 TI L-M®I N®I VIEWS
Logic: Standard, Special and Programmable 3.1-72 Motorola Master Selection Guide
32-Pin Package
FA SUFFIX
PLASTIC TQFP PACKAGE
CASE 873-01
ISSUE A
17
@
'"
@
III
J:
:I:
•
<I~P
v ®
00
<>
<>
e-
<>
-l.-,~o-, -'H
'"
ci
-$- ----! -$-
DETAIL A
t
C
L±l + SECTIONB-B
VIEW ROTATED 90 ° CLOCKWISE
SEATING
PLANE
Motorola Master Selection Guide 3.1-73 Logic: Standard, Special and Programmable
40-Pin Packages
J SUFFIX
CERAMIC DIP PACKAGE
CASE 734-04
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5.1973.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND 8 INCLUDE MENISCUS.
4. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 51.31 53.24 2.020 2.096
B 12.70 15.49 0.500 0.610
C 4.06 5.84 0.160 0.230
0 0.38 0.56 0,015 0.022
F 127 1.65 0.050 0.065
G 2.54BSC 0.100BSC
J 0.20 0.30 0.008 0.012
K 3.18 4.06 0.125 0.160
L 15.24 BSC 0.600BSC
M 5° 15° 5° 15°
N 0.51 1.27 0.020 0.050
1$10 o.25(o.o10)®ITI A ® 1
N SUFFIX
PLASTIC DIP PACKAGE
CASE 711-03
ISSUEC
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D). SHALL
BE WrTHlN 0.25 (0.010) AT MAXIMUM MATERIAL
CONDITION. IN RELATION TO SEATING PLANE
AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 51.69 52.45 2.035 2.065
B 13.72 14.22 0.540 0.560
C 3.94 5.08 0.155 0.200
0 0.36 0.56 0.014 0.022
F 1.02 1.52 0.040 0.060
G 2.54BSC 0.100 BSC
H 1.65 2.16 0.065 0.085
J 0.20 0.38 0.008 0.015
K 2.2 3.43 .11 0.135
L 15.24BSC 0.600BSC
M 0° 15° 0° 15°
N 0.51 1.02 0.020 0.040
Logic: Standard, Special and Programmable 3.1-74 Motorola Master Selection Guide
48-Pin Packages
J SUFFIX
CERAMIC DIP PACKAGE
CASE 74Q-03
ISSUE B
I~: : : :1::I:::::IT
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 2.376 2.424 60.36 61.56
B 0.576 0.604 14.64 15.34
C 0.120 0.127 3.05 4.31
D 0.Q15 0.021 0.381 0.533
E 0.050 BSC 1.27BSC
F 0.030 0.055 0.762 1.397
G 0.100BSC 2.54 BSC
J 0.008 0.Q13 0.204 0.330
K 0.100 0.165 2.54 4.19
L 0.600 BSC 15.24BSC
M 0° 10° 0° 10°
N 0.040 0.060 1.016 1.524
N SUFFIX
PLASTIC DIP PACKAGE
CASE 767--02
ISSUE B
t::::::::::::::::::J +
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARAlLEL.
DETAIL X 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH. MAXIMUM MOLD FLASH 0.25 (0.010).
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 2.415 2.445 61.34 62.10
B 0.540 0.560 13.72 14.22
C 0.155 0.200 3.94 5.08
D 0.014 0.022 0.36 0.55
F 0.040 0.060 1.02 1.52
G 0.100 BSC 2.54BSC
H 0.070 BSC 1.79BSC
J 0.008 0.Q15 0.20 0.38
K 0.115 0.150 2.92 3.81
o 32PL 1$10.25(0.010)@ITIB ®I
L
M
0.600 BSC
15°
15.24 BSC
0° 15°
0°
1$10.51 (0.020)@ITI A ® 1 N n.n2n .040 0.51 1.01
Motorola Master Selection Guide 3.1-75 Logic: Standard, Special and Programmable
52-Pin Packages
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 77B-<l2
ISSUEC
B 1$1 0.007(0.18)@ITIL-M®IN®1
1 roo /YBRK D
u 1$1 0.007(0.18)@ITIL-M®IN®1
r±L ~
r t
~W
NOTES:
i:o;---------+-A 1$1 0.007(0.18)@ITIL-M®IN®1 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE
TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT
z MOLD PARTING LINE.
2. DIMENSIoN G1, TRUE POSITION TO BE MEASURED
I(;I--------oo-tt-R 1$1 0.007(0.18)@ITIL-M®IN®1 AT DATUM-T-, SEATING PLANE.
3. DIMENSIONS RAND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
c ~.004 (0.100) 1
Y14.SM,I982.
t'
J
VIEWS
-T- SEAT1NG
PLANE
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
~ H 1$10.007 (0.18)@ITIL-M® 1N® 1 THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
~
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.785 0.795 19.94 20.19
B 0.785 0.795 19.94 20.19
KDI-- F 1$1 0.007(0.18)@ITIL-M®IN®1 C
E
0.165 0.180
0.090 0.110
4.20
2.29
4.57
2.79
F 0.013 0.019 .33 0.48
VIEWS G 0.050 SSC 1.278SC
H 0.026 0.032 0.66 0.81
J 0.020 0.51
K 0.025 - 0.64 -
R 0.750 0.756 19.05 19.20
•
U 0.750 0.756 19.05 19.20
V 0.042 0.048 1.07 1.21
W 0.042 0.048 1.07 1.21
X 0.042 0.056 1.07 1.42
Y 0.020 0.50
Z 2° 10° 2° 10°
Gl 0.710 0.73 18.04 18.54
Kl 0.040 1.
Logic: Standard. Special and Programmable 3.1-76 Motorola Master Selection Guide
52-Pin Packages
FJ SUFFIX
PLASTIC PLCC PACKAGE
CASE 778B-01
ISSUE 0
~----4-A-~----~
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.SM, 1982
2. CONTROLLING DIMENSION: INCH
3. DIMENSION RAND N DO NOT INCLUDE GLASS
PROTRUSION. GLASS PROTRUSION TO BE 0.25
(0.0101 MAXIMUM.
4. ALL DIMENSIONS AND TOLERANCES INCLUDE
o
LEAD TRIM OFFSET AND LEAD FINISH
INCHES MilLIMETERS
DIM MIN MAX MIN MAX
N I-B-I A 0.785 0.795 19.94 20.19
B 0.785 0.795 19.94 20.19
C 0.165 0.200 4.20 5.08
U
0 0.017 0.021 0.44 0.53
F 0.026 0.032 0.67 0.81
G 0.050BSC 1.27 Bse
H 0.090 0.130 2.29 3.30
J 0.006 0.010 0.16 0.25
K 0.035 0.045 089 1.14
N 0.735 0.756 18.67 19.20
R 0.735 0.756 18.67 19.20
S 0.690 0.730 17.53 18.54
Motorola Master Selection Guide 3.1-77 Logic: Standard, Special and Programmable
52-Pin Packages
FA SUFFIX
PLASTIC TQFP PACKAGE
CASE 8480-03
ISSUEC
VIEWY
~~j
fl-O-J f
1-$1 O.13(O.005)@ITI L-M®I N®I
SECTION AB-AB
ROTATED 90' CLOCKWISE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M,
1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE -H-IS LOCATED AT BOTTOM OF LEAD
AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD
~--kiooooooou:~>-_Q
EXITS THE PLASTIC BODY AT THE BOTTOM OF THE
PARTING LINE.
4. DATUMS-L-,-M-AND-N- TO BE DETERMINED AT
DATUM PLANE-I+-.
~G f _d~t
6. DIMENSIONS A AND B 00 NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010)
4xe3 PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD
PLANE MISMATCH AND ARE DETERMINED AT DATUM PLANE ·H·.
7. DIMENSION 0 DOES NOT INCLUDE DAMBAR
VIEWAA PROTRUSION. DAMBAR PROTRUSION SHALL NOT
CAUSE THE LEAD WIDTH TO EXCEED 0.46 (0.018).
MINIMUM SPACE BETWEEN PROTRUSION AND
ADJACENT LEAD OR PROTRUSION 0.07 (0.003).
A1 5.00
B ).00 0.394
B1 5.00 0.19:
1.70 0.06i
0.05 0.20 0.002 0.' 08
0,20
0.46 0.75 0.018 O. GO
0.22 0.35 ).009
0.65BSC 0.02 BS'
0.07 0.20 0.003 0.008
0.50 REF 0.020 REF
12.Il!tBSC
VIEWAA
•
6.00BSC 0.236BSC
0.09 ).16 0.004 0.008
12.00 BSC 0.472 BSC
tOOBSC .23IBSC
- -
12' REF 12' REF
93 13' 13°
Logic: Standard, Special and Programmable 3.1-78 Motorola Master Selection Guide
68-Pin Package
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 779-02
ISSUE C
D G1
1$1 0.010 (0.25)®1 TI L-M®I N®I
VIEWD-D
NOTES:
1. DATUMS -l-. -M-, AND -N- DETERMINED WHERE TOP OF
lEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
z,.... $10.007(0.18)®ITIL-M®IN®1 2. DIMENSION Gl, TRUE POSITION TO BE MEASURED AT
DATUM - T-, SEATING PLANE.
3. DIMENSIONS RAND U DO NOT INCLUDE MOLD FLASH.
AllOWASlE MOLD FLASH IS 0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOlERANCING PER ANSI Y14.5M,
1982.
o
1
5. CONTROlliNG DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMAllER THAN THE
Motorola Master Selection Guide 3.1-79 Logic: Standard. Special and Programmable
Programmable Array
84-Pin Package
Tt
D X G1
1$10.010(0.25)®lrIL-M®IN®1
A VIEWD-D
1$10.007 (0.18)@lrl L-M®I N®I H 1$1 0.007(0.18)@lrIL-M®IN®1
R VIEWS
1*1 0.007(0.18)@ITI L-M®I N®I
K1
Logic: Standard, Special and Programmable 3.1-80 Motorola Master Selection Guide
Programmable Array
128-Pin Package
@
'"
@
~'
~
<D
.l:
0
v
'"N
0
®
00 DETAIL A
0 0
o
e.. C!
e-
~ '"
0
ci
0
N
ci
e- -j e- NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M,1982.
2. CONTROLLING DIMENSION: MILLIMETER
3. DATUM PLANE -H-IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS -A-, -B- AND -D-TO BE DETERMINED
AT OATUM PLANE -H-.
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE -C-.
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS
0.25 (0.010) PER SIDE. DIMENSIONS A AND B DO
INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE -H-.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION. DAM BAR CANNOT BE
LOCATED ON THE LOWER RADIUS OF THE
FOOl
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 27.90 28.10 1.098 1.106
B 27.90 28.10 1.098 1.106
C 4.07 0.160
H D 0.30 0.45 0.012 0.018
E 3.17 3.67 0.125 0.144
F 0.30 OAO 0.012 0.016
G 0.80 BSC 0.032 BSC
H 0.25 0.35 0.010 0.014
J 0.13 0.23 0.005 0.009
L~~
K 0.65 0.95 0.026 0.037
L 24.80 REF 0.976 REF
M 5° 16° 5° 16°
N 0.13 0.17 0.005 0.007
J N P OAOBSC 0.016BSC
Q Q 0° 7° 0° 7°
t l- -J'1"
D ~~~L
R
S
T
U
0.13 0.30
30.95 31.45
0.13
0°
0.005 0.012
1.219 1.238
0.005
0°
Ie-I o.20(o.o08)@ICI A-B ®ID ®I W
V 30.95
0.40
31.45 1.219 1.238
0.016
X 1.60 REF 0.063 REF
DETAILB DETAILC Y 1.60 REF 0.063 REF
Z 1.60 REF 0.063 REF
Motorola Master Selection Guide 3.1-81 LogiC: Standard, Special and Programmable
Programmable Array
160-Pin Package
1-1-- - - L----+l,,1 I
---------------y
8 8
Cl Cl
8 8
en en
..!: ..!:
:r: en <.)
® ..!: V ®
00
0
0
~ 00
0
C! 0
2- s 2-
0 0 0
'"
0
"! '"
-$ --j -$
DETAIL A
SECTION 8-8
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 27.90 28.10 1.098 1.106
NOTES: B 27.90 28.10 1.098 1.106
1. DIMENSIONING AND TOLERANCING PER ANSI C 3.35 3.85 0.132 0.152
Y14.5M,1982. D 0.22 0.38 0.009 0.Q15
2. CONTROLLING DIMENSION: MILLIMETER. E 3.20 3.50 0.126 0.138
3. DATUM PLANE -H-IS LOCATED AT BonOM OF F 0.22 0.33 0.009 0.013
LEAD AND IS COINCIDENT WITH THE LEAD G 0.65BSC 0.026 REF
WHERE THE LEAD EXITS THE PLASTIC BODY AT H 0.25 0.35 0.010 0.014
THE BonOM OF THE PARTING LINE. 0.11 0.004
J 0.23 0.009
4. DATUMS -A-, -B- AND -0- TO BE DETERMINED
AT DATUM PLANE -H-. K 0.70 0.90 0.028 0.035
5. DIMENSIONS S AND V TO BE DETERMINED AT L 25.35 REF 0.998 REF
SEATING PLANE -C-. M 5° 16° 5° 16°
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD N 0.11 0.19 0.004 0.007
PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 P 0.325 BSC 0.013BSC
(0.010) PER SIDE. DIMENSIONS A AND B DO Q 0° 7° 0° 7°
INCLUDE MOLD MISMATCH AND ARE R 0.13 0.30 0.005 0.012
DETERMINED AT DATUM PLANE -H-. S 31.00 31.40 1.220 1.236
7. DIMENSION D DOES NOT INCLUDE DAMBAR T 0.13 0.005 -
PROTRUSION. ALLOWABLE DAM BAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
U 0° - 0° -
V 31.00 31.40 1.220 1.236
EXCESS OF THE D DIMENSION AT MAXIMUM W 0.40 0.016
MATERIAL CONDITION. DAMBAR CANNOT BE X 1.60 REF 0.063 REF
LOCATED ON THE LOWER RADIUS OR THE FOOT. y
DETAILC 1.33 REF 0.052 REF
Z 1.33 REF 0.052 REF
Logic: Standard, Special and Programmable 3.1-82 Motorola Master Selection Guide
Programmable Array
181-Pin Package
• • ~
PIN GRID ARRAY PACKAGE
CASE 795A-02
ISSUE A
'"
'" •
'"
'" ",
. / 1 111
~"
"
"
"
NOTES:
1. DIMENSIONING AND TOLERANCING PER
4X F ANSI Y14.5M. 1982.
2. CONTROLLING DIMENSION: INCH.
3. MARKING SHOWN FOR INFORMATION ONLY.
G NOT ON ACTUAL PART.
T @@@@@@@@@@@@@@
INCHES MILUMETERS
R @@@@@@@@@@@@@@@
P @@@@@@@@@@@@@@@@
DIM MIN MAX MIN MAX
N @@@ @@@@@@ @@@
G A 1.640 1.680 41.66 42.67
M @@@
B 1.640 1.680 41.66 42.67
L @@@@
C 0.088 0.112 2.24 2.84
INPVSS K @@@@
D 0.017 0.019 0.43 0.48
INrZ2f F 0.043 0.057 1.09 1.45
r.z:;3 J @@@@
IZ2I ~ H
G
@@@@ + G
K
0.100BSC
0.163 0.197
2.54 BSC
4.14 5.00
OUTV D I pvss @@@@
L 0.025 0.039 0.64 0.99
F @@@@
M 0.700 0.720 17.78 18.29
E @ @ @ 1----+---' -..@.."'-'4-L N 0.095 0.105 2.41 2.67
D @@@@ @)@@@@@ @@)@
1
C @@@@@@@@@@@@@@@@
P 0.035 0.045 0.89 2.41
B @@@@@@@@@@@@@@@@
R 1.095 1.105 27.81 28.07
A [;J@@@@@@@@@@@@@@@
S 0.195 0.205 4.95 5.21
1 2 3 4 5 6 7 8 9 10 12 14 16
181X D
SIj,A~~ -T- 101 o.014(o.36)@ITI A CDI B CD I
Motorola Master Selection Guide 3.1--83 Logic: Standard, Special and Programmable
Programmable Array
208-Pin Package
Yll ..
1+------ L.------~
15
~~ ~~~~~
NOTES:
1. DIMENSIONING AND TOlERANCING PER ANSI
Y14.SM.1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE -H-IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE LEAD
e
Cl
e
Cl
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS -p.-. -B- AND -D- TO BE DETERMINED
AT DATUM PLANE -H-.
® 0 5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE-o-.
'"
.l: '"
.l: 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS
::t: (.)
® ~
V 0.25 (0.010) PER SIDE. DIMENSIONS A AND B
® DO INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE-H-.
00 N 00
L.
0 0 0 7. DIMENSION D DOES NOT INCLUDE DAMBAR
0 0 0
PROTRUSION. DAMBAR PROTRUSION SHALL
e. e.
0
e.
0
NOT CAUSE THE D DIMENSION TO EXCEED
0 '"
0.38(0.015).
'" 0
0
'"
0
MlLJ.IMmRS INCHES
-$ -1 -$ DIM MIN MAX MIN MAX
A 27.90 28.10 1.098 1.108
53 B 27.90 28.10 1.098 1.106
flijnmiiiiiiiiliiiiiiiiiinJiiiiiiiiiiiiiiiiiiiiiiiiiifl C
D
3.45
0.14
4.10
0.30
0.136
O.OOS
0.161
0.012
52 E 3.20 3.60 1.126 0.142
z F 0.14 0.26 0.005 0.010
G O.SOBSC 0.020 Bse
H 0.25 0.35 0.010 0.014
J 0.09 0.20 0.003 o.oOB
K 0.70 0.90 0.027 0.036
L 25.50 REF 1.004 REF
M 5° 9° 5° 9°
N 0.09 0.18 0.003 0.007
P O.25BSC 0.010BSC
s R
Q 0°
0.13
7°
0.30
0°
O.OOS
7°
0.012
1$1 0.20(0.008)@I CIA-B® 1D®I S 31.00 31.40 1.220 1.236
T 0.13 0.005
U 0° - 0° -
jltJ.
M ZDETAILC V 31.00 31.40 1.220 1.236
~tIll~
W 0.40 0.016
X 1.60 REF 0.063 REF
E --U3B Y 1.25 REF 0.049 REF
Logic: Standard, Special and Programmable 3.1-84 Motorola Master Selection Guide
Programmable Array
224-Pin Package
A
I-A I
-,Kr
11C-~
F4PL G
........
.•......
NOTES:
.......
....... ..
1. DIMENSIONING AND TOLERANCING PER ANSI
r
YI4.5M,1982 .
2. CONTROLLING DIMENSION: INCH .
r G
D u1
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
B A 1.726 1.744 43.84 44.30
I-B-I M B
C
1.726 1.744
0.095 0.120
43.84 44.30
2.41 3.05
D 0.018 0.46
.•..... ......•. K
L
G 0.100BSC
0.283 0.339
0.043 0.057
2.54BSC
7.19
1.09
8.61
1.45
M 0.665 0.885 21.97 22.48
N 0.080 0.100 2.03 2.54
Programmable Array
299-Pin Package
A NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
A YI4.5M,1982.
G 2. CONTROLLING DIMENSION: INCH.
000000000000000000' INCHES MILLIMETERS
0000000000000000000
00000000000000000000 DIM IIIN MAX MIN MAX
00000000000000000000 G A 2.040 2.060 51.62 52.83
~~~~~D0000000000~~~~~
B 2.040 2.060 51.82 52.83
C 0.110 0.140 2.80 3.55
00000 00000 D 0.017 0.019 0.43 0.48
00000 00000 G 0.100 BSC 2.54 BSC
m[~
00000 00000
00000 00000 L 0.150 0.170 3.81 4.31
00000 0@000
00000 00000
00000 00000
00000' 00000
PINA1~
00000000000000000000
INDICATOR 00000000000000000000
Motorola Master Selection Guide 3.1-85 Logic: Standard, Special and Programmable
Packaging Information
Surface Mount
Why Surface Mount? stacked closer together and utilize less total volume than
insertion populated PC boards.
Surface Mount Technology is utilized to offer answers to
Printed circuit costs are lowered with the reduction of the
many problems that have been created in the use of insertion
number of board layers required. The elimination or reduction
technology.
of the number of plated through holes in the board, contributes
Limitations have been reached with insertion packages
significantly to lower PC board prices.
and PC board technology. Surface Mount Technology
Automatic placement equipment is available that can place
offers the opportunity to continue to advance the state-
Surface Mount components at the rate of a few thousand per
of-the-art designs that cannot be accomplished with
hour to hundreds of thousands of components per hour.
Insertion Technology.
Surface Mount Technology is cost effective, allowing the
Surface Mount Packages allow more optimum device
manufacturer the opportunity to produce smaller units and/or
performance with the smaller Surface Mount configuration.
offer increased functions with the same size product.
Internal lead lengths, parasitic capacitance and inductance
Surface Mount assembly does not require the preparation
that placed limitations on chip performance have been
of components that are common on insertion technology lines.
reduced.
Surface Mount components are sent directly to the assembly
The lower profile of Surface Mount Packages allows more
line, eliminating an intermediate step.
boards to be utilized in a given amount of space. They are
Conversion Tables
8PIN DIP 8
20 PIN PLCC 20
14 PIN DIP 14
20 PIN PLCC 20
16 PIN DIP 16
20 PIN PLCC 20
20 PIN DIP 20
20 PIN PLCC 20
24 PIN DIP 24
28 PIN PLCC 28
• The MC1648 has a Non-Standard Conversion Table. For more information, refer to the Motorola MECL Data Book, DL 12210.
Logic: Standard, Special and Programmable 3.1-86 Motorola Master Selection Guide
Tape and Reel
Logic Integrated Circuits
Motorola's tape and reel packaging fully conforms to the latest EIA RS-481 A specification. The antistatic embossed tape pro-
vides a secure cavity sealed with a peel-back cover tape.
Mechanical Polarization
Typical
PLCC Devices
View from
tape side
.
Linear direction of travel
Typical
sOle Devices I I
I I I I I I I I
0-0-0-0-0-0-0-0
'99lB ' .
View from
tape side
General Information
-Reel Size 13 inch (330 mm) Suffix: R2 - Units/Reel 500 to 5000 (see table)
-Tape Width 12 mm to 24 mm (see table)
Ordering Information
To order devices which are to be delivered in Tape and Reel, add the suffix R2 to the device number being ordered.
Motorola Master Selection Guide 3.1-87 Logic: Standard, Special and Programmable
Logic Literature Listing
For additional information, refer to the following Motorola Logic Documents, available through
the Literature Distribution Center.
DATA BOOKS
BR13331D ....................... Timing Solutions
BR13341D ....................... High Performance Frequency Control Products
BR133S/D ....................... low Voltage logic
BR1339/D ....................... lCX Data
Dl121/D .. .. . .. .. . .. . . .. .. . .. . ... FAST and lS TTL Data
Dl1221D . .. .. . .. .. . .. . . . .. .. .. ... MECl Data
DL129/D . .. .. . . . .. . .. . . .. . .. .. ... High-Speed CMOS Data
DL131/D ......................... CMOS logic Data
DL138/D .. . .. .. .. .. .. .. .. . .. .. ... FACT Data
Dl140/D . . . . . . . . . . . . . . . . . . . . . . . .. High Performance ECl Data - ECLinPS and ECLinPS Lite
Dl2011D . . . . . . . . . . . . . . . . . . . . . . . .. MPA - Motorola Programmable Arrays
DESIGN HANDBOOKS
HB20SID ........................ MECl Systems Design Handbook
APPLICATION NOTES
AN1091/D low Skew Clock Drivers and Their System DeSign Considerations
AN1092/D Driving High Capacitance DRAMs in an ECl System
AN1400/D H64x Clock Driver 1/0 SPICE Modelling Kit
AN1401/D Using SPICE to Analyze the Effects of Board Layout on System
Skew When DeSigning With the MC10/100640 Family of Clock Drivers
AN1402/D MC10/100H600 Translator Family 1/0 SPICE Modelling Kit
AN1403/D FACT'M 1/0 Model Kit
AN1404/D ECLinPSTM Circuit Performance at Non-Standard VIH levels
AN140S/D ECl Clock Distribution Techniques
AN1406/D DeSigning With PECl (ECl at +S.OV)
AN1407/D Performance Testing With the AlExlS™ Mini-Evaluation Boards
AN1408/D Power Dissipation for Active SCSI Terminators
AN1410/D Configuring and Applying the MCS4174HC4046A Phase-locked loop
AN1S03lD ECLinPSTM 1/0 SPICE Modelling Kit
AN1S04/D Metastability and the ECLinPSTM Family
OTHER DOCUMENTATION
SG36S/D ........................ Timing Solutions Folder Selector Guide
BR1341/D ....................... Motorola Programmable Array Update Folder
MFAX: RMFAXO@email.sps.mol.com- TOUCHTONE (602) 244-6609 HONG KONG: Motorola Semiconductors H.K. Lid.; 8B Tai Ping Industrial Park.
INTERNET: http://Design-NET.com 51 ling Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
Logic: Standard, Special and Programmable 3.1--88 Motorola Master Selection Guide
Analog and Interface
Integrated Circuits
In Brief ...
Motorola Analog and Interface Integrated Circuits cover a Page
Amplifiers and Comparators ..................... 4.1-1
much broader range of products than the traditional op amps/
Power Supply Circuits. . . . . . . . . . . . . . . . . . . . . . . . . .. 4.2-1
regulators/consumer-image associated with Analog suppli-
Power/Motor Control Circuits . . . . . . . . . . . . . . . . . . . .. 4.3-1
ers. Analog circuit technology currently influences the design
Voltage References . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.4-1
and architecture of equipment for all major markets. As with
Data Conversion ............................... 4.5-1
other integrated circuit technologies, Analog circuit design
Interface Circuits ............................... 4.6-1
techniques and processes have been continually refined and
Communication Circuits ......................... 4.7-1
updated to meet the needs of these diversified markets.
Consumer Electronic Circuits .................... 4.8-1
Operational amplifiers have utilized JFET inputs for
Automotive Electronic Circuits .................... 4.9-1
improved performance, plus innovative design and trimming
Other Analog Circuits .......................... 4.10-1
concepts have evolved for improved high performance and
Tape and Reel Options ......................... 4.11-1
precision characteristics. In analog power ICs, basic voltage
regulators have been refined to include higher current and
voltage levels, low dropout regulators, and more precise
three-terminal fixed and adjustable voltages. The power area
continues to expand into switching regulators, power supply
control and supervisory Circuits, motor controllers, and battery
charging controllers.
Analog designs also offer a wide array of line drivers,
receivers and transceivers for many of the EIA, European,
IEEE and IBM interface standards. Peripheral drivers for a
variety of devices are also offered. In addition to these key
interface functions, hard disk drive read channel circuits,
1OBASE-T and Ethernet circuits are also available.
In Data Conversion, a high performance video speed flash
converter is available, as well as a variety of CMOS and
Sigma-Delta converters. Analog circuit technology has also
provided precision low-voltage references for use in Data
Conversion and other low temperature drift applications.
A host of special purpose analog devices have also been
developed. These circuits find applications in telecommunica-
tions, radio, television, automotive, RF communications, and
data transmission. These products have reduced the cost of
RF communications, and have provided capabilities in tele-
communications which make the telephone line convenient
for both voice and data communications. Analog develop-
ments have also reduced the many discrete components
formerly required for consumerfunctions to a few IC packages
and have made significant contributions to the rapidly growing
market for electronics in automotive applications.
The table of contents provides a perspective of the many
markets served by Analog/Interface ICs and of Motorola's
involvement in these areas. © MOTOROLA INC., 1996
Motorola Master Selection Guide 4.0-1 Analog and Interface Integrated Circuits
Analog and Interface Integrated Circuits 4.0-2 Motorola Master Selection Guide
Amplifiers and Comparators
In Brief ...
For over two decades, Motorola has continually refined Page
Operational Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . .. 4.1-2
and updated integrated circuit technologies, analog circuit
Single ...................................... 4.1-2
design techniques and processes in response to the needs
Dual ....................................... 4.1-3
of the marketplace. The enhanced performance of newer
Quad ....................................... 4.1-4
operational amplifiers and comparators has come through
High Frequency Amplifiers ................. '" ... 4.1-5
innovative application of these technologies, designs and
AGC ....................................... 4.1-5
processes. Some early designs are still available but are
Miscellaneous Amplifiers ........................ 4.1-6
giving way to the new, higher performance operational
Bipolar ..................................... 4.1-6
amplifier and comparator circuits. Motorola has pioneered in
CMOS ..................................... 4.1-6
JFET inputs, low temperature coefficient input stages, Miller
Comparators ................................... 4.1-7
loop compensation, all NPN output stages, dual-doublet
Single ...................................... 4.1-7
frequency compensation and analog "in-the--package"
Dual ....................................... 4.1-7
trimming of resistors to produce superior high performance
Quad ....................................... 4.1-7
operational amplifiers and comparators, operating in many
Package Overview ............................. 4.1-8
cases from a single supply with low input offset, low noise,
low power, high output swing, high slew rate and high
gain-bandwidth product at reasonable cost to the customer.
Present day operational amplifiers and comparators find
applications in all market segments including motor controls,
instrumentation, aerospace, automotive, telecommunications,
medical, and consumer products.
General Purpose
Precision
General Purpose
Internally Compensated
Commercial Temperature Range (O°C to +70°C)
LF351 200pA 10 10 100pA 25 4.0 13 ±5.0 ±18 JFETlnput Nl626. D1751
LF411C 200pA 2.0 10 100pA 25 8.0 25 +5.0 ±22 JFET Input. Low Offset. Nl626. D1751
Low Drift
LF441C 100pA 5.0 10 50pA 25 2.0 6.0 ±5.0 ±18 Low Power, JFET Input Nl626, D1751
LM11C 100pA 0.6 2.0 10pA 250 1.0 0.3 ±3.0 ±20 Precision N/626
LM11CL 200pA 5.0 3.0 25pA 50 1.0 0.3 ±3.0 ±20 Precision N/626
MC1436, C 0.04 10 12 10 70 1.0 2.0 ±15 ±34 High Voltage P1/626, D1751
MC1741C. 0.5 6.0 15 200 20 1.0 0.5 ±3.0 ±18 General Purpose Pl/626, D1751
MC1776C 0.003 6.0 15 3.0 100 1.0 0.2 ±1.2 ±18 IiPower, Programmable P1/626, D1751
MC3476 0.05 6.0 15 25 50 1.0 0.2 ±1.5 ±18 Low Cost, P1/626
IiPower, Programmable
MC34001 200pA 10 10 100pA 25 4.0 13 ±5.0 ±18 JFET Input P/626, D1751
MC340018 200pA 5.0 10 100pA 50 4.0 13 ±5.0 ±18 JFET Input P/626, D1751
MC34071 0.5 5.0 10 75 25 4.5 10 +3.0 +44 High Performance P/626, D1751
MC34071A 500 nA 3.0 10 50 50 4.5 10 +3.0 +44 Single Supply P/626, D1751
MC340808 200pA 1.0 10 100pA 25 16 55 ±5.0 ±22 Decompensated P/626, D1751
MC340818 200pA 1.0 10 100pA 25 8.0 30 ±5.0 ±22 High Speed, JFET Input P/626, D1751
MC34181 0.1 nA 2.0 10 0.05 25 4.0 10 ±2.5 ±18 Low Power, JFET Input P/626
TL071AC 200pA 6.0 10 50pA 50 4.0 13 ±S.O ±18 Low Noise, JFET Input P/626, D1751
TL071C 200pA 10 10 50pA 25 4.0 13 ±5.0 ±18 Low Noise, JFET Input P/626, D1751
TL081AC 200pA 6.0 10 100pA 50 4.0 13 ±S.O ±18 JFET Input P/626, D1751
TL081C 400pA 15 10 200pA 25 4.0 13 ±5.0 ±18 JFET Input P/626, D1751
Automotive Temperature Range (-40°C to +85°C)
MC33071 0.5 5.0 10 75 25 4.5 10 +3.0 +44 High Performance P/626, D1751
MC33071A 500nA 3.0 10 50 50 4.5 10 +3.0 +44 Single Supply P/626, D1751
MC33171 0.1 4.5 10 20 50 1.8 2.1 +3.0 +44 Low Power, Single Supply P/626, D1751
MC33181 0.1 nA 2.0 10 0.05 25 4.0 10 ±2.5 ±18 Low Power, JFET Input P/626, D1751
Low V Rail-ta-RaW"
1 MC33201 1400 nA 1 9.0 1 2.0 1 200 50 2.2 1.0 1 ±O.9 1 ±6.0 1 Low V Rail-ta-RaiIT" P/626. D1751
Analog and Interface Integrated Circuits 4.1-2 Motorola Master Selection Guide
Table 2. Dual Operational Amplifiers
Supply
BW SR
Voltage
liB VIO TCVIO 110 Avol (Av=1) (Av= 1)
(V)
(IlA) (mV) (IlV/'C) (nA) (V1mV) (MHz) (V/IlS) Suffix!
Device Max Max Typ Max Min Typ Typ Min Max Description Package
Internally Compensated
Commercial Temperature Range (O'C to +70'C)
LF353 200pA 10 10 100pA 25 4.0 13 ±5.0 ±18 JFET Input N/626, 0/751
LF412C 200pA 3.0 10 100pA 25 4.0 13 +5.0 ±18 JFET Input, Low Offset, N/626, 0/751
LowOrift
LF442C 100pA 5.0 10 50pA 25 2.0 6.0 ±5.0 ±18 Low Power, JFET Input N/626
LM358 0.25 6.0 7.0 50 25 1.0 0.6 ±1.5 ±18 Single Supply, N/626, 0/751
+3.0 +36 Low Power Consumption
LM833 1.0 5.0 2.0 200 31.6 15 7.0 +2.5 ±18 Low Noise, Audio N/626, 0/751
MCIMCTI458 0.5 6.0 10 200 20 1.1 0.8 ±3.0 ±18 Oual MCI741 P1I626,
0/751
MC1458C 0.7 10 10 300 20 1.1 0.8 ±3.0 ±18 General Purpose P1I626,
0/751
MC3458 0.5 10 7.0 50 20 1.0 0.6 ±1.5 ±18 Split Supplies, P1/626,
+3.0 +36 Single Supply, 0/751
Low Crossover Oistortion
MC4558AC 0.5 5.0 10 200 50 2.8 1.6 ±3.0 ±22 High Frequency P1/626
MC/MCT4558C 0.5 6.0 10 200 20 2.8 1.6 ±3.0 ±18 High Frequency P1/626,
0/751
MC34002 100 pA 10 10 100pA 25 4.0 13 ±5.0 ±18 JFET Input P/626, 0/751
MC34002B 100 pA 5.0 10 70pA 25 4.0 13 ±5.0 ±18 JFET Input P/626, 0/751
MC34072 0.5 5.0 10 75 25 4.5 10 +3.0 +44 High Performance P/626, 0/751
MC34072A 500 nA 3.0 10 50 50 4.5 10 +3.0 +44 Single Supply P/626, 0/751
MC34082 200pA 3.0 10 100pA 25 8.0 30 ±5.0 ±22 High Speed, JFET Input P/626
MC34083B 200pA 3.0 10 100pA 25 16 55 ±5.0 ±22 Oecompensated P/626
MC34182 0.1 nA 3.0 10 0.05 25 4.0 10 ±2.5 ±18 Low Power, JFET Input P/626, 0/751
TL062AC 200pA 6.0 10 100 pA 4.0 2.0 6.0 ±2.5 ±18 Low Power, JFET Input P/626, 0/751
TL062C 200pA 15 10 200pA 4.0 2.0 6.0 ±2.5 ±18 Low Power, JFET Input P/626, 0/751
TL072AC 200pA 6.0 10 50pA 50 4.0 13 ±S.O ±18 Low Noise, JFET Input P/626, 0/751
TL072C 200pA 10 10 50pA 25 4.0 13 ±5.0 ±18 Low Noise, JFET Input P/626, 0/751
TL082AC 200pA 6.0 10 100pA 50 4.0 13 ±5.0 ±18 JFET Input P/626, 0/751
TL082C 400pA 15 10 200pA 25 4.0 13 ±S.O ±18 JFET Input P/626, 0/751
Motorola Master Selection Guide 4.1-3 Analog and Interface Integrated Circuits
Table 2. Dual Operational Amplifiers (continued)
Supply
BW SR
Voltage
liB VIO TCVIO 110 Avol (Av=l) (Av=l)
(V)
(J.IA) (mV) (!lVrC) (nA) (VlmV) (MHz) (V/IlS) Suffix!
Device Max Max Typ Max Min Typ Typ Min Max Description Package
Extended Automotive Temperature Range (-40°C to +1 OSOC)
MC33202 250nA 11 2.0 100 50 2.2 1.0 ±0.9 ±6.0 Low V Rail-te-RaW" P/626,On51
MC33206 Rail-te-RaUTM P/646,
with Enable On51A
Power Op Amp,
Single Supply
1MC33202 1400 pA 1 11 1 2.0 1200 pA 1 50 2.2 1.0 1 ±0.9 1 ±6.0 1 Low V Rail-te-Rail™ 1 P/626, On51 1
Internally Compensated
Commercial Temperature Range (DOC to +70°C)
LF347 200pA 10 10 100pA 25 4.0 13 ±5.0 ±18 JFET Input N/646
LF347B 200pA 5.0 10 100pA 50 4.0 13 ±5.0 ±18 JFETlnput N/646
LF444C 100pA 10 10 50pA 25 2.0 6.0 ±5.0 ±18 Low Power, JFET Input N/646, Dn51A
LM324, A 0.25 6.0 7.0 50 25 1.0 0.6 ±1.5 ±16 Low Power N/646, Dn51A
+3.0 +32 Consumption
LM348 0.2 6.0 - 50 25 1.0 0.5 ±3.0 ±18 Quad MC1741 N/646, Dn51A
LM3900 +3.0 +36
MC3403 0.5 10 7.0 50 20 1.0 0.6 ±1.5 ±18 No Crossover P/646, Dn51A
+3.0 +36 Distortion
MC4741C 0.5 6.0 15 200 20 1.0 0.5 ±3.0 ±18 Quad MC1741 P/646, Dn51A
MC34004 200pA 10 10 100pA 25 4.0 13 ±5.0 ±18 JFET Input P/646
MC34004B 200pA 5.0 10 100pA 50 4.0 13 ±5.0 ±18 JFET Input P/646
MC34074 0.5 5.0 10 75 25 4.5 10 +3.0 +44 High Performance P/646, Dn51A
MC34074A 500 nA 3.0 10 50 50 4.5 10 +3.0 +44 Single Supply P/646, Dn51A
MC34084 200pA 12 10 100pA 25 8.0 30 ±S.O ±22 High Speed, JFET Input P/646,
DWn51G
MC34085B 200pA 12 10 100pA 25 16 55 ±5.0 ±22 Decompensated P/646,
DWn51G
MC34184 0.1 nA 10 10 0.05 25 4.0 10 ±2.5 ±18 Low Power, JFET Input P/646, Dn51A
TL064AC 200pA 6.0 10 100 pA 4.0 2.0 6.0 ±2.5 ±18 Low Power, JFET Input N/646, Dn51A
TL064C 200pA 15 10 200pA 4.0 2.0 6.0 ±2.5 ±18 Low Power, JFET Input N/646, Dn51A
TL074AC 200pA 6.0 10 50pA 50 4.0 13 ±5.0 ±18 Low Noise, JFET Input N/646
TL074C 200pA 10 10 50pA 25 4.0 13 ±5.0 ±18 Low Noise, JFET Input N/646
TL084AC 200pA 6.0 10 100 pA 50 4.0 13 ±5.0 ±18 JFET Input N/646
TL084C 400pA 15 10 200pA 25 4.0 13 ±5.0 ±18 JFETlnput N/646
Split Supplies or
Single Supply
Automotive Temperature Range (-40°C to +85°C)
LM2902 0.5 10 - 50 - 1.0 0.6 ±1.5 ±13 Differential Low Power N/646, Dn51A
+3.0 +26
MC33011 0.3 - - - 1.0 4.0 0.6 ±2.0 ±15 Norton Input P/646
LM2900 +4.0 +28 N/646
MC3303 0.5 8.0 10 75 20 1.0 0.6 ±1.5 ±18 Differential P/646, Dn51A
+3.0 +36 General Purpose
MC33074 0.5 4.5 10 75 25 4.5 10 +3.0 +44 High Performance, P/646,On51A
Single Supply
MC33074A 500nA 3.0 10 50 50 4.5 10 +3.0 +44 High Performance P/646, Dn51A
Analog and Interface Integrated Circuits 4.1-4 Motorola Master Selection Guide
Table 3. Quad Operational Amplifiers (continued)
BW SR Supply
Voltage
liB VIO TCVIO 110 Avol (Av=l) (Av = 1)
(mV) (IlVlOC) (nA) (VlmV) (MHz) (VlIlS) (V) Suffix!
(IJA)
Device Max Max Typ Max Min Typ Typ Min Max Description Package
MC33079 750nA 2.5 2.0 150 31.6 9.0 7.0 ±5.0 ±18 Low Noise N/646,O/751A
MC33174 0.1 4.5 10 20 50 1.8 2.1 +3.0 +44 Low Power, Single P/646,O/751A
Supply
MC33179 0.5 3.0 2.0 50 50 5.0 2.0 ±2.0 ±18 High Output Current P/646,O/751A
MC33184 0.1 nA 10 10 0.05 25 4.0 10 ±2.5 ±18 Low Power, JFET Input P/646,O/751A
MC33274A 650nA 1.0 0.56 25 nA 31.6 5.5 11.5 ±1.5 ±18 High Performance P/646,O/751A
MC33284 100pA 2.0 5.0 50pA 50 30 12 ±2.5 ±18 Low Input, Offset JFET P/646,O/751A
TL064V 200pA 9.0 10 100 pA 4.0 2.0 6.0 ±2.5 ±18 Low Power, JFET Input N/646,O/751A
Extended Automotive Temperature Range (-40°C to +1 OSOC)
MC33204 250 nA 13 2.0 100 50 2.2 1.0 ±0.9 ±6.0 Low V Rail-to--RajITM P/646,O/751A
MC33207 50 2.2 ±D.9 ±6.0 RaiHo--Rail™ wHh Enable P/648,O/751B
MC33304 25 3.0 +1.8 +12 Sleepmode, P/646,O/751A
Raii-to--RaiITM
Military Temperature Range (-SSOC to +12S0C)
1MC33204 1400 pA 1 13 1 2.0 1200 pA 1 50 2.2 1.0 1 ±D.9 1 ±6.0 1 Low V Raii-to--Rail™ 1P/646, 0/751A 1
Motorola Master Selection Guide 4.1-5 Analog and Interface Integrated Circuits
Miscellaneous Amplifiers
Motorola provides several Bipolar and CMOS special range from low power CMOS programmable amplifiers and
purpose amplifiers which fill specific needs. These devices comparators to variable-gain bipolar power amplifiers.
MC3405
Dual Operational Amplifier and Output 1
Dual Voltage Comparator
Inputs 1 {
This device contains two Differential Input Operational
Amplifiers and two Comparators; each set capable of single
supply operation. This operational amplifier--comparator
Vee
circuit will find its applications as a general purpose product for
automotive circuits and as an industrial "building block." Inputs 2 {
Output 2
Table 5. Bipolar
liB VIO 110 Avol Response Supply Voltage
(jiA) (mY) (nA) (VlmV) (I1S ) Suffix!
Device Max Max Max Min Typ Single
J Dual Package
MC14573
Quad Programmable Operational Amplifier
MC14575
Dual Programmable Operational Amplifier and Dual Programmable Comparator
MC14576BIMC14577B
Dual Video Amplifiers
Table 6. CMOS
Quantity Single Supply Dual Supply Suffix!
Function Per Package Voltage Range Voltage Range Frequency Range Device Package
Operational Amplifiers 4 3.0 to 15 V ±1.5 to ±7.5 V OCto 1.0 MHz MC14573 P/648,0/7516
Operational Amplifiers 2and2 3.0 to 15 V ±1.5 to ±7.5 V OCto 1.0 MHz MC14575 P/648,0/7516
and Comparators
Video Amplniers 2 5.0 to 12V(1) ±2.5 to ±6.0 v(2) Up to 10MHz MC14576C P/626, F/904
MC14577C
(1) 5.0 to 10 V for surface mount package.
(2) ±2.5 to ±5.0 V for surface mount package.
Analog and Interface Integrated Circuits 4.1-6 Motorola Master Selection Guide
Comparators
Table 7. Single Comparators
liB VIO 110 AV 110 Response Supply Temperature
(JlA) (mV) (JlA) (VN) (mA) Time Voltage Range Suffix!
Device Max Max Max Typ Min (ns) (V) Description (OC) Package
Bipolar
LM211 0.1 3.0 0.01 200 k 8.0 200 +15,-15 With strobe, will operate -25 to +85 D/751
LM311 0.25 7.5 0.05 from single supply o to +70 N/626,
D/751
CMOS
Requires only 10 J.LA from
single-ended supply
Bipolar
LM293 0.25 5.0 0.05 200 k 6.0 1300 ±1.5 to ±18 Designed for single or split -25 to +85 N/626,
LM393 5.0 1300 or supply operation, input Oto +70 D/751
LM393A 2.0 1300 3.0 to 36 common mode includes o to +70
LM2903 7.0 1500 ground (negative supply) -40 to +105
MC3405 0.5 10 0.05 200 k 6.0 1300 ±1.5to±7.5 This device contains 2 op Oto +70 P/646
or amps and 2 comparators in
3.0 to 15 a single package
CMOS
MC14575 0.001 30 0.0001 2.0 k 3.0 1000 ±1.5to ±7.5 This device contains 2 op -40 to +85 P/648,
or amps and 2 comparators in D/751B
3.0 to 15 a single package
Bipolar
LM239 0.25 5.0 0.05 200 k 6.0 1300 ±1.5 to±18 Designed for single or split -25 to +85 N/646,
LM239A 2.0 200 k or supply operation, input -25 to +85 D/751 A
LM339 5.0 200 k 3.0 to 36 common mode includes Oto +70
LM339A 2.0 200 k ground (negative supply) Oto +70
LM2901 7.0 100 k -40 to +85
MC3302 0.5 20 0.5 30 k -40 to +85 P/646
MC3430 40 6.0 1.0 Typ 1.2 k 16 33 +5.0,-5.0 High speed comparator/ Oto +70 P/648
MC3431 10 33 sense amplifier
MC3432 6.0 40
MC3433 10 40
CMOS
MC14574 0.001 30 0.0001 2.0 k 3.0 1000 ±1.5 to ±7.5 Externally programmable -40 to +85 P/648,
or power dissipation with 1 or D/751B
3.0 to 15 2 resistors
Motorola Master Selection Guide 4.1-7 Analog and Interface Integrated Circuits
Amplifiers and Comparators Package Overview
~CASE 626
N, P, P1 SUFFIX
•CASE 646
N, PSUFFIX
-CASE 648, 648C
DP2, P, P2 SUFFIX
•
CASE 751G
DWSUFFIX
•
CASE 904
FSUFFIX
Analog and Interface Integrated Circuits 4.1-8 Motorola Master Selection Guide
Power Supply Circuits
In Brief ...
In most electronic systems, some form of voltage Page
regulation is required. In the past, the task of voltage Linear Voltage Regulators ....................... 4.2-2
regulator design was tediously accomplished with discrete Fixed Output ................................ 4.2-2
devices, and the results were quite often complex and costly. Adjustable Output. . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.2-4
Today, with bipolar monolithic regulators, this task has been Special Regulators ............................. 4.2-5
significantly simplified. The designer now has a wide choice Voltage Regulator/Supervisory. . . . . . . . . . . . . . . .. 4.2-5
of fixed, low VDiff and adjustable type voltage regulators. SCSI Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.2-8
These devices incorporate many built-in protection Switching Regulator Control Circuits .............. 4.2-9
features, making them virtually immune to the catastrophic Single-Ended ............................... 4.2-9
failures encountered in older discrete designs. Single-Ended with On-Chip Power Switch ..... 4.2-11
The switching power supply continues to increase in Very High Voltage Single-Ended with
popularity and is one of the fastest growing markets in the On-Chip Power Switch ..................... 4.2-11
world of power conversion. They offer the designer several Double-Ended ............................. 4.2-12
important advantages over linear series-pass regulators. High Voltage Switching Regulator ............. 4.2-13
These advantages include significant advancements in the Special Switching Regulator Controllers .......... 4.2-15
areas of size and weight reduction, improved efficiency, and Dual Channel .............................. 4.2-15
the ability to perform voltage step-up, step-down, and Universal Microprocessor . . . . . . . . . . . . . . . . . . .. 4.2-15
voltage-inverting functions. Motorola offers a diverse Power Factor ............................... 4.2-15
portfolio of full featured switching regulator control circuits Supervisory Circuits ........................... 4.2-18
which meet the needs of today's modern compact electronic Overvoltage Crowbar Sensing . . . . . . . . . . . . . . .. 4.2-18
equipment. Over/Undervoltage Protection ................ 4.2-18
Power supplies, MPU/MCU-based systems, industrial Undervoltage Sensing ..... . . . . . . . . . . . . . . . . .. 4.2-19
controls, computer systems and many other product Universal Voltage Monitor . . . . . . . . . . . . . . . . . . .. 4.2-20
applications are requiring power supervisory functions Battery Management Circuits ................... 4.2-21
which monitor voltages to ensure proper system operation. Battery Charger ICs ......................... 4.2-21
Motorola offers a wide range of power supervisory circuits Battery Pack ICs . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.2-23
that fulfill these needs in a cost effective and efficient MOSFET/IGBT Drivers. . . . . . . . . . . . . . . . . . . . . . . .. 4.2-25
manner. MOSFET drivers are also provided to enhance the High Speed Dual Drivers. . . . . . . . . . . . . . . . . . . .. 4.2-25
drive capabilities of first generation switching regulators or Single IGBT Driver . . . . . . . . . . . . . . . . . . . . . . . . .. 4.2-25
systems designed with CMOSmL logic devices. These Package Overview ............................ 4.2-26
drivers can also be used in dc-to-dc converters, motor
controllers or virtually any other application requiring high
speed operation of power MOSFETs.
Motorola Master Selection Guide 4.2-1 Analog and Interface Integrated Circuits
Linear Voltage Regulators
Fixed Output
These low cost monolithic circuits provide positive and/or Although designed primarily as fixed voltage regulators,
negative regulation at currents from 100 rnA to 3.0 A. They are these devices can be used with external components to obtain
ideal for on-card regulation employing current limiting and adjustable voltages and currents.
thermal shutdown. Low VDiff devices are offered for battery
powered systems.
3.3 OT-3.3,
Z-3.3
5.0 OT-5.0,
Z-5.0
MC78LXXC/AC/AB* 5.0, 8.0, 9.0 8.0/4.0 30 1.7 4.0/3.0 1.2 0.2 0/751, P/29
MC78LXXC/AC/AB* 12,15,18 8.0/4.0 35 1.7 2.0 1.0 0.2 01751, P/29
MC78L24C/AC/AB' 24 8.0/4.0 40 1.7 2.0 1.0 0.2 0/751, P/29
MC79L05C/AC/AB* -5.0 8.0/4.0 30 1.7 4.0/3.0 1.2 0.2 0/751, P/29
MC79LXXC/AC/AB* -(12,15,18) 8.0/4.0 35 1.7 2.0 1.0 0.2 01751, P/29
MC79L24C/AC/AB* -24 8.0/4.0 40 1.7 2.0 1.0 0.2 01751, P/29
MC33160" 5.0 5.0 40 2.0 0.8 1.0 - P/626
MC79MXXB*/C -(5.0, 8.0, 12, 15) 4.0 35 1.1 1.0 2.0 -0.07 to OT,OT-1,
±O.04 T/221 A
Analog and Interface Integrated Circuits 4.2-2 Motorola Master Selection Guide
Table 1. Linear Voltage Regulators (continued)
Typ. Temp.
25°C Vin-Vout Regline Regload Coefficient
Tol. Yin Diff. Max Max mV(Voutl Suffix!
Device Vout ±% Max Typ. (% Voutl (% Voutl °C Package
Motorola Master Selection Guide 4.2-3 Analog and Interface Integrated Circuits
Table 2. Fixed Voltage Medium and Low Dropout Regulators (continued)
Typ.
Temp.
I 25°C 10 Vin-Vout Regllne Regload CoeffIcient
Tol. (mA) Yin Dlff. Max Max mV(Voutl Suffix!
Device Vout ±% Max MaX Typ. (% Voutl (%Voutl °C Package
Adjustable Output
Motorola offers a broad line of adjustable output voltage output voltages for industrial and communications
regulators with a variety of output current capabilities. applications. The three-terminal devices require only two
Adjustable voltage regulators provide users the capability of external resistors to set the output voltage.
stocking a single integrated circuit offering a wide range of
Adjustable Regulators
LM317UB* 2.0-37 100 40 1.9 0.07 1.5 ±D.35 01751, Z
LM2931C' 3.0-24 100 37 0.16 1.12 1.0 ±2.5 01751,
02T/936A,
T/3140,
TH,TV
LP2951 C*/AC' 1.25-29 100 28.75 0.38 0.0410.02 0.04/0.02 ±1.0 0-3.01751,
N-3.0/626
0-3.3/751,
N-3.31626
01751,
N/626
MC1723C# 2.0-37 150 38 2.5 0.5 0.2 ±D.033 01751,
P/646
Unless otherwise noted, TJ = 0° to +125°C
• TJ=-400to+125°C
1/ TA = 0° to +70°C
Analog and Interface Integrated Circuits 4.2-4 Motorola Master Selection Guide
Table 3. Adjustable Output Regulators (continued)
Typ. Temp.
10 Vin-Vout Regline Regload Coefficient
(mA) Yin Diff. Max Max mV (Voutl Suffix!
Device Vout Max Max Typ. ('Yo Voutl ('Yo Voutl °C Package
Adjustable Regulators
LM317M/S* 1.2-37 500 40 2.1 0.04 0.5 ±0.35 DT, DT-l,
T/221 A
Special Regulators
Voltage Regulator/Supervisory
Table 4. Voltage Regulator/Supervisory
Vout Yin
(V) 10 (V)
(mA) Regline Regload TA Suffix!
Device Min Max Max Min Max (mV) Max (mV) Max (OC) Package
2.9 3.1 20 25
-2.65 -2.35 1.0 20
MC34160 4.75 5.25 100 7.0 40 40 50 Oto+70 P/64SC,
DW/751G
MC33160 -40 to +S5
6.4 7.0
-2.35 -2.65
• These ICs are intended for powering cellular phone GaAs power amplifiers and can be used lor other portable applications as well.
Motorola Master Selection Guide 4.2-5 Analog and Interface Integrated Circuits
Voltage Regulator/Supervisory (continued)
Microprocessor Voltage Regulator and Supervisory Circuit
MC34160P, ow
TA = 0° to +70°C, Case 648C, 751G
MC33160P, ow
TA = -40° to +85°C, Case 648C, 751G
Regulator
The MC34160 series is a voltage Output
regulator and supervisory circuit contain-
ing many of the necessary monitoring Reset
functions required in microprocessor
based systems. It is specifically designed
for appliance and industrial applications Reference
offering the designer a cost effective 16 Output
solution with minimal external components.
These integrated circuits feature a 5.0 V,
100 mA regulator with short circuit current Power
Power
limiting, pinned out 2.6 V bandgap Warning
Sense
reference, low voltage reset comparator,
power warning comparator with program-
Hysteresis
mable hysteresis, and an uncommitted
Adjust 10
comparator ideally suited for microproces-
sor line synchronization.
Additional features include a chip disable Noninverting
Input
input for low standby current, and internal
thermal shutdown for over temperature
Inverting Comparator
protection. Output
Input
These devices are contained in a 16 pin
duaHn-line heat tab plastic package for
improved thermal conduction.
Analog and Interface Integrated Circuits 4.2-6 Motorola Master Selection Guide
Voltage Regulator/Supervisory (continued)
Motorola Master Selection Guide 4.2-7 Analog and Interface Integrated Circuits
SCSI Regulator
Table 5. SCSI Regulator
Vout Vin
(V) (V)
Isink Regllne Regload TJ Suffix!
Device Min I Max (mA) Min I Max (%) (%) (Oe) Package
MC34268 2.81 I 2.89 800 3.9 I 20 0.3 0.5 150 D1751 , DT
Input
Analog and Interface Integrated Circuits 4.2-8 Motorola Master Selection Guide
Switching Regulator Control Circuits
These devices contain the primary building blocks which and are designed to drive many of the standard switching
are required to implement a variety of switching power topologies. The single--ended configurations include buck,
supplies. The product offerings fall into three major categories boost, flyback and forward converters. The double--ended
consisting of single--ended and double--ended controllers, devices control push-pull, half bridge and full bridge
plus single--ended les with on-chip power switch transistors. configurations.
These circuits operate in voltage, current or resonant modes
Motorola Master Selection Guide 4.2-9 Analog and Interface Integrated Circuits
Table 6. Single-Ended Controllers (continued)
These single-ended voltage and current mode controllers are designed for use in buck, boost, flyback, and forward
converters. They are cost effective in applications that range from O. t to 200 W power output.
Minimum Maximum
Operating Useful
10 Voltage Oscillator
(mA) Range Operating Reference Frequency TA Suffix!
Max (V) Mode (V) (kHz) Device ("C) Package
1000 11 to 30 Current 5.0± 1.0% 500 UC2842B -25 to +85 D/751 A
(Totem Pole MOSFET (Improved D1/751
Drive Output) Oscillator
Specifications N/626
8.2 to 30 5.0±2.0% with UC3843B Oto+70 D/751 A
Frequency D1/751
Guaranteed
at 250 kHz) N/626
UC3843BV --40 to +105 D/751 A
D1/751
N/626
5.0±1.0% UC2843B -25 to +85 D/751 A
D1/751
N/626
11.5t030 5.0 ± 2.0% 500 UC3844B Oto+70 0/751 A
(50% Duty D1/751
Cycle Limit)
N/626
UC3844BV --40 to +105 D/751 A
D1/751
N/626
11 to 30 5.0± 1.0% UC2844B -25 to +85 D/751 A
D1/751
N/626
8.2 to 30 5.0±2.0% UC3845B 010+70 D/751 A
D1/751
N/626
UC3845BV --40 to +105 D/751 A
D1/751
N/626
5.0± 1.0% UC2845B -25 to +85 D/751 A
D1/751
Nl626
1000 Source 11 to 18 5.0±6.0% MC44602 P2I648C
1500 Sink
(Split Totem Pole
Bipolar Drive Output)
2000 9.2 to 30 Current 5.1 ± 1.0% 1000 MC34023 Oto+70 DW/751G
(Totem Pole MOSFET or FN1775
Drive Output) Voltage
P/648
MC33023 --4010 +105 DW1751G
FN/775
P/648
Analog and Interface Integrated Circuits 4.2-10 Motorola Masler Selection Guide
Table 7. Single-Ended Controllers with On-Chip Power Switch
These monolithic power switching regulators contain all the active functions required to implement standard dc-to--dc
converter configurations with a minimum number of external components.
Minimum Maximum
Operating Useful
10 Voltage Oscillator
(mA) Range Operating Reference Frequency TA Suffix!
Max (V) Mode (V) (kHz) Device (Oc) Package
1500 2.51040 Vollage 1.25 ± 5.2%(1) 100 IlA78S40 Oto+70 PC/648
(Uncommitted
-4010 +85 PV/648
Power Swilch)
1.25±2.0% MC34063A 010 +70 Dn51
P1/626
P1/626
Table 8. Very High Voltage Single-Ended Controller with On-Chip Power Switch
This monolithic high voltage switching regulator is specifically designed to operate from a rectified ac line voltage source.
Included are an on--chip high voltage power switch, active off-line startup circuitry and a full featured PWM controller with fault
protection.
Maximum
Power Switch Useful
Maximum Rating Startup Feedback OSCillator
Input Max Operating Threshold Frequency TA Suffix!
VOS(V) lOS (mA) (V) Mode (V) (kHz) Device (OC) Package
500 2000 250 Vollage 2.6±3.1% 1000 MC33362 -25 to +125 DWn51N
Motorola Master Selection Guide 4.2-11 Analog and Interface Integrated Circuits
Table 9. Double-Ended Controllers
These double-ended voltage, current and resonant mode controllers are designed for use in push-pull, half-bridge, and
full-bridge converters. They are cost effective in applications that range from 100 to 2000 watts power output.
Minimum Maximum
Operating Useful
10 Voltage Oscillator
(mA) Range Operating Reference Frequency TA Suffix!
Max (V) Mode (V) (kHz) Device (OC) Package
Analog and Interface Integrated Circu~s 4.2-12 Motorola Master Selection Guide
Switching Regulator Control Circuits (continued)
The MC33362 is a monolithic high voltage switching thermal shutdown. This device is available in a 16 lead wide
regulator that is specifically designed to operate from a body surface mount package.
rectified 120 Vac line source. This integrated circuit features • On-Chip 500 V, 2.0 A SenseFET Power Switch
an on-chip 500 V/2.0 A SenseFET power switch, 250 V active • Rectified 120 Vac Line Source Operation
off-line startup FET, duty cycle controlled oscillator, current • On-Chip 250 V Active Off-Line Startup FET
limiting comparator with a programmable threshold and • Latching PWM for Double Pulse Suppression
leading edge blanking, latching pulse width modulator for • Cycie-By-Cycie Current Limiting
double pulse suppression, high gain error amplifier, and a • Input Undervoltage Lockout with Hysteresis
trimmed internal bandgap reference. Protective features • Output Overvoltage Protection Comparator
include cycie-by-cycie current limiting, input undervoltage • Trimmed 1.0% Internal Bandgap Reference
lockout with hysteresis, output overvoltage protection, and • Internal Thermal Shutdown
20 W Off-Line Converter
AC Input
"'0
.. U::
Startup Input DC Output
r;"'-''''-'-''"7·-'-- ~ -.--".-.-.-;-:-- - - . - - - - .
.T.
I
I
Motorola Master Selection Guide 4.2-13 Analog and Interface Integrated Circuits
Switching Regulator Control Circuits (continued)
MC33363DW
TJ = -25° to + 125°C, Case 751 N
The MC33363 is a monolithic high voltage switching thermal shutdown. This device is available in a 16-lead wide
regulator that is specifically designed to operate from a body surface mount package.
rectified 240 Vac line source. This integrated circuit features • On-Chip 700 V, 1.0 A SenseFET Power Switch
an on-chip 700 V/l.0 A SenseFET power switch, 450 V active • Rectified 240 Vac Line Source Operation
off-line startup FET, duty cycle controlled oscillator, current • On-Chip 450 V Active Off-Line Startup FET
limiting comparator with a programmable threshold and • Latching PWM for Double Pulse Suppression
leading edge blanking, latching pulse width modulator for • Cycle-By-Cycle Current Limiting
double pulse suppression, high gain error amplifier, and a • Input Undervoltage Lockout with Hysteresis
trimmed internal bandgap reference. Protective features • Output Overvoltage Protection Comparator
include cycle-by-cycle current limiting, input undervoltage • Trimmed Internal Bandgap Reference
lockout with hysteresis, output overvoltage protection, and • Internal Thermal Shutdown
•
DC Output
Analog and Interface Integrated Circuits 4.2-14 Motorola Master Selection Guide
Special Switching Regulator Controllers
These high performance dual channel controllers are and lower voltage dc-te-dc converters, respectively.
optimized for off-line, ae-to--dc power supplies and dc-to--dc Applications include desktop computers, peripherals,
converters in the flyback topology. They also have televisions, games, and various consumer appliances.
undervoltage lockout voltages which are optimized for off-line
Motorola Master Selection Guide 4.2-15 Analog and Interface Integrated Circuits
Power Factor Controllers
MC34262D, P
TA =0° to +85°C, Case 751,626
MC33262D, P
TA = 40° to +105°C, Case 751,626
The MC34262, MC33262 series are active power factor Also included are protective features consisting of an
controllers specifically designed for use as a preconverter in overvoltage comparator to eliminate runaway output voltage
electronic ballast and in off-line power converter applications. due to load removal, input .undervoltage lockout with
These integrated circuits feature an internal startup timer for hysteresis, cycle-by-cycle current limiting, multiplier output
stand alone applications, a one quadrant multiplier for near clamp that limits maximum peak switch current, an RS latch
unity power factor, zero current detector to ensure critical for single pulse metering, and a drive output high state clamp
conduction operation, transconductance error amplifier, for MOSFET gate protection. These devices are available in
quickstart circuit for enhanced startup, trimmed internal dual-in-line and surface mount plastic packages.
bandgap reference, current sensing comparator, and a totem
pole output ideally suited for driving a power MOSFET.
Vo
330 400 VlO.44 A
Analog and Interface Integrated Circuits 4.2-16 Motorola Master Selection Guide
Power Factor Controllers (continued)
MC33368D
TJ = -25° to +125°C, Case 751 K
The MC33368 is an active power factor controller that reference, an undervoltage lockout (UVLO) circuit which
functions as a boost preconverter in off-line power supply monitors the VCC supply voltage, and a CMOS driver for
applications. MC33368 is optimized for low power, high driving MOSFETs. The MC33368 also includes a
density power supplies requiring minimum board area, programmable output switching frequency clamp. Protection
reduced component count, and low power dissipation. The features include an output overvoltage comparator to
narrow body SOIC package provides a small footprint. minimize overshoot, a restart delay timer, and cycle-by-
Integration of the high voltage startup saves approximately cycle current limiting.
0.7 W of power compared to resistor bootstrapped circuits. • Lossless Off-Line Startup
The MC33368 features a watchdog timer to initiate output • Output Overvoltage Comparator
switching, a one quadrant multiplier to force the line current to • Leading Edge Blanking (LEB) for Noise Immunity
follow the instantaneous line voltage, a zero current detector • Watchdog Timer to Initiate Switching
to ensure critical conduction operation, a transconductance • Restart Delay Timer
error amplifier, a current sensing comparator, a 5.0 V
D6
1N4934
400 V
MTW
14N50E
RlO R2
15 k
820 k
R5 C7
1.3 M ~470pF
LEB
9
CS
C8 Rg
~ .001 10
MULT
R7
0.1
Li..>= _ _ _ _
R3 C2 Camp 4 Vref FB
10 k 0.01 ~ ~~8
Vref R1
10 k
Motorola Master Selection Guide 4.2-17 Analog and Interface Integrated Circuits
Supervisory Circuits
A variety of Power Supervisory Circuits are offered. pin-programmable trip voltages or additional features, such
Overvoltage sensing circuits which drive "Crowbar" SCRs as an indicator output drive and remote activation capability.
are provided in several configurations from a low cost An over/undervoltage protection circuit is also offered.
three-terminal version to 8-pin devices which provide
Remote
Activation
Analog and Interface Integrated Circuits 4.2-18 Motorola Master Selection Guide
Supervisory Circuits (continued)
Motorola Master Selection Guide 4.2-19 Analog and Interface Integrated Circuits
Supervisory Circuits (continued)
TRUTH TABLE
Mode Select Input 1 Output 1 Input 2 Output 2
Pin7 Pin 2 Pin6 Pin3 PinS Comments
GND 0 0 0 0 Channels 1 & 2: Noninverting
1 1 1 1
InputVS2
Gnd
-VSl
I
I
I
Output Vee I
Voltage LED ''On'
VS2
Pins 5, 6 Gnd
tllJI
--------'
Analog and Interface Integrated Circuits 4.2-20 Motorola Master Selection Guide
Battery Management Circuits
Battery Charger ICs
Battery Fast Charge Controller
MC33340D
TA = -25° to +85°C, Case 751
The MC33340 is a monolithic controllC that is specifically a rapid test mode are available for enhanced end product
designed as a fast charge controller for Nickel Cadmium testing. This device is available in an economical 8 lead
(NiCd) and Nickel Metal Hydride (NiMH) batteries. This device surface mount package.
features negative slope voltage detection as the primary • Negative Slope Voltage Detection
means for fast charge termination. Accurate detection is • Accurate Zero Current Battery Voltage Sensing
ensured by an output that momentarily interrupts the charge • Programmable 1 to 4 Hour Fast Charge Time Limit
current for precise voltage sampling. An additional secondary • Programmable Over/Under Temperature Detection
backup termination method can be selected that consists of • Battery Over- and Undervoltage Fast Charge Protection
either a programmable time or temperature limit. Protective • Rapid System Test Mode
features include battery over- and undervoltage detection, • Power Supply Input Undervoltage Lockout with
latched over temperature detection, and power supply input Hysteresis
undervoltage lockout with hysteresis. Provisions for entering • Operating Voltage Range of 3.0 V to 18 V
De
Input Vee 8
Motorola Master Selection Guide 4.2-21 Analog and Interface Integrated Circuits
Battery Charger ICs (continued)
Power Supply
Battery Charger
Regulation Control Circuit
MC33341P, D
TA =-40° to +85°C, Case 626, 751
The MC33341 is a monolithic regulation control circuit that • Differential Amplifier for High-Side Source and Load
is specifically designed to close the voltage and current Current Sensing
feedback loops in power supply and battery charger , • Inverting Amplifier for Source Return Low-Side Current
applications. This device features the unique ability to perform Sensing
source high-side, load high-side, source low-side, and load • Noninverting Input Path for Load Low-Side Current
low-side current sensing, each with either an internally fixed Sensing
or externally adjustable threshold. The various current • Fixed or Adjustable Current Threshold in all Current
sensing modes are accomplished by a means of selectively Sensing Modes
using the internal differential amplifier, inverting amplifier, or a • Positive Voltage Sensing in all Current Sensing Modes
direct input path. Positive voltage sensing is performed by an • Fixed Voltage Threshold in all Current SenSing Modes
internal voltage amplifier. The voltage amplifier threshold is • Adjustable Voltage Threshold in all Low-Side Current
internally fixed and can be externally adjusted in all low-side SenSing Modes
current sensing applications. An active high drive output is • Output Driver Directly Interfaces with Economical
provided to directly interface with economical optoisolators for Optoisolators
isolated output power systems. This device is available in • Operating Voltage Range of 2.3 V to 18 V
8 lead dual-in-line and surface mount packages.
Analog and Interface Integrated Circuits 4.2-22 Motorola Master Selection Guide
Battery Pack ICs
1 to 4 Cells Lithium Battery Safety IC
MC33344DW
TA =-40° to +85°C, Case 751 D
The MC33344 is a Lithium Battery Safety Integrated Circuit • Precision Cell Voltage Measurement with an Accuracy
designed to control the charge and discharge voltage safety of 1.0%
limits of one to four lithium-ion or lithium polymer • Programmable Voltage and Current Limits
rechargeable cells. This device is designed to be placed inside • Automatic Cell Balancing for Optimization of the Charge
the battery pack together with the cells and other external of each Cell
components, to form a smart battery pack. Its main purpose Protection Features:
is to ensure safe battery pack charging and discharging.
• Zero Current Sleepmode in Order to Avoid the
The circuit also protects the integrity of the Li-ion cells. In
Degradation of a Cell in the Event of an Undervoltage
effect, it avoids the degradation of the cells in case of
Condition
overdischarge by causing the battery pack to go in a zero
• Overvoltage and Undervoltage Cell Protection
current SLEEPMODETM state. This state interrupts any further
• Overcurrent Protection during Charge and Discharge
leakage of the cells.
Integrated into the MC33344 are two seriesed N-FETs Designed for Smart Battery Pack Integration:
designed to interrupt the battery charge or discharge current. • Surface Mount 20 Pin Package
Charge Control: • On-Chip Series N-FETs capable of up to 1.5 A Load
Current
• Fully programmable for 1 to 4 Lithium-Ion (Li-ion) or
Lithium-Polymer Rechargeable Cells
Motorola Master Selection Guide 4.2-23 Analog and Interface Integrated Circuits
Battery Pack ICs (continued)
Pack +
Over Charge
RC
Over Discharge
RD
VCC
cell 4
V3
cell 3
V2
cell 2
V19-+~
cell 1
Analog and Interface Integrated Circuits 4.2-24 Motorola Master Selection Guide
MOSFET/IGBT Drivers
High Speed Dual Drivers
(Inverting) (Noninverting)
MC34151P,D MC34152P,D
TA = 0° to +70°C, Case 626, 751 TA =0° to +70°C, Case 626, 751
MC33151P,D MC33152P,D
TA =-40° to +85°C, Case 626, 751 TA = -40° to +85°C, Case 626,751
Vcc
These two series of high speed dual MOSFET driver ICs
are specifically designed for applications requiring low current
digital circuitry to drive large capacitive loads at high slew
rates. Both series feature a unique undervoltage lockout
function which puts the outputs in a defined low state in an
undervoltage condition. In addition, the low "on" state
resistance of these bipolar drivers allows significantly higher
Logic Drive
output currents at lower supply voltages than with competing Output A
Input A
drivers using CMOS technology.
The MC34151 series is pin--compatible with the MMH0026
and DS0026 dual MOS clock drivers, and can be used as
drop-in replacements to upgrade system performance. The
MC34152 noninverting series is a mirror image of the inverting
MC34151 series.
These devices can enhance the drive capabilities of first Logic Drive
generation switching regulators or systems designed with InputB OutputB
CMOSnTL logic devices. They can be used in dc-to-dc
converters, motor controllers, capacitor charge pump
converters, or virtually any other application requiring high
speed operation of power MOSFETs.
Motorola Master Selection Guide 4.2-25 Analog and Interface Integrated Circuits
Power Supply Circuits Package Overview
I
CASE 29 CASE 221A
,
CASE 314A
CASE 314B
TV SUFFIX
, ,.
P,ZSUFFIX T, KCSUFFIX TH SUFFIX
,. -
TSUFFIX DT-1 SUFFIX DTSUFFIX N, P, P1 SUFFIX
,
PSUFFIX N, P, P2 SUFFIX N SUFFIX D, D1 SUFFIX
#-
CASE 751A
D SUFFIX
CASE 751B
D SUFFIX
•
CASE 751D
DWSUFFIX
•
CASE 751G
DWSUFFIX
•
#
CASE 751K
DSUFFIX
CASE 751N
DWSUFFIX
•
CASE 775
FN SUFFIX
•
CASE 873A
FB SUFFIX
• •CASE 936
D2TSUFFIX
CASE 936A
D2TSUFFIX
•
CASE 948B
DTB SUFFIX
..
CASE 948E
DTB SUFFIX
Analog and Interface Integrated Circuits 4.2-26 Motorola Master Selection Guide
Power/Motor Control Circuits
In Brief ...
With the expansion of electronics into more and more Page
mechanical systems, there comes an increasing demand for Power Controllers .............................. 4.3-2
simple but intelligent circuits that can blend these two Zero Voltage Switch . . . . . . . . . . . . . . . . . . . . . . . . .. 4.3-2
technologies. In the past, the task of power/motor control Zero Voltage Controller .. . . . . . . . . . . . . . . . . . . . .. 4.3-3
was once accomplished with discrete devices. But today this High-Side Driver Switch ...................... 4.3-4
task is being performed by bipolar IC technology due to cost, Motor Controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.3-4
size, and reliability constraints. Motorola offers integrated Brushless DC Motor Controllers ............... 4.3-4
circuits designed to anticipate the requirements for both Closed Loop Brushless Motor Adapter .. . . . . . . .. 4.3-7
simple and sophisticated control systems, while providing DC Servo Motor Controller/Driver .............. 4.3-8
cost effective solutions to meet the needs of the applications. Stepper Motor Driver .... . . . . . . . . . . . . . . . . . . . .. 4.3-9
Universal Motor Speed Controller ............. 4.3-10
Triac Phase Angle Controller ................. 4.3-11
Package Overview ............................ 4.3-12
Motorola Master Selection Guide 4.3-1 Analog and Interface Integrated Circuits
Power Controllers
An assortment of battery and ac line-operated controllCs for specific applications are shown. They are designed to enhance
system performance and reduce complexity in a wide variety of control applications.
• Limiter-Power Supply - Allows operation directly from • Protection Circuit (CA3059 only) - A built-in circuit may
an ac line. be actuated, if the sensor opens or shorts, to remove the
• Differential "On"/"Off" Sensing Amplifier - Tests for drive circuit from the external triac.
condition of external sensors or input command signals. • Inhibit Capability (CA3059 only) - Thyristor firing may
Proportional control capability or hysteresis may be be inhibited by the action of an internal diode gate.
implemented. • High Power DC Comparator Operation (CA3059 only)
• Zero-Crossing Detector - Synchronizes the output - Operation in this mode is accomplished by connecting
pulses to the zero voltage point of the ac cycle. Pin 7 to 12 (thus overriding the action of the
Eliminates RFI when used with resistive loads. zero-crossing detector).
• Triac Drive - Supplies high current pulses to the external
power controlling thyristor.
AC
Input
Voltage
Gnd
'NTCSensor ~------------------------~~--~
NOTE: Shaded Area Not Included with CA3079.
Analog and Interface Integrated Circuits 4.3-2 Motorola Master Selection Guide
Power Controllers (continued)
Motorola Master Selection Guide 4.3-3 Analog and Interface Integrated Circuits
Power Controllers (continued)
Motor Controllers
This section contains integrated circuits designed for cost effective control of specific motor families. Included are controllers
for brushless, de servo, stepper, and universal type motors.
:!l!0 .. .cc
~ ~~
~~ l5~f J~ ! ..
~
"U
~:::I
.. j C"I:I
ii-
~~
'SJ!! E It_
>:::1 el ~=a I~~
"Iii>
;a~ ~
ai'S ~!'g :I H E .. :Ii!
"_0 8.- a. ... .e- ~E :::I.e- 1!S- Suffix!
.5~ 1fc5 ~
"1:1" N:::I :::10
Device Vee Ve
Co
:::I...J ".c
.5cn ~8 ~jjjif
:::Ic
Ow ~.f!!!. 08~ <60 uu 1D.5 Package
Noninv. P1738,
MC33033 10-30 - v' v' v' 60°/300° v' v' v' v' Only v' - - - DWI751D
and
120°/240° Noninv. P1724,
MC33035 10-40 10-30 v' v' v' v' v' v' v' and Inv. v' v' v' v' DW1751E
Analog and Interface Integrated Circuits 4.3-4 Motorola Master Selection Guide
Motor Controllers (continued)
MC33033P, OW
TA =-40° to +85°C, Case 738, 751 D
The MC33033 is a lower cost second generation brushless Because of its low cost, the MC33033 can efficiently be
dc motor controller which has evolved from the full featured used to control brush dc motors as well as brush less. A brush
MC33034 and MC33035 controllers. The MC33033 contains dc motor can be driven using two of the three drive output
all of the active functions needed to implement a low cost open phases provided in the MC33033, while the Hall sensor input
loop motor control system. This IC has all of the key control pins are selectively tied to Vref or ground. Other features such
and protection functions of the two full featured devices with as forward/reverse, output enable, speed control, current
the following secondary features deleted: separate limiting, undervoltage lockout and internal thermal shutdown
drive-circuit supply and ground pins, the brake input, and the will still remain functional.
fault output signal. Like its MC33035 predecessor, the
MC33033 has a control pin which allows the user to select
60°/300° or 120°/240° sensor electrical phasings.
r----...,
L ___ _
Motor
vcco---<>-
Speed Set
l Faster
RT
CT
Motorola Master Selection Guide 4.3-5 Analog and Interface Integrated Circuits
Motor Controllers (continued)
MC33035P, OW
TA = -40° to +85°C, Case 724, 751 E
The MC33035 is a second generation high performance 60°/300° or 120°/240° sensor electrical phasings, and access
brush less dc motor controller which contains all of the active to both inverting and noninverting inputs of the current sense
functions required to implement a full featured open loop comparator. The earlier devices had two part numbers which
motor control system. While being pin-{;ompatible with its were needed to support the different sensor phasings, and the
MC33034 predecessor, the MC33035 offers additional inverting input to the current sense comparator was internally
features at a lower price. The two additional features provided grounded. All of the control and protection features of the
by the MC33035 are a pin which allows the user to select MC33034 are also provided in the MC33035.
----,
~----lT~iiiiiiiiiiiiiiiiiiiiiiiiiiiiii~~~~~~nJ~i ~~~I
I
I
I
I
I
L ____ J
I
Motor
Speed Set
i Faster
Analog and Interface Integrated Circuits 4.3-6 Motorola Master Selection Guide
Motor Controllers (continued)
The MC33039 is a high performance close loop speed detectors, a programmable monostable, and an internal shunt
control adapter specifically designed for use in brush less dc regulator. Also included is an inverter output for use in systems
motor control systems. Implementation will allow precise that require conversion of sensor phasing. Although this
speed regulation without the need for a magnetic or optical device is primarily intended for use with the MC33033/35
tachometer. These devices contain three input buffers each brushless motor controllers, it can be used cost effectively in
with hysteresis for noise immunity, three digital edge many other closed loop speed control applications.
Vcc
il>A fout
To Rotor
Position
Sensors il>B
il>C
Gnd
Motorola Master Selection Guide 4.3-7 Analog and Interface Integrated Circuits
Motor Controllers (continued)
A monolithic dc servo motor controller providing all active 1.0 A, independently programmable over current monitor and
functions necessary for a complete closed loop system. This shutdown delay, and over voltage monitor. This part is ideally
device consists of an on-chip op amp and window comparator suited for almost any servo positioning application that
with wide input common mode range, drive and brake logic requires sensing of temperature, pressure, light, magnetic
with direction memory, a power H switch driver capable of flux, or any other means that can be converted to a voltage.
Motor
Vee
Feedback
Position
Vee
Reference
Position
Analog and Interface Integrated Circuits 4.3-8 Motorola Master Selection Guide
Motor Controllers (continued)
SAA1042AV
TA = -30° to +125°C, Case 648C
These Stepper Motor Drivers provide up to 500 mA of drive clockwise and half or full step operation. The MC3479 has an
per coil for two phase 6.0 V to 24 V stepper motors. Control added Output Impedance Control (OIC) and a Phase A drive
logic is provided to accept commands for clockwise, counter state indicator (not available on SAA1042 devices).
ClK
l2
CW/CCW
Vo
l3
Full/Half
Step
l4
OIC'
, MC3479 Only
Motorola Master Selection Guide 4.3-9 Analog and Interface Integrated Circuits
Motor Controllers (continued)
~ en
(I) 0 .<= .<=
Cl. ~ .<=
" D-:;;"
Cl.
en 0 .3 "<= ~
§
i
(I)
a::g <= "l5 ili
;m D- O)
~
(I) "0
~ ~ N 1: $
(!) (!) (I)
0>
.2' 0 ::;: Cl. en
il: ~
0 E
OJ
0 en
a: ~ 0
Analog and Interface Integrated Circuits 4.3-10 Motorola Master Selection Guide
Motor Controllers (continued)
Motorola Master Selection Guide 4.3-11 Analog and Interface Integrated Circuits
Power/Motor Control Circuits Package Overview
CASE 3140
~
CASE 626 •
CASE 646
-CASE 648, 648C
,
TSUFFIX B, PSUFFIX P, V SUFFIX
- - CASE 724
PSUFFIX
CASE 738
PSUFFIX
~
CASE 751
o SUFFIX
CASE 751B
o SUFFIX
• # CASE 7510
OW SUFFIX
CASE 751E
OW SUFFIX
•
CASE 751G
OW SUFFIX
• CASE 775
FN SUFFIX
Analog and Interface Integrated Circuits 4.3-12 Motorola Master Selection Guide
Voltage References
In Brief ...
Motorola's line of precIsion voltage references is Page
designed for applications requiring high initial accuracy, low Precision Low Voltage References . . . . . . . . . . . . . . .. 4.4-2
temperature drift, and long term stability. Initial accuracies of Package Overview ............................. 4.4-2
±1.0%, and ±2.0% mean production line adjustments can be
eliminated. Temperature coefficients of 25 ppm/oC max
(typically 10 ppm/oC) provide excellent stability. Uses for the
references include D/A converters, AID converters,
precision power supplies, voltmeter systems, temperature
monitors, and many others.
Motorola Master Selection Guide 4.4-1 Analog and Interface Integrated Circuits
Precision Low Voltage References
A family of precision low voltage bandgap reference devices designed for applications requiring low temperature drift.
6.25±60 mV 40 MC1404P6 -
10±100mV 40 MC1404P10 -
2.5 to 37 100 50Typ TL431C, AC, BC TL431I, AI, BI Shunt Reference LP,P,D
Dynamic Impedance
(z)';;0.5Q
Notes: 1. Micropower Reference Diode Dynamic Impedance (z) S 1.0 n at IR = 100 ~A.
2. 10!lA SIR S 1.0 mA.
3. 20!lA S IR S 1.0 mAo
4.4.5 V S Vin S 15 VI15 V S Vin S 40 V.
5.0 mA ~ IL ~ 10 mA.
6. (VOU! + 2.5 V) ~ Vin ~ 40 V.
I
CASE 29
LP,ZSUFFIX
~CASE 626
PSUFFIX
~
CASE 751
DSUFFIX
Analog and Interface Integrated Circuits 4.4-2 Motorola Master Selection Guide
Data Conversion
In Brief ...
Motorola's line of digital-te-analog and analog-to-digital Page
converters include several well established industry Data Conversion ............................... 4.5-2
standards. A-D Converters ............................. 4.5--2
The AID converters have 7 and B-bit flash converters CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.5--2
suitable for NTSC and PAL systems, CMOS has 8 to 1O-bit Bipolar. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.5--2
converters, as well as other high speed digitizing applications. Sigma-Delta ............................. 4.5--2
The D/A converters have 6 and 8-bit devices, video D--A Converters ............................. 4.5--3
speed (for NTSC and PAL) devices, and triple video DAC CMOS ................................... 4.5-3
with on-board color palette for color graphics applications. Sigma-Delta ............................. 4.5--3
Package Overview ............................. 4.5--4
Motorola Master Selection Guide 4.5-1 Analog and Interface Integrated Circuits
Data Conversion
The line of data conversion products which Motorola offers to achieve functional capability, accuracy and production
spans a wide spectrum of speed and resolution/accuracy. repeatability. Bipolar technology generally results in higher
Features, including bus compatibility, minimize extemal parts speed, while CMOS devices offer greatly reduced power
count and provide easy interface to microprocessor systems. consumption.
Various technologies, such as Bipolar and CMOS, are utilized
MC14549B/ Successive Approximation +3.0 to +18 -40 to +85 P/648 Compatible with
MC14559B Registers MC1408 SAR.
8-bit D-A Converter
Triple MC44251 1 LSB 18MHz 1.6to 4.6 V +5.0±10% -40 to +85 FN1777 3 Separate Video
8-Bit Channels
10 MC145050 ±1 LSB 211-'s OtoVDD +5.0±10% -40 to +125 P/738, Requires External
DW/7510 Clock, 11-Ch MUX
8-10 MC14443/ ±0.5% 300I-'S Variable +5.0 to +18 -40 to +85 P/648 , I-'P Compatible,
MC14447 Full Scale w/Supply DW1751G Single Slope,
6-Ch MUX
3-1/2 Digit MC14433 ±0.05% 40 ms ±2.0V +5.0 to +8.0 P/709, Dual Slope
±1 Count ±200mV -2.8to-8.0 DW1751E
Bipolar
8 MC10319 ±1 LSB 25 MHz Oto 2.0 Vpp +5.0 and o to +70 P/709, Video Speed Flash
Max -3.0to-6.0 DW/751F Converter, Internal
Die Form Gray Code
TTL Outputs
Sigma-Delta
16 MC145073 ±1 LSB 48 kHz 1.9Vpp 4.5 to 5.5 -40 to +85 DW/751E Dual Channel,
Sigma-Delta
architecture
Analog and Interlace Integrated Circuits 4.5-2 Motorola Master Selection Guide
Table 2. O-A Converters
Max
Accuracy Settling Temperature
Resolution @25"C Time Supplies Range Suffix!
(Bits) Device Max (± 112 LSB) (V) eC) Package Comments
CMOS
6 MC144110 - - +5.0 to +15 o to +85 P/707, Serial input, Hex DAC,
DW/751D 6 outputs
MC144112 - - +2.5 to +5.5 -40 to +85 P/646, Serial input, Quad DAC,
D/751 A 4 outputs
Triple MC44200 ±1/2 LSB 30 ns +5.0 -40 to +85 FU/824A Triple Video DAC,
8-Bit ±10% 55 MHz, TTL
Sigma-Delta
16,18,20 MC145074 See data 6.0 ns 4.5 to 5.5 -40 to +85 D/751B Dual Channel,
sheet Sigma-Delta architecture,
MC145076 FIR Filter
available
- MC145076 See data - +5.0 -40 to +85 D/751 B Dual Channel Bit Stream,
sheet 144 tap FIR Filter
Motorola Master Selection Guide 4.5-3 Analog and Interface Integrated Circuits
Data Conversion Package Overview
• CASE 646
PSUFFIX
'"
CASE 648
PSUFFIX
CASE 649
PSUFFIX
- CASE 707
PSUFFIX
~ CASE 709
PSUFFIX
-
CASE 738
PSUFFIX
CASE 751F
DWSUFFIX
•
CASE 751G
DWSUFFIX
CASE 777
FN SUFFIX
•CASE 824A
FUSUFFIX
Analog and Interface Integrated CircuHs 4.5-4 Motorola Master Selection Guide
Interface Circuits
In Brief ...
Described in this section is Motorola's line of interface Page
circuits, which provide the means for interfacing with Enhanced Ethernet Transceiver .................. 4.6-2
microprocessor or digital systems and the external world, or High Performance Decoder Driver/Sink Driver . . . . .. 4.6-3
to other systems. ISO 8802-3[IEEE 802.3]1 OBASE-T Transceiver ... 4.6-3
Also included are devices which allow a microprocessor Hex EIA-485 Transceiver with
to communicate with its own array of memory and peripheral Three-State Outputs ... . . . . . . . . . . . . . . . . . . . . . . .. 4.6-4
I/O circuits. 5.0 V, 200 M-BitlSec PR-IV Hard Disk
The line drivers, receivers, and transceivers permit Drive Read Channel ........................... 4.6-5
communication between systems over cables of several Line Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.6-7
thousand feet in length, and at data rates of up to several EIA Standard. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.6-7
megahertz. The common EIA data transmission standards, Line Drivers ................................... 4.6-7
several European standards, IEEE-488, and IBM 360/370 EIA Standard. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.6-7
are addressed by these devices. Line Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.6-7
The peripheral drivers are designed to handle high EIA-232-E/V.28 CMOS Drivers/Receivers ...... 4.6-8
current loads such as relay coils, lamps, stepper motors, and Peripheral Drivers ........................... 4.6-8
others. Input levels to these drivers can be TTL, CMOS, high IEEE 802.3 Transceivers ...................... 4.6-8
voltage MOS, or other user defined levels. The display Read/Write Channel ............................ 4.6-8
drivers are designed for LCD or LED displays, and provide Drive Read Channel. . . . . . . . . . . . . . . . . . . . . . . . .. 4.6-8
various forms of decoding. CMOS Display Drivers .......................... 4.6-9
Package Overview ............................ 4.6-10
Motorola Master Selection Guide 4.6-1 Analog and Interface Integrated Circuits
Enhanced Ethernet Transceiver
MC68160FB
TA = 0° to +70°C, Case 8480
The MC68160 Enhanced Ethernet Interface Circuit is a interfaces to the Ethernet controller contained in the MC68360
BiCMOS device which supports both IEEE 802.3 Access Unit Quad Integrated Communications Controller (QUICC) device.
Interface (AUI) and 10BASE-T Twisted Pair (TP) Interface The MC68160 also interfaces easily to most other
media connections through external isolation transformers. It industry-standard IEEE 802.3 LAN controllers. Prior to
encodes NRZ data to Manchester data and supplies the twisted pair data reception, Smart Squelch circuitry qualifies
signals which are required for data communication via input signals for correct amplitude, pulse width, and sequence
10BASE-T or AUI interfaces. The MC68160 gluelessly requirements.
RX~--------------~nM~amnCtcM~s~te9rlr
RCLK Decoder 1+--------------1 ARX+
MFILT .....- - - - - - - - - - - '
ARX-
RXLED
RENA_ ~~~~~~~~L~~Y---------j
CLLED
ACX+ w
w CLSN .....; = = = ; - - -....... -1 ACX-
~TXLED ATX- ~a:
~ TE~~ ~===-.l.rMaiiCheSrterl ....w~
ATX+
~ Xt
:5
c(
Twisted
X2 : Pair
TCLK ...f - - - - - - Polarity
Error
CSt
CSOIj
CS2
TPEN
Control
APORT Mode
TPAPCE Select
TPSQEL
TPFULDL
LOOP
TPJABB TPTX+ TPTX- TPLIL TPSQEL TPRX- TPRX+ TPPLR
Analog and Interface Integrated Circuits 4.6-2 Motorola Master Selection Guide
High Performance Decoder Driver/Sink Driver
K1
MC34142DW, FN ~to-----------.
Enable
..r-,--<J Output 1
TA = 0° to +70°C, Case 751 F, 776 -0 Output 2
-0 Output 3
-0 Output 4
The MC34142 is a high performance 4 to 16 multiplexed -0 Output 5
-0 Output 6
driver. This integrated circuit features a 4 to 16 decoder, -0 Output 7
16 open drain N-channel MOS output devices with clamp It+-----O Output 8
diodes. The outputs are controlled by 4 address inputs, an Chip
Enable
output enable, and a chip enable. A Decoder
Typical applications include solenoid drivers, lED drivers, K2
B
lamp drivers, and relay drivers. Output 9
C -0 Output 10
-0 Output 11
o -0
-0
Output
Output
12
13
-0 Output 14
-0 Output 15
, ....- - - - 0 Output 16
loop Back
Balun
r------------------- JJ
5.0V
18 VCC
WR
6
I
5.0 V
c..s.D~~)l
Test Select
'-..JLlT'"Tl.I.-.J
f: I
11 t.l"J r
............. TX.J
TX-
J21 TP DIfferentIal
Dnver
_
-
Data Out Transmil
Input
CMOS H I 2
ECl 3 TX Data B
TXDataA
~.
I -I 1 I I c~:~~n
lOOP:
Back Test
L loopBack I I
Received
Data
I 8 RXDataA
TTL/CMOsH~.p;9::...---.=...-t
, I-... H~-!:I>I:-:;O-::::-:::-:""-~
RX Data B
Select 11
i trH Transmit
Output
and
ECl
TTLlCMOS RXENH
....---. RX.j
t~ IRX1_61
-=:l
TP Differential
Receiver
W/Smart Squelch
I
Idle limer
Data In
Collision
Detect TTL/CMOS
+H
,-,C",o",ntr""ol_ _ _--,
I
I 14 CTlH
b-'''-----.j
SIA
L--71-r_19r5-----2&~23~r--------.J
ANA
Gnd -=
DIG
-= Gnd
CLI(~ !I~t! ClK- ClK
20 pF fff 20 pF Out
~
Duplex
PWR Mode
Gnd 10 MHz Select
Motorola Master Selection Guide 4.6--3 Analog and Interface Integrated Circuits
Hex EIA-485 Transceiver with Three-State Outputs
MC340S8IS9FTA .
TA = 0° to +70°C, Case 932
The Motorola MC3405819 Hex Transceiver is composed of • Meets EIA-485 Standard for Party Line Operation
six driver/receiver combinations designed to comply with the • Meets EIA-422A and CCITT Recommendations V.11 and
EIA-485 standard. Features include three-state outputs, X.27
thermal shutdown for each driver, and current limiting in both • Operating Ambient Temperature: O°C to +70°C
directions. This device also complies with EIA-422 and • Common Mode Driver Output/Receiver Input Range: -7.0
CCITT Recommendations V.11 and X.27. to +12 V
The devices are optimized for balanced multipoint bus • Positive and Negative Current Limiting
transmission at rates to 20 MBPS (MC34059). The driver • Transmission Rates to 14 MBPS (MC34058) and 20
outputsireceiver inputs feature a wide common mode voltage MBPS (MC34059)
range, allowing for their use in noisy environments. The • Driver Thermal Shutdown at 150°C Junction Temperature
current limit and thermal shutdown features protect the • Thermal Shutdown Active Low Output
devices from line fault conditions. • Single +5.0 V Supply, ±10%
The MC34058/9 is available in a space saving 7.0 mm 48 • Low Supply Current
lead surface mount quad package designed for optimal heat • Compact 7.0 mm 48 Lead TQFP Plastic Package
dissipation. • Skew Specified for MC34059
Gnd 36 Gnd
Gnd 35 OAS
OA6 34 OBS
OB6 DR4
DR1 0A4
OA1 OB4
OB1 DE4
DE1 29 RE4
RE1 28 OB3
OB2 10 27 OA3
0A2 11 26 Gnd
Gnd 12 25 Gnd
Analog and Interface Integrated Circuits 4.~ Motorola Master Selection Guide
5.0 V, 200 M-BitlSec PR-IV Hard Disk Drive Read Channel
MC34250FTA
TA = 0° to +70°C, Case 840F
The Motorola MC34250 is a fully integrated partial • Programmable Asymmetrical Boost of Up to ±40% of
response maximum likelihood disk drive read/write channel Nominal Filter Group Delay in Both Data and Servo
for use in zoned recording applications. This device integrates Modes
the AGC, active filter, 7 tap equalizer, Viterbi detector,
• 7 Tap Continuous Time Transversal Equalizer with 8 Bit
frequency synthesizer, servo demodulator, 8/9 rate (0,4/4)
Programmable Tap Weights and Integrated Decision
Encoder/Decoder with write precompensation and power
Directed Sign-Sign least Mean Squared Adaptation
management in a single 64 pin 10 mm x 10 mm TQFP
package. • Internal Offset Cancellation loops
• ERD and Polarity Outputs for Servo Timing and Raw • Integrated Write Current DAC
Encoded Data • Programmable Power Management
• Integrated 7 pole 0.05° Equiripple Linear Phase Filter with • Bi-Directional Serial Microprocessor Interface
Programmable Bandwidth from 5.0 MHz to 80 MHz and
Different Values for Both Data and Servo Modes • Various Test Modes Controlled Via the Serial
Microprocessor Interface
• Programmable Symmetrical Boost from 0 to 10 dB and
Different Values for Data and Servo Modes
Motorola Master Selection Guide 4.6-5 Analog and Interface Integrated Circuits
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HOLDS
8/9 (0,4/4) ENDEC
NRZ(7:0)
NRZCLK
C
~.
...
CDATA~ Mux Synchronization
-I>
-
WDATAM 0
SLEEPB U I ~I
Power
Manager g Mode
Coefficients
:::J
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Synt esizer ~ ZoneClk WCDAC
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Line Receivers
Table 1. EIA Standard
S= Single tprop Party
Ended Type Delay Line Strobe Power Receivers
D= Differ- of Time Opera- or Supplies Suffix! Per Companion
ential Output Max (ns) tion Enable (V) Device Package Package Drivers Comments
S TP 4000 - - +5.0 MC14C89B, P/646, 4 MC1488 EIA-232-DI
AB D/751 A MC14C88B EIA-562
R(1) 85 - - MC1489 EIA-232-D
MC1489A
Line Drivers
Table 2. EIA Standard
Output
Current t prop S= Single Party
Capa- Delay Ended Line Strobe Power Drivers
bility Time D= Differ- Opera- or Supplies Suffix! Per Companion
(mA) Max (ns) ential tion Enable (V) Device Package Package Receivers Comments
85 35 D V V +5.0 MC75174B P/648 4 SN75173 EIA-485
SN75175
48 20 MC3487 P/648, MC3486 EIA-422
D1751B AM26LS32 with 3-state
outputs
AM26LS31 PC/648
MC26LS31 D1751B
15 3500 S - ±7.0to MC14C88B P/646, MC14C89B EIA-232-DI
±12 D1751 A MC14C89AB EIA-562
Motorola Master Selection Guide 4.6-7 Analog and Interface Integrated Circuits
Table 4. EIA-232-EIV.28 CMOS Drivers/Receivers
Suffix! Power
Device Package Pins Drivers Receivers SuppUes(V) Features
MC145403 pn38, 20 3 5 ±5.0to±12
DWn51D
MC145404 4 4
MC145405 5 3
MC145406 P/648, 16 3
DWn51G,
SD/940B
MC145407 pn38, 20 +5.0 Charge Pump
DWn51D
MC145408 pn24, 24 5 5 ±5.0 to±12
DWn51E,
SD/940B
MC145583 DWn51F, 28 3 5 +3.3 to +5.0 On-board ring monitor circuit;
VF/940J charge pump, power down
MC145705 pn38, 20 2 3 +5.0 Charge Pump, Power Down
DWn51D
MC145706 3 2
MC145707 pn24, 24 3
DWn51E
8.0Vt018V MC1416,B
MOS (UlN2004A)
ReadIWrite Channel
Table 7. Hard Disk Drive Read Channel
Power TA Suffix!
Device Supply Comments (DC) Package
MC34250 5.0V 200 Mbps fully integrated partial response maximum likelihood hard disk Oto+70 FTAl840F
drive read/write channel which equalizes to a PR-IV shape and uses 8/9
rate (0, 4/4) coding.
Analog and Interface Integrated Circuits 4.6-8 Motorola Master Selection Guide
CMOS Display Drivers
These CMOS devices include digit as well as matrix drivers range of end equipment such as instruments, automotive
for LEOs, LCOs, and VFOs. They find applications over a wide dashboards, home computers, appliances, radios and clocks.
Table 9. Functions
Device Function Package
MCl4489 Multi-Character LED Display/Lamp Driver 738,7510
MC14495-1 Hexadecimal-to-7 Segment Latch/Decoder ROM/Driver 648,751G
MC14499 4-Digit 7-Segment LED Display Decoder/Driver with Serial Interface 707,7510
MC14511B BCD-to-7-Segment Latch/Decoder/Driver 648,751G
MC14513B BCD-to-7-Segment Latch/Decoder/Driver with Ripple Blanking 726,707
MC14543B BCD-to-7-Segment Latch/Decoder/Driver for Liquid Crystals 620,648
MC14544B BCD-to-7-Segment Latch/Decoder/Driver with Ripple Blanking 726, 707
MC14547B High-Current BCD-to-7-Segment Decoder/Driver 620,648
MC14558B BCD-to-7-Segment Decoder 620,648
MC145000 48-Segment Serial Input Multiplexed LCD Driver (Master) 709, 776
MC145001 44-Segment Serial Input Multiplexed LCD Driver (Slave) 707, 776
MC145453 33-Segment, Non-Multiplexed LCD Driver with Serial Interface 711,777
Motorola Master Selection Guide 4.6-9 Analog and Interface Integrated Circuits
Interface Circuits Package Overview
- • - -
CASE 620 CASE 646
P SUFFIX
CASE 648
N, P, PC SUFFIX
CASE 707
A SUFFIX
CASE 709
PSUFFIX
- - - CASE 711
PSUFFIX
CASE 724
PSUFFIX
CASE 726 CASE 738
PSUFFIX
CASE 751A CASE 751B CASE 7510 CASE 751E CASE 751F
o SUFFIX o SUFFIX OW SUFFIX OW SUFFIX OW SUFFIX
• •
CASE 751G
OW SUFFIX
CASE 776
FNSUFFIX
CASE 777
FNSUFFIX
•
CASE 840F
FTASUFFIX
• •
CASE 8480
FB SUFFIX
CASE 932
FTASUFFIX
•
CASE 940B
SO SUFFIX
CASE 940J
VFSUFFIX
Analog and Interface Integrated Circuits 4.6-10 Motorola Master Selection Guide
Communication Circuits
In Brief . ..
RF Page
Radio communication has greatly expanded its scope in the RF Communications ................................... 4.7-2
past several years. Once dominated by public safety radio, the Wideband IFs ...................................... 4.7-2
Wideband Single Conversion Receivers ............... 4.7-2
30 to 1000 MHz spectrum is now packed with personal and low Narrowband Single Conversion Receivers ............. 4.7-2
cost business radio systems. The vast majority of this Narrowband Dual Conversion Receivers ............... 4.7-3
equipment uses FM or FSK modulation and is targeted at short Universal Cordless Phone Subsystem ICs ............. 4.7-3
range applications. From mobile phones and VHF marine Transmitters ....................................... 4.7-3
radios to garage door openers and radio controlled toys, these Balanced Modulator/Demodulator ..................... 4.7-4
new systems have become a part of our lifestyle. Motorola Infrared Transceiver ................................ 4.7-4
Telecommunications .................................. 4.7-11
Analog has focused on this technology, adding a wide array of Subscriber Loop Interface Circuit .................... 4.7-11
new products including complete receivers processed in our PBX Architecture (Analog Transmission) .............. 4.7-12
exclusive 3.0 GHz MOSAIC® 1.5 process. New surface mount PCM Mono-Circuits ............................ 4.7-12
packages for high density assembly are available for all of Dual Tone Multiple Frequency Receiver ............ 4.7-15
these products, as well as a growing family of supporting ISDN Voice/Data Circuits ........................... 4.7-15
application notes and development kits. Integrated Services Digital Network ............... 4.7-15
Second Generation U-Interface Transceivers ...... 4.7-16
Telephone & Voice/Data Second Generation SIT-Interface Transceivers ..... 4.7-16
Traditionally, an office environment has utilized two Dual Data Link Controller ........................ 4.7-17
distinctly separate wired communications systems: Voice/Data Communication (Digital Transmission) ...... 4.7-18
telecommunications and data communications. Each had its Universal Digital Loop Transceiver . . . . . . . . . . . . . . .. 4.7-18
individual hardware components complement, and each ISDN Universal Digital Loop Transceiver II ......... 4.7-19
required its own independent transmission line system: twisted Electronic Telephone Circuit ......................... 4.7-19
Tone Ringers ..................................... 4.7-20
wire pairs for Telecom and relatively high priced coaxial cable Speech Networks ................................. 4.7-21
for Datacom. But times have changed. Today, Telecom and Speakerphones ................................... 4.7-25
Datacom coexist comfortably on inexpensive twisted wire pairs Voice Switched Speakerphone Circuit ............. 4.7-25
and use a significant number of components in common. This Voice Switched Speakerphone with
has led to the development and enhancement of PBX (Private IlProcessor Interface ........................... 4.7-27
Voice Switched Speakerphone Circuit ............. 4.7-28
Branch Exchanges) to the point where the long heralded
Family of Speakerphone ICs ..................... 4.7-29
"office of the future," with simultaneous voice and data Telephone Accessory Circuits ....................... 4.7-30
communications capability at each station, is no longer of the Audio Amplifier ................................. 4.7-30
future at all. The capability is here today! Current Mode Switching Regulator ................ 4.7-30
Motorola Semiconductor serves a wide range of 300 Baud FSK Modems ......................... 4.7-31
requirements for the voice/data marketplace. We offer both ADPCM Transcoder ............................ 4.7-31
Calling Line Identification (CLlD) Receiver ......... 4.7-32
CMOS and Analog technologies, each to its best advantage, CVSD ModulatorlDemodulator ................... 4.7-33
to upgrade the conventional analog voice systems and Summary of Bipolar Telecommunications Circuits ... 4.7-34
establish new capabilities in digital communications. Early Phase-Locked Loop Components ...................... 4.7-36
products, such as the solid-state single--chip crosspoint PLL Frequency Synthesizers ........................ 4.7-36
switch, the more recent monolithic Subscriber-Loop- Phase-Locked Loop Functions ...................... 4.7-37
Interface Circuit (SLlC), a single--chip CodeC/Filter (Mono- Package Overview ................................... 4.7-39
Circuit), the Universal Digital Loop Transceivers (UDLT),
basic rate ISDN (Integrated Services Digital Network), and
single--chip telephone circuits are just a few examples of
Motorola leadership in the voice/data area.
Motorola Master Selection Guide 4.7-1 Analog and Interface Integrated Circuits
RF Communications
Table 1. Wideband (FMlFSK) IFs
Max
Sensitivity Data Suffix!
Device Vee ICC (Typ) IF Mute RSSI Rate Notes Package
MC13055 3-12 V 25mA 20llV 40 MHz V V 2.0Mb Wideband Data IF, includes P/648,
datashaper DnS1B
MC13155 3-6 V 7.0mA IOOIlV 250 MHz - 10Mb Video Speed FM IF Dn51B
MC33S6 3-9 V 2SmA 30llV 200 MHz 10.7MHz V V 500 kb Includes front end mixer/L.O. pn38,
DWn51D
MC13156 2-£ V 5.0mA 2.01lV 500 MHz 21.4MHz - CT-2 FM/Demodulator DWn51E,
FB/873
MC3357 4-8 V 5.0mA 5.01lV 45 MHz 455 kHz V - >4.8kb Ceramic Quad P/648,
Detector/Resonator Dn51B
MC3359 4-9 V 7.0mA 2.01lV Scan output option pn07,
DWnS1D
MC3361C 2-8 V 6.0mA 60 MHz >2.4 kb Lowest cost receiver P648,
Dn51B
MC3371 V >4.8kb RSSI P/648,
Dn51B
MC3372, A RSSI, Ceramic Quad
Detector/Resonator
MC13150 3-6 V 1.8mA 1.01lV 500 MHz >9.6 kb Coilless Detector with FTB/873,
V Adjustable Bandwidth FTA/977
110
dB
Analog and Interface Integrated Circuits 4.7-2 Motorola Master Selection Guide
RF Communications (continued)
Table 4. Narrowband Dual Conversion Receivers - FM/FSK - VHF
12dB
SINAD IF2
Sensitivity RF (Limiter Data Suffix!
Device VCC ICC (Typ) Input IFl In) Mute RSSI Rate Notes Package
MC3362 2-7 V 3.0mA 0.7~V 180 10.7 455 kHz - V > 4.8 Includes buffered Pf724,
MHz MHz kb VCOoutput DWf751E
r----
MC3363 4.0mA 0.4 ~V V Includes RF DWf751F
amp/mute
Motorola Master Selection Guide 4.7--3 Analog and Interface Integrated Circuits
Table 7. Balanced Modulator/Demodulator
Suffix!
Device Vce lec Function Package
MC1496 3-5 V lOrnA General purpose balanced modulator/demodulator for AM, SSB, FM detection P/646,
with Carrier Balance >50 dB 0/751 A
Rxln---
Rx
Out
Carrier
Detect Data
Out
Tx In
SPI
Tx Out
Low
Tx VCO Battery
Indicator
Analog and Interface Integrated Circuits 4.7-4 Motorola Master Selection Guide
Universal Cordless Telephone Subsystem IC with Scrambler
MC13110FB
TA = -40° to +85°C, Case 848B
The MC1311 0 integrates several of the functions required • Dual Universal Programmable PLL
for a cordless telephone into a single integrated circuit. This - Supports New 25 Channel U.S. Standard with New
significantly reduces component count, board space External Switches
requirements, and external adjustments. It is designed for use - Universal Design for Domestic and Foreign CT-1
in both the handset and the base. Standards
- Digitally Controlled Via a Serial Interface Port
• Dual Conversion FM Receiver - Receive Side Includes 1st LO VCO, Phase Detector,
- Complete Dual Conversion Receiver - Antenna In to and 14-Bit Programmable Counter and 2nd LO with
Audio Out 80 MHz Maximum Carrier Frequency 12-Bit Counter
- RSSI Output - Transmit Section Contains Phase Detector and 14-Bit
- Carrier Detect Output with Programmable Threshold Counter
- Comparator for Data Recovery - MPU Clock Outputs Eliminates Need for MPU Crystal
- Operates with Either a Quad Coil or Ceramic • Supply Voltage Monitor
Discriminator
- Provides Two Levels of Monitoring with Separate
• Compander Outputs
- Expandor Includes Mute, Digital Volume Control, - Separate, Adjustable Trip Points
Speaker Driver, 3.5 kHz Low Pass Filter, and Pro-
• Frequency Inversion Scrambler/Descrambler
grammable Gain Block
- Compressor Includes Mute, 3.5 kHz Low Pass Filter, - Can Be Enabled/Disabled Via MPU Interface
Limiter, and Programmable Gain Block - Programmable Carrier Modulation Frequency
• 2.7 to 5.5 V Operation with One-Third the Power
Consumption of Competing Devices
Rxln
Rx PO Out
Rx PO In Rx
Out
Carrier
Detect
Tx In
Tx Out
Low
Tx VCO Battery
Indicator
Motorola Master Selection Guide 4.7-5 Analog and Interface Integrated Circuits
Narrowband FM Receiver
MC13135/136P, ow
TA = -40° to +85°C, Case 724, 751E
The MC13135 is a full dual conversion receiver with improved mixer third order intercept enables the MC13135 to
oscillators, mixers, Limiting IF Amplifier, Quadrature accommodate larger input signal levels.
Discriminator, and RSSI circuitry. It is designed for use in • Complete Dual Conversion Circuitry
security systems, cordless phones, and VHF mobile and • Low Voltage: 2.0 to 6.0 Vdc
portable radios. Its wide operating supply voltage range and • RSSI with Op Amp: 65 dB Range
low current make it ideal for battery applications. The • Low Drain Current: 3.5 mA Typical
Received Signal Strength Indicator (RSSI) has 65 dB of • Improved First and Second Mixer 3rd Order Intercept
dynamic range with a voltage output, and an operational • Detector Output Impedance: 25 n Typically
amplifier is included for a dc buffered output. Also, an
Vee
"f 0.t
RFin
..
Audio
Ol!lPut
RSSI
Output
455kHz
o Quad Coil
Toko
7MC-<lt28Z
Analog and Interface Integrated Circuits 4.7-6 Motorola Master Selection Guide
Narrowband FM Coilless Detector IF Subsystem
MC13150FTA, FTB
TA = -40° to +85°C, Case 977, 873
The MC13150 is a narrowband FM IF subsystem targeted Applications for the MC13150 include cellular, CT-1
at cellular and other analog applications. Excellent high 900 MHz cordless telephone, data links and other radio
frequency performance is achieved, with low cost, through systems utilizing narrowband FM modulation.
use of Motorola's MOSAIC 1.5™ RF bipolar process. The • Linear Coilless Detector
MC13150 has an onboard Colpitts VCO for Crystal controlled • Adjustable Demodulator Bandwidth
second LO in dual conversion receivers. The mixer is a double • 2.5 to 6.0 Vdc Operation
balanced configuration with excellent third order intercept. It • Low Drain Current: < 2.0 mA
is useful to beyond 200 MHz. The IF amplifier is split to • Typical Sensitivity of 2.0 ~V for 12 dB SINAD
accommodate two low cost cascaded filters. RSSI output is • IIP3, Input Third Order Intercept Point of a dBm
derived by summing the output of both IF sections. The • RSSI Range of Greater Than 100 dB
quadrature detector is a unique design eliminating the • Internal 1.4 kO Terminations for 455 kHz Filters
conventional tunable quadrature coil. • Split IF for Improved Filtering and Extended RSSI Range
LO Input
Mixer
Out
t. 220
1.5k
n
RSSI
1 - - - 0 Buffer
1 - - -_ _1---0 Detector
Output
RL
100k
V18-V17 = 0;
flF =455 kHz
Motorola Master Selection Guide 4.7-7 Analog and Interface Integrated Circuits
Wideband FM IF System
MC13156DW, FB
TA =-40° to +85°C, Case 751 E, 873
The MC13156 is a wideband FM IF subsystem targeted at Applications for the MC13156 inciudeCT-2, wideband
high performance data and analog applications. Excellent data links, and other radio systems utilizing GMSK, FSK or FM
high frequency performance is achieved, with low cost, modulation.
through use of Motorola's MOSAIC 1.5™ RF bipolar process. • 2.0 to 6.0 Vdc Operation
The MC13156 has an onboard Colpitts VCO for PLL • Typical Sensitivity of 6.0 J.lV for 12 dB SINAD
controlled multichannel operation. The mixer is useful to • RSSI Dynamic Range Typically 80 dB
beyond 200 MHz and may be used in a differential, balanced, • High Performance Data Shaper for Enhanced CT-2
or single-ended configuration. The IF amplifier is split to Operation
accommodate two low cost cascaded filters. RSSI output is • Internal 300 Q and 1.4 kQ Terminations for 10.7 MHz and
derived by summing the output of both IF sections. A precision 455 kHz Filters
data shaper has a hold function to preset the shaper for fast • Split IF for Improved Filtering and Extended RSSI Range
recovery of new data.
1-------------,
I MC13156 I
144.455 MHz I I
RF Input
.---------+--0 Carrier
Detect
RSSI
1--_--.-----+--0 Output
10 n
430
Data Slicer
f---------+--Q Hold
10k
Data
' - - - - - - - - - + - - 0 Output
10.7 MHz
Vee
"::" lOOn
lOOk
Vee
+
I 1.011
Analog and Interface Integrated Circuits 4.7-8 Motorola Master Selection Guide
Wideband FM IF Subsystem
MC13158FTB
TA =-40° to +85°C, Case 873
The MC13158 is a wide band IF subsystem that is designed Applications include DECT, wideband wireless data links
for high performance data and analog applications. Excellent for personal and portable laptop computers and other battery
high frequency performance is achieved, with low cost, operated radio systems which utilize GFSK, FSK or FM
through the use of Motorola's MOSAIC 1.5™ RF bipolar modulation.
process. The MC13158 has an on-board grounded collector • Designed for DECT Applications
VCO transistor that may be used with a fundamental or • 1.8 to 6.0 Vdc Operating Voltage
overtone crystal in single channel operation or with a PLL in • Low Power Consumption in Active and Standby Mode
multi-channel operation. The mixer is useful to 500 MHz and • Greater than 600 kHz Detector Bandwidth
may be used in a balanced differential or single ended • Data Slicer with Special Off Function
configuration. The IF amplifier is split to accommodate two low • Enable Function for Power Down of Battery Operated
cost cascaded filters. RSSI output is derived by summing the Systems
output of both IF sections. A precision data shaper has an Off • RSSI Dynamic Range of 80 dB Minimum
function to shut the output "off" to save current. An enable • Low External Component Count
control is provided to power down the IC for power
management in battery operated applications.
IF Deel OS Out
Motorola Master Selection Guide 4.7-9 Analog and Interface Integrated Circuits
UHF, FM/AM Transmitter
MC131751176D
TA =0° to +70°C, Case 751 B
The MC13175 and MC13176 are one chip FM/AM • Low Number of External Parts Required
transmitter subsystems designed for AM/FM communication • Low Operating Supply Voltage (1.8-5 Vdc)
systems operating in the 260 to 470 MHz band covered by • Low Supply Drain Currents
FCC Title 47; Part 15. They include a Colpitts crystal reference • Power Output Adjustable (Up to +10 dBm)
oscillator, UHF oscillator, +8 (MC13175) or +32 (MC13176) • Differential Output for Loop Antenna or Balun
prescaler, and phase detector forming a versatile PLL system. Transformer Networks
Another application is as a local oscillator in a UHF or 900 MHz • Power Down Feature
receiver. MC13175/176 offer the following features: • ASK Modulated by Switching Output "On"rOW
• UHF Current Controlled Oscillator • MC13175 - fo = 8 x fref
• Use Easily Available 3rd Overtone or Fundamental • MC13176 - fo = 32 x fref
Crystals for Reference
Coilcraft
15Q-()5J08
81
100 Pf
MC13176.L MC13175 r
--3o;,~----M-C-1131~17-&-3-0--~-+-0:;:-Mc1;7;:
MC13176-180Pp t e
Cry.1a1
Fundamen1al
VCC 0.82" I 10 MHz
MC13175 VCC
Analog and Interface Integrated Circuits 4.7-10 Motorola Master Selection Guide
Telecommunications
Subscriber Loop Interface Circuit (SLlC)
MC33120/1P, FN
TA = -40° to +85°C, Case 738, 776
L
-::;-'""-:--:----:--:-<?-- (+5>0
.----(j>--t"-:-------t--:-----:----------;-;::-=;:j-~>-=-::::;'"""--:--n-------;:::::;-~-t::>>::-::-~>t,...,.=>~>~:-?!:.,.-:::> vDD
V)
>.---".-(;14-- VDG
(Dig. Gnd
r-'........()oo- PDI/8T2
:t~::~~~~~~:l~!=l===~~~~~~~~~~Ff~~Ff~::~F=::~~
I' """'.-.,-()01>--- 8T1
VAG
(Ana. Gnc
>'-;:::::;:!=;:t:!=t--"9">--- RXI
.:>:-......--o----l~ TXO
W-~:.::~=~~>-. RFO
,-:--'-.....,..-'::--'::-"---'--'-'"""""'"'0-- CF
~6-!:======::::!======~~--_.:.~--"'--....J.
_ _ .i....:. _ _ _ _ _ _ _ ____ ~ .. >'.
_ _ _ _ _ _ _ :.;;..i....:..i....:..:,,;,,>
~_. ..i....:.>.:.;;. _____ JI
(Battery)
, Indica1es Trimmed Resistor
Motorola Master Selection Guide 4.7-11 Analog and Interface Integrated Circuits
PBX Architecture (Analog Transmission)
PCM Mono-Circuits Codec-Filters (CMOS LSI)
ROC
VSS-
VOO-
---- POI
MulA
VLS
Analog and Interface Integrated Circuits 4.7-12 Motorola Master Selection Guide
PBX Architecture (continued)
MC14LC5540P, OW, FU
Case 710, 751F, 873
The MC14LC5540 ADPCM Codec is a single chip The ADPCM Codec is designed to meet the 32 kbps
implementation of a PCM Codec-Filter and an ADPCM ADPCM conformance requirements of CCITT
encoder/decoder, and therefore provides an efficient solution Recommendation G.721 (1988) and ANSI T1.301 (1987). It
for applications requiring the digitization and compression of also meets ANSI T1.303 and CCITT Recommendation G.723
voiceband signals. This device is designed to operate over a for 24 kbps ADPCM operation, and the 16 kbps ADPCM
wide voltage range, 2.7 V to 5.25 V, and as such is ideal for standard, CCITT Recommendation G.726. This device also
battery powered as well as ac powered applications. The meets the PCM conformance specification of the CCITT
MC14LC5540 ADPCM Codec also includes a serial control G.714 Recommendation.
port and internal control and status registers that permit a
microcomputer to exercise many built-in features.
Motorola Master Selection Guide 4.7-13 Analog and Interface Integrated Circuits
PBX Architecture (continued)
MC145537EVK
ADPCM Codec Evaluation Kit
The MC145537EVK is the primary tool for evaluation and • Easily Interfaced to Test Equipment, Customer System,
demonstration of the MC14LC5540 ADPCM Codec. It Second MC145537EVK or MC145536EVK (5.0 V Only)
provides the necessary hardware and software interface to for Full Duplex Operation
access the many features and operational modes of the • Convenient Access to Key Signals
MC14LC5540 ADPCM Codec. • Piezo Loudspeaker
• Provides Stand Alone Evaluation on Single Board • EIA-232 Serial Computer Terminal Interface for Control
• The kit provides Analog-ta-Analog, Analog-to-Digital or of the MC14LC5540 ADPCM Codec Features
Digital-to-Analog Connections - with Digital Connections • Compatible Handset Provided
being 64 kbps PCM, 32 or 24 kbps ADPCM, or 16 kbps • Schematics, Data Sheets, and User's Manual Included
CCITT G.726 or Motorola Proprietary ADPCM
• +5.0 V Only Power Supply, or 5.0 V Plus 2.7 to 5.25 V
Supply
+5.0 V
- r- -Gnd
r-
+3.0 V
--
Piezo
I~I~I~I
Speaker
Clock Generation
Circuitry CIocks
1
I 5.0 V/3.0 V
Level Shift
I MC145407
EIA-232 Driver/Receiver EI A-232
1 I SCI
Analog and Interface Integrated Circuits 4.7-14 Motorola Master Selection Guide
PBX Architecture (continued)
MC145536EVK
Codeo-Filter/ADPCM Transcoder Evaluation Kit
ISDN Voice/Data Circuits
The MC145536EVK is the primary tool for evaluation and Integrated Services Digital Network
demonstration of the MC145480 Single +5.0 V supply PCM ISDN is the revolutionary concept of converting the present
Codeo-Filter and the MC145532 ADPCM Transcoder (see analog telephone networks to an end-to-end global digital
"Telephone Accessory Circuits"). The MC145536EVK network. ISDN standards make possible a wide variety of
provides the necessary hardware needed to evaluate the services and capabilities that are revolutionizing
many separate operating modes under which the MC145480 communications in virtually every industry.
and MC145532 are intended to operate. Motorola's ISDN product family includes the MC14LC5472
and MC145572 U-Interface Transceivers, the MC145474/75
• Provides Stand Alone Evaluation on a Single Board and MC145574 SIT-Interface Transceivers, MC145488 Dual
• Easily Interfaced to Test Equipment, Customer System, Data Link Controller, and the MC68302 Integrated
or Second MC145536EVK Multi-Protocol Processor. These are supported by a host of
• Convenient Access to Key Signals related devices including the MC145480 +5.0 V PCM
• Generous Wire-Wrap Area for Application Development Codeo-Filter, MC145532 ADPCM Transcoder, MC14LC5540
• The kit provides Analog-to-Analog, Analog-to-Digital, or ADPCM Codec, MC145500 family of single-chip
Digital-to-Analog Connections - with Digital Connections codec/filters, MC145436A DTMF Decoder, MC33120
Being 64 kbps PCM; 32, 24, or 16 kbps Subscriber.Loop Interface Circuit, MC34129 Switching Power
Motorola Proprietary ADPCM Supply Controller, and the MC145406/07 CMOS EIA 232-E
• Compatible Handset Included Driverl Receiver family.
• Schematics, Data Sheets, and User's Manual included Motorola's key ISDN devices fit into four ISDN network
applications: a digital subscriber line card, an NT1 network
r--------------,
termination, an ISDN terminal adapter, and an ISDN terminal.
I Digital subscriber line cards are used in central offices, remote
I Clocks
concentrators, channel banks, T1 multiplexers, and other
I
I switching equipment. The NT1 network termination block
I illustrates the simplicity of remote U- to SIT-interface
I conversion. The ISDN terminal adapter and ISDN terminal
block show how Motorola ICs are used to combine voice and
Analog Digital data in PC compatible boards, digital telephones, and other
Interlace Interlace terminal equipment. Expanded applications such as a PBX
may include these and other Motorola ISDN circuits. Many
I "non-ISDN" uses, such as pairgain applications, are
I appropriate for Motorola's ISDN devices as well.
IL _ ___________ _
MC145536EVK
Motorola Master Selection Guide 4.7-15 Analog and Interface Integrated Circuits
ISDN Voice/Data Circuits (continued)
TA NT1
MC145488 MC145574 LT
MC145574 MC145572
SCP MC145572
GCI IDL
DDLC SfT SIT U
IDL Chip Chip U C
Chip SCP e
NT1fTA r
a
I
SfT
Chip o
SCP LT f
f
MC68302 MC145572 MC145572
I
IDL
c
U e
RS232 Chip SCP
Analog and Interface Integrated Circuits 4.7-16 Motorola Master Selection Guide
ISDN Voice/Data Circuits (continued)
Gated
Clocks
L---..!f----t---J.. SCP
MCI45572EVK
Motorola Master Selection Guide 4.7-17 Analog and Interface Integrated Circuits
Voice/Data Communication UDLTs utilize a 256 kilobaud Modified Differential Phase
Shift Keyed (MDPSK) burst modulation technique for
(Digital Transmission) transmission to minimize radio frequency, electromagnetic,
and crosstalk interference. Implementation through CMOS
2-Wire Universal Digital Loop technology takes advantage of low-power operation,
Transceiver (UDLT) increased reliability, and the proven capabilities to perform
complex telecommunications functions.
MC145422P, ow Master Station Functional Features
Case 708, 751 E • Provides Synchronous Duplex 64 kbitslSecond
Voice/Data Channel and Two 8 kbits/Second Signaling
MC145426P, OW Slave Station Data Channels Over One 26 AWG Wire Pair Up to 2 km.
• Compatible with Existing and Evolving Telephone Switch
Case 708, 751E
Architectures and Call Signaling Schemes
The UDLT family of transceivers allows the use of existing • Automatic Detection Threshold Adjustment for Optimum
twisted-pair telephone lines (between conventional Performance Over Varying Signal Attenuations
telephones and a PBX) for the transmission of digital data. • Protocol Independent
With the UDLT, every voice-only telephone station in a PBX • Single 5.0 V to 8.0 V Power Supply
system can be upgraded to a digital telephone station that
handles the complex voice/data communications with no MC145422 Master UDLT
increase in cabling costs. • 2.048 MHz Master Clock
In implementing a UDLT-based system the AID to D/A • Pin Controlled Power-Down and Loop-Back Features
conversion function associated with each telset is relocated • Variable Data Clock - 64 kHz to 2.56 MHz
from the PBX directly to the telset. The SLiC (or its equivalent • Pin Controlled Insertion/Extraction of 8 kbits/Seconds
circuit) is eliminated since its signaling information is Channel into LSB of 64 kbitslSecond Channel for
transmitted digitally between two UDLTs. Simultaneous Routing of Voice and Data Through PCM
The UDLT master-slave system incorporates the Voice Path of Telephone Switch
modulation/demodulation functions that permit data
communications over a distance up to 2 kilometers. It also MC145426 Slave UDLT
provides the sequence control that govems the exchange of • Compatible with MC145500 Series and Later PCM
information between master and slave. Specifically, the master Mono-Circuits
resides on the PBX line card where it transmits and receives • Automatic Power-Up/Down Feature
data over the wire pair to the telset. The slave is located in the • On-Ghip Data Clock Recovery and Generation
telset and interfaces the mono--circuit to the wire pair. Data • Pin Controlled 500 Hz D3 or CCITT Format PCM Tone
transfer occurs in 1Q-bit bursts (8 bits of data and 2 signaling Generator for Audible Feedback Applications
bits), with the master transmitting first, and the slave responding
in a synchronized half-duplex transmission format.
r ______~U::::DL:.!.J_ _ _.... Signaling Input 1
Line
Driver Receive Data Input
Output
1-----_
f-----:
\IaIid.Data.
1-----1-- I.oop.Sack-
1 - - - -...._
Power Down
T/R Data Clock
COnvertCi"ock - -
Slave
XTAL In Only
XT~~ _ _ _ _ j_
Transmit Enable
Transmit Data
Signal Output 1
Signal Output 2
Analog and Interface Integrated Circuits 4.7-18 Motorola Master Selection Guide
Voice/Data Communication (Digital Transmission) (continued)
Electronic Telephone
The Complete Electronic Telephone Circuit
MC34010P, FN
TA = -20 to +60°C, Case 711,777
0
The conventional transformer-driven telephone handset is • DTMF generator uses low cost ceramic resonator with
undergoing major innovations. The bulky transformer is accurate frequency synthesis technique
disappearing. So are many of its discrete components, • Tone ringer drives piezoelectric transducer and satisfies
including the familiar telephone bell. They are being replaced EIA-470 requirements
with integrated circuits that perform all the major handset • Speech network provides 2-t0-4 wire conversion with
functions simply, reliably and inexpensively ... functions such adjustable sidetone utilizing an electret transmitter
as 2-to-4 wire conversion, DTMF dialing, tone ringing, and a • On-chip regulator insures stable operation over wide
variety of related activities. range of loop lengths
The culmination of these capabilities is the Electronic • 12L technology provides low 1.4 V operation and high
Telephone Circuit, the MC34010. These ICs place all of the static discharge immunity
above mentioned functions on a single monolithic chip. • Microprocessor interface port for automatic dialing features
These telephone circuits utilize advanced bipolar analog
(12L) technology and provide all the necessary elements of a Also Available
modem tone-dialing telephone. The MC34010 even A broad line of additional telephone components for
incorporates an MPU interface circuit for the indusion of customizing systems design.
automatic dialing in the final system .
• Provides all basic telephone functions, including DTMF
dialer, tone ringer, speech network and line voltage
regulator
Hook Switch
//r-~
/ Tip
Ring
MC34010
Electret
Microphone
Motorola Master Selection Guide 4.7-19 Analog and Interface Integrated Circuits
Tone Ringers
The MC34012, MC34017, and MC34117 Tone Ringers are circuit MUST function when a ringing signal is provided, and
designed to replace the bulky bell assembly of a telephone, MUST NOT ring when other signals (speech, dialing, noise)
while providing the same function and performance under a are on the line. The tone ringers described below were
variety of conditions. The operational requirements spelled designed to meet those requirements with a minimum of
out by the FCC and EIA-470, simply stated, are that a ringer external components.
MC34012P, D
TA = -20° to +60°C, Case 626, 751
• Complete Telephone Bell Replacement
• On-Chip Diode Bridge and Transient
Protection
• Single-Ended Output to Piezo Ring >------<:H!::F-<..........
Transducer
• Input Impedance Signature Meets Bell
and EIA Standards
• Rejects Rotary Dial and Hook Switch
Transients
• Adjustable Base Frequencies
• Output Frequency to Warble Ratio -
MC34012-1:80
MC34012-2:160
MC34012-3:40
MC34017P, D
TA = -20° to +60°C, Case 626, 751
Analog and Interface Integrated Circuits 4.7-20 Motorola Master Selection Guide
Tone Ringers (continued)
MC34217P, D
TA = -20° to +60°C, Case 626, 751
Speech Networks
MC34114P, DW
TA = -20° to +70°C, Case 707,751 D
Tip 0-------,
Ring 0--------'
Motorola Master Selection Guide 4.7-21 Analog and Interface Integrated Circuits
Speech Networks (continued)
MC34016DW, P
TA =-20° to +70°C, Case 7510, 738
The MC34016 is a telephone line interface meant for use • Double Wheatstone Bridge Architecture
in cordless telephone base stations for CTO, CT1, CT2 and • Automatic Gain Control Function
DECT. The circuit forms the interface towards the telephone
line and performs ali speech and line interface functions like Transmit Channel
dc and ac line termination, 2-4 wire conversion, automatic • Symmetrical Inputs Capable of Handling Large Voltage
gain control and hookswitch control. Adjustment of Swing
transmission parameters is accomplished by two 8 bit • Gain Select Option via Serial Bus Interface
registers accessible via the integrated serial bus interface and • Transmit Mute Function, Programmable via Bus
by external components. • Large Voltage Swing Capability at the Telephone Line
• DC Masks for Voltage and Current Regulation
• Supports Passive or Active AC Set Impedance Receive Channel
Applications • Double Sidetone Architecture for Optimum Line Matching
• Double Wheatstone Bridge Sidetone Architecture • Symmetrical Outputs Capable of Producing High Voltage
• Symmetrical Inputs and Outputs with Large Signal Swing Swing
Capability • Gain Select Option via Serial Bus Interface
• Gain Setting and Mute Function for Tx and Rx Amplifiers • Receive Mute Function, Programmable via Serial Bus
• Very Low Noise Performance
• Serial Bus Interface SPI Compatible Serial Bus Interface
• Operation from 3.0 V to 5.5 V • 3-Wire Connection to Microcontrolier
• One Programmable Output Meant for Driving a
FEATURES
Hookswitch
Line Driver Architecture • Two Programmable Outputs Capable of Driving Low
• Two DC Masks for Voltage Regulation Ohmic Loads
• Two DC Masks for Current Regulation • Two Eight Bit Registers for Parameter Adjustment
• Passive or Active Set Impedance Adjustment
Rx
Outputs
Tx
Inputs
A(lip)
' - - - - t - - - B (Ring)
Analog and Interface Integrated Circuits 4.7-22 Motorola Master Selection Guide
Speech Networks (continued)
MC34216DW
TA =0° to +70°C, Case 751 F
The MC34216 is developed for use in telephone • Earpiece Gain Increase Switch
applications where besides the standard telephone functions • Microphone Squelch Function
also the group listening-in feature is required. In cooperation • Transmit Amplifier Soft Clipping
with a microcontroller, the circuit performs all basic telephone
Dialing and Ringing
functions including DTMF generation and pulse-dialing. The
listening-in part includes a loudspeaker amplifier, an • Generates DTMF, Pilot Tones and Ring Signal
anti-howling circuit and a strong supply. In combination with • Interrupter Driver for Pulse-Dialing
the TCA3385, the ringing is performed via the loudspeaker. • Low Current While Pulse-Dialing
• Optimized for Ringing via Loudspeaker
FEATURES • Programmable Ring Melodies
Line Driver and Supply • Uses Inexpensive 500 kHz Resonator
• DC and AC Termination of the Line Loudspeaking Facility
• Selectable Masks: France, U.K., Low Voltage
• Integrated Loudspeaker Amplifier
• Current Protection
• Peak-to-Peak Limiter Prevents Distortion
• Adjustable Set Impedance for Resistive and Complex
• Programmable Volume
Termination
• Anti-Howling Circuitry for Group Listening-In
• Efficient Supply Point for Loudspeaker Amplifier and
• Interfacing for Handsfree Conversation
Peripherals
Application Areas
Handset Operation
• Corded Telephony with Group Listening-In
• Transmit and Receive Amplifiers
• Cordless Telephony Base Station with Group Listening-In
• Adjustable Sidetone Network
• Telephones with Answering Machines
• Line Length AGC
• Fax, Intercom, Modem
• Microphone and Earpiece Mute
Line +
Handset
Earpiece
Handset
Microphone
Base
Loudspeaker
Line-
Motorola Master Selection Guide 4.7-23 Analog and Interface Integrated Circuits
Speech Networks (continued)
TCA3388DP, FP
TA = 0° to +70°C, Case 738, 751 D
The TCA3388 is a telephone line interface circuit which • Double Anti-Sidetone Network
performs the basic functions of a telephone set in combination • Line Length AGC
with a microcontroller and a ringer. It includes dc and ac line • Microphone and Earpiece Mute
termination, the hybrid function with 2 adjustable sidetone • Transmit Amplifier Soft Clipping
networks, handset connections and an efficient supply point.
Dialing and Ringing
FEATURES • Interrupter Driver for Pulse-Dialing
Line Driver and Supply • Reduced Current Consumption During Pulse-Dialing
• DC and AC Termination of the Telephone Line • DTMF InterfaCing
• Selectable DC Mask: France, U.K., Low Voltage • Ringing via External Ringer
• Current Protection Application Areas
• Adjustable Set Impedance for Resistive and Complex
• Corded Telephony
Termination
• Cordless Telephony Base Station
• Efficient Supply Point for Peripherals
• Answering Machines
• Hook Status Detection
• Fax
Handset Operation • Intercom
• Transmit and Receive Amplifiers • Modem
Line +
Handset
Earpiece
Handset
Microphone
Line-
Analog and Interface Integrated Circuits 4.7-24 Motorola Master Selection Guide
Speakerphones
Voice Switched Speakerphone Circuit
MC34018P, ow
TA = -20° to +60°C, Case 710, 751F
The MC34018 Speakerphone integrated circuit • All Necessary Level Detection and Attenuation Controls
incorporates the necessary amplifiers, attenuators, and for a Hands-Free Telephone in a Single Integrated
control functions to produce a high quality hands-free Circuit
speakerphone system. Included are a microphone amplifier, • Background Noise Level Monitoring with Long Time
a power audio amplifier for the speaker, transmit and receive Constant
attenuators, a monitoring system for background sound level, • Wide Operating Dynamic Range Through Signal
and an attenuation control system which responds to the Compression
relative transmit and receive levels as well as the background • On-Chip Supply and Reference Voltage Regulation
level. Also included are all necessary regulated voltages for • Typical 100 mW Output Power (into 25 0) with Peak
both internal and external circuitry, allowing line-powered Limiting to Minimize Distortion
operation (no additional power supplies required). A Chip • Chip Select Pin for Active/Standby Operation
Select pin allows the chip to be powered down when not in use. • Linear Volume Control Function
A volume control function may be implemented with an
external potentiometer. MC34018 applications include
speakerphones for household and business uses, intercom
systems, automotive telephones, and others.
Electret
Microphone
Speaker
Telephon~
Line'9
----'INv---
Receive Volume Control
Motorola Master Selection Guide 4.7-25 Analog and Interface Integrated Circuits
Speakerphones (continued)
The MC34118 Voice Switched Speakerphone circuit 5.0 mAo The MC34118 can be interfaced directly to Tip and
incorporates the necessary amplifiers, attenuators, level Ring (through a coupling transformer) for stand-alone
detectors, and control algorithm to form the heart of a high operation, or it can be used in conjunction with a handset
quality hands-free speakerphone system. Included are a speech network and/or other features of a featurephone.
microphone amplifier with adjustable gain and mute control, • Improved Attenuator Gain Range: 52 dB Between
Transmit and Receive attenuators which operate in a Transmit and Receive
complementary manner, level detectors at input and output of • Low Voltage Operation for Line-Powered Applications
both attenuators,and background noise monitors for both the (3.0 to 6.5 V)
transmit and receive channels. A dial tone detector prevents • 4-Point Signal Sensing for Improved Sensitivity
the dial tone from being attenuated by the Receive • Background Noise Monitors for Both Transmit and
background noise monitor circuit. Also included are two line Receive Paths
driver amplifiers which can be used to form a hybrid network • Microphone Amplifier Gain Set by External Resistors -
in conjunction with an external coupling transformer. A Mute Function Included
high-pass filter can be used to filter out 60 Hz noise in the • Chip Disable for Active/Standby Operation
receive channel, orfor other filtering functions. A Chip Disable • On Board Filter Pinned-Out for User Defined Function
pin permits powering down the entire circuit to conserve power • Dial Tone Detector Inhibits Receive Idle Mode During Dial
on long loops where loop current is at a minimum. Tone Presence
The MC34118 may be operated from a power supply, or • Compatible with MC34119 Speaker Amplifier
it can be powered from the telephone line, requiring typically
( Ring
Analog and Interface Integrated Circuits 4.7-26 Motorola Master Selection Guide
Speakerphones (continued)
MC33218AP, ow
TA = -40° to +85°C, Case 724, 751E
The MC33218A, Voice Switched Speakerphone circuit • Low Voltage Operation: 2.5 to 6.0 V
incorporates the necessary amplifiers, attenuators, level • 2-Point Sensing, Background Noise Monitor in Each Path
detectors, and control algorithm to form the heart of a high • Chip Disable Pin for Active/Standby Operation
quality hands-free speakerphone system. Included are a • Microphone Amplifier Gain Set by External Resistors -
microphone amplifier with adjustable gain, and mute control, Mute Function Included
transmit and receive attenuators which operate in a • Dial Tone Detector to Inhibit Receive Idle Mode During
complementary manner, and level detectors and background Dial Tone Presence
noise monitors for both paths. A dial tone detector prevents • Microprocessor port for controlling:
dial tone from being attenuated by the receive background • Receive Volume Level (16 Steps)
noise monitor. A Chip Disable pin permits powering down the • Attenuator Range (26 or 52 dB, Selectable)
entire circuit to conserve power. • Microphone Mute
Also included is an 8-bit serial Ilprocessor port for • Force to Transmit, Receive, Idle or Normal Voice
controlling the receive volume, microphone mute, attenuator Switched Operation
gain, and operation mode (force to transmit, force to receive, • Compatible with MC34119 Speaker Amplifier
etc.). Data rate can be up to 1.0 MHz. The MC33218A can be
operated from a power supply, or from the telephone line,
requiring typically 3.8 mAo It can also be used in intercoms and
other voice-activated applications.
Tx Output
Rx Input
Vcc
Chip Disable
Motorola Master Selection Guide 4.7-27 Analog and Interface Integrated Circuits
Speakerphones (continued)
MC33219AP, ADW
TA =-40° to +85°C, Case 724, 751 E
The MC33219A Voice Switched Speakerphone Circuit 4.0 mA. The MC33219A can be interfaced directly to Tip and
incorporates the necessary amplifiers, attenuators, level Ring (through a coupling transformer for stand-alone
detectors, and control algorithm to form the heart of a high operation, or it can be used in conjuction with a handset
quality hands-free speakerphone system. Included are a speech network and/or other features of a featurephone.
microphone amplifier with adjustable gain, and mute control, • Low Voltage Operation: 2.7 to 6.0 V
transmit and receive attenuators which operate in a • 2-Point Sensing, Background Noise Monitor in Each Path
complementary manner, and level detectors and background • Chip Disable Pin for Active/Standby Operation
noise monitors. A dial tone detector prevents dial tone from • Microphone Amplifier Gain Set by External Resistors -
being attenuated by the receive background noise monitor. A Mute Function Included
Chip Disable pin permits powering down the entire circuit to • Dial Tone Detector to Inhibit Receive Idle Mode During
conserve power. Dial Tone Presence
The MC33219A may be operated from a power supply, or • Volume Control Range: 34 dB
it can be powered from the telephone line requiring typically • Compatible with MC34119 Speaker Amplifier
Mute
TxOutput
Speaker Rx Input
VCC
Chip Disable
Wv
Volume
Control
Analog and Interface Integrated Circuits 4.7-28 Motorola Master Selection Guide
Speakerphones (continued)
External hybrid required Hybrid amplifiers on board External hybrid required External hybrid required
Speaker amplifier is on board Extemal speaker amplifier External speaker amplifier External speaker amplifier
(34 dB, 100 mW) required (MC34119) required (MC34119) required (MC34119)
Speaker amplifier reduces gain Receive gain is reduced as Receive gain is reduced as Receive gain is reduced as
to prevent clipping supply voltage falls to prevent supply voltage falls to prevent supply voltage falls to prevent
clipping clipping clipping
Volume control is linear. Cannot Volume control is linear, and 8-bit IlP serial port controls: Volume control is linear, and
override voice switched microphone mute has separate • Volume control (16 steps) microphone mute has separate
operation except through pin. Cannot override voice • Microphone mute pin. Attenuator range fixed at
additional circuitry. Attenuator switched operation except • Range selection 52 dB. Cannot override voice
gain is fixed at 44 dB (slightly through additional circuitry. (26 dB or 52 dB) switched operation except
variable). No microphone mute. Attenuator gain is fixed at 52 dB. • Force to transmit, idle, through additional circuitry.
receive, or normal
voice switched operation
28 Pin DIP and SOIC packages 28 Pin DIP and SOIC packages 24 Pin narrow DIP and SOIC 24 Pin narrow DIP and SOIC
packages packages
Motorola Master Selection Guide 4.7-29 Analog and Interface Integrated Circuits
Telephone Accessory Circuits
Audio Amplifier
MC34119P, D
CI
TA = 0° to +70°C, Case 626, 751
Differential Gain = 2 x ~:
A low power audio amplifier circuit intended (primarily) for
Rt
telephone applications, such as speakerphones. Provides 150 k
differential speaker outputs to maximize output swing at low
supply voltages (2.0 V min.). Coupling capacitors to the
speaker, and snubbers, are not required. Overall gain is
externally adjustable from 0 to 46 dB. A Chip Disable pin
permits powering-down to mute the audio signal and reduce
power consumption.
• Optional
Analog and Interface Integrated Circuits 4.7-30 Motorola Master Selection Guide
Telephone Accessory Circuits (continued)
300 Baud FSK Modems The differential line driver is capable of driving 0 dBm into
a 600 n load. The transmit attenuator is programmable in
MC145442P, ow Modem - CCITT V.21 1.0 dB steps.
Case 738, 751 D
Motorola Master Selection Guide 4.7-31 Analog and Interface Integrated Circuits
Telephone Accessory Circuits (continued)
The MC145460EVK is a low cost evaluation platform for • Easy Clip-On Access to Key MC145447 Signals
the MC145447. The MC145460EVK facilitates development • Generous Prototype Area
and testing of products that support the Bellcore customer • Configurable for MC145447 Automatic or External Power
premises equipment (CPE) data interface, which enables Up Control
services such as Calling Number Delivery (CND). The • EIA-232 and Logic Level Ports for Connection to any PC
MC145447 can be easily incorporated into any telephone, or MCU Development Platform
FAX, PBX, key system, answering machine, CND adjunct box • Carrier Detect, Ring Detect and Data Status LEDs
or other telephone equipment with the help of the • Optional Tip and Ring Input Protection Network
MC145460EVK development kit. • MC145460EVK User Guide, MC145447 Data Sheet, and
Additional MC145447 Sample Included
EIA-232 Level
Output
CD, RD, Data
Logic Level
Output
CD, RD, Data
Analog and Interface Integrated Circuits 4.7-32 Motorola Master Selection Guide
Telephone Accessory Circuits (continued)
Encolil!
Decode Clock
15 14
Analog Input
Analog Feedback
Digital Data Input
Digital Threshold
Coincidence Output
Digital Output
Syllablic Filter
Gain Control
VCcJ2 Reference
Motorola Master Selection Guide 4.7-33 Analog and Interface Integrated Circuits
Telephone Accessory Circuits (continued)
Central Office, Remote Terminals, All gains externally programmable, most BORSHT functions, pn38, MC33121
PBX Applications current limit adjustable to 50 mA, 58 dB Longitudinal Balance, FNI776
-21.6 V to -42 V.
Central Office, Remote Terminals, All gains externally programmable, most BORSHT functions, pn38, MC33120
PBX Applications current limit adjustable to 50 mA, 58 dB Longitudinal Balance, FNm6
-42 V to -58 V.
Tone Ringers
Adjustable Tone Ringer Single-ended output, meets FCC requirements, adjustable REN, P/626, MC34012-1,
different warble rates. Dn51 2,3
Adjustable Tone Ringer Differential output, meets FCC requirements, adjustable REN, P/626, MC34017-1,
different warble rates. Dn51 2,3
Adjustable Tone Ringer Differential output, meets FCC requirements, adjustable REN, P/626, MC34217
single warble rates. D/751
Speech Networks
Basic Phone Line Interface Loop current interface, speech network, line length pn07, MC34014
compensation, speech/dialing modes, Bell System compliant. DWn51D
Cordless Universal Telephone Designed for digital cordless phones, SPI interface, double pn38, MC34016
Interface sidetone network, low noise and distortion. DWn51D
Basic Phone Line Interface Loop current interface, speech network, line length compensation, pn07, MC34114
speech/dialing modes, Bell System and foreign countries. DWn51D
Programmable Telephone Line Group listening-in, DTMF and tones generator, ring generator, DWn51F MC34216
Interface Circuit with Loudspeaker country programmable, SPI interface.
Amplifier
Telephone Line Interface Country programmable, double sidetone network, provides strong DPn38, TCA3388
supply point. FPn51D
Speakerphone Circuits
Complete Speaker Phone with All level detection (2 pt.), attenuators, and switching controls, pm 0, MC34018
Speaker Amplifier mike and speaker amp. DWn51F
Complete Speaker Phone with All level detection (4 pt.), attenuators, and switching controls, P/71 0, MC34118
Hybrid, Filter mike amp with mute, hybrid, and filter. DWn51F
Complete Speaker Phone with All level detection, attenuators, and switching controls, mike amp, pn24, MC33218A
MPU Interface MPU interface for: volume control, mode selection, mike mute. DWn51E
Basic Low Cost Speakerphone All level detection, attenuators and switching controls, Mike pn24, MC33219A
amplifier with Mute, low voltage operation. DWn51E
Audio Amplifiers
1 Watt Audio Amp 1.0 W output power into 16 n, 35 V maximum. Dn51 MC13060
Low Voltage Audio Amp 400 mW, 8.0 to 100 n, 2.0 to 16 V, differential outputs, P/626, MC34119
chip-<iisable input pin. Dn51
Analog and Interface Integrated Circuits 4.7-34 Motorola Master Selection Guide
Telephone Accessory Circuits (continued)
Function Features
Companders
Basic Compander 2.1 V to 7.0 V, no precision extemals, 80 dB range, -40" to P/646, MC33110
+85"C, independent compressor and expander. D1751 A
Compander with Features 3.0 V to 7.0 V, no precision externals, 80 dB range, -40" to P/648, MC33111
+85"C, independent compressor and expander, pass through and D1751B
mute functions, two op amps.
Switching Regulator
Current Mode Regulator For phone line power applications, soft-start, current limiting,
2% accuracy.
Voice Encoder/Decoders
Continuously Variable Slope Telephone quality voice encoding/decoding, variable clock rate, P1738, MC34115
Modulator/Demodulator (CVSD) 3-bit coding, for secure communications, voice storagelretrieval, DW1751G
answering machines, 0" to 70"C.
Same as above except 4-bit coding. P1738, MC3418
DW751G
Speakerphone
Speech Speech Speech
w/Speaker Amp
[)-- -
Network Network Network
MC34118
DC DC DC
Interface Interface Interface
Speakerphone
w/Hybrid Amps
Microprocessor DTMF
MC33218A Interface - Generator
Dialer
Interface
Dialer
Interface
Speakerphone
w/MPU Interface
Tone MC34012 MC34017
Ringer
.~'''~
V MC33219A
Tone Ringer Tone Ringer
Basic Low Cost
Speakerphone MC33110
(Single-Ended
Output) ----- (Push-Pull
Output)
(Basic (wIMute&
400mW
-
Passthrough,
'"
Speaker Compander) Tone Ringer
OpAmps)
Amplifier (Push-Pull
Output)
Motorola Master Selection Guide 4.7-35 Analog and Interface Integrated Circuits
Phase-Locked Loop Components
Motorola offers a choice of phase-locked loop components power consumption and bipolar for high speed operation.
ranging from complete functional frequency synthesizers for Typical applications include TV, CATV, radios, scanners,
dedicated applications to a wide selection of general purpose cordless telephones plus home and personal computers.
PLL circuit elements. Technologies include CMOS for lowest
Analog and Interface Integrated Circuits 4.7-36 Motorola Master Selection Guide
Phase-Locked Loop Components (continued)
Motorola Master Selection Guide 4.7-37 Analog and Interiace Integrated Circuits
Phase-Locked Loop Components (continued)
Analog and Interface Integrated Circuits 4.7-38 Motorola Master Selection Guide
Communications Circuits Package Overview
- CASE 620
LSUFFIX
CASE 626
PSUFFIX
• CASE 646
PSUFFIX
CASE 648
PSUFFIX
CASE 710
PSUFFIX
CASE 711
PSUFFIX
- CASE 724
PSUFFIX
CASE 726
LSUFFIX
CASE 736B
PBSUFFIX
-CASE 738
OP, PSUFFIX
•
CASE 751
o SUFFIX
#
CASE 751A
o SUFFIX
,
CASE 751B
o SUFFIX
~
CASE 7510
OW, FP SUFFIX
#
CASE 751E
OW SUFFIX
Motorola Master Selection Guide 4.7-39 Analog and Interface Integrated Circuits
Communications Circuits Package Overview (continued)
,CASE 751F •
CASE 751G
#
CASE 751J
OW SUFFIX OW SUFFIX FSUFFIX
# CASE 751M
FWSUFFIX
•
CASE 776
FNSUFFIX
CASE 777
FN SUFFIX
•
CASE 837A
OW SUFFIX
CASE 8420
PBSUFFIX
•CASE 848B
FBSUFFIX
•
CASE 873
FB, FTB, FU SUFFIX
•CASE 932
FTASUFFIX
CASE940C
SO SUFFIX
•
CASE 9480
OTSUFFIX
•
CASE 977
FTASUFFIX
Analog and Interface Integrated Circuits 4.7-40 Motorola Master Selection Guide
Consumer Electronic Circuits
In Brief . ..
These integrated circuits reflect Motorola's continuing Page
commitment to semiconductor products necessary for Entertainment Radio Receiver Circuits ............ 4.8-2
consumer system designs. This tabulation is arranged to Entertainment Receiver RF/IF ................. 4.8-2
simplify selection of consumer integrated circuit devices that C-Quam® AM Stereo Decoders .... . . . . . . . . . .. 4.8-2
satisfy the primary functions for home entertainment Audio Amplifiers ............................. 4.8-2
products, including television, hi-fi audio and AM/FM radio. Video Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.8-3
Encoders ................................... 4.8-3
TV Decoder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.8-3
Video Capture Chip Sets. . . . . . . . . . . . . . . . . . . . .. 4.8-3
TV Picture-in-Picture ........................ 4.8-3
Comb Filters ................................ 4.8-3
Deflection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.8-3
TV IF Circuits ............................... 4.8-3
Tuner PLL Circuits ........................... 4.8-4
Modulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.8-4
Video Data Converters ....................... 4.8-4
Monitor Subsystem .......................... 4.8-4
Sound . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.8-4
Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.8-4
Circuit Descriptions and Diagrams ............. 4.8-5
Package Overview ............................ 4.8-25
Motorola Master Selection Guide 4.8-1 Analog and Interface Integrated Circuits
Entertainment Radio Receiver Circuits
Table 1. Entertainment Receiver RFnF
Suffix!
Function Featurea Package Device
E.T.R. Front End MixerNCO/AGC for Electronically Tuned AM Stereo Receivers P/648, MC13025
D1751B
AMAX Front End MixerNCO/AGC with RF and Audio Noise Blanking DWI751D MC13027
Dual Conversion AM Receiver 1st Mixer/OSC, 2nd Mixer/OSC, High Gain IF, AGC, Detector DW1751F MC13030
Medium V AM Stereo Decoder IF/Decoder for Advanced C--Quam Receivers with AMlFM Switch DWI751D, MC13029A
H1738
AM/FM Stereo Decoder AM Stereo Tuner IC with FM Stereo Decoder DWI751D MC13035
AM/FM Stereo Decoder AM and FM Stereo Decoder, 4.0 to 12 V Operation P/648 MC13037
AMAX Stereo Decoder Am Stereo Decoder with Audio NOise Blanker DW1751F MC13122
Analog and Interface Integrated Circuits 4.8-2 Motorola Master Selection Guide
Video Circuits
Table 4. Video Circuits
Suffix!
Function Features Package Device
Encoders
RGB to PAUNTSC Encoder RGB and Sync inputs, Composite Video out; PAUNTSC selectable. P1738, MC1377
DW1751D
Video Overlay Synchronizer Complete Color TV Video Overlay Synchronizer, remote or local system P/711, MC1378
control and RGB encoder. FN/777
Advanced RGB to PAUNTSC RGB and Sync inputs, Composite Video and S-VHS out; P1738, MC13077
Encoder PAUNTSC selectable; subcarrier from crystal or external source. DW1751D
TV Decoder
Chroma 4 Multistandard Decoder PAUNTSC/8-VHS input, RGB outputs; horizontal and vertical timing
(TV set) outputs; all digital internal filters, no external tank; IlP and crystal
controlled.
Video Capture Chip Sets
Chroma 4 Multistandard Video PAUNTSC/8-VHS input, RGBNUV outputs; horizontal and vertical FN1777, MC44011
Processor (Multimedia) timing outputs; all digital internal filters, no external tanks; IlP and FB/824E
crystal controlled.
PAL Digital Delay Line For PAL applications of the MC44011 and MC44001. P/648, MC44140
DW1751G
Pixel Clock PLUSync Sep. PAUNTSC sync separator, 6.0-40 MHz pixel clock PLL. D1751 A MC44145
Triple 8-Bit Video DAC TTL inputs, 75 Q drive outputs. FB/824A MC44200
Triple 8-Bit Video AID Video clamps for RGBNUV, 18 MHz, High Z TTL outputs. FN1777 MC44251
TV Picture-in-Picture
Picture-in-Picture (PIP) Controller Complete PIP function on one chip: two NTSC composite inputs
(reversible); encoder, decoder, logic, memory, video amplifier. Uses 12C
bus control to select 1/16 or 1/9 PIP size, contrast and color parameters.
Comb Filters
Enhanced Comb Filter Fast 8-Bit AID Converter, Two 8-Bit D/A Converters, Two Line-Delay FU/898 MC141620
Memories, utilizes NTSC Subcarrier Frequency clock, CMOS
Technology.
Advanced Comb Filter (ACF) Composite Video input; VC outputs in digital and analog form; all digital FU/898 MC141621A
internal filters.
Advanced Comb Filter - II (ACF-II) Composite Video input; VC outputs in digital and analog form; all digital P/898 MC141622
internal filters; vertical enhancer circuit.
Advanced Comb Filter - I (ACF-I) Low cost Ih filter. FU/873 MC141624
SPITBD
Advanced PAUNTSC Comb Filter Composite Video input; VC outputs in digital and analog form; all digital FB/898 MC141627
internal filters.
Deflection
Horizontal Processor Linear balanced phase detector, oscillator and predriver, adjustable
DC loop gain and duty cycle.
TV IF Circuits
Advanced Video IF Complete video IF system for high performance analog TV receivers. P/724, MC44301
DW1751F
Advanced Multi-Standard TV Complete video/sound IF system for all standard modulation techniques P/710, MC44302
Video/Sound IF including NTSC, PAL, SECAM and AM D2MAC. DW1751F
IF Amplifier 1st and 2nd video IF amplifiers, 50 dB gain at 45 MHz, 60 dB AGC D1751 , MC1350
range. P/626
Motorola Master Selection Guide 4.8-3 Analog and Interface Integrated Circuits
Table 4. Video Circuits (continued)
I Function I Features
Suffix!
Package Device
Tuner PLL Circuits
PLL Tuning Circuits 1.3 GHz, 10 mV sensitivity selectable prescaler (MC44817), op amp, D1751B MC44817, B
4 band buffers, 3-wire bus interface, lock detect.
1.3 GHz, 10 mV sensitivity prescaler, op amp, 4 band buffers, 12C D1751B MC44818
interface, lock detect.
1.3 GHz, 10 mV sensitivity prescaler, 3 band buffers, 12C interface, D1751 , MC44824,
replacement for Siemens MPG3002. D1751B MC44825
Similar to MC44817, with lower power consumption, push-pull lock DTB/948F MC44827
detector output, no divide-by--8 bypass, in a TSSOP package.
Similar to MC44818, with lower power consumption, push-pull lock DTB/948F MC44828
detector output, in a TSSOP package.
1.3 GHz prescaler, 10 mV sensitivity 50 to 950 MHz, op amp, 3 band D/751 A MC44829
buffers, Mixer/Osc Decoder and 12C Bus.
1.3 GHz, 10 mV sensitivity selectable prescaler, op amp, 4 band buffers, DWI751D MC44864
12C interface, 3 DACs for automatic tuner alignment.
Modulator
Color TV Modulator with Sound RF oscillator/modulator, and FM sound oscillator/modulator.
Miscellaneous
Subcarrier Reference Generator Provides continuous subcarrier sine wave and 4x subcarrier, locked to P/626, MC44144
incoming burst. D1751
Closed Caption Decoder Conforms to FCC, NTSC standards, underline and italics control. P1707 MC144143
Enhanced Closed Caption Decoder Conforms to FCC, NTSC, XDS standards, underline, italics and OSC. P1707 MC144144
Sync Separator/Pixel Clock PLL PAUNTSC sync separator with vertical and composite sync output, D1751 MC44145
6 to 40 MHz pixel clock PLL.
Dual Video Amplifiers Gain @ 4.43 MHz = 6.0 dB ±1.0 dB, fixed gain, internally compensated, P/626, MC14576C
CMOS Technology. F/904
Gain @ 5.0 MHz = 10 dB max, 10 MHz = 6.0 dB max, adjustable gain, P/626, MC14577C
internally compensated, CMOS Technology. F/904
Transistor Array One differential pair and 3 isolated transistors, 15 V, 50 mAo P/646, MC3346
D1751 A
General Purpose Transistor Array One differential pair and 3 isolated transistors, 130 V, 50 mA. D1751 A CA3146
Analog and Interface Integrated Circuits 4.8-4 Motorola Master Selection Guide
Video Circuits (continued)
r------,
G I
I
I
I
I
I
\ IL _ _ _ _ _ .JI
r-----,
I
I
I
I
/ I
I Sateflije I I
r-----,
I I
I I
I I
I/O's 12C I I
~----~
* In Development
Motorola Master Selection Guide 4.8-5 Analog and Interface Integrated Circuits
Video Circuits (continued)
The MC44011, a member of the MC44000 Chroma 4 • Multistandard Decoder, Accepts NTSC and PAL
family, is designed to provide RGB or VUV outputs from a Composite Video
variety of inputs. The inputs may be either PAL or NTSC • Dual Composite Video or S-VHS Inputs
composite video (two inputs), S-VHS, RGB, and color • All Chroma and Luma Channel Filtering, and Luma Delay
difference (R-V, B-V). Line are Integrated Using Sampled Data FiRers Requiring
The MC44011 provides a sampling clock output for use no External components
by a subsequent analog to digital converter. The sampling • Digitally Controlled via 12C Bus
clock (6.0 to 40 MHz) is phase-locked to the horizontal • Auxiliary V, R-V, B-V Inputs
frequency. Additional outputs include composite sync, • Switched RGB Inputs with Separate Saturation Control
vertical sync, field identification, luminance, burst gate, and • Line-Locked Sampling Clock for Digitizing Video Signals
horizontal frequency. • Burst Gate Pulse Output for External Clamping
Control of the MC44011, and reading of status flags is • Vertical Sync and Field Ident Outputs
accomplished via an 12C bus. • Software Selectable VUV or RGB Outputs Able to Drive
AID Converters
~
VCC1 Gnd1 Y1 R-Y B-Y
r------f~----
CompVideo 1
Comp Video 2
Sound TrapiLuma Filter/Luma Delayl
Chroma Filter/Pai & NTSC Decoderl
~} Outputs
BtU
Hue & Saturation Control
.....----OVCC3
L,_~=:;"--_~II-*L,~~~-,.j-----<?Gnd3
Fitter L _ _ _ _ _
Burst
Gate t--'='-+ To AID Converters
...n..
Analog and Interface Integrated Circuits 4.1Hl Motorola Master Selection Guide
Video Circuits (continued)
The MC44200 is a monolithic digital to analog converter for • 55 msps Conversion Speed
three independent channels fabricated in CMOS technology. • Large Output Voltage Range
The part is specifically designed for video applications. • Low Current Mode
Differential outputs are provided, allowing for a large output • Single 5.0 V Power Supply
voltage range. • TTL Compatible Inputs
• B-Bit Resolution • Integrated Reference Voltage
• Differential Outputs
r-------------,
r::-"""7I~-O VOOG
Gin ~-+----~ OG
"'--,.........- - v OG
'---"""7I--l""I VOOR
RIn ~-+--~~ OR
"'--,.........~-v OR
VOOB
r::-"""7I'---l""I
Bin ~-+--~~ OB
OB
"'--,.........f---V
+--~O-:-:-::---lf---o
Clk 0 - 2 - -......~ CCAS
VOO Q....I.
VSS~ R I,el
I-C)-----II---I
VODR o---------~ I CV,ef
VSSR 0 - - - - - - - - - - - '
I.. _ _ _ _ _ _ _ _ _ _ _ _ .J I
Motorola Master Selection Guide 4.8-7 Analog and Interface Integrated Circuits
Video Circuits (continued)
The MC44251 contains three independent parallel analog These AIDs are especially suitable as front end converters
to digital converters. Each ADC consists of 256 latching in TV picture processing.
comparators and an encoder. Input clamps allow for AC • 18 MHz Maximum Conversion Speed (MC44251)
coupling of the input signals, and dc coupling is also allowed. • Input Clamps Suitable for RGB and YUV Applications
For video processing performance enhancements, a dither • Built-in Dither Generator with Subsequent
generator with subsequent digital correction is provided to Digital Correction
each ADC. The outputs of the MC44251 can be set to a high • Single 5.0 V Power Supply
impedance state.
Vref
Rtop
Encoder
•••
Rmid
8
Data
Outputs
Clock
Analog Input
HZ
VTN D~hering
Generator
Mode
Analog and Interface Integrated Circuits 4.8-8 Motorola Master Selection Guide
Video Circuits (continued)
r------,
I I
I I
I I
IL I
_ _ _ _ _ ..l
+200 V
12C
+12V MCU
+5.0 V liD's
• In Development
Motorola Master Selection Guide 4.8-9 Analog and Interface Integrated Circuits
Video Circuits (continued)
Volume
Conlroi
FIOIIl
External
Au~o
Source
Analog and Interface Integrated Circuits 4.8-10 Motorola Master Selection Guide
Video Circuits (continued)
De~aps
Fitler Pll ADCMid-Ref
~ 51
40 41
---------,
129
r.:---:-~--_+="<> Sync In
Video 1 O=L-~ f---~{) H Pll
L......._.....J------'-=O 503 kHz Res
Video 2 o"'T----;~~~
Motorola Master Selection Guide 4.8-11 Analog and Interface Integrated Circuits
Video Circuits (continued)
The MC44002 is a highly advanced circuit which performs • Filters Automatically Commutate with Change
most of the basic functions required for a color TV. All of its of Standard
advanced features are under processor control via an 12C bus, • Chroma Delay Line is Realized with Companion
enabling potentiometer controls to be removed completely. In Device (MC44140)
this way the component count may be reduced dramatically to • RGB Drives Incorporate Contrast and Brightness
allow significant cost savings and the possibility of Controls and Auto Gray Scale
implementing sophisticated automatic test routines. Using the • Switched RGB Inputs with Saturation Control
MC44002, TV manufacturers will be able to build a standard • Auxiliary Y, R-Y, B-Y Inputs
chassis for anywhere in the world. • Line Timebase Featuring H-Phase Control and
• Operation from a Single 5.0 V Supply; Typical Current Switch able Phase Detector Gain and Time Constant
Consumption Only 120 mA • Vertical Timebase Incorporating the Vertical
• Full PAUSECAMINTSC Capability Geometry Corrections
• Dual Composite Video or S-VHS Inputs • E-W Parabola Drive Incorporating the Horizontal
• All ChromalLuma Channel Filtering, and Luma Delay Geometry Corrections
Line are Integrated Using Sampled Data Filters Requiring • Beam Current Monitor with Breathing Compensation
No External Components • 16:9 Display Mode Capability
Analog and Interface Integrated Circuits 4.8-12 Motorola Master Selection Guide
Video Circuits (continued)
The MC141621 is an advanced NTSC comb filter for VCR • Built-in High Speed B-Bit AID Converter
and TV applications. It separates the luminance (Y) and • Two Line Memories (1820 Bytes)
chrominance (C) signals from the NTSC composite video • Advanced Combing Process
signal by using digital signal processing techniques. This filter • Two B-Bit D/A Converters
allows a video signal input of an extended frequency • Built-in Clamp Circuit
bandwidth by using a 4.0 FSC clock. In addition, the filter • On-Chip Reference Voltage Regulator for ADC
minimizes dot crawl and cross color effects. The built-in AID • Digital Interface Mode
and D/A converters allow easy connections to analog video
circuits.
RTP RTPS
28 27
Self 23
RBTS
Bias
21
'------Vin
20
Yout CLout
Ref(DA) --'---;
17
,-----TEI
16
r---TEO
Model
' - - - - - Mode 0
VCC(AD) = Pin 25
VCC(D) = Pin 11
VCC(DA) = Pin 42
GND(AD) = Pin 26
GND(D) = Pins 9, 19
GND(DA) = Pin 43
Motorola Master Selection Guide 4.8-13 Analog and Interface Integrated Circuits
Video Circuits (continued)
The Advanced Comb Filter-II is a video signal processor • Built-in High Speed 8-Bit AID Converter
for VCRs and TVs. It's function is to separate the Luminance • Two Line Memories (1820 Bytes)
Y and Chrominance C signals from the NTSC composite video • Advanced Comb-II Process
signal. The ACF-II minimizes dot-crawl and cross-color. A • Vertical Enhancer Circuit
built-in PLL provides a 4xfsc clock from either an NTSC • Two High Speed 8-Bit D/A Converters
subcarrier signal or a 4xfsc input. This allows a video signal • 4xfsc PLL Circuit
input of an extended frequency bandwidth. The built-in • Built-in Clamp Circuit
vertical enhancer circuit improves the quality o~ the • Digital Interface Mode
Luminance Y signal. The built-in AID and D/A converters • On-Chip Reference Voltage Regulator for AID Converter
allow easy connection to analog video circuits.
D3 TE1
D2 TEO
D1 MODE1
DO MODEO
BK CLK(AD)
ACF-II
VH PROCESSING GND(D)
GND(D) VCC(D)
VCC(D) CLC
FSC
NC
NC RBT
RTP
z
::::;
u::
Analog and Interface Integrated Circuits 4.8-14 Motorola Master Selection Guide
Video Circuits (continued)
Closed-Caption Decoder
MC144143P
Case 707
The MC144143 is a Line 21 closed-caption decoder for • Conforms to the FCC Report and Order as Amended by
use in television receivers or set top decoders conforming to the Petition for Reconsideration on Gen. Doc. 91-1
the NTSC broadcast standard. Capability for processing and • Supports Four Different Data Channels, TIme Multiplexed
displaying all of the latest standard Line 21 closed-caption within the Line 21 Data Stream: Captions Utilizing
format transmissions is included. The device requires a Languages 1 & 2, Plus Text Utilizing Languages 1 & 2
closed-caption encoded composite video signal, a horizontal • Output Logic Provides Hardware Underline Control and
sync signal, and an external keyerto produce captioned video. Italics Slant Generation
RGB outputs are provided, along with a luminance and a box • Single Supply Operating Voltage Range: 4.75 to 5.25 V
signal, allowing simple interface to both color and black and • Composite Video Input Range: 0.7 to 1.4 Vpp
white receivers. • Horizontal Sync Input Polarity can be either Positive
or Negative
• Internal TIming/Sync Signals Derived from
On-ChipVCO
Slice 12
Level ----11-----1
Command
Lock Processor
Character
ROM
5
R
G
7
B
4
Luma
Hsync 3
Box
Filter Reset
t6
Config
Decoder
Enable Control
17
CT/SData
tS
Lang/SClk
Motorola Master Selection Guide 4.8-15 Analog and Interface Integrated Circuits
Video Circuits (continued)
The MC144144 is a Line 21 closed-caption decoder for An on-chip processor controls the manipulation of data for
use in television receivers or set-top decoders conforming to storage and display. Also controlled are the loading,
the NTSC standard. Capability for processing and displaying addressing, and clearing of the display RAM. The processor
all of the latest standard Line 21 closed-caption format transfers the data received to the RAM during scan lines 21
transmissions is included. The device requires a closed- through 42. The operation of the display RAM, character ROM,
caption encoded composite video signal, a horizontal sync and output logic circuits are controlled during scan lines 43
signal, and an external keyer to produce captioned video. through 237. The functions of the MC144144 are controlled via
RGB and box signal outputs are provided, which along with a serial port which may be configured to be either 12C or SPI.
the mode select, allow simple interfacing to either color or • Conforms to FCC Report and Order as Amended by the
black-and-white TV receivers. Petition for
Display storage is accomplished with an on-chip RAM. A Reconsideration on Gen. Doc. 91-1
modified ASCII character set, which includes several • Conforms to EIA-60B for XDS Data Structure
non-English characters, is decoded by an on-chip ROM. An • Supports Four Different Data Channels for Field 1 and
on-screen character appears as a white or colored dot matrix Five Different Data Channels for Field 2, Time
on a black background. Multiplexed within the Line 21 Data Stream: Captions
Captions (video-related information) can be up to four rows Utilizing Languages 1 and 2, Text Utilizing Languages 1
appearing anywhere on the screen and can be displayed in two and 2 and XDS Support
modes: roll-up, paint-on, or pop-on. With rollup captions, the • Output Logic Provides Hardware Underline Control and
row scrolls up and new information appears at the bottom row Italics Slant Generation
each time a carriage return is received. Pop-on captions work • Single Supply, Operating Voltage Range: 4.75 to 5.25 V
with two memories. One memory is displayed while the other • Supply Current: 20 mA (Preliminary)
is used to accumulate new data. A special command causes • Operating Temperature Range: 0 to 70°C
the information to be exchanged in the two memories, thus • Composite Video Input Range: 0.7 to 1.4 Vpp
causing the entire caption to appear at once. • Horizontal Input Polarity: Either Positive or Negative
When text (non-video related information) is displayed, the • Internal Timing and Sync Signals Derived from On-Chip
rows contain a maximum of 32 characters over a black box VCO
which overwrites the screen. Fifteen rows of characters are
displayed in the text mode.
Analog and Interface Integrated Circuits 4.8-16 Motorola Master Selection Guide
s:: <
~
aiii"
c:CD
~~~-----------------, o
s::
Q
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ien I:
CD
[ VIDEO +---.:..¢. -I g
~r en
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r:::
:::J
'"a:o S-a
c: -= o :i"
CD
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CSYNCI
-= '-'
~
CGLlNES "-
::0
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FLD - 1 'j'l
FLD ADDR
DECODER
LS
SFLP LINE & FLD
>
::> ???? CTR
!!!.
0
IQ
III r;:;l
~
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c.
:; DECODERS
!it 1 11
-------~J:lr~;--~~
::!.
III
n I HIN 17 3 2 18
CD
:;
!it
IQ
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CD
c.
T1::'d: LOOP
FILTER -=
0
r;"
r:::
m: -=
Video Circuits (continued)
r------,
I I
I I
I I
IL I
_ _ _ _ _ .J
~~-___l~,.) R
c--iH-___l~'.) G
-+-+....--D>--@ B
y
C
CB
Channel
314
• In Development
Analog and Interface Integrated Circuits 4.8-18 Motorola Master Selection Guide
Video Circuits (continued)
The MC44817/17B are tuning circuits for TV and VCR • Reference Divider: Programmable for Division Ratios 512
tuner applications. They contain on one chip all the functions and 1024. The MC44817B has a Fixed 1024 Reference
required for PLL control of a VCO. The integrated circuits also Divider
contain a high frequency prescaler and thus can handle • 3-State Phase/Frequency Comparator
frequencies up to 1.3 GHz. • Operational Amplifier for Direct Tuning Voltage Output
The MC44817 has programmable 512/1024 reference (30 V)
dividers while the MC44817B has a fixed reference divider of • Four Integrated PNP Band Buffers for 40 mA (VCC1 to
1024. 14.4 V)
The MC44817/17B are manufactured on a single silicon • Output Options for the Reference Frequency and the
chip using Motorola's high density bipolar process, MOSAICTM Programmable Divider
(Motorola Oxide Self Aligned Implanted Circuits). • Bus Protocol for 18 or 19 Bit Transmission
• Complete Single Chip System for MPU Control (3-Wire • Extra Protocol for 34 Bit for Test and Further Features
Bus). Data and Clock Inputs are IIC Bus Compatible • High Sensitivity Preamplifier
• Divide-by-8 Prescaler Accepts Frequencies up to • Circuit to Detect Phase Lock
1.3GHz • Fully ESD Protected
• 15 Bit Programmable Divider Accepts Input Frequencies
up to 165 MHz
Bands Out 30 rnA
(40 rnA at 0° to ao°C) VTUN
VCC3
5.0V 7 13 12 11 10 14
12V
.-/.it----..-4-o Amp In
2.7V
Lock
EN ~----+_-rL-..-'--'1
Data
Clockr~I--1..-.:;:;:~JI
~==~;~~~L.-_~~ __--.J
XTAL
Preamp 2
Motorola Master Selection Guide 4.8-19 Analog and Interface Integrated Circuits
Video Circuits (continued)
The MC44818 is a tuning circuit for TV and VCR tuner • 15 Bit Programmable Divider Accepts Input Frequencies
applications. It contains, on one chip, all the functions required up to 165 MHz
for PLL control of a VCO. This integrated circuit also contains • Reference Divider: Programmable for Division Ratios 512
a high frequency prescaler and thus can handle frequencies and 1024.
up to 1.3 GHz. The MC44818 is a pin compatible drop-in • 3-State Phase/Frequency Comparator
replacementforthe MC44817, where the only difference is the • Operational Amplifier for Direct Tuning Voltage Output
MC44818 has a fixed divide-by-8 prescaler (cannot be (30 V)
bypassed) and the MC44817 uses the three wire bus. • Four Integrated PNP Band Buffers for 40 rnA (VCC1 to
The MC44818 has programmable 512/1024 reference 14.4 V)
dividers and is manufactured on a single silicon chip using • Output Options for the Reference Frequency and the
Motorola's high density bipolar process, MOSAICTM (Motorola Programmable Divider
Oxide Self Aligned Implanted Circuits). • High Sensitivity Preamplifier
• Complete Single Chip System for MPU Control (12C Bus). • Circuit to Detect Phase Lock
Data and Clock Inputs are 3-Wire Bus Compatible • Fully ESD Protected
• Divide-by-8 Prescaler Accepts Frequencies up to
1.3 GHz
Bands Out 30 mA
(40 mA at 00 to BOaC) VTUN
VCC1 VCC3
5.0V 7 13 12 11 10
.........t----1....-o
4 Amp In
Latches
DTB1
Lock
XTAL
DTS, EN
Analog and Interface Integrated Circuits 4.8-20 Motorola Master Selection Guide
Video Circuits (continued)
The MC44824/25 are tuning circuits for TV and VCR tuner • 15 Bit Programmable Divider
applications. They contain on one chip all the functions • Reference Divider: Programmable for Division Ratios 512
required for PLL control of a VCO. The integrated circuits also and 1024
contain a high frequency prescaler and thus can handle • 3-State Phase/Frequency Comparator
frequencies up to 1.3 GHz. • 4 Programmable Chip Addresses
The MC44824/25 are manufactured on a single silicon chip • 3 Output Buffers (MC44824) respectively; 5 Output
using Motorola's high density bipolar process, MOSAICTM Buffers (MC44825) for 10 mAl15 V
(Motorola Oxide Self Aligned Implanted Circuits). • Operational Amplifier for use with External NPN Transistor
• Complete Single Chip System for MPU Control (12C Bus). • S0-14 Package for MC44824 and S0-16 for MC44825
Data and Clock Inputs are 3-Wire Bus Compatible • High Sensitivity Preamplifier
• Divide-by-8 Prescaler Accepts Frequencies up to • Fully ESD Protected
1.3 GHz
Vcc UD
5.0 V 10 (12) 6(6) -(7) 8(9) 9(10) -(11) 14(16)
1 (1) PD
BO
2.7V
Gnd
XTAL1
XTAL2
HF Inputt
HF Input2 u---....,.,
Motorola Master Selection Guide 4.8-21 Analog and Interface Integrated Circuits
Video Circuits (continued)
Analog and Interface Integrated Circuits 4.8-22 Motorola Master Selection Guide
Video Circuits (continued)
CL
Bands Out
r
8 7
14
B6 B5
2.7V PHO
Buffers
-=-
T8
Gnd 2
DTB2
POR
9
CA CL
SDA 11
SCL 10 Data
RL
DTF
T 12pF
D 3.214.0
l MHz
DTS, EN
Motorola Master Selection Guide 4.8-23 Analog and Interface Integrated Circuits
Video Circuits (continued)
VCC Gnd
i----~---------------------~-----l
3.58/ I
Divide By Four Ring
Counter Divide By 256 4.43 MHz I
Latch I
I
I
45" 0" I
I
PLL
LPF
Off
3.58/4.43 MHz
In/PLLOff
Rln
Color
Difference
and
Gin Luma
Matrix
Bin
Analog and Interface Integrated Circuits 4.8-24 Motorola Master Selection Guide
Consumer Electronic Circuits Package Overview
CASE 626
PSUFFIX
•
CASE 646
P SUFFIX
CASE 648
PSUFFIX
- CASE 707
PSUFFIX
CASE 709
PSUFFIX
CASE 710
PSUFFIX
CASE 711
PSUFFIX
- CASE 724
PSUFFIX
CASE 738
H, PSUFFIX
•
CASE 751
D SUFFIX
CASE 751A
DSUFFIX
CASE 751B
DSUFFIX
CASE 751D
DWSUFFIX
CASE 751E
DWSUFFIX
CASE 751F
DWSUFFIX
•
CASE 751G
DWSUFFIX
Motorola Master Selection Guide 4.8-25 Analog and Interface Integrated Circuits
Consumer Electronic Circuits Package Overview (continued)
CASE 777
FN SUFFIX
•
CASE 824, 824A
FBSUFFIX
•CASE 824E
FBSUFFIX
CASE 859
BSUFFIX
•
CASE 873
FU SUFFIX
CASE 898
FB, FU, P SUFFIX
•
CASE 904
FSUFFIX
•
CASE948F
DTB SUFFIX
Analog and Interface Integrated Circuits 4.8-26 Motorola Master Selection Guide
Automotive Electronic Circuits
In Brief ...
Motorola Analog has established itself as a global leader Page
in custom integrated circuits for the automotive market. With Voltage Regulators ............................. 4.9-2
multiple design centers located on four continents, global Electronic Ignition .............................. 4.9-2
process and assembly sites, and strategically located Special Functions .............................. 4.9-3
supply centers, Motorola serves the global automotive Package Overview ............................ 4.9-12
market needs. These products are key elements in the
rapidly growing engine control, body, navigation,
entertainment, and communication electronics portions of
modern automobiles. Though Motorola is most active in
supplying automotive custom designs, many of yesterday's
proprietary custom devices have become standard products
of today, available to the broad base manufacturers who
support this industry. Today, based on new technologies,
Motorola offers a wide array of standard products ranging
from rugged high current "smart" fuel injector drivers which
control and protect the fuel management system through the
rigors of the underhood environment, to the latest
SMARTMOSTM switches and series transient protectors.
Several devices are targeted to support microprocessor
housekeeping and data line protection. A wide range of
packaging is available including die, flip-chip, and SOICs for
high density layouts, to low thermal resistance multi-pin,
single-in-line types for high power control ICs.
Motorola Master Selection Guide 4.9-1 Analog and Interface Integrated Circuits
Automotive Electronic Circuits
Table 1. Voltage Regulators
Suffix!
Function Features Package Device
Low Dropout Voltage Positive fixed and adjustable output voltage regulators which ZJ29, T/221 A, LM2931, C
Regulator maintain regulation with very low input to output voltage differential. T/3140, THl314A,
TV/314B,OT/369A,
OT-1/369,02T/936,
02T/936A,01751
Low Dropout Dual Positive low voHage differential regulator which features dual 5.0 V T/3140, TH/314A, LM2935
Regulator outputs, with currents in excess of 750 mA (switched) and 10 mA TV/314B,02T/936A
standby, and quiescent current less than 3.0 mA.
Automotive Voltage Provides load response control, duty cycle limiting, under/overvoltage OW1751 0 MC33092
Regulator and phase detection, high side MOSFET field control, voltage
regulation in 12 V altemator systems.
Low Dropout Voltage Positive 5.0 V, 500 mA regulator having on-chip power-up-reset T/3140, TV/314B MC33267
Regulator circuit with programmable delay, current limit, and thermal shutdown.
Low Dropout Voltage Positive 3.3 V, 5.0 V, 12 V, 800 mA regulator. 01751, OT/369A MC33269
Regulator
Electronic Ignition Used in high energy electronic ignition systems requiring differential OWI751G, MC33093,
Circuit Hall Sensor control. "Bumped" die for inverted mounting to substrate. Flip-Chip MCCF33093
Electronic Ignition Used in high energy electronic ignition systems requiring single Hall OWI751G, MC33094,
Circuit Sensor control. "Bumped" die for inverted mounting to substrate. Flip-Chip MCCF33094
Electronic Ignition Used in high energy electronic ignition systems requiring single Hall OWI751G, MC79076,
Circuit Sensor control. Dwell feedback for coil variation. "Bumped" die for Flip-Chip MCCF79076
inverted mounting to substrate.
Analog and Interface Integrated Circuits 4.9-2 Motorola Master Selection Guide
Table 3. Special Functions
Suffix!
Function Features Package Device
Low Side Protected Single automotive low side switch having CMOS compatible input, T/221 A, T-1/314D, MC3392
Switch 1.0 A maximum rating, with overcurrent, overvoltage and thermal DW/751G
protection.
Low Current High-Side Drives loads from positive side of power supply and protects against T/314D, DW/751G MC3399
Switch high-voltage transients.
High-Side TMOS Driver Designed to drive and protect N-channel power MOSFETs used in P/626, D/751 MC33091A
high side swnching applications. Has internal charge pump, externally
programmed timer and fault reporting.
MI-Bus Interface High noise immunity serial communication using MI-Bus protocol to DW/751G MC33192
Stepper Motor control relay drivers and motors in harsh environments. Four phase
Controller signals drive two phase motors in either half or full-step modes.
Quad Fuel Injector Four low side swnches with parallel CMOS compatible input control, T/821D, TV/821C MC33293
Driver :$ 7.0 rnA quiescent current, 0.25 Q rDS(on) at 25°C independent
outputs with 3.0 A current limiting and internal 65 V clamps.
Octal Serial Output Eight low side switches having 8-bit serial CMOS compatible input P/738, DW/751E MC33298
Switch control, serial fault reporting, :$ 4.0 rnA quiescent current, independent
0.45 Q rDS(on) at 25°C outputs with 3.0 A minimum current limiting and
internal 55 V clamps.
Integral Alternator Control device used in conjunction with a Darlington device to monitor D/751A, Flip-Chip MC33095
Regulator and control the field current in alternator charging systems. "Bumped" MCCF33095
die for inverted mounting to substrate.
Peripheral Clamping Protects up to six MPU 1/0 lines against voltage transients. '/626, D/751 TCF6000
Array
Automotive Direction Detects defective lamps and protects against overvoltage in D/751 , P/626 MC33193
Indicator automotive turn-signal applications. Replaces UAA1041 B in most
applications.
Automotive Wash Wiper Standard wiper timer control device that drives a wiper motor relay and D/751 , P/626 MC33197
Timer can perform the intermittent, afterwash and continuous wiper timer
functions.
Automotive ISO 9141 Interface between the two-wire asynchronous serial communication D/751 A MC33199
Serial Link Driver interface (SCI) of a microcontroller and a special one-wire care
diagnosis system (DIA).
'No Suffix
Motorola Master Selection Guide 4.9-3 Analog and Interface Integrated Circuits
Quad Fuel Injector Driver
MC33293T, MC33293TV
TJ =-40 0 to +150°C, Case 8210, C
The MC33293T is a monolithic quad low-side switching shorted loads, and over temperature condition of outputs. A
device having CMOS logic, bipolar/ CMOS analog circuitry, shorted load condition will shut off only the specific output
and OMOS power FETs. All inputs are CMOS compatible. involved while allowing other outputs to operate normally. An
Each independent output is internally clamped to 65 V, current overvoltage condition will shut off all outputs for the
limited to <!: 3.0 A, and has an rOS(on) of :s; 0.25 n with VPWR overvoltage duration. A single/dual mode select pin allows
<!: 9.0 V and may be paralleled to lower rOS(on). Fault output either independent input/output operation or paired output
reports existence of open loads (outputs "On" or "Off"), operation.
3 (Input 1)
4 (Input 2)
13 (Input 3)
12 (Input 4)
5 (Input 1 + 2)
6 (Single/Dual Select)
11 (Input 3 + 4)
10 (Fault)
Analog and Interlace Integrated Circuits 4.9-4 Motorola Master Selection Guide
Octal Serial Switch
MC33298P, MC33298DW
TJ = -40° to +150°C, Case 738, 751E
The MC33298 is a monolithic eight output low-side switch Each independent output is internally clamped to 55 V, current
with 8-bit serial input control. Incorporates CMOS logic, limited to ~ 3.0 A, and has an rDS(on) of s 0.45 n with VPWR
bipolar/CMOS analog circuitry, and DMOS power FETs. All ~ 9.0 V. This device has low standby current, cascadable fault
inputs are CMOS compatible. It is designed to interface to a status reporting, output diagnostics, and shutdown for each
microcontroller and switch inductive or incandescent loads. output.
17 (VpWR)
20 (Output 0)
19 (Output 1)
12 (Output 2)
11 (Output 3)
10 (Output 4)
9 (Output 5)
2 (Output 6)
1 (Output 7)
5 (Ground)
6 (Ground)
15 (Ground)
16 (Ground)
Motorota Master Selection Guide 4.9-5 Analog and Interface Integrated Circuits
Low Side Protected Switch
MC3392T, T-1, ow
TJ = -40° to +150°C,
Case 221A, 3140, 751G
Single low side protected switch with fault reporting extremely high gain, low saturation Darlington transistor
capability. Input is CMOS compatible. Output is short circuit having a CMOS input characteristic with added protection
protected to 1.0 A minimum with a unique current fold-back features. In some applications, the three terminal version can
feature. Device has internal output clamp for driving inductive replace industry standard TIP1 00/1 01 NPN power Darlington
loads with overcurrent, overvoltage, and thermal protection. transistors.
When driving a moderate load, the MC3392 performs as an
Gnd
Analog and Interface Integrated Circuits 4.!Hi Motorola Master Selection Guide
High Side TMOS Driver
MC33091 AP, AD
TJ = -40 0 to + 150°C, Case 626, 751
Offers an economical solution to drive and protect Few external components required to drive a wide variety of
N-channel power TMOS devices used in high side switching N-channel TMOS devices. A Fault output is made available
configurations. Unique device monitors load resulting VDS. through the use of an open collector NPN transistor requiring
TMOS voltage to produce a proportional current used to drive a single pull-up resistor for operation. Input is CMOS
an externally programmed over current timer circuit to protect compatible. Device uses ~ 3.0 flA standby current and has an
the TMOS device from shorted load conditions. Timer can be internal charge pump requiring no external components for
programmed to accommodate driving incandescent loads. operation.
RS
r~-----------
I
I Overvoltage
Shutdown
I
Ii'
Input
7 I'
I
t
I
r
I
I
I
I
L,
r
I
Fault
6 I
I
I
I
I
L--;r---------.
Motorola Master Selection Guide 4.9-7 Analog and Interface Integrated Circuits
MI-Bus Interface Stepper Motor Controller
MC33192DW
TJ = -40° to +100°C, Case 751G
-.>----------_---------- +Vbat
Intended to control loads in harsh
automotive environments using a serial
VCC
communication bus. Can provide
satisfactory real time control of up to eight 1 MI
To other
stepper motors using MI-Bus protocol. Use devices
MC33192DW
of MI-Bus offers a noise immune system
solution for difficult applications involving Osc
relays and motors. The stepper motor
controller provides four phase signals to
drive two phase motors in either half of Ground
full-step modes. Designed to interface to a Ceramic
microprocessor with minimal amount of Resonator From MCU
wiring, affording an economical and
MI-Bus -.e.+------------------- MI-Bus
versatile system.
The MC33193 is a new generation industry standard for EMI purposes. Fault detection thresholds are reduced
UAA 1041 "Flasher". It has been developed for enhanced EMI relative to those of the UAA1041 allowing a lower shunt
sensitivity, system reliability, and improved wIring resistance value (20 mO) to be use.
simplification. The MC33193 is pin compatible with the • Pin Compatible with the UAA1041
UAA1041 and UAA 1041 B in the standard application • Defective Lamp Detection Threshold
configuration as shown in Figure 9, without lamp short circuit • RF Filter for EMI Purposes
detection and using a 20 mO shunt resistor. The MC33193 has • Load Dump Protection
a standby mode of operation requiring very low standby • Double Battery Capability for Jump Start Protection
supply current and can be directly connected to the vehicle's • Internal Free Wheeling Diode Protection
battery. It includes a RF filter on the Fault detection pin (Pin 7) • Low Standby Current Mode
Analog and Interface Integrated Circuits 4.9-8 Motorola Master Selection Guide
Automotive Wash Wiper Timer
MC33197D
TA =-40° to +105°C, Case 751
MC33197P
TA =-40° to + 125°C, Case 626
The MC33197 is a standard wiper timer control device • Adjustable Time Interval of Less Than 500 ms to More
designed for harsh automotive applications. The device can Than 30s
perform the intermittent, after wash, and continuous wiper • Intermittent Control Pin Can Be Switched to Ground
timer functions. It is designed to directly drive a wiper motor or Vbat
relay. The MC33197 requires very few external components • Adjustable After Wipe TIme
for full system implementation. The intermittent control pin can • Priority to Continuous Wipe
be switched to ground or Vbat to meet a large variety of • Minimum Number of TIming Components
possible applications. The intermittent timing can be fixed or • Integrated Relay Driver With Free Wheeling Protection
adjustable via an external resistor. The MC33197 is built using Diode
bipolar technology and parametrically specified over the • Operating Voltage Range From 8.0 to 16 V
automotive ambient temperature range and 8.0 to 16 V supply • For Front Wiper and Rear Wiper Window Applications
voltage. The MC33197 can operate in both front and rear
wiper applications.
R1 =220 Q
R2=22kQ
R3= 1.5 to 22 kQ
R4=4.7kQ
1,.
R5=4.7kQ
C1 = 47JlF
C2=100nF
Switch
1
-= Gnd
>--..J\Af.r------,
Switch -
Motorola Master Selection Guide 4.9-9 Analog and Interface Integrated Circuits
Automotive ISO 9141 Serial Link Driver
MC33199D
TA =-40° to +125°C, Case 751A
The MC33199D is a serial interface circuit used in • Electrically Compatible with Specification "Diagnosis
diagnostic applications. It is the interface between the System ISO 9141"
microcontroller and the special K and L Lines of the ISO • Transmission Speed Up to 200 k Baud
diagnostic port. The MC33199D has been designed to meet • Internal Voltage Reference Generator for Line
the "Diagnosis System ISO 9141" specification. Comparator Thresholds
The device has a bi-directional bus K Line driver, fully • TXD, RXD and LO Pins are 5.0 V CMOS Compatible
protected against short circuits and over temperature. It also • High Current Capability of DIA Pin (K Line)
includes the L Line receiver, used during the wake up • Short Circuit Protection for the K Line Input
sequence in the ISO transmission. • Over Temperature Shutdown with Hysteresis
The MC33199 has a unique feature which allows • Large Operating Range of Driver Supply Voltage
transmission baud rate up to 200 k baud. • Full Operating Temperature Range
• ESD Protected Pins
Vee Vs
REF-0UT
LO
REF-IN-L
REF-IN-K
11
RXD
DIA
TXD
Gnd
Analog and Interface Integrated Circuits 4.9-10 Motorola Master Selection Guide
Alternator Voltage Regulator
MC33092DW
TJ = -40° to +125°C, Case 7510
Provides voltage regulation and load response control in system battery voltage to an externally programmed set pOint
diode rectified 12 V alternator charging systems. Provides value and pulse width modulates an N-channel MOSFET
externally programmed load response control of the alternator transistor to control the average alternator field current. In
output current to eliminate engine speed hunting and vibration addition, has duty cycle limiting, under/overvoltage and phase
due to sudden electrical loads. Monitors and compares the detection (broken belt) protective features.
Gate
Source
Sense
(Remote)
Lamp
Supply Reg Collector
(Local)
Lamp Base
Phase
Ground
OscAdjust
Motorola Master Selection Guide 4.9-11 Analog and Interface Integrated Circuits
Automotive Electronic Circuits Package Overview
,
CASE 29
ZSUFFIX
CASE 221A
TSUFFIX
, CASE 314A
TH SUFFIX
~ CASE 314B
TV SUFFIX
CASE 314D
T, T-1 SUFFIX
, • ,.
CASE 369
DT-1 SUFFIX
CASE 369A
DTSUFFIX
CASE 626
P, NO SUFFIX
- CASE 738
PSUFFIX
•
CASE 751
DSUFFIX
#
CASE 751 A
DSUFFIX
~
CASE 751D
DWSUFFIX
# CASE 751E
DWSUFFIX
•
CASE 751G
DWSUFFIX
CASE 821C
TV SUFFIX
CASE 821D
TSUFFIX
•
CASE 936
D2TSUFFIX
•
CASE 936A
D2TSUFFIX
Analog and Interface Integrated CircuHs 4.9-12 Motorola Master Selection Guide
Other Analog Circuits
In Brief ...
A variety of other analog circuits are provided for special Page
applications with both bipolar and CMOS technologies. Timing Circuits .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.10-2
These circuits range from the industry standard analog Singles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4.10-2
timing circuits and multipliers to specialized CMOS smoke Duals ..................................... 4.10-2
detectors. These products provide key functions in a wide Multipliers .................................... 4.10-2
range of applications, including data transmission, Linear Four-Quadrant Multipliers .. . . . . . . . . . . .. 4.10-2
commercial smoke detectors, and various industrial Smoke Detectors (CMOS) ...................... 4.10-3
controls. Package Overview ............................ 4.1 Q-4
Motorola Master Selection Guide 4.10-1 Analog and Interface Integrated Circuits
Timing Circuits Multipliers
These highly stable timers are capable of producing
accurate time delays or oscillation. In the time delay mode of
Linear Four-Quadrant Multipliers
operation, the time is precisely controlled by one external Multipliers are designed for use where the output voltage is
resistor and capacitor. For a stable operation as an oscillator, a linear product of two input voltages. Typical applications
the free-running frequency and the duty cycle are both Include: multiply, divide, square, root-mealHlquare, phase
accurately controlled with two external resistors and one detector, frequency doubler, balanced modulator/demodulator,
capacitor. The output structure can source or sink up to 200 mA electronic gain control.
or drive TTL circuits. TIming intervals from microseconds
through hours can be obtained. Additional terminals are Multiplier Transfer Characteristics
provided for triggering or resetting If desired.
Singles
MC1455P1, D
TA = 0° to +70°C, Case 626,751
MC1455BP1, D
TA = -40° to +85°C. Case 626, 751
VCC
8
MC1495D, P
TA = 0° to +70°C, Case 751A, 646
Analog and Interface Integrated Circuits 4.10-2 Motorola Master Selection Guide
Smoke Detectors (CMOS)
These smoke detector les require a minimum number of piezoelectric transducer. All devices are designed to comply
external components. When smoke is sensed, or a low battery with UL specifications.
voltage is detected, an alarm is sounded via an external
Motorola Master Selection Guide 4.10-3 Analog and Interface Integrated Circuits
Other Analog Circuits Package Overview
CASE 626
P1 SUFFIX
• CASE 646
N, P, P1 SUFFIX
-
CASE 648
PSUFFIX
CASE 751
DSUFFIX
CASE 751A
DSUFFIX
•
CASE 751G
DWSUFFIX
Analog and Interface Integrated Circuits 4.10-4 Motorola Master Selection Guide
Tape and Reel Options
In Brief ...
Motorola offers the convenience of Tape and Reel Page
packaging for our growing family of standard integrated circuit Tape and Reel ................................ 4.11-2
products. Reels are available to support the requirements of Analog MPQTable ............................ 4.11-4
both first and second generation pick-and-place equipment.
The packaging fully conforms to the latest EIA-481A
specification. The antistatic embossed tape provides a
secure cavity, sealed with a peel-back cover tape.
Motorola Master Selection Guide 4.11-1 Analog and Interface Integrated Circuits
Tape and Reel
Mechanical Polarization
Analog and Interface Integrated Circuits 4.11-2 Motorola Master Selection Guide
Tape and Reel (continued)
Feed
Feed ~-:::>"':r-------_----.J
Rounded side of transistor and adhesive tape visible. Flat side of transistor and adhesive tape visible.
STYLE P
(Preferred) STYLEM
Carrier Carrier
Strip Strip
Style P ammo pack is equivalent to Styles A and 8 of reel pack Style M ammo pack is equivalent to Style E of reel
dependent on feed orientation from box. pack dependent on feed orientation from box.
Motorola Master Selection Guide 4.11-3 Analog and Interface Integrated Circuits
Analog MPQ Table
TapeIReel and Ammo Pack
I Package Type Package Code MPQ
PLCC
Case 775 0802 1000/reel
Case 776 0804 5OD/reel
Case 777 0801 500/reel
SOIC
Case 751 0095 2500/reel
Case 751A 0096 2500/reel
Case 7518 0097 2500/reel
Case 751G 2003 1000/reel
Case 7510 2005 1000/reel
Case 751E 2008 1000/reel
Case 751F 2009 1000/reel
T0-92
Case 29 0031 2000/reel
Case 29 0031 2000/Ammo Pack
Analog and Interface Integrated Circuits 4.11-4 Motorola Master Selection Guide
Communications, Power and
Signal Technologies Group Products
In Brief . ..
Many leading semiconductor manufacturers have either Page
de-emphasized or eliminated discrete components from Small Signal Transistors, FETs and Diodes 5.1-1
their product portfolio. At Motorola, exceptional long-term TVS/Zeners
growth and outstanding customer acceptance of our TranSient Voltage Suppressors
portfolio are the most significant effects of Motorola's Zener Regulator and Reference Diodes ......... 5.2-1
superiority in providing bipolar and MOS transistors, diodes, Hybrid Power Module Operation .................. 5.3-1
thyristors, zeners, opto, RF, rectifier, and sensor devices. TMOS Power MOSFETs Products ................ 5.4-1
Consistent, ongoing improvements in product Bipolar Power Transistors ....................... 5.5-1
development and packaging processing continue to ensure Rectifiers ...................................... 5.6-1
Motorola's position as the most broad-based discrete Thyristors and Triggers .......................... 5.7-1
supplier in the world. The increased use of automatic Optoelectronic Devices .......................... 5.8-1
placement equipment has driven the trend towards surface Sensors ....................................... 5.9-1
mount packaging. RF Products .................................. 5.10-1
Motorola continues to expand upon a broad offering of Surface Mount Information ...................... 5.11-1
discrete surface mount packages which continue to Tape and Reel Specifications
advance state-of-the-art designs that cannot be and Packaging Specifications .................. 5.12-1
accomplished with insertion technology. Surface mount
technology is cost effective, allowing users the opportunity
to utilize smaller units and increased functions with less
board space. In many electronic applications, complex
integrated solutions with a multitude of functions can replace
several active and passive components.
SMARTDISCRETES, RF hybrid amplifiers and modules
and RF monolithic integrated circuits, pressure and
temperature sensors, optoelectronics and hybrid power
modules are a few of the exciting new products which
provide more reliable, intelligent discrete devices. Key
initiatives to raise products and services to a Six Sigma
standard (99.9997% defect-free), reduce total cycle time in
all activities, and provide leadership in the areas of product
and manufacturing ensure that Motorola will continue to be
the manufacturer of choice for all your discrete
semiconductor requirements.
In Brief ...
New in this revision is Motorola's GreenLine™ portfolio of Page
devices. They feature energy-conserving traits superior to
Bipolar Transistors ............................. . 5.1-2
those of our existing line of standard parts for the same
Plastic-Encapsulated Transistors ............. . 5.1-2
usage. GreenLine devices can actually help reduce the
Plastic-Encapsulated Multiple Transistors ...... . 5.1-8
power demands of your products.
Plastic-Encapsulated Surface
Also, this section highlights semiconductors that are
Mount Transistors .......................... 5.1-10
the most popular and have a history of high usage for the
Metal-Can Transistors ...................... 5.1-17
most applications.
Field-Effect Transistors ........................ 5.1-19
It covers a wide range of Small Signal plastic and
JFETs ..................................... 5.1-19
metal-can semiconductors.
MOSFETs ................................. 5.1-21
A large selection of encapsulated plastic transistors,
Surface Mount FETs ........................ 5.1-22
FETs and diodes are available for surface mount and
Tuning and Switching Diodes ................... 5.1-24
insertion assembly technology. Plastic packages include
Tuning Diodes - Abrupt Junction ............. 5.1-24
TO-92 (TO-226M), 1 Watt T0-92 (T0-226AE), SOT-23,
Tuning Diodes - Hyper-Abrupt Junction ...... 5.1-28
SC-59, SC-70/S0T-323 and SOT-223. Plastic multiples
Hot-Carrier (Schottky) Diodes . . . . . . . . . . . . . . .. 5.1-32
are available in 14-pin and 16-pin dual in-line packages for
Switching Diodes ........................... 5.1-34
insertion applications: SO-8, S0-14, and S0-16 for
Multiple Switching Diodes .................... 5.1-38
surface mount applications.
GreenLine Devices ............................ 5.1-40
Metal-can packages are available for applications
requiring higher power dissipation or having hermetic
requirements in TO-18 (T0-206AA) and T0-39
(T0-205AD).
Motorola Master Selection Guide 5.1-1 Small Signal Transistors, FETs and Diodes
l
Bipolar Transistors
ASE 29-05
TQ-226AE
1 1-WATT (TQ-92)
23
Plastic-Encapsulated
Transistors
Motorola's Small Signal TO-226 plastic transistors
encompass hundreds of devices with a wide variety of
characteristics for general-purpose, amplifier and switching
applications. The popular high-volume package combines
1
23
J ASE29-G4
TQ-226AA
(TQ-92)
I I I
Volts MHz mA dB
NPN PNP Min Min mA Max Min Max mA Max Style
Case 29-04 - T0-226AA (T0-92)
MPSB099 MPS8599 80 150 10 500 100 300 1.0 - 1
MPSA06 MPSA56 80 100 10 500 100 - 100 - 1
2N4410 - 80 60 10 250 60 400 10 - 1
BC546 BC556 65 150 10 100 120 450 2.0 10 17
BC546A - 65 150 10 100 120 220 2.0 10 17
BC546B BC556B 65 150 10 100 180 450 2.0 10 17
MPSA05 MPSA55 60 100 10 500 100 - 100 - 1
- MPS2907A 60 200 50 600 100 300 150 - 1
BC182 BC212 50 200(1) 10 100 120 500 2.0 10 14
BC237B BC307B 45 150 10 100 200 460 2.0 10 17
BC337 BC327 45 210(1) 10 800 100 630 100 - 17
BC547 BC557 45 150 10 100 120 800 2.0 10 17
BC547A BC557A 45 150 10 100 120 220 2.0 10 17
BC547B BC557B 45 150 10 100 180 450 2.0 10 17
BC547C BC557C 45 150 10 100 380 800 2.0 10 17
MPSA20 MPSA70 40 125 5.0 100 40 400 5.0 - 1
MPS2222A - 40 300 20 600 100 300 150 - 1
2N4401 2N4403 40 200 20 600 100 300 150 - 1
2N4400 2N4402 40 150 20 600 50 150 150 - 1
MPS6602 MPS6652 40 100 50 1000 50 - 500 - 1
2N3903 2N3905 40 200 10 200 50 150 10 6.0 1
2N3904 2N3906 40 250 10 200 100 300 10 5.0 1
BC548 - 30 300(1) 10 100 110 800 2.0 10 17
BC548A - 30 300(1) 10 100 120 220 2.0 10 17
BC548B BC558B 30 300(1) 10 100 200 450 2.0 10 17
BC548C - 30 300 10 100 420 800 2.0 10 17
2N4123 2N4125 30 200 10 200 50 150 2.0 6.0 1
2N4124 2N4126 25 250 10 200 120 360 2.0 4.0 1
BC338 BC328 25 210(1) 10 800 100 630 100 - 17
(1) Typical
Small Signal Transistors, FETs and Diodes 5.1-2 Motorola Master Selection Guide
Plastic-Encapsulated Transistors (continued)
hFE@ IC
VT(4) NF(5) ".
V(BR)CEO rnV dB MHz
NPN PNP Volts Min
I Max
I rnA Typ Max Typ Style
Case 29--04 - TQ-226AA (TQ-92)
Motorola Master Selection Guide 5.1-3 Small Signal Transistors, FETs and Diodes
Plastic-Encapsulated Transistors (continued)
NPN PNP
V(BR)CEO
Volts
IC
Max Min I Max I rnA
Volts
Max I rnA I rnA Min I rnA Style
NPN PNP
Volts
Min
Small Signal Transistors, FETs and Diodes 5.1-4 Motorola Master Selection Guide
Plastic-Encapsulated Transistors (continued)
NPN
Max
I rnA I rnA Min
I rnA Style
Motorola Master Selection Guide 5.1-5 Small Signal Transistors, FETs and Diodes
Plastic-Encapsulated Transistors (continued)
Small Signal Transistors, FETs and Diodes 5.1-6 Motorola Master Selection Guide
Plastic-Encapsulated Transistors (continued)
I I I I
Device Volts Arnp(1) Volts MHz
Type Min Max Min rnA Max rnA rnA Min rnA Style
P2N2222A
PBF259,S(10)
Motorola Master Selection Guide 5.1-7 Small Signal Transistors, FETs and Diodes
Plastic-Encapsulated
Multiple Transistors
The manufacturing trend has been toward printed circuit
board design with requirements for smaller packages with
more functions. In the case of discrete components the use of 1
the multiple device package helps to reduce board space CASE 646-06
requirements and assembly costs. (TO-116)
Many of the most popular devices are offered in the STYLE 1
standard plastic DIP and surface mount Ie packages. This
includes small-signal NPN and PNP bipolar transistors,
N-channel and P-channel FETs, as well as diode arrays.
Specification Tables
The following short form specifications include Quad and Dual transistors listed in alphanumeric order. Some columns
denote two different types of data indicated by either bold or italic typeface. See key and headings for proper identification.
This applies to Table 10 and 11 of this section only.
KEY
Ret. Point <lVBE Gp NF @ f
Subscript Unit mV dB dB
One
Po
Watts
IC ". Cob
Max Min
VeE
(sat)
Max
I
~n ~ff
Die VCE Amp hFE @ IC MHz pF ns ns Volts
TYPE NO. 10 Only Volts Max Min I Min Max Max Max Max
Alphanumeric listing Common--emitter Gp - Power Gain
type numbers DC Currenl Gain. NF - Noise Figure
f - Tesl Frequency
Identification Code Unils for lesl Current: AUD -10-15 kHz
A - ampere Frequency Units:
First Letter: Polarity m - mA H-Hertz M-MHz
C - bolh types in mulliple device u -I'A K-kHz G-GHz
N - NPN
P - PNP VCE!sat) - Collector-Emitter
Second Letter: Use Saturation Voltage
A - General Purpose Amplifier Currenl-Gain-Bandwidlh Ie - Test Current
E - Low Noise Audio Amplifier Product Current Units: u - ~
F - Low Noise RF Amplifier m - mA
G - General Purpose Amplifier A - Amp
and Swilch
H - Tuned RF/IF Ampltlier hFEllhFE2 - Current Gain Ratio
M - Differenlial Amplifier Conlinuous (DC) Colleclor Currenl VBE - Differential Base Vollage IVBEI - VBE21.
S - High Speed Swilch Differential Amplifiers
D - Darlington bn - turn-on time
bff - lum-off time
Raled Minimum Collector-Emitter Vollage
Power Dissipation specified a125'C. Single Subscript letter identifies base termination
die rating. listed below in order of preference. Output Capacitance, common-base. Shown without distinction:
Ref. Point: A - AmbientTemperalure SUBSCRIPT: Ccb - Collector-Base Capacilance
C - Case Temperature o - VCEO. open ere - Common-Emitter Reverse Transfer Capacitance
Small Signal Transistors, FETs and Diodes 5.1-8 Motorola Master Selection Guide
Plastic-Encapsulated Multiple Transistors (continued)
Table 10. Plastic-Encapsulated Multiple Transistors - Quad
The following table is a listing of the most popular multiple devices available in the plastic DIP package. These devices are
available in NPN, PNP, and NPN/PNP configurations. (See note.)
hFE1 "'VBE Gp NF @ f
Po
--- mV
Max
dB
Min
dB
Max
hFE2
Watts Typ(1)
VCE
One IC IT Cob 0n toft (sat) @ IC
Die VCEO Amp hFE @ IC MHz pF ns ns Volts IC
Device 10 Only Volts Max Min I Min Max Max Max I-IB-
Max
Case 646-06 - TO-116
MPQ2222A NA 0.65 40 0.5 100 150m 200 8.0 35(1) 285(1) 0.3 10 150m
MPQ2369 NS 0.5 15 0.5 40 10m 450 4.0 9.0(1) 15(1) 0.25 10 10m
MPQ2483 NA 0.625 40 0.05 150 1.0m 50 3.0(1) AUD
MPQ2484 NA 0.625 40 0.05 300 1.0m 50 2.0(1) AUD
MPQ2907A PA 0.65 60 0.6 100 150m 200 8.0 45(1) 180(1) 0.4 10 150m
MPQ3467 PS 0.75 40 1.0 20 500m 125 25 40 90 0.5 10 500m
MPQ3725 NS 1.0 40 1.0 25 500m 250 10 35 60 0.45 10 500m
MPQ3762 PS 0.75 40 1.5 35 150m 150 15 50 120 0.55 10 500m
MPQ3798 PA 0.625 40 0.05 150 0.1 m 60 4.0 3.0(1) AUD
MPQ3799 PA 0.625 60 0.05 300 0.1 m 60 4.0 2.0(1) AUD
MPQ3904 NG 0.5 40 0.2 75 10m 250 4.0 37(1) 136(1) 0.2 10 10m
MPQ3906 PG 0.5 40 0.2 75 10m 200 4.5 43(1) 155(1) 0.25 10 10m
MPQ6001 CG 0.65 30 0.5 40 150m 200 8.0 30(1) 225(1) 0.4 10 150m
MPQ6002 CG 0.65 30 0.5 100 150m 200 8.0 30(1) 225(1) 0.4 10 150m
MPQ6100A CA 0.5 45 0.05 150 1.0 m 50 4.0 4.0(1) AUD
MPQ6426 NO 0.5 30 0.5 10K 100m 125 8.0 - - 1.5 10 100m
MPQ6501 CG 0.65 30 0.5 40 150m 200 8.0 30(1) 225(1) 0.4 10 150m
MPQ6502 CG 0.65 30 0.5 100 150m 200 8.0 30(1) 225(1) 0.4 10 150m
MPQ6600A1 CA 0.5 45 0.05 150 1.0 m 50 4.0 0.8 20 0.25 10 1.0 m
MPQ6700 CA 0.5 40 0.2 70 10m 200 4.5 0.25 10 1.0m
MPQ6842 CA 0.75 40 0.5 70 10m 300 4.5 45 150 0.15 10 0.5m
MPQ7043 NA 0.75 250 0.5 25 1.0m 50 5.0 0.5 10 20m
MPQ7042 NA 0.75 200 0.5 25 1.0m 50 5.0 0.5 10 20m
MPQ7051 CG 0.75 150 0.5 25 1.0m 50 6.0 0.7 10 20m
MPQ7093 PA 0.75 250 0.5 25 1.0m 50 5.0 0.5 10 20m
Device
Case 7518-05 - SO-16
MMPQ2222A 40 75 40 500 200 20
MMPQ2369 15 40 20 100 450 10
MMPQ2907A 50 60 50 500 200 50
MMPQ3467 40 40 20 500 125 50
MMPQ3725 40 60 25 500 250 50
MMPQ3799 60 60 300 0.5 60 1.0
MMPQ3904 40 60 75 10 250 10
MMPQ3906 40 40 75 10 200 10
MMPQ6700(12) 40 40 70 10 200 10
(1) Typical
(12) NPN/PNP
NOTE: Some columns show 2 different types of data indicated by either bold or ifalictypefaces. See key and headings.
Motorola Master Selection Guide 5.1-9 Small Signal Transistors, FETs and Diodes
Plastic-Encapsulated
Surface Mount Transistors
This section of the selector guide lists the small-signal plastic
,~2 2
devices that are available for surface mount applications. CASE 311H18 . CASE 318D-03
These devices are encapsulated with the latest TO-236AB SC-59
state-of-the-art mold compounds that enhance reliability and
,- 1.
SOT-23
exhibit excellent performance in high temperature and high
humidity environments. This package offers higher power
dissipation capability for small-signal applications.
3 2
CASE 318E-04 CASE 419-02
SOT-223 SC-701S0T-323
tr
Device Marking V(BR)CEO Min Max rnA MHz Min
Small Signal Transistors, FETs and Diodes 5.1-10 Motorola Master Selection Guide
Plastic-Encapsulated Surface Mount Transistors (continued)
IT
Device Marking V(BR)CEO Min Max mA MHz Min
Motorola Master Selection Guide 5.1-11 Small Signal Transistors, FETs and Diodes
Plastic-Encapsulated Surface Mount Transistors (continued)
C
~
(OUT)
B R1
Table 13. Plastic-Encapsulated Surface Mount Bias Resistor Transistors (IN)
for General Purpose Applications R2 E
Pinout: 1-Base, 2-EmiHer, 3-Collector (GND)
These devices include bias resistors on the semiconductor chip with the transistor. See the BRT diagram for orientation
of resistors.
Small Signal Transistors, FETs and Diodes S.1-12 Motorola Master Selection Guide
Plastic-Encapsulated Surface Mount Transistors (continued)
Device
Case 318-08 - T0-236AB (SOT-23) - NPN
MMBT2369LTf M1J 12 18 15 20 - 100 -
MMBT2369ALTf lJA 12 18 15 20 - 100 -
BSV52LT1 B2 12 18 12 40 120 10 400
Case 318-08 - T0-236AB (SOT-23) - PNP
I
MMBT3640LTf I 2J
I 25 35 12 20 50 500
Pinout: 1-Emitter, 2-Base, 3-Collector
Case 3180-03 - Sc-59 - NPN
I
MSCI621Tl RB 20 40 20 40 180 1.0 200
Cc b(13)
Device Marking V(BR)CEO pFMax GHzMin mA
Case 318-08 - T0-236AB (SOT-23) - NPN
MMBTH10LTf 3EM 25 0.7 0.65 4.0
MMBT918LT1 M3B 15 1.7(14) 0.6 4.0
MMBTH24LT1 M3A 30 0.45 0.4 8.0
Case 318-08 - TO-236AB (SOT-23) - PNP
MMBTH81LTf 3D 20 0.85 0.6 5.0
MMBTH69LTf M3J 15 0.35(13) 2.0 10
Pinout: 1-Emitter, 2-Base, 3-Collector
Case 3180-03 - Sc-59 - NPN
MSC229!H3Tf VB 20 1.5(13) 0.15 1.0
MSC2295-CTf VC 20 1.5(13) 0.15 1.0
MSC2404-CTf UC 20 1.0(13) 0.45 1.0
MSC3130T1 IS 10 - 1.4 5.0
Case 3180-03 - SC-59 - PNP
MSA1022-BTf EB 20 2.0(13) 0.15 1.0
MSA1022-CTf EC 20 2.0(13) 0.15 1.0
Case 419-02 - SC-70/S0T-323 - PNP
I
MSB81Tf J3D 20 0.85(13) 0.6 5.0
(13) Cre
(14) Cob
Motorola Master Selection Guide 5.1-13 Small Signal Transistors, FETs and Diodes
Plastic-Encapsulated Surface Mount Transistors (continued)
VCE(sat) hFE @ IC
Device Marking Volts Max Min Max mA
Small Signal Transistors, FETs and Diodes 5.1-14 Motorola Master Selection Guide
Plastic-Encapsulated Surface Mount Transistors (continued)
IT
Device Marking V(BR)CEO Min Max rnA MHz Min
Case 318-08 - T0-236AB (SOT-23) - NPN
MMBT6517LT1 1Z 350 15 - 100 40
MMBTA42LT1 1D 300 40 - 30 50
MMBT5551LT1 G1 160 30 - 50 100
Case 318-08 - TO-236AB (SOT-23) - PNP
MMBT6520LT1 2Z 350 15 - 100 40
MMBTA92LT1 2D 300 25 - 30 50
MMBT5401LT1 2L 150 50 - 50 100
The following devices are designed to conserve energy. They offer ultra-low collector saturation voltage.
Case 318-08 - T0-236AB (SOT-23) - PNP
IMMBT1010LT1 I GLP I 15 0.1 1.1 300 600 100
Case 318-03 - SC-59 - PNP
IMSD1010T1 I GLP 15 0.1 1.1 300 600 100
Motorola Master Selection Guide 5.1-15 Small Signal Transistors, FETs and Diodes
Plastic-Encapsulated Surface Mount Transistors (continued)
Device
Device
Case 318E-04 - SOT-223 - NPN
BSP52T1
PZTA14T1
Device
Case 318E-04 - SOT-223 - NPN
BSP19AT1 SP19A 350 40 - 20 70
PZTA42T1 P1D 300 40 - 10 50
BF720T1 BF720 250 50 - 10 60
BSP20AT1 SP20A 250 40 - 20 70
Case 318E-04 - SOT-223 - PNP
PZTA96T1 ZTA96 450 50 150 10 50
PZTA92T1 P2D 300 40 - 10 50
BSP16T1 BSP16 300 30 150 10 15
BF721T1 BF721 250 50 - 10 60
Table 25. Plastic-Encapsulated Surface Mount High Current Transistors
Pinout: 1-Base, 2-Collector, 3-Emitter, 4-Collector
Device
Case 318E-04 - SOT-223 - NPN
PZT651T1
BCP68T1
Small Signal Transistors, FETs and Diodes 5.1-16 Motorola Master Selection Guide
Metal-Can
Transistors
Metal-can packages are intended for use in industrial
applications where harsh environmental conditions are
encountered. These packages enhance reliability of the end
products due to their resistance to varying humidity and
extreme temperature ranges. ,/ I 1
CASE 22-{)3
T0-206AA
(TO-1S)
STYLE 1
3 2
1
CASE 79-04
T0-205AD
(T0-39)
STYLE 1
Motorola Master Selection Guide 5.1-17 Small Signal Transistors, FETs and Diodes
Metal-Can Transistors (continued)
Small Signal Transistors, FETs and Diodes 5.1-18 Motorola Master Selection Guide
Field-Effect Transistors
JFETs
JFETs operate in the depletion mode. They are available in
both P- and N-channel and are offered in both Through-hole CASE 29-04
and Surface Mount packages. Applications include general- To-226AA
purpose amplifiers, switches and choppers, and RF amplifiers (T0-92)
and mixers. These devices are economical and very
rugged. The drain and source are interchangeable on many
typical FETs.
VGS(off) lOSS
Re IYfsl @f RelYosl@f V(BR)GSS Volts rnA
Device
mmho
Min
I kHz
~mho
Max
I kHz
Ciss
pF
Max
Crss
pF
Max
V(BR)GOO
Volts
Min Min I Max Min I Max Style
Case 29-04 - To-226AA (TO-92) - N-Channel
J202 - - - - - - 40 0.8 4.0 0.9 4.5 5
2N5458 1.5 1.0 50 1.0 7.0 3.0 25 1.0 7.0 2.0 9.0 5
MPF3821 1.5 1.0 10 1.0 6.0 3.0 50 - 4.0 0.5 2.5 5
2N5457 1.0 1.0 50 1.0 7.0 3.0 25 0.5 6.0 1.0 5.0 5
2N5459 2.0 1.0 50 1.0 7.0 3.0 25 2.0 8.0 4.0 16 5
Case 29-04 - TO-226AA (T0-92) - P-Channel
2N5460 1.0 1.0 75 1.0 7.0 2.0 40 0.75 6.0 1.0 5.0 7
2N5461 1.5 1.0 75 1.0 7.0 2.0 40 1.0 7.5 2.0 9.0 7
2N5462 2.0 1.0 75 1.0 7.0 2.0 40 1.8 9.0 4.0 16 7
VGS(off) lOSS
Re IYfsl@f RelYosl@f NF@RG=1K V(BR)GSS Volts rnA
Device
mmho
Min
I MHz
~mho
Max
I MHz
Ciss
pF
Max
Crss
pF
Max
dB
Max
I f
MHz
V(BR)GOO
Volts
Min Min I Max Min IMax Style
Case 29-04 - TO-226AA (T0-92) - N-Channel
MPF102 1.6 100 200 100 7.0 3.0 - - 25 - 8.0 2.0 20 5
2N5668 1.0 100 50 100 7.0 3.0 2.5 100 25 0.2 4.0 1.0 5.0 5
2N5484 2.5 100 75 100 5.0 1.0 3.0 100 25 0.3 3.0 1.0 5.0 5
2N5485 3.0 400 100 400 5.0 1.0 4.0 400 25 0.5 4.0 4.0 10 5
2N5486 3.5 400 100 400 5.0 1.0 4.0 400 25 2.0 6.0 8.0 20 5
J308 12(1) 100 250(1) 100 7.5 2.5 1.5(1) 100 25 1.0 6.5 12 60 5
J309 12(1) 100 250(1) 100 7.5 2.5 1.5(1) 100 25 1.0 4.0 12 30 5
J310 12(1) 100 250(1) 100 7.5 2.5 1.5(1) 100 25 2.0 6.5 24 60 5
(1) Typical
Motorola Master Selection Guide 5.1-19 Small Signal Transistors, FETs and Diodes
JFETs (continued)
VGS(off) lOSS
ROS(on)@IO Volts mA V(BR)GSS
V(BR)GOO Clss C rss ton toff
Oevlce :ax I mA Min I Max Min I Max
Volts
Min
pF
Max
pF
Max
ns
Max
ns
Max Style
(1) Typical
(16) VOS(f)
Small Signal Transistors, FETs and Diodes 5.1-20 Motorola Master Selection Guide
,r TMOS TMOS FETs
CASE 29-(15
TO-226AE
l-WATT (T0-92)
D CASE2!Hl4
TO-226AA
(TQ-92)
"2 3
VGS(th)
ROS(on)@ 10 Volts
V(BR)OSS Ciss Crss ton toff
g
I I Volts pF pF ns ns
Device Max A Min Max Min Max Max Max Max Style
Case 29-05 - T0-226AE (1-WATT T0-92) - N-Channel
MPF930 1.4 1.0 1.0 3.5 35 70(1) 20(1) 15 15 22
MPF960 1.7 1.0 1.0 3.5 60 70(1) 20(1) 15 15 22
MPF6659 1.B 1.0 O.B 2.0 35 30(1) 4(1) 5.0 5.0 22
MPF990 2.0 1.0 1.0 3.5 90 70(1) 20(1) 15 15 22
MPF6660 3.0 1.0 O.B 2.0 60 30(1) 4(1) 5.0 5.0 22
MPF6661 4.0 1.0 O.B 2.0 90 30(1) 4(1) 5.0 5.0 22
MPF910 5.0 0.5 0.3 2.5 60 - - - - 22
VN10LM 5.0 0.5 O.B 2.5 60 60 5.0 10 10 22
Case 29-04 - T0-226AA (T0-92) - N-Channel
VN0300L 1.2 1.0 O.B 2.5 60 100 25 30 30 22
2N7000 5.0 0.5 0.8 3.0 60 60 5.0 10 10 22
B5170 5.0 0.2 0.8 3.0 60 25(1) 3.0(1) 10 10 30
VN0610LL 5.0 0.5 0.8 2.5 60 60 5.0 10 10 22
VN1706L 6.0 0.5 0.8 2.0 170 125 20 8.0 18 22
VN2406L 6.0 0.5 0.8 2.0 240 125 20 8.0 23 22
BSS89 6.0 0.30 1.0 2.7 200 72(1) 3.0(1) 6.0(1) 12(1) 7
B5107A 6.4 0.25 1.0 3.0 200 60(1) 6.0(1) 15 15 30
2N70OB 7.5 0.5 1.0 2.5 60 50 5.0 20 20 22
VN2222LL 7.5 0.5 0.6 2.5 60 60 5.0 10 10 22
VN2410L 10 0.5 0.8 2.0 240 125 20 8.0 23 22
BS107 14 0.2 1.0 3.0 200 60(1) 6.0(1) 15 15 30
(1) Typical
Motorola Master Selection Guide 5.1-21 Small Signal Transistors, FETs and Diodes
Surface Mount FETs CASE 311H18
TQ-236AB
This section contains the FET plastic packages available for SOT-23
surface mount applications. Most of these devices are the
most popular metal-can and insertion type parts carried over
to the new surface mount packages.
CASE 318E-Il4
SOT-223
3
Device Marking
Case 318-08 - T0-236AB (SOT-23) - N-Channel
dB
Typ
I f
MHz
mmhos
Min
I mmhos
Max I Volts V(BR)GSS Style
Device Marking
Case 318-08 - T0-236AB (SOT-23) - N-Channel
V(BR)GSS
mmhos
Min
I
mmhos
Max
I Volts
mA
Min
I
mA
Max Style
MMBF5457LTf
MMBF5459LT1
Small Signal Transistors, FETs and Diodes 5.1-22 Motorola Master Selection Guide
Surface Mount FETs (continued)
VGS(off) lOSS
ROS(on) toff
Device Marking
Case 318-08 - TO-236AB (SOT-23) - N-Channel
Ohms
Max
ns
Max V(BR)GSS
Volts
Min
I Volts
Max
mA
Min
I mA
Max Style
Motorola Master Selection Guide 5.1-23 Small Signal Transistors, FETs and Diodes
Tuning and Switching Diodes
CASE 29-04
T0-226AA
1~!~3
Tuning Diodes - (T0-92)
2
Abrupt Junction STYLE 15
Motorola supplies voltage-variable capacitance diodes serving
the entire range of frequencies from HF through UHF. Used in RF CASE51~2 1---114-2
receivers and transmitters, they have a variety of applications, 0O-204AA
STYLE 1
including: (00-7)
• Phase-locked loop tuning systems
• Local oscillator tuning
• Tuned RF preselectors CASE 182-02 2 0---11+--0 1
• RF filters TO-226AC Cathode Anode
• RF phase shifters (T0-92) STYLE 1
• RF amplifiers
• Automatic frequency control 3 0---11+--0 1
• Video filters and delay lines Cathode Anode
• Harmonic generators CASE31~8 STYLEB
1~
• FM modulators T0-236AB
Two families of devices are available: Abrupt Junction and Hyper SOT-23 1~~~2
Abrupt Junction. The Abrupt Junction family includes devices
3 STYLE 9
suitable for virtually all tuned--circuit and narrow-range tuning 2
applications throughout the spectrum.
Typical Characteristics
Diode Capacitance versus Reverse Voltage
100
70 10oom~.m!.mfimmm
(L N5450A 1N5452A 1N5456A
S, 50
w
0
z 30 i"'-... l
1N 148,A MV1638 MV1642 MV1650
~
B 20
1N514I.A'r--
it (See Tables 38 Thru 40)
('§
w
Cl 10
r-.... N
Q N5140,A
Cl 7
0
..= 5 I- TA = 25°C .....
1-1=1 MHz
2 1 1111
0.6 1 2 4 6 10 20 40 60 0.1 1 10 100
VR, REVERSE VOLTAGE (VOLTS) VR, REVERSE VOLTAGE (VOLTS)
1000
100
(L - MV21 09 (L
s, - MMBV2109LT1 MV21j5 t-.
~ 70
~ I""-
~ ::::--...
~ 100
B E~ ~
~ 40
I": t--....
it
('§
w
('§
w
M 104G' ~t--. MBV432l 1-
Cl Cl
~ 10 o ~104
i5 20
..=
o ~ 210
MMBV2101,~;r1
2 0 :-:,:
MMBV2105LT1
(j
r- 1=1 MHz
A= 5°
" ~ ........;
~
EACH DIODE
1 1111 III
0.1 1 10 100 100.3 0.5 1 2 3 5 10 20 30
VR, REVERSE VOLTAGE (VOLTS) VR, REVERSE VOLTAGE (VOLTS)
(See Tables 41 and 42) (See Table 43)
Small Signal Transistors, FETs and Diodes 5.1-24 Motorola Master Selection Guide
Tuning Diodes - Abrupt Junction (continued)
Case 51-02 -
Device(19)
DO-204AA (00-7)
pF
Min
I pF
Nominal
I pF
Max
V(BR)R
Volts
C4IC60
Min
4.0 V, 50 MHz
Min
I I
pF pF pF VR(BR)R C2IC30 4.0 V, 50 MHz
Device(20) Min Nominal Max Volts Min Min
Motorola Master Selection Guide 5.1-25 Small Signal Transistors, FETs and Diodes
Tuning Diodes - Abrupt Junction (continued)
I I
pF pF pF V(BR)R C2IC20 4.0V,50MHz
Device Min Nominal Max Volts Min Typ
Case 51-02 - D0-204AA (DO-7)
MV1620 6.1 6.8 7.5 20 2.0 300
MV1624 9.0 10 11 20 2.0 300
MV1626 10.8 12 13.2 20 2.0 300
MV1628 13.5 15 16.5 20 2.0 250
MV1630 16.2 18 19.8 20 2.0 250
MV1634 19.8 22 24.2 20 2.0 250
MV1636 24.3 27 29.7 20 2.0 200
MV1638 29.7 33 36.3 20 2.0 200
MV1640 35.1 39 42.9 20 2.0 200
MV1642 42.3 47 51.7 20 2.0 200
MV1644 50.4 56 61.6 20 2.0 150
MV1648 73.8 82 90.2 20 2.0 150
MV1650 90 100 110 20 2.0 150
Device
Case 182-02 - T0-226AC (T0-92) -
pF
Min
2-Lead
I pF
Nominal I pF
Max
VR(BR)R
Volts
C4IC30
Min
4.0V,50 MHz
Typ
Small Signal Transistors, FETs and Diodes 5.1-26 Motorola Master Selection Guide
Tuning Diodes - Abrupt Junction (continued)
I I
VR(BR)R
Device Min Nominal Max Volts Min Typ
Case 318-08 - DO-236AB (SOT-23)
Device
Case 29-04 -
pF
Min
TQ-226AA (TO-92)
I pF
Max I Volts
C3IC30
Min
3.0 V, 50 MHz
Min
V(BR)R
Volts
Device
Marking Style
I
MV104 37 42 3.0 2.5 100 32 15
Case 318-08 - TQ-236AB (SOT-23)
I
MMBV432LT1 43 48.1 2.0 1.5(21) 100 14 M4B 9
(21)C2IC8
(22)Each Diode
Motorola Master Selection Guide 5.1-27 Small Signal Transistors, FETs and Diodes
Tuning Diodes -
2
Hyper-Abrupt Junction
CASE 51-02
The Hyper-Abrupt family exhibits higher capacitance, and a DO-204AA Cathode Anode
much larger capacitance ratio. It is particularly well suited for (DO-7) STYLE 1
wider-range applications such as AMlFM radio and TVtuning.
'/
CASE 182-02 2 0--114---0 1
TO-226AC Anode Cathode
(TQ-92) STYLE 1
1
~
~ CASE 318E-04
SOT-223
1 <>--+11---0 2,4
3 STYLE 2
Typical Characteristics
Diode Capacitance versus Reverse Voltage
20 40
18 to-.. I I 36
~ 16
I I 32
IMMIBV\O~G~~11 I I I
~ 14
z
~ 12 " ~
.......
~
w
()
z 24
28
"'\ MM8Vl09LTl
MV209
~ 1~ TA = 25°C .....
~ 20
[5
ct. 16
w «
8
-
6 f= 1 MHz ()
II I I
,.:. 12
Ci 4 8
-
()
,.:.
() 2 II i'
"""
o II
0.3 0.5 2 3 5 10 20 30 3 10 30 100
VR, REVERSE VOLTAGE (VOLTS) VR, REVERSE VOLTAGE (VOLTS)
Small Signal Transistors, FETs and Diodes 5.1-28 Motorola Master Selection Guide
Tuning Diodes - Hyper-Abrupt Junction (continued)
40 10
9
~ 32 \.
~
UJ
a " w
a
z
oi" 24 " i\
MMBV409LT1
MV409
z
i"
o
i'..
.......
if if MMBV809LT1
(§ 16
w
o
«
a
w
o
4
I".....
....... ,
-
a ......... a 3
o o i'--
f- f-
a a
1
o o0.5
1 10 20 4 5 8 10 15
VR, REVERSE VOLTAGE (VOLTS) VR, REVERSE VOLTAGE (VOLTS)
40 50
36
r-- I II
~ 32
I II ~ 40
r-....
I I I I III ........
w
a
o~
28
24
........
...... , MMBV3102LT1
w
a
z
i" 30
............ MMBV609LT1
f~1 MHz-
if
«
20
......... 0
if r--....
«
~
8
o
16
12 TA ~ 25°C
a
w
0
a
20
" ......
8 f~ 1 MHz r--..... 0
,.: 10
f- ....... l- i- .......
a
4 I I I I a
o o1
0.3 0.5 1 3 5 10 20 30 7 10 20 30 40
VR, REVERSE VOLTAGE (VOLTS) VR, REVERSE VOLTAGE (VOLTS)
MVAM10S MVAM109/MV7005T1
1000 1000
500 500
...... .......
u::-
s .......... ~ ..........
w
a
z
i"
..........
~
UJ
az I'....
,
oi"
100 100
~ if
(§ 50 ....... (§ 50
f- f-
a a
10 10
4 3 7
VR, REVERSE VOLTAGE (VOLTS) VR, REVERSE VOLTAGE (VOLTS)
Figure 7. Capacitance versus Reverse Voltage Figure S. Capacitance versus Reverse Voltage
Motorola Master Selection Guide 5.1-29 Small Signal Transistors, FETs and Diodes
Tuning Diodes - Hyper-Abrupt Junction (continued)
MVAM115 MVAM125
1000 1000
500 500
u:::- ....... u:::-
.s
w
~
.......
, .s
w
~
"' "-
~loo ~ 100 ~
o i3
cf
«
cf
<-:f- 50 <3,.:. 50
o ....... I- o r- r-
10 10
2 6 10 14 18 2 6 10 14 18 22 26
VR. REVERSE VOLTAGE (VOLTS) VR. REVERSE VOLTAGE (VOLTS)
Figure g. Capacitance versus Reverse Voltage Figure 10. Capacitance versus Reverse Voltage
u:::- 3O0
.s
500
200
~ ......
.....
TA-25°C
1=1 MHz _
=
~
c........
Device
pF
Min
I I pF
Max Volts Min J I Max Volts
3.0V 150 MHz
Min Max
V(BR)R
Volts
Device
Marking
Case
Style
Curve
Fig
Case 182-02 - TQ-226AC (TQ-92)
MV209
MV409
Small Signal Transistors. FETs and Diodes 5.1-30 Motorola Master Selection Guide
Tuning Diodes - Hyper-Abrupt Junction (continued)
Device
pF
Min
I I
pF
Max Volts Min I I
Max Volls
3.0V
Min
150MHZ
Max
V(BR)R
Volts
Device
Marking
Case
Style
CV
Curve
Fig
Table 46. Hyper-Abrupt Tuning Diodes for Low Frequency Applications - Single
The following is a listing of AM, hyper-abrupt tuning diodes that have a large capacity range and are designed for low
frequency circuit applications.
CT@ 1.0 MHz Cap Ratio@VR
CV
Device
Table 47. Hyper-Abrupt High Capacitance Voltage Variable Diode - Surface Mount
The following are high capacitance voltage variable diodes intended for low frequency applications and circuits requiring
large tuning capacitance.
CT @ f =1.0 MHz CV
Device
Case 318E-04- SOT-223
V(BR)R
Volls
IR
nA
Min
pF
I Max
pF
Cap Ratio
Min
Q
Min Slyle
Curve
Figure
Table 48. Hyper-Abrupt High Capacitance Tuning Diodes - Axial Lead Glass Package
CT@VR
Cap Ralio Q CV
I I
pF pF C2IC10 2.0 V, 1.0 MHz V(BR)R Curve
Device Min Max Volls Min Min Volts Style Figure
Motorola Master Selection Guide 5.1--31 Small Signal Transistors, FETs and Diodes
Hot-Carrier
(Schottky) Diodes 1
II 2
STYLE 1
2 0--114----0
CASE lS2-o2
TD-226AC
(T0-92)
~
~
CASE 425-04
SOO-123
STYLE 1
1 0--114----0 2
Hot-Carrier diodes are ideal for VHF and UHF mixer and Cathode Anode
detector applications as well as many higher frequency Cathode Anode
applications. They provide stable electrical characteristics by
CASE 419-02
eliminating the pOint-contact diode presently used in many SC-701S0T-323
applications. •
1~3
CASE 318-0S STYLE
To-236AB
SOT-23
10 .1
SINGLE
03
2
STYLES STYLE 11
1 0-".+-1-0 3 10 I'" t I... 02
SINGLE STYLE 9 b SERIES
STYLE 19
l o . l t l"' 02
b l o l"'t l"' 02
Typical Characteristics 3 b SERIES
COMMON CATHODE 3
Capacitance versus Reverse Voltage
2.8
I I I
I - - TA = 25°C - TA = 25°C -
MBJ101 2.4
MMBD101LT1
~0.9 MMBD352LT1' ~ 2
.90
w ~ MMBD353LT1'
.90
w
~
(.)
............ MMBD354LT1'
(.)
z 1.6 MBD301 ,
r--.....
----
Z
;'!: ;'!: MMBD301LT1
[5 0.8
-
[5
ct: ct: 1.2
<C \.. I.........
t5 (.)
,.:. 0.8 .........
li 0.7 (.)
o I I
1 2 4 0 5 10 15 20 25 30 35 40 45 50
VR, REVERSE VOLTAGE (VOLTS) 'EACH DIODE VR, REVERSE VOLTAGE (VOLTS)
(See Table 49)
Small Signal Transistors, FETs and Diodes 5.1-32 Motorola Master Selection Guide
Table 49. Hot-Carrier (Schottky) Diodes
The following is a listing of hot carrier (Schottky) diodes that exhibit low forward voltage drop for improved circuit efficiency.
CT@VR VF@ 10 mA IR@VR Minority
V(BR)R pF Volts nA Lifetime Device
Device Volts Max Max Max pS(TYP) Marking Style
Case 425-04 - (500-123)
MMSD701T1
MMSD301T1
MMBD330Tf
MMBD770Tf
(23) Dual Diodes
Motorola Master Selection Guide 5.1-33 Small Signal Transistors, FETs and Diodes
Switching
'~E2~ 1!~E1~
Diodes
Small-signal switching diodes are intended for low current TO-226AA TO-226AC
switching and steering applications. Hot-Carrier, PIN and 1 (T0-92) 1 (T0-92)
general-purpose diodes allow a wide selection for specific 23 2
application requirements. STYLE 3
10 .1 02
I
I11III
STYLE 1
3 2 0---114----0 1
Typical Characteristics
Capacitance versus Reverse Voltage STYLE 4 Cathode Anode
10
10 1II1II .1 02
u:-
s
TA 25°C
f 1MHz
=
== I
3
w
()
z
~
,~
[5
ct CASE 318-08
<3
w
MPN3404 To-236AB
Cl SOT-23
o
i5 2
,.:. 0.5
=
() 0.3
0.2
MMBV3401 LT1
20V MAXVR
MPN3700
MMBV3700LT1 = 10
STYLE 8
.1 03 10
STYLE 12
1II1I ~ 02
o 0 12 18 24 30
VR, REVERSE VOLTAGE (VOLTS)
36 42 48 54 SINGLE
3
I
COMMON ANODE
(See Table 50)
STYLE 9 STYLE 18
10 .1 1II1I 02 20 1II1I 03
STYLE 1
0---114----0 3
I SINGLE
COMMON CATHODE
Cathode Anode
STYLE 11 STYLE 19
CASE 425-04 10 .1 .1 02 10 1II1I 1II1I 02
SO[)-123
3
I I
3
SERIES SERIES
CASE 419-02
2~
SC-70/s0T-323
1. CASE 3180-03
2
SC-59
STYLE 2
10 .1 03 STYLE 2 STYLE 4
SINGLE
20 .1 03 20 I11III 03
SINGLE SINGLE
STYLES STYLE 4
STYLE 3 STYLES
10 .1 1II1I 02 10 1II1II ~ 02
3
I 3
I 10 .1
I
1II1I 02 10 1II1I
I
.1 02
Small Signal Transistors, FETs and Diodes 5.1-34 Motorola Master Selection Guide
Switching Diodes (continued)
CT@VR@1.0MHz Series
V(BR)R IR@VR Resistance
I
Volts pF nA Ohm Device
Device Min Max Volts Max Max Marking Style
Case 182-02 - TO-226AC (TO-92)
MPN3700
MPN3404
MMBV3700LT1
MMBV3401 LT1
Device Marking
Min
Volts
I @IBR
(~A)
Max
(~A)
I
@VR
Volts
Min
Volts
I Max
Volts
I
@IF
(rnA)
Max
(pF)
Max
(ns)
Case
Style
Motorola Master Selection Guide 5.1-35 Small Signal Transistors, FETs and Diodes
Switching Diodes (continued)
Device Marking
Min
Valls
I @IBR
(J.lA)
Max
(J.lA) I
@VR
Valls
Min
Valls
I Max
Vails
I @IF
(rnA)
Max
(pF)
Max
(ns)
Case
Slyle
Device Markin9
Min
Valls
I @IBR
(J.lA)
Max
(nA)
I
@VR
VailS
Min
Valls
I Max
Vails
I @IF
(rnA)
Max
(pF)
Max
(ns)
Case
Slyle
Small Signal Transistors, FETs and Diodes 5.1-36 Motorola Master Selection Guide
SWitching Diodes (continued)
Device Marking
Min
Volts
I @IBR
(IlA)
Max
(nA)
I @VR
Volts
Min
Volts
I I
Max
Volts
@IF
(mA)
Max
(pF)
Max
(ns)
Case
Style
Motorola Master Selection Guide 5.1-37 Small Signal Transistors, FETs and Diodes
Multiple
Switching Diodes
Multiple diode configurations utilize monolithic structures fabricated by the planar process. They are designed to satisfy fast
switching requirements as in core driver and encoding/decoding applications where their monolithic configurations offer lower cost,
higher reliability and space savings.
14~
4 7
(C~~;~ @111&1111
"fffi(
Dual 10 Isolated
Diode
Anode) NC Pin 1,4,6,10,13
7 Diode
Array III I!!!
3 6
16
Diode
NC Pin 4,6,10,13
Dual 8
Diode
Array
"me
NC Pin 6,13
Small Signal Transistors, FETs and Diodes 5.1-38 Motorola Master Selection Guide
Multiple Switching Diodes (continued)
Case 648-08
IMAD1108P 18 Isolated Diode Array 7
Case 751A-03- S0-14
MMAD130 Dual 10 Diode Array 2
MMAD1103 16 Diode Array 3
MMAD1105 8 Diode Common Cathode Array 4
MMAD1106 8 Diode Common Anode Array 5
MMAD1107 Dual 8 Diode Array 6
MMAD1109 7 Isolated Diode Array 8
Case 7518-05 - SO-16
IMMAD1108 18 Isolated Diode Array 7
Motorola Master Selection Guide 5.1-39 Small Signal Transistors, FETs and Diodes
1~
....................._ - ~-··-··-TM
G R E E N ~ LIN £
2 2
CASE 311H18 CASE 3180-03
TO-236AB Sc-59
SOT-23
Plastic-Encapsulated
Surface Mount Devices
Energy. It's something Motorola is putting a lot of energy into
helping save. That's why we're introducing our GreenLine™
portfolio of devices, featuring energy--conserving traits
superior to those of our existing line of standard parts for the
CASE 425-114
S00-123
* 2
CASE 419-02
SC-701S0T-323
same usage. GreenLine devices can actually help reduce the • Small Signal HDTMOSTM: These devices provide our
power demands of your products. lowest ever drain-source resistance versus package size.
Lower rDS(on) means less wasted energy through dissipation
Wide Range of Applications loss, making them especially effective for low--current
Currently, our portfolio consists of three families. applications where energy conservation is crucial, such as low
• Low-Leakage Switching Diodes: With reverse leakage current switchmode power supplies, uninterruptable power
specifications guaranteed to 500 pA, they help extend battery supplies (UPS), power management systems, and bias
life, making them ideal for small battery-operated systems in switching. This makes them ideal for portable computer-type
which standby power is essential. Applications include ESD products or any system where the combination of power
protection, reverse voltage protection, and steering logic. management and energy conservation is key.
• Bipolar Output Driver Transistors: Offering ultra-low Save Energy - Save Money
collector saturation voltage, they deliver more energy to the In an increasingly power-hungry world, Motorola's
intended load with less power wasted through dissipation loss. GreenLine portfolio makes powerful sense. So much sense
They are especially effective in today's lower voltage that we plan to continue adding devices to the portfolio.
battery-powered applications, and prolong battery life in Chances are, there are Motorola GreenLine devices
portable and hand-held communications and personal digital applicable to one or more of your products - ones that can
equipment. help save energy, dollars - and the environment.
Small Signal Transistors, FETs and Diodes 5.1-40 Motorola Master Selection Guide
GreenLine (continued)
1 1
ROS(on) VGS(th)
Volts
OeviceType Marking Channel Ohm J mA VOSS Min
Volts
Max
t(on)
ns
t(off)
ns Style
Case 318-08 - TO-236AB (SOT-23) - P-Ghannel and N-Ghannel
MMBF0201NLT1
MMBF0202PLT1
Motorola Master Selection Guide 5.1-41 Small Signal Transistors, FETs and Diodes
Devices listed in bold, ~alic are Motorola preferred devices.
Small Signal Transistors, FETs and Diodes 5.1-42 Motorola Master Selection Guide
TVSlZeners
Transient Voltage Suppressors
Zener Regulator and Reference Diodes
In Brief ...
Motorola's standard TVS (Transient Voltage Suppressors) Page
and Zener diodes comprise the largest inventoried line in the TVS (TranSient Voltage Suppressors) ............. 5.2-2
industry. Continuous development of improved manufacturing General-Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.2-2
techniques have resulted in computerized diffusion and test, as Axial Leaded for Through-hole Designs ...... 5.2-2
well as critical process controls leamed from surface--sensitive Surface Mount Packages ..................... 5.2-9
MOS fabrication. Resultant high yields lower factory costs. Overvoltage Transient Suppressors ........... 5.2-15
Check the following features for application to your specific Zener Diodes ................................. 5.2-16
requirements: Voltage Regulator Diodes .................... 5.2-16
• Wide selection of package materials and styles: Notes - Axial Leaded Chart ................. 5.2-20
Notes - Surface Mount Chart. . . . . . . . . . . . . . .. 5.2-23
- Plastic (Surmetic) for low cost, mechanical ruggedness
Voltage Reference Diodes ................... 5.2-31
- Glass for high reliability, low cost
Current Regulator Diodes. . . . . . . . . . . . . . . . . . .. 5.2-31
- Surface Mount packages for state of the art designs
• Power Ratings from 0.25 to 5.0 Watts
• Breakdown voltages from 1.8 to 400 Volts in
approximately 10% steps
• TVS from 24 to 1500 Watts and from 6.2 to 250 Volts
• ESD protection devices
• Available tolerances from 5% (low cost) to as tight as
1% (critical applications)
• Special selection of electrical characteristics available
at low cost due to high-volume lines (check your
Motorola sales representative for special quotations)
• UL Recognition on many TVS device types
• Tape and Reel options available on all axial leaded and
surface mount types
Note: Any TVS/Zener device not listed in this Master Selection Guide may
be available with a special order. Please contact your Motorola
representative for details.
IRSM ~Figure 1
IRSM
2
,,
, I
CASE 59-M (Mini Mosorb™) 0123456
PLASTIC Time_ (ms)
=
Cathode Polarity Band Surge Curren1 CharacteriS1lcs
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) VF = 3.5 V Max, IF = 35 A Pulse
(except bidirectional devices).
Breakdown Voltage
Working Peak Maximum Maximum Maximum
Reverse Reverse Reverse Surge Reverse Voltage
Voltage VBR @IT Leakage Current IRSM @IRSM
(Volts)
VRWM Pulse @VRWM Figure 1 (Clamping Voltage)
(Volts) Device(2) Min Max (mA) IR (!tA) (Amps) VRSM (Volts)
5 SA5.0A 6.4 7 10 600 54.3 9.2
6 SA6.0A 6.67 7.37 10 600 48.5 10.3
7 SA7.0A 7.78 8.6 10 150 41.7 12
8 SA8.0A B.89 9.83 1 25 36.7 13.6
11 SA11A 12.2 13.5 1 1 27.4 18.2
12 SA12A 13.3 14.7 1 1 25.1 19.9
13 SA13A 14.4 15.9 1 1 23.2 21.5
14 SA14A 15.6 17.2 1 1 21.5 23.2
15 SA15A 16.7 18.5 1 1 20.6 24.4
16 SA16A 17.8 19.7 1 1 19.2 26
17 SA17A 18.9 20.9 1 1 18.1 27.6
(1) Steady state power dissipation = 3 watt max rating
(2) For bidirectional types use CA suffix, SA6.5CA, SA 12CA, SA 13CA and SA 15CA are Motorola preferred devices.
Have cathode polarity band on each end. (Consult factory for availability).
IRSM
~FigUre1
IRSM
--
2
0 1 2 3 4 5 6
CASE 17-Q2 TIme_(ms)
PLASTIC Surge Current Characteristics
=
Cathode Polarity Band
=
ELECTRICAL CHARACTERISTICS (TA 25°C unless otherwise noted) VF =3.5 V Max, IF =50 A Pulse
(except bidirectional devices).
Breakdown
Voltage(3)
Working Peak Maximum Maximum Maximum
Reverse Reverse Reverse Surge Reverse Voltage
VBR
@IT Voltage Leakage Current IRSM @IRSM
(Volts)
Pulse VRWM @VRWM Figure 1 (Clamping Voltage)
Nom (rnA) Devlce(l, 4) (Volts) IR(IlA) (Amps) VRSM (Volts)
6.8 10 P6KE6.8A 5.8 1000 57 10.5
7.5 10 P6KE7.5A 6.4 500 53 11.3
8.2 10 P6KE8.2A 7.02 200 50 12.1
9.1 1 P6KE9.1A 7.78 50 45 13.4
10 1 P6KElOA 8.55 10 41 14.5
11 1 P6KE11A 9.4 5 38 15.6
12 1 P6KE12A 10.2 5 36 16.7
13 1 P6KE13A 11.1 5 33 18.2
15 1 P6KE15A 12.8 5 28 21.2
16 1 P6KE16A 13.6 5 27 22.5
18 1 P6KE18A 15.3 5 24 25.2
20 1 P6KE20A 17.1 5 22 27.7
22 1 P6KE22A 18.8 5 20 30.6
24 1 P6KE24A 20.5 5 18 33.2
27 1 P6KE27A 23.1 5 16 37.5
30 1 P6KE30A 25.6 5 14.4 41.4
Breakdown
Voltage(3)
Working Peak Maximum Maximum Maximum
Reverse Reverse Reverse Surge Reverse Voltage
VBR
@tr Voltage Leakage Current IRSM @IRSM
(Volts)
Pulse VRWM @VRWM Figure 1 (Clamping Voltage)
Nom (mA) Device(1, 4) (Volts) IR !/lA) (Amps) VRSM (Volts)
130 1 P6KE130A 111 5 3.3 179
150 1 P6KE150A 128 5 2.9 207
160 1 P6KE160A 136 5 2.7 219
180 1 P6KE180A 154 5 2.4 246
200 1 P6KE200A 171 5 2.2 274
(I) For bidirectional types use CA suffix. Have cathode polarity band on each end. (Consult factory for availability).
(2) Steady state power dissipation = 5 watt max rating.
(3) Breakdown voltage tolerance is ±5% for A suffix.
(4) UL recognition for classification of protectors (QVGV2) underthe UL standard for safety 497B and file #E11611 0 for entire series including CA suffixes.
IRSM
IRSM
~R."rel
2
0 1 2 3 4 5 6
CASE 41A412
PLASTIC Time_ (ms)
Cathode = Polarity Band Surge Current Characteristics
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) VF = 3.5 V Max, IF = 100 A Pulse)
(C suffix denotes standard back to back bidirectional versions. Test both polarities)
Clamping Voltage(3)
Maximum
Breakdown Maximum Reverse
Maximum Voltage Reverse Vottage@ Peak Pulse Peak Pulse
Reverse Maximum Surge IRSM Current @ Current @
Stand-off Reverse Current (Clamping Ippl = 1 A Ipp2=10A
Voltage VBR @IT Leakage Figure 1 Voltage) Figure 1 Figure 1
VRWM JEDEC(2) Volts Pulse @VRWM IRSM VRSM VCl VC2
(Volts) Device Devlce(2) Min (mA) IR(IlA) (Volts) (Volts) (Volts max) (Volts max)
5 lN5908 6 1 300 120 8.5 7.6@ 30A 8@60A
5 lN6373 ICTE--5'MPTE-5 6 1 300 160 9.4 7.1 7.5
8 1N6374 ICTE-8/MPTE-8 9.4 1 25 100 15 11.3 11.5
8 1N6382 ICTE-8C/MPTE-8C 9.4 1 25 100 15 11.4 11.6
10 1N6375 ICTE-10/MPTE-10 11.7 1 2 90 16.7 13.7 14.1
10 1N6383 ICTE-1 OC/MPTE-1 OC 11.7 1 2 90 16.7 14.1 14.5
12 1N6376 ICTE-121MPTE-12 14.1 1 2 70 21.2 16.1 16.5
12 1N6384 ICTE-12C/MPTE-12C 14.1 1 2 70 21.2 16.7 17.1
15 1N6377 ICTE-15/MPTE-15 17.6 1 2 60 25 20.1 20.6
15 1N6385 ICTE-15C/MPTE-15C 17.6 1 2 60 25 20.8 21.4
18 1N6378 ICTE-181MPTE-18 21.2 1 2 50 30 24.2 25.2
18 1N6386 ICTE-18C/MPTE-18C 21.2 1 2 50 30 24.8 25.5
22 1N6379 ICTE-22/MPTE-22 25.9 1 2 40 37.5 29.8 32
36 1N6380 ICTE-36/MPTE-36 42.4 1 2 23 65.2 50.6 54.3
36 1N6388 ICTE-36C1MPTE-36C 42.4 1 2 23 65.2 50.6 54.3
45 1N6381 ICTE-45IMPTE-45 52.9 1 2 19 78.9 63.3 70
45 1N6389 ICTE-45C/MPTE-45C 52.9 1 2 19 78.9 63.3 70
(1) Steady state power diSSipation = 5 watts max rating.
(2) 1 N6382 thru 1 N6389 and C suffix ICTEIMPTE device types are bidirectional. Have cathode polarity band on each end. All other device types are unidirectional
only. (Consult factory for availability)
(3) Clamping voltage peak pulse currents for 1 N5908 are 30 Amps and 60 Amps.
IRSM ~Figure 1
IRSM
2
,,
, I
0123456
CASE 41A-02
PLASTIC Time_ (ms)
=
Cathode Polarity Band Surge Current Characteristics
ELECTRICAL CHARACTERISTICS (TA =25'C unless otherwise noted) VF =3.5 V Max, IF =100 A Pulse
Maximum
Breakdown Voltage(2) Maximum Reverse
Working Reverse Voltage
Peak Maximum Surge @IRSM
VBR Reverse Reverse Current (Clamping
Volts
@IT Voltage Leakage Figure 1 Voltage)
Pulse JEDEC VRWM @VRWM IRSM VRSM
Nom (mA) Device Device(3, 4) (Volts) IR(IlA) (Amps) (Volts)
6.8 10 1N6267A 1.5KE6.8A 5.8 1000 143 10.5
7.5 10 lN6268A 1.5KE7.5A 6.4 500 132 11.3
8.2 10 lN6269A 1.5KE8.2A 7.02 200 124 12.1
10 1 1N6271 A 1.5KE10A 8.55 10 103 14.5
11 lN6272A 1.5KEllA 9.4 5 96 15.6
12 lN6273A 1.5KE12A 10.2 5 90 16.7
13 lN6274A 1.5KE13A 11.1 5 82 18.2
15 1N6275A 1.5KE15A 12.8 5 71 21.2
16 lN6276A 1.5KE16A 13.6 5 67 22.5
18 lN6277A 1.5KE18A 15.3 5 59.5 25.2
20 lN6278A 1.5KE20A 17.1 5 54 27.7
22 lN6279A 1.5KE22A 18.8 5 49 30.6
24 1N6280A 1.5KE24A 20.5 5 45 33.2
27 1N6281A 1.5KE27A 23.1 5 40 37.5
30 1N6282A 1.5KE30A 25.6 5 36 41.4
33 1N6283A 1.5KE33A 28.2 5 33 45.7
36 lN6284A 1.5KE36A 30.8 5 30 49.9
39 1N6285A 1.5KE39A 33.3 5 28 53.9
43 lN6286A 1.5KE43A 36.8 5 25.3 59.3
47 lN6287A 1.5KE47A 40.2 5 23.2 64.8
51 1N6288A 1.5KE51A 43.6 5 21.4 70.1
56 lN6289A 1.5KE56A 47.8 5 19.5 77
62 lN6290A 1.5KE62A 53 5 17.7 85
68 lN6291A 1.5KE68A 58.1 5 16.3 92
75 lN6292A 1.5KE75A 64.1 5 14.6 103
82 lN6293A 1.5KE82A 70.1 5 13.3 113
91 lN6294A 1.5KE91A 77.8 5 12 125
100 lN6295A 1.5KE100A 85.5 5 11 137
110 lN6296A 1.5KE110A 94 5 9.9 152
120 lN6297A 1.5KE120A 102 5 9.1 165
130 lN6298A 1.5KE130A 111 5 8.4 179
(1) Steady state power dissipation = 5 watts max rating.
(2) Breakdown voltage tolerance is ±5% for A suffix.
(3) For bidirectional types use CA suffix on 1.5KE series only. Have cathode polarity band on each end. (Consult factory for availability)
1N6267-6303A series do not have CA option since the CA is not included in EIA Registration.
(4) UL recogn~ion for classification of protectors (QVGV2) under the UL standard for safety 497B and file #El16110 for 1.5KE6.8A,CA thru 1.5KE250A.CA.
ELECTRICAL CHARACTERISTICS (TA =25°C unless otherwise noted) VF =3.5 V Max, IF =100 A Pulse
Maximum
Breakdown Voltage(2) Maximum Reverse
Working Reverse Voltage
Peak Maximum Surge @IRSM
VBR Reverse Reverse Current (Clamping
Volts Figure 1
@IT Voltage Leakage Voltage)
Pulse JEDEC VRWM @VRWM IRSM VRSM
Nom (mA) Device Device(3, 4) (Volts) IR(~) (Amps) (Volts)
150 1 1N6299A 1.5KE150A 128 5 7.2 207
160 1 1N6300A 1.5KE160A 136 5 6.8 219
170 1 1N6301A 1.5KE170A 145 5 6.4 234
180 1 1N6302A 1.5KE180A 154 5 6.1 246
200 1 1N6303A 1.5KE200A 171 5 5.5 274
220 1 1.5KE220A 185 5 4.6 328
250 1 1.5KE250A 214 5 5 344
(1) Steady state power dissipation = 5 watts max rating.
(2) Breakdown voltage tolerance is ±5% for A suffix.
(3) For bidirectional types use CA suffix. Have cathode polarity band on each end. (Consult factory for availability).
1N6267-6303A series do not have CA option since the CA is not included in EIA Registration.
(4) UL recognftion for classmcation of protectors (QVGV2) under the UL standard for safety 497B and file #E11611 0 for 1.5KE6.BA,CA thru 1.5KE250A,CA.
,~'
2
Pinout: TERMINAL 1 - ANODE
TERMINAL 2 - ANODE
TERMINAL 3 - COMMON CATHODE
IRSM t h : F i g u r e 1
IRSM
2 ,
,
::-I~~t-a
, I
CASE 318-08, STYLE 9 0123456
TO-236AB
LOW PROFILE SOT-23 3 Time_ (ms)
PLASTIC Surge Current Characteristics
Breakdown Voltage
Working Peak Maximum Reverse Maximum
VBR(3) Reverse Maximum Reverse Maximum Reverse Voltage @ IRMS Temperature
(Volts Voltage Leakage Current Surge Current (Clamping Voltage) Coefficient
@IT VRWM IRWM IRSM VRSM ofVBR
Min Nom Max (mA) (Volts) 'R(nA) (Amps) (Volts) (mVrC)
14.3 15 15.B 1.0 12.B 100 1.9 21.2 12
25.65 27 2B.35 1.0 22 50 1.0 3B 26
,~3 IRSM t h : F i g u r e
IRSM
2
1
2 ,,
i I
CASE 318-08, STYLE 12 0123456
PIN 1. CATHODE
TO-236AB 2. CATHODE
LOW PROFILE SOT-23 Time_ (ms)
PLASTIC 3. COMMON ANODE Surge Current Characteristics
5.32 5.6 5.BB 20 5.0 3.0 11 1600 0.25 3.0 B.O 1.26
5.B9 6.2 6.51 1.0 0.5 3.0 220 2.76 B.7 2.80
14.25 15 15.75 1.0 0.05 12 100 1.9 21 12.3
.4
Case 318F-01-Monolithic 4-Function Device (Available 1st Quarter 1996)
MMQA5V6T1, MMQA20Vn(1) - S~9 Quad Transient Voltage Suppressor (for ESD Protection)
RSM
PIN 1. CATHODE ~ure1
:$'
IRSM
2. ANODE - -
2
12 3. CATHODE
3 4 5 4. CATHODE
0 1 2 3 4 5 6
CASE 318F-{)2 6 5. ANODE Time_ (ms)
S~9 6. CATHODE
PLASTIC Surge Current Characteristics
Max Reverse
Max
Leakage
Max Reverse
Breakdown Voltage Current Max Zener Impedance(3)
Reverse Voltage@
VZ~2) Surge IRSM Maximum
(Volts) @IZT Current (Clamping Temperature
(rnA) IR @ VR ZZT @ IZT ZZK @ IZK IRSM Voltage) Coefficient
Min Nom Max 1 (~) (V) (n) (mA) (n) (mA) (A) VRSM(V) of Vz (mVlOC)
5.32 5.6 5.88 1.0 5.0 3.0 11 1600 0.25 3.0 8.0 1.26
..
Table 8. Peak Power DiSSipation (600 Watts @ 1 rns Surge - Figure 1) Case 403A-03
5MB
CASE 403A-{)3
PLASTIC
IRSM
IRSM
-
2
-
0
~igUre1
1 2 3 4
Time_ (ms)
5 6
Cathode Notch= Surge Current Characteristics
•
5MB
CASE 403A-03
PLASTIC
IRSM th:Figure 1
IRSM
2 ,
0123456
Time_ (ms)
, i
=
Cathode Notch Surge Current Characteristics
Table 9. Peak Power Dissipation (600 Wans @ 1 ms Surge - Figure 1) Case 403A-G3
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) VF = 3.5 V Max, IF(5) = 100 A for all types.
Table 10. Peak Power Dissipation (1500 Watts @ 1 ms Surge - Figure 1) Case 403-03
• SMC
CASE 403-03
PLASTIC
=
Cathode Notch
IRSM
IRSM
- -
2
~urel
0 1 2 3 4
TIme_ (ms)
5 6
Table 11. Peak Power Dissipation (1500 Watts @ 1 ms Surge - Figure 1) Case 403-03
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) VF = 3.5 V Max, IF(3) = 100 A for all types.
Overvoltage transient suppressors are designed for protection against over-voltage conditions in the auto electrical system
including the "LOAD DUMP" phenomenon that occurs when the battery open circuits while the car is running.
VRRM (Volts) 20
10 (Amp) 35
V(BR) (Volts) 24--32
IRSM(30)
110
(Amp)
TC @ Rated 10
(OC) 150
T
175
rC)
(30) lime constant = 10 ms, duty cycle';; 1%, T C = 25°C.
Note: MR2535L is considered part of the rectifier product portfolio.
("Note 1) ("Note 2) ("Note 3) ("Nota 4) ("NoleS) ("Note 6) ("Nota 7) ("NoleS) ("Nole9) ("Note 10) ("NoteS)
Volts Glass
Case 299-02
OQ-204AH
(oo-3S)
S.7 1N4695
9.1 1N757A 1N4696 1N52398 1N59998 8ZX55C9V1 RL MZ55298
10 1N758A 1N4697 lN52408 1N60008 8ZX55C10RL MZ41 04
1N9618
('Note 1) ('Note 2) ('Note 3) ('Note 4) ('Note 5) ('Note 6) ('Note 7) ('Note 8) ('Note 9) ('Note 10) ('Note 8)
Volts Glass
Case 299-02
0O-204AH
(00-35)
19 lN5249B
20 lN968B lN4707 1N5250B lN6007B BZX55C20RL
22 lN969B lN4708 lN5251B
24 lN970B lN5252B
25
27 lN971B lN5254B BZX55C27RL ZPD27RL
28 lN5255B
30 lN972B lN5256B ZPD30RL
160
170
180 lN991B lN5279B
190
200 lN992B lN5281B
220
240
270
300
330
360
400
(ONotel) ('Note 11) ('Note 12) (ONote 13) (ONoteI4) (ONote 15) (ONote 16) ('Note 17) (ONoteI8)
Volts
Plastic Plastic
Glass Surmetic30 Plastic
Glass Surmetic30
Case 59-03 Case 59-03 Surmetic40
Case 59-03 Case 59-03
(00-41) (00-41) Case17-Q2
(00-41) (00-41)
8.7
19 3EZ190S lN53S68
20 1N4747A MZ020RL lN53578
22 1N4748A BZX85C22RL MZPY22RL MZ022RL 1NS9338 3EZ2205 lN535S8
24 1N4749A MZP4749A BZX85C24RL MZPY24RL MZ024RL lN53598
25 1NS3608
27 1N4750A MZP47SoA 8ZXB5C27RL MZPY27RL MZ027RL 1NS9358 3EZ270S lN53618
28 3EZ2S0S lN53628
30 1N4751A MZP4751A 8ZXB5C30RL MZ030RL lN53638
33 1N4752A MZP4752A 8ZX85C33RL MZ033RL 3EZ3305 lN5364B
36 lN47S3A MZP47S3A MZ036RL 1NS9388 3EZ360S 1NS3658
39 lN47S4A MZ039RL 1NS9398 lN53668
43 lN47SSA 8ZXSSC43RL MZPY43RL MZ043RL 3EZ430S lN5367B
('Notel) ('Notell) ('Note 12) ('Note 13) ('Note 14) ('Note 15) ('Note16) ('Notel7) ('Note18)
Volts
Plastic Plastic
Glass Surmetic30 Plastic
Glass Surmetic30
Case 59-03 Case 59-03 Surmetic40
Case 59-03 Case 59-{13
(00-41) (0<l-41) Case 17-{12
(0<l-41) (0<l-41)
300
330 3EZ330DS
360
400 3EZ400DS
..
SOT-23 SOO-123 SOO-123 SOo-123 SMA 5MB
('Note 1) ('Note 2) ('Note 3) ('Note 4) ('Note 5) ('Note 6) ('Note 7) ('Note 8)
Volts
1.8
2.0
Anode
•
Plastic
Case 318-08
TO-236AB
Cathode
No Connection
-
~
Plastic
Case 425-04, Style 1
MMSZ4678Tl
MMSZ4679Tl
•Plastic
Case 403B-Ol
Plastic
Case 403A-03
Cathode = Notch
2.2 MMSZ4680Tt
2.4 BZX84C2V4LTl MMBZ5221BLTl MMSZ2V4Tl MMSZ4681Tl MMSZ5221BTt
2.5 MMBZ5222BLTl MMSZ5222BTt
2.7 BZX84C2V7LTl MMSZ2V7Tl MMSZ4682Tl MMSZ5223BTl
2.8 MMSZ5224BTI
3.0 BZX84C3VOLTI MMBZ5225BLTI MMSZ3VOTI MMSZ4683Tl MMSZ5225BT1
3.3 BZX84C3V3LTI MMBZ5226BLTI MMSZ3V3Tl MMSZ4684Tl MMSZ5226BTl 1SMA5913BT3 15MB5913BT3
.. •
SOT-23 500-123 500-123 500-123 SMA 5MB
('Note 1) ('Note 2) ('Note 3) ('Note 4) ('NoteS) ('NoteS) ('Note 7) ('Note 8)
Volts
28
30
Anode
BZX84C30LTI
•
Plastic
Case 318-08
TO-23SAB
Cathode
No Connection
MMBZ5255BLTI
MMBZ5256BLTI MMSZ30Tl
--
~'.
Plastic
Case 42S-04. Style 1
MMSZ4712Tl
MMSZ4713Tl
MMSZ5255BTI
MMSZ5256BTI
Plastic
Case 403B-Ol
1SMA5936BT3
Plastic
Case 403A-03
Cathode = Notch
15MB5936BT3
33 BZX84C33LTI MMBZ5257BLTI MMSZ33Tl MMSZ4714Tl MMSZ5257BTI 1SMA5937BT3 15MB5937BT3
36 BZX84C36LTI MMBZ5258BLTI MMSZ36Tl MMSZ4715Tl MMSZ5258BTI 1SMA5938B1'3 15MB5938BT3
39 BZX84C39LTI MMBZ5259BLTI MMSZ39T1 MMSZ4716Tl MMSZ5259BTI 1SMA5939BT3 15MB5939BT3
43 BZX84C43LTI MMSZ43Tl MMSZ4717Tl MMSZ5260BTI 1SMA5940BT3 15MB5940BT3
'.' 14
0 0
3 1
Cathode Anode
CASE 318-{)8, STYLE 8
2 SOT-23 (TQ-236AB)
PLASTIC
ELECTRICAL CHARACTERISTICS (Pinout: 1-Anode, 2-NC, 3-Cathode) (VF = 0.9 V Max @ IF = 10 rnA for all types)
Zener Voltage Max Zener Voltage Zener Voltage
VZ l (VailS) Reverse VZ2(VollS) VZ3(VoHs) dV'lfdt
@IZT1=SmA Max Zener Leakage @IZT2=lmA MaxZene, @1ZT3=20mA MaxZenet (mVI\<)
(1) Impedance Current (1) Impedance (1) Impedance @lm=SmA
~.!
ZZTl ZZT2 ZZT3
(Ohms) IR @ VR (Ohms) (Ohm.)
'I\Ipe @IZT1= mA @IZT12= @1ZT3= @VR=O
Number MarkIng Nom Min Max SmA Volts Min Max lmA Min Max 20mA Min Max 1=1 MHz
BZX64C2V4LT1 211 2.4 2.2 2.6 100 50 1 1.7 2.1 600 2.6 3.2 50 -3.5 a 450
B2X84C2V7LTl 212 2.7 2.5 2.9 100 20 1 1.9 2.4 600 3 3.6 50 -{j.5 a 450
B2X84C3VOLT1 Z13 3 2.8 3.2 95 10 1 2.1 2.7 600 3.3 3.9 50 -{j.5 a 450
BZX84C3V3LT1 214 3.3 3.1 3.5 95 5 1 2.3 2.9 600 3.6 4.2 40 -{j.5 a 450
BZX84C3V6LT1 Z15 3.6 3.4 3.8 90 5 1 2.7 3.3 600 3.9 4.5 40 -{j.5 a 450
BZX84C3V9LT1 Z16 3.9 3.7 4.1 90 3 1 2.9 3.5 600 4.1 4.7 30 -{j.5 -2.5 450
BZX84C4V3LTl W9 4.3 4 4.6 90 3 1 3.3 4 600 4.4 5.1 30 -{j.5 a 450
BZXB4C4V7LTf Zl 4.7 4.4 5 80 3 2 3.7 4.7 500 4.5 5.' 15 -{j.5 0.2 260
BZXB4C5V1LT1 Z2 5.1 4.8 5.4 60 2 2 '.2 5.3 480 5 5.9 15 -2.7 1.2 225
BZX84C5V6LT1 Z3 5.6 5.2 6 40 1 2 4.8 6 400 5.2 6.3 10 -2.0 2.5 200
BZX84Cl0LTl Z9 10 9.4 10.6 20 0.2 7 9.3 10.6 150 9.4 10.7 10 4.5 8.0 130
BZX84Cll LTl Yl 11 10.4 11.6 20 0.1 8 10.2 11.6 150 10.' 11.8 10 5.4 9.0 130
BZXB4C12LTf Y2 12 11.4 12.7 25 0.1 8 11.2 12.7 150 11.4 12.9 10 6.0 10.0 130
BZX84C13LTl Y3 13 12.4 14.1 30 0.1 8 12.3 14 170 12.5 14.2 15 7.0 11.0 120
BZX84C15LTl Y4 15 13.8 15.6 30 0.05 10.5 13.7 15.5 200 13.9 15.7 20 9.2 13.0 110
BZX84C16LTl Y5 16 15.3 17.1 40 0.05 11.2 15.2 17 200 15.4 17.2 20 10.4 14.0 105
BZX84C1BLTf Y6 18 16.8 19.1 45 0.05 12.6 16.7 19 225 16.9 19.2 20 12.4 16.0 100
BZX84C20LTl Y7 20 18.8 21.2 55 0.05 14 18.7 21.1 225 18.9 21.4 20 14.4 18.0 85
BZX84C22LTl Y8 22 20.S 23.3 55 0.05 15.4 20.7 23.2 250 20.9 23.4 25 16.4 20.0 85
BZX84C24LTl Y9 24 22.8 25.6 70 0.05 16.8 22.7 25.5 250 22.9 25.7 25 18.4 22.0 80
ZZT2
Zm Below ZZT3
Below @IZT4= Below dv'lfdl
VZ1 Below @IZT1= VZ2 Below a.SmA VZ3Below @1ZT3= (mVI\<) Below
@IZT1=2mA 2mA @IZ12=O.l (2) @1zr3=10mA lOrnA @Im =2mA
mA
BZX84C27LTl Yl0 27 25.1 28.9 80 0.05 18.9 25 28.9 300 25.2 29.3 45 21.4 25.3 70
BZX84C3OLTl Yll 30 28 32 80 0.05 21 27.8 32 300 28.1 32.4 50 24.4 29.4 70
BZX84C33LT1 Y12 33 31 35 80 0.05 23.1 30.8 35 325 31.1 35.4 55 27.4 33.4 70
BZX84C36LTl Y13 36 34 38 90 0.05 25.2 33.8 38 350 34.1 38.4 60 30.4 37.4 70
BZX84C39LTl Y14 39 37 41 130 0.05 27.S 35.7 41 350 37.1 41.5 70 33.4 41.2 45
BZX84C43LTl Y15 43 40 46 150 0.05 30.1 39.7 46 375 40.1 46.5 80 37.6 46.6 40
BZX84C47LTl Y16 47 44 50 170 0.05 32.9 43.7 50 375 44.1 50.5 90 42.0 51.8 40
BZX84C51 LTl Y17 51 48 54 180 0.05 35.7 47.6 54 400 48.1 54.6 100 46.6 57.2 40
BZX84C56LTl Y18 56 52 60 200 0.05 39.2 51.5 60 425 52.1 60.8 110 52.2 63.8 40
BZX84C62LTl Y19 62 58 66 215 0.05 43.4 57.4 66 450 58.2 67 120 58.8 71.6 35
BZX84C68LTl Y20 68 64 72 240 0.05 47.6 63.4 72 475 64.2 73.2 130 65.6 79.8 35
BZX84C75LTl Y21 75 70 79 255 0.05 52.5 69.4 79 500 70.3 80.2 140 73.4 89.6 35
(1) Vz Is measured with a pulse test current (IZT) applied at an ambient temperature of 25°C.
(2) The zener impedance, ZZT2, for the 27 through 75 volt types Is tested atO.5 rnA rather than the test current of 0.1 rnA used forVZ2'
'.'
0 )~ 0
3 1
Cathode Anode
CASE 318-08, STYLE 8
2 SOT-23 (TQ-236AB)
PLASTIC
ELECTRICAL CHARACTERISTICS (Pinout: 1-Anode, 2-NC, 3-Cathode) (VF = 0.9 V Max @ IF = 10 mA for all types.)
Test Zener ZZT
Current Voltage ZZK IZ=IZT Max
IZT VZ(±5%) IZ=0.25mA @ 10% Mode IR @ VR
Device Marking mA Nominal(1) QMax QMax itA V
MMBZ5221BLTl 18A 20 2.4 1200 30 100 1
MMBZ5222BLTl 18B 20 2.5 1250 30 100 1
MMBZ5225BLTl 18E 20 3 1600 29 50 1
MMBZ5226BLTl 8A 20 3.3 1600 28 25 1
MMBZ5228BLTf 8C 20 3.9 1900 23 10 1
MMBZ5229BLTl 80 20 4.3 2000 22 5 1
MMBZ5230BLTl 8E 20 4.7 1900 19 5 2
MMBZ5231BLTf 8F 20 5.1 1600 17 5 2
MMBZ5232BLT1 8G 20 5.6 1600 11 5 3
MMBZ5233BLTl 8H 20 6 1600 7 5 3.5
MMBZ5234BLTf 8J 20 6.2 1000 7 5 4
MMBZ5235BLTf 8K 20 6.8 750 5 3 5
MMBZ5236BLTl 8L 20 7.5 500 6 3 6
MMBZ5237BLTl 8M 20 8.2 500 8 3 6.5
MMBZ5239BLTl 8P 20 9.1 600 10 3 7
MMBZ5240BLTf 80 20 10 600 17 3 8
MMBZ5241BLTl 8R 20 11 600 22 2 8.4
MMBZ5242BLTf 8S 20 12 600 30 1 9.1
MMBZ5243BLTl 8T 9.5 13 600 13 0.5 9.9
MMBZ5244BLTl 8U 9 14 600 15 0.1 10
MMBZ5245BLTf 8V 8.5 15 600 16 0.1 11
MMBZ5246BLTl 8W 7.8 16 600 17 0.1 12
MMBZ5247BLTl 8X 7.4 17 600 19 0.1 13
MMBZ5248BLTf 8Y 7 18 600 21 0.1 14
MMBZ5249BLTl 8Z 6.6 19 600 23 0.1 14
MMBZ5250BLTf 81A 6.2 20 600 25 0.1 15
MMBZ5251BLTl 81B 5.6 22 600 29 0.1 17
MMBZ5252BLTl 81C 5.2 24 600 33 0.1 18
MMBZ5254BLT1 81E 4.6 27 600 41 0.1 21
MMBZ5255BLTl 81F 4.5 28 600 44 0.1 21
MMBZ5256BLTl 81G 4.2 30 600 49 0.1 23
MMBZ5257BLTf 81H 3.8 33 700 58 0.1 25
MMBZ5258BLTl 81J 3.4 36 700 70 0.1 27
MMBZ5259BLTl 81K 3.2 39 800 80 0.1 30
(1) Vz is measured al pulse lesl currenl (IZT) al an ambienllemperalure of 25°C.
ELECTRICAL CHARACTERISTICS (Pinout: 1-Anode, 2-NC, 3-Cathode) (VF = 0.9 V Max @ IF = 10 rnA for all types.)
Test Zener ZZT
Current Voltage ZZK IZ=IZT Max
IZT VZ(±5%) IZ=0.25 rnA @ 10% Mode IR @ VR
Device Marking mA Nominal(l) o Max o Max !LA V
MMBZ5261 BLTl 81M 2.7 47 1000 105 0.1 36
MMBZ5262BLTl 81N 2.5 51 1100 125 0.1 39
MMBZ5263BLTl 81P 2.2 56 1300 150 0.1 43
MMBZ5265BLTl 81R 2 62 1400 185 0.1 47
MMBZ5266BLTl 81S 1.8 68 1600 230 0.1 52
MMBZ5268BLTl 81U 1.5 82 2000 330 0.1 62
MMBZ5269BLTl 81V 1.4 87 2200 370 0.1 68
MMBZ5270BLTl 81W 1.4 !Jl 2300 400 0.1 69
(1) Vz is measured at pulse test current (IZT) at an ambient temperature of 25'C.
Table 18. 500 mW Rating on FR-4 or FR-5 Board - Case 425-04 - 500-123
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted(l), (VF = 0.9 V Max. @ IF = 10 rnA for all types)
Zener Voltage
Max Zener Max Reverse
Vz ~ 'p;
Volts 1, ,3) Test Impedance(4) Leakage Test
Voltage Current Voltage
VR ZZT ZZK IR@VR VR
Type @ IZ= IZT @ IZK = 0.25 mA
Number Marking Nom Min Max Volts 0 Q !LA Volts
MMSZ5221BT1 Cl 2.4 2.28 2.52 20 30 1200 100 1
MMSZ5222BT1 C2 2.5 2.38 2.63 20 30 1250 100 1
MMSZ5223BTl C3 2.7 2.57 2.84 20 30 1300 75 1
MMSZ5224BTl C4 2.8 2.66 2.94 20 30 1400 75 1
MMSZ5225BT1 C5 3.0 2.85 3.15 20 30 1600 50 1
Zener Voltage
Max Reverse
Vz ~ T.;
Volts 1, ,3) Test
Max Zener
Impedance (4) Leakage Test
Voltage Curnent Voltage
VR ZZT ZZK IR@VR VR
Type @IZ=IZT @ IZK = 0.25 mA
Number Marking Nom Min Max Volts Q Q I1A Volts
CASE 51.02
00-204AA - GLASS
(00-7)
In Brief ...
The Motorola Semiconductor Products Sector is proud to Page
Integrated Power Stage IGBT . . . . . . . . . . . . . . . . . . .. 5.3-2
announce the formation of a new group: Hybrid Power
Modules. Our operation has been in existence since August
of 1992, and we're chartering new ground to become the
world's fastest supplier of intelligent, energy efficient power
modules for motor drive and uninterruptable power supply
applications.
It's an exciting market, with 50 million motors being
manufactured per year, and fewer than 5% of those using
electronically controlled drives. Motorola Hybrid Power
Modules will play a major role in supplying those power
modules.
With Motorola's technology broadth, we're well
positioned to develop highly integrated, intelligent IGBT
(insulated gate bipolartransistor) power modules. The IGBT
technology combines high current handling capability with
low input current requirements in a smaller form factor which
enables the design of more compact inverters. We have the
capabilities to support custom modules (based on annual
volume requirements) and offer the fastest possible time to
market. Present integrated IGBT modules range from 5 to 30
amps, 600 and 1200 volts are also in our product portfolio.
Our plans for the future include a family of advanced
modules for applications in higher current and highervoltage
devices and control networks.
To summarize, we believe that we offer the leading edge
technology combined with a state-of-the-art flexible
manufacturing line and rapid cycle time that can give you the
unique ability to differentiate your products in this highly
competitive market.
1200 MHPM7ABA120A MHPM7A 12A 120A MHPM7A 16A 120B MHPM7A25A 120B
7/94 1/95 5/95 9/95
CIRCUIT
Pl P2
DB Dl0 D12 D7
T+
~
Kl
R U
S B V
T W
D9 Dl1 D13
Nl N2 I- 1+
In Brief ...
Motorola continues to build a world class portfolio of Page
TMOS Power MOSFETs with new advances in silicon and TMOS Power MOSFETs ........................ 5.4-1
packaging technology. The following new advances have TMOS Power MOSFETs Numbering System .... 5.4-2
been made in the area of silicon technology. HOTMOSTM Power MOSFETs ................. 5.4-3
• New high voltage devices with voltages up to TMOS V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.4-5
1200 volts. SMARTOISCRETES Products ................. 5.4-7
• New High Cell Oensity (HOTMOS) family of standard and N-Ghannel MOSFETs .. . . . . . . . . . . . . . . . . . . . . .. 5.4-8
Logic Level devices in both Nand P-channel are SO-8 MiniMOS ........................... 5.4-8
available in OPAK, 02PAK, TQ-220 and SO-8 surface SO-8 EZFET .. . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.4-9
mount packages and in the industry standard TQ-220 Micro8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.4-9
package. SOT-223 ................................ 5.4-9
OPAK .................................. 5.4-10
• New TMOS V fifth generation of Motorola Power MOSFET
02PAK ................................. 5.4-11
technology. This is a new processing technique that more
03PAK ................................. 5.4-12
than doubles the present cell density of our MOSFET
TQ-220AB .............................. 5.4-13
devices.
TQ-247 ................................. 5.4-15
• New Micr08 package is the smallest power MOSFET
TO-264 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.4-16
surface mount package.
P-Ghannel MOSFETs ....................... 5.4-17
• New EZFETTM surface mount power MOSFETs SO-8 MiniMOS .......................... 5.4-17
incorporate back to back zener diodes across the Micro8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.4-17
gate-to-source to enhance ESO protection. SOT-223 ............................... 5.4-18
• New IGBTs with high short circuit capability in TQ-220, OPAK .................................. 5.4-18
TO-247 and TO-264 packages. 02PAK ................................. 5.4-19
The following new advances have been made in the area TO-220AB .............................. 5.4-19
of packaging technology. Logic Level MOSFETs ....................... 5.4-20
• New SO-8 (MiniMOS) and SOT-223 packages to the SOT-223 ............................... 5.4-20
surface mount portfolio. OPAK .................................. 5.4-20
• New High Power packages capable of housing very large 02PAK ................................. 5.4-21
die and higher power dissipation are now available in the TQ-220AB .............................. 5.4-21
TQ-264 (formerly TO-3PBL) and SOT-227B (Isotop) Insulated Gate Bipolar Transistors (IGBTs) ..... 5.4-22
packages. N-Ghannel ... . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.4-22
• New 03PAK package allows the highest power dissipation Ignition IGBTs ......................... 5.4-22
of any standard, plastiC surface-mount power Standard and Copackaged IGBTs ........ 5.4-22
semiconductor.
MTP75N06HD
MOTOROLA-------....JI 1
....._ - OPTIONAL SUFFIX:
X FOR ENGINEERING SAMPLES L FOR LOGIC LEVEL
TMOS E FOR ENERGY RATED
T FOR TMOS T4 FOR TAPE & REEL (DPAKlD2PAK)
L FOR SMARTDISCRETES RL FOR TAPE & REEL (DPAK)
G FOR IGBT HD FOR HIGH CELL DENSITY
V FOR TMOS V (FIVE)
PACKAGETYPE--------~
' - - - - - - VOLTAGE RATING DIVIDED BY 10
P FOR PLASTIC T0-220
o FOR DPAK
A FOR T0-220 ISOLATED ' - - - - - - - CHANNEL POLARITY, NOR P
WFORTO-247
B FOR D2PAK
Y FOR TO-264
E FOR SOT-227B
Example of exceptions: MTD/MTP3055E
V FOR D3PAK MTDIMTP2955E
CURRENT--------------------'
L
SO-8 (MiniMOS)TM, Micro8™ and SOT-223 Power MOSFETs
MMSF4P01 HDR1
MOTOROLA-------------~
1 I R1 AND R2 FOR TAPE & REEL
MiniMOS
T1 AND T3 FOR TAPE & REEL
TMOS - - - - - - - - - - - - ' SOT-223
M FOR MINIATURE OPTIONAL SUFFIX:
PACKAGETYPE-----------' E FOR ENERGY RATED
OF - DUAL FET (SO-8) HD FOR HIGH CELL DENSITY
SF - SINGLE FET (S0-8) L FOR LOGIC LEVEL
V FOR TMOS V (FIVE)
FT - FET TRANSISTOR (SOT-223)
MTSF - SINGLE FET (MicroS) ZFORESD
MTDF - DUAL FET (MicroS) ' - - - - - VOLTAGE RATING DIVIDED BY 10
CURRENT - - - - - - - - - - - - - - ' '--------- CHANNEL POLARITY, N OR P
C FOR COMPLEMENTARY
HDTMOS Technology is a design technique that reduces the on-resistance contribution in virtually every portion of the power
FET. The aggressive six million cells per square inch design is easily manufactured using wafer fabrication techniques that
Motorola has used for several years to manufacture highly successful 8-bit microcontrollers.
HDTMOS devices are designed for use in low voltage, high speed switching applications where power efficiency is important.
Typical applications are dc-dc converters and power management in portable and battery powered products such as computers,
printers, cellular and cordless phones. They can also be used for low voltage motor controls in mass storage products such as disk
drives and tape drives.
Table 3. EZFET
V(BR)OSS ROS(on) 10 VGS
(Volts) (mQ) @ VGS (cant) (Volts)
Min Device Description Max (Volts) Amps Max Package
20 MMSF3P02Z Single P-Channel 75 10 3 ±15 SO-8
90 4.5
MMSF4P01Z 70 4.5 4 ±8
90 2.7
MMSF6N01Z Single N-Channel 25 4.5 6
30 2.7
MMDF4N01Z Dual N-Channel 45 4.5 4
55 2.7
30 MMSF5N03Z Single P-Channel 30 10 5 ±15
40 4.5
Table 4. MicroS
V(BR)OSS ROS(on) 10
(Volts) (mQ) VGS (cant) Product
Min Max (Volts) Amps Device Description
20 190 2.7 2 MTSF1P02HD Single P-Channel
20 200 2.7 1.5 MTDF1N02HD Dual N-Channel
30 75 4.5 3 MTSF3N03HD Single N-Channel
30 225 4.5 1.5 MTDF1N03HD Dual N-CHannel
Products
From a standard power MOSFET process, several active and passive elements can be obtained that provide on-chip protection
to the basic power device. Such elements require only a small increase in silicon area and/orthe addition of one masking layertothe
process. The resulting device exhibits significant improvements in ruggedness and reliability and a system cost reduction. These
SMARTDISCRETESTM functions can now provide an economical alternative to smart power ICs for power applications requiring
low on-resistance, high voltage and high current.
These devices make up a series of "smart" power devices that automatically clamp spikes in automotive ignition systems and
guard against ESD. The devices feature a logic levellGBT (Insulated Gate Bipolar Transistor) with integral active collector clamp
and ESD gate protection and are designed primarily as ignition coil drivers to withstand high current in a pulsed mode without
latching.
N-Channel
TMOS
N-Channel
®
•
CASE 751-{)5
SO-8
STYLE 11, STYLE 13
SO-8 EZFETTM -
Table 3. MicroS
V(BR)OSS ROS(on) 10
(Volts) (mQ) @ VGS (cont) Product
Min Max (Volts) Amps Oevice Oescription
20 200 2.7 1.5 MTDF1N02HD Dual N-Channel
30 75 4.5 3 MTSF3N03HD Single N-Channel
30 225 4.5 1.5 MTDF1N03HD Dual N-CHannel
TMOS
®
y TMOS
•
CASE 369A-13
T0-252
STYLE 2
N-Channel
ryl~~
TMOS
N-Channel
®
lJ!iJLmJ •
CASE 4188-02
STYLE 2
N-Channel CASE~1
TO-286
STYLE 2
• D3PAK is a high power surface mount package designed to accommodate die which is too large for a D2pAK.
- Utilized for Size 5, Size 6 or larger MOSFET and IGBT.
- Used for dual die IGBT and diode combination.
• 24 mm Tape and Reel, 500 units per 13' reel.
• D3PAK is thermal characterized for use on FR-4 and IMS board materials.
• Applications:
- Surface mount motor drives
- Power supplies both AC/DC and DC/DC
®
TMOS
TO-220AB
lr TMOS
lr TMOS
CASE340G~2
T0-264
N-Channel
P-Channel
®
TMOS • ..
CASE7Sl-OS
50-8
STYLE 11, STYLE 13
CASE S46A-Ol
MicroS
Table 2. Micro8
V{BR)OSS ROS{on) 10
(Volts) (mQ) @ VGS (cant) Product
Min Max (Volts) Amps Device Description
20 190 I 2.7 2 MTSF1P02HD Single P--Channel
Table 3. EZFET
V{BR)OSS ROS(on) 10 VGS
(Volts) (mQ) vGS (cont) (Volts)
Min Device Description Max (Volts) Amps Max Package
20 MMSF3P02Z Single P-Channel 75 10 3 ±15 S0-8
90 4.5
MMSF4P01Z 70 4.5 4 ±8
90 2.7
T~
lJ1JLij CASE 318E-04
SOT-223
STYLE 3
P-Channel
...
(continued)
TMOS
®
_TM
TMDS
CASE 4188-02
STYLE 2
P-Channel
TO-220AB
Table 7. T0-220AB - P-Channel
V(BR)OSS ROS(on) 10 10 PO(1)
(Volts) (Ohms) @ (Amps) (cont) (Watts)
Min Max Oevice Amps Max
500 6 1 MTP2P50E 2 75
200 1 3 MTP6P20E 6
100 0.30 6 MTP12P10 12 88
60 0.45 2.5 MTP5P06V 5 40
0.30 6 MTP2955V 12 60
0.12 11.5 MTP23P06V 23 125
0.08 15 MTD30P06V 30 125
30 0.025 25 MTP50P03HDL (2) 50 150
(l)TC = 25'C
(2) Indicates logic level
CASE 369A-13
TD-252
DPAK - Nand P-Channel STYLE 2
,r y
TMOS TMDS
CASE 418B-{)2
STYLE 2
Logic Level
02PAK - Nand P-Channel Surface Mount Products
Table 3. 02PAK - Logic Level
V(BR)OSS ROS(on) 10 10 PO(1)
(Volts) (Ohms) @ (Amps) (cant) (Watts)
Min Max Oevice(4) Amps Max
60 0.05 15 MTB30N06VL 30 2.5(3)
0.032 21 MTB50N06VL 42
30 0.025 25 MTB50P03HDL(5) 50
0.0075 37.5 MTB75N03HDL 75
(1) TC = 25°C
(3) Power rating when mounted on an FR-4 glass epoxy printed circuit board with the minimum recommended footprint.
(4) Available in tape and reel- add T4 suffix to part number.
(5) Indicates P-Ghannel
TO-247AE TO-264
CASE 221A-06 CASE 340F-03 CASE 340G-02
In Brief ...
Motorola's broad line of Bipolar Power Transistors Page
includes discrete and Darlington transistors in a variety of Bipolar Power Transistors ....................... 5.5-2
packages from the popular surface mount DPAK at 1.75 Selection by Package ........................ 5.5-2
watts to the 250 watt TO-3 and T0-264. New products Plastic T0-220AB . . . . . . . . . . . . . . . . . . . . . . . .. 5.5-3
include the MJElMJF 18000 series for lamp ballast and Plastic T0-218 Type ...................... 5.5-6
power supplies, MJW16212 - a new 1500 V deflection Plastic T0-247 Type ...................... 5.5-7
transistor for video monitor applications, and high Large Plastic T0-264 . . . . . . . . . . . . . . . . . . . . .. 5.5-8
performance audio output devices in the TO-264 package. Plastic T0-225AA Type
We have the broadest line of Bipolar Power Transistors in the (Formerly T0-126 Type) .................. 5.5-8
industry and the Motorola commitment to quality and total DPAK - Surface Mount Power Packages .... 5.5-10
customer satisfaction to go with them. Metal TO-204AA (Formerly T0-3),
T0-204AE ............................. 5.5-11
Audio ..................................... 5.5-15
Electronic Lamp Ballasts . . . . . . . . . . . . . . . . . . . .. 5.5-16
~
TO-204AA 4-30 40-1500 90-250 5.5-11
(TO-3)
CASE 1-07
~
TO-204AE 50-80 60-1000 150-300 5.5-11
CASE 197A
, OPAK
CASE 369
0.5-10 40-400 12.5-20 5.5-10
~
OPAK 0.5-10 40-400 12.5-20 5.5-10
CASE 369A
, TO-218 TVPE
CASE 3400
5.0-25 60-1500 80-150 5.5--6
, ~
TO-220AB
CASE 221A-06
TO-225AA
0.5-15
0.3-5.0
30-1800
25-400
30-125
12.5-40
5.5-3
5.5-8
~
(TO-126 TYPE)
CASE 77
~
TO-247 TVPE 10-30 400-1500 125-180 5.5-7
." CASE 340F
~
TO-264 15-16 200-650 250 5.5-8
CASE 340G
Resistive Switching
(TQ-220AB)
Po
ICCont VCEO(sus) ts tf IT (Case)
Amps Volts hFE @IC itS its @IC MHz Watts
Max Min(8) NPN PNP MiniMax Amp Max Max Amp Min @25°C
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
4
CASE 340D
(TO-218 Type.
3 SOT-93)
Table 2. Plastic T0-218 Type
OevlceType Resistive Switching
Po
ICCont VCEO(sus) ts tf tr (Case)
Amps Volts hFE @IC I1S @IC MHz Watts
I1s
Max Min(8) NPN PNP MinIMax Amp Max Max Amp Min @25°C
8 500/1000 MJH16006A 5 min 8 2.5 0.25 5 125
10 60 TIPl40(2) TIPl45(2) 500 min 10 2.5 typ 2.5typ 5 4(1) 125
TIP141 (2) TIP146(2) 500 min 10 2.5 typ 2.5 typ 5 4(1) 125
100 BDV65B(2) BDV64B(2) lkmin 5 125
TIP33C TIP34C 20/100 3 3 80
TIP142<2) TlP147<2) 500 min 10 2.5 typ 2.5typ 5 4(1) 125
400 BU323AP(2) 1501100 6 15 15 6 125
MJH10012(2) 100/2k 6 15 15 6 118
(l)lhFEI @ 1 MHz
(2)Oarlington
(8)When 2 voltages are given, the format is VCEO(sus)iVCES'
STYLE 2:
PIN 1. BASE
2. COLLECTOR
~~~~
3.
3 CASE340F
(TO-247 Type)
CASE 340G
(TO-264)
3
STYLE 1: STYLE 3:
PIN 1. EMITTER PIN 1. BASE
2. COLLECTOR 2. COLLECTOR
3. BASE 3. EMITTER
CASE 77
(TQ-225AA)
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITIER
4. COLLECTOR
~
~
_ _ .060"
~
STYLE 1:
PIN 1. BASE
CASE 1-07 CASE 197A T0-204AE 2. EMITIER
TO-204AA (Used for high currenl types al end of 3. COLLECTOR
table. See types w/footnote(16).)
V(BR)CEO Required on Output and Driver Transistor Output Transistor Peak Collector Current
versus versus
Output Power for 4, 8 and 18 Ohm Loads Output Power for 4, 8 and 16 Ohm Loads
500 50
16 OHMS fi)
300 a. 30
BOHMS \ ...... .... i-'
::;;
~ IIII 40HMS
-
fi)
:::;;..- .......... i-' f-
g~MS
~ ...... ~ i--'"
~ Z ... i-'
a I
2:- 40HMS
W
a:
10
" i-'
100 a:
::>
-
aw (J
70 f-
(J
50 ::> 5.0 160HMS
a.
a: f-
........
ID
.... ::>
3.0
V" ........ .... ...
:> 30 a
'"
«
w
Another important parameter that must be considered before selecting the output transistors is the saf~perating area these
devices must withstand. For a complete discussion see Application Note AN485.
The Power Transistors shown are provided for reference only and show device capability. The final choice of the Power Transis-
tors used is left to the circuit designer and depends upon the particular safe-operating area required and the mounting and heat
sinking configuration used.
\~,~,.~
3 (T0-220AB)
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 1: STYLE 3:
PIN 1. EMITTER PIN 1. BASE
2. COLLECTOR 2. COLLECTOR
3. BASE 3. EMITTER
hFE min
~ CASE 77-08
(TO-225AA)
In Brief ...
Continuing investment in research and development for Page
discrete products has created a rectifier manufacturing facility Rectifier Numbering System ..................... 5.6-2
that matches the precision and versatility of the most advanced Application Specific Rectifiers . . . . . . . . . . . . . . . . . . .. 5.6-3
integrated circuits. As a result, Motorola's silicon rectifiers span Low VF Schottky ............................ 5.6-3
all high tech applications with quality levels capable of passing MEGAHERTZ ............................... 5.6-3
the most stringent environmental tests ... including those for SCANSWITCH .............................. 5.6-3
automotive under-hood applications. Additionally, the Automotive Transient Suppressors ............. 5.6-3
introduction of Motorola's first generation GaAs power devices SWITCHMODETM Rectifiers . . . . . . . . . . . . . . . . . . . . .. 5.6-4
is pushing the limits of today's rectifier technology. Surface Mount Schottky ...................... 5.6-4
Product Highlights: Axial Lead Schottky . . . . . . . . . . . . . . . . . . . . . . . . .. 5.6-6
T0-220 Type Schottky ....................... 5.6-7
• GaAs Rectifiers Power Manager™ with incredibly soft and
T0-218 Types and TO-247 Schottky ........... 5.6-8
hyperfast «15 ns) reverse recovery are ideally suited for
POWERTAP II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.6-9
high frequency power supplies, free wheeling diodes, and
Ultrafast Rectifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.6-10
as polarity protection diodes.
Surface Mount Ultrafast. . . . . . . . . . . . . . . . . . . . .. 5.6-10
• Surface Mount Devices - A major thrust has been the Axial Lead Ultrafast ......................... 5.6-10
development and introduction of a broad range of power T0-220 Type Ultrafast ...................... 5.6-11
rectifiers, Schottky and Ultrafast, 112 amp to 25 amp, 15 to TO-218 Types and T0-247 Ultrafast .......... 5.6-12
600 volts. POWERTAP II .............................. 5.6-12
• Application Specific Rectifiers - Fast Recovery Rectifiers/General
- MEGAHERlZTM series for high frequency power Purpose Rectifiers ....................... 5.6-13
supplies and power factor correction. GaAs Rectifiers Power Manager™ ............... 5.6-14
- Schottky rectifiers having lower forward voltage drop
(0.3 to 0.6 volts) for use in low voltage SMPS outputs
and as ''OR''ing diodes.
- Automotive transient suppressors.
• UHrafast rectifiers having reverse recovery times as low as
25 ns to complement the Schottky devices for higher
voltage requirements in high frequency applications.
• A wide variety of package options to match virtually any
potential requirement.
The rectifier selector section that follows has generally been
arranged by package and technology. The individual tables have
been sorted by voltage and current with the package types for
the devices listed shown above each table. The Application
Specific Rectifiers are also included in their respective tables.
Motorola's comm~ment to Six-Sigma is showing its worth.
Refined processes no longer produce fallout as such and
therefore only Motorola Preferred Devices are listed in the
tables. The non--preferred devices will continue to be offered, but
customers are encouraged to begin designing using the
preferred types.
EXAMPLE: MUR 30 20 WT
MOTOROLA ULTRAFAST 30 AMP 200 V CENTER TAP (DUAL)
TO-247
EXAMPLE: MBR 30 45 WT
MOTOROLA SCHOTTKY 30 AMP 45V CENTER TAP (DUAL)
TQ-247
MURBBOE 8 800 - 75 -
MUR10120E 10 1200 175 175 14
MUR10150E 10 1500 175 175 16
Cathode = Band
MaxVF@iF
Cathode = Notch
::J-0 4
1.4
03PAK OPAK 02PAK
Style 3 Style 3 "CT" Suffix:
1~ 3 3
Non-"CT" Suffix: :~4
"i
Cathode = Polarity Band
'~!
Cathode = Polarity Band
I
(TO-220AC) (TO-220AB)
S~\~ r
30.,. r-
1~2'/4 0
a STYLE 1: :>2
Jr
4 CATHODE
2. NIA
STYLE 6:
PIN 1. ANODE
PIN 1. CATHODE
2. N/A ~ ST'f,\~t ANODE
3. ANODE 2. CATHODE 3. ANODE .. 2. CATHODE
4. CATHODE 3. ANODE 3. ANODE
4. CATHODE
12'~
1
' 23
1 1
3 3
2
Table 7. TO-220 Type Schottky Rectifiers
MaxVF@iF
VRRM 10 10 Rating =
TC 25°C IFSM TJ Max
(Volts) (Amperes) Condition Device (Volts) (Amperes) eC) Case
45 15 TC = 105°C MBR1545CT 0.84 @ 15A 150 150 221A--u6
30 20 TC= 13JOC MBR2030CTL* 0.52@ lOA 150 150 221A--u6
0.58 @ 20A
* New Product
Table 9. POWERTAP II
MaxVF@ iF
VRRM 10(1) 10 Rating TC = 25'C IFSM TJ Max
(Volts) (Amperes) Condition Device (Volts) (Amperes) ('C) Case
30 200 TC = 125'C MBRP20030CTL * 0.52 @ 100A 1500 150 357C
0.60 @200A
45 200 TC= 125'C MBRP20045CT* 0.78 @ 100A 1500 175 357C
60 200 TC = 125'C MBRP20060CT* 0.800 @ 100A 1500 175 357C
45 300 TC = 120'C MBRP30045CT* 0.70 @ 150A 2500 175 357C
0.82 @ 300 A
• •
Style 3 Style 3 "CT" Suffix:
I
Cathode = Polarity Band
""",
Cathode = Polarity Band
::r
(T0-220AC) (TO-220AB)
::r'I
1
~ f 0
STYLE 1:
PIN; ~;;;HDDE
3. ANODE
4. CATHODE
1~2'/4
3~ ~
STYLE 6:
PIN 1.
2.
3.
4.
ANODE
CATHODE
ANODE
CATHODE
1
23
0
! STYLE 7:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. ANODE
2 ,4
'"
Il,
,if ,- 12'~J
STYLE1.
PIN 1. CATHODE
2NfA
W
I'"
2
Il.\'
STYLE 3:
PIN ,. ANODE
2. CATHODE
3. ANODE
3 3
2
1~ 2, 4 1~
~
4 sT'(,j~ 1CATHODE '4
~f
4 STYLE 2: STYLE 2:
3 , . PIN1.ANODEI '" 3. ANODE 3 .. PIN 1. ANODE 1
2. CATHODES 2. CATHODES
3. ANODE 2 4. CATHODE
4. CATHODES I • ~ ~: ~~~~6JES
12 (BACK HEATSINK)
1 1
2
3 3 3
Table 13. TO-218 Types and TO-247 Ultrafast Rectifiers
MaxVF@ iF
VRRM 10 10 Rating Max trr TC=2S"C IFSM TJMax
(Volts) (Amperes) Condition Device (ns) (Volts) (Amperes) eC) Case
200 30 TC = 145"C MUR3020WT 35 1.05@15A 150 175 340F
400 30 TC= 145"C MUR3040WT 60 1.25 @ 15A 150 175 340F
600 30 TC = 145"C MUR3060WT 60 1.70@15A 150 175 340F
200 30 TC = 150"C MUR3020PT 35 1.12 @ 15A 200 175 340D
400 30 TC = 150"C MUR3040PT 60 1.12@ 15A 150 175 340D
600 30 TC = 145"C MUR3060PT 60 1.20@ 15A 150 175 340D
400 30 TC = 70"C MUR3040* 100 1.5 @ 30A 300 175 340E
BOO 30 TC = 70"C MUR3080* 110 1.90 @ 30A 300 175 340E
400 60 TC = 70"C MUR6040 100 1.50 @ 60A 600 175 340E
* New Product
Case 357C
POWERTApTM
Case 194-04
C~7
Case 267-03 Case 193-04
Plastic Plastic Plastidl0)
•
SMA
In Brief . ..
Motorola's broad line of Thyristors includes .... Page
• A full line of TRIACs and SCRs covering a forward Silicon Controlled Rectifiers ...................... 5.7-2
current range from 0.5 to 55 amperes and blocking TRIACs ....................................... 5.7-7
voltages from 15 to 800 volts. General Purpose ............................ 5.7-7
• Plastic package for lowest cost which includes the fully Thyristor Triggers .............................. 5.7-14
insulated plastic Case 221 C (TO-220 Isolated). SIDACs ................................... 5.7-14
• An extensive line of trigger devices that includes Programmable Unijunction Transistors - PUT .. 5.7-14
SIDACs, PUTs and SBS. Silicon Bidirectional Switch (SBS) ............. 5.7-14
Then there are the special applications devices for High Voltage Bidirectional TVS Devices ........ 5.7-14
Ignition circuits and Crowbar applications. Also included are
isolated packaged devices for appliances and surface mount
packages for surface mounting in space-saving
requirements.
Finally, there is the continued Motorola investment in
discrete-product R&D producing new capabilities such as
transient SIDACs for use in circuits sensitive to high voltage
transients.
seRs REVERSE
BLOCKING
REGION
VRRM
V(-) V(+)
Silicon ~_---''--'-'-:C_ - -IRRM
FORWARD
Controlled REVERSE
BLOCKING
I (_) REGION
Rectifiers AVALANCHE REGION
~I A
Case 29-04
K.
A G
Sensitive Gate
Case 318E
,IA
Case 29-04
VDRM
VRRM
TCl-226AA (T0-92) Style 10 SOT-223 STYLE 10 TO-226AA (T0-92) (Volts)
Style 10
25
50
100
MCR08BT1 200
MCR100-6 MCR08DT1 MCR22-6 400
500
10 10 15 ITSM(Amps)
150(3) 60Hz
0.2 IGT(mA)
0.8 VGT(V)
4 AMPS
TC = 93°C TC=30°C
of Sensitive Gate
" A G
K
A
G
Surface Mount
VORM Case 77 Case 369 Case 369A
VRRM T0-225AA (TO-I26) Style 4 Slyle4
(Volts) Style 2
50 MCR106-2 C106F
2N6237
trSM(Amps) 25 20 25
60Hz
VGT(V) 1 0.8 1
TJ Operating -40to
Range (OC) +110
'AI G
K
A
G
K
A
G
High Performance
A
G
MCR72-2 50
Min. Min.
50 2 OVIDT V/!J.S8C
A A A
K~ K
A K~
( G
SO 2N6S04
100 2N6S0S
200 2N6S06
IGT(mA) 8 20 30 40
DVlDTVllJ.Sec SO SO SO SO
A A
,~
Case 221 A-tl4
\1G
Isolated'M
Case 221 C-{J2
K~
Case 221 A-tl4 VORM
TQ-220AB Style 2 To-22OAB VRRM
Style 3 Style 3 (Volts)
MCR69-2 MCR225-2FP 50
MCR69-3 100
30 40 50 IGT(mA)
1.5 VGT(V)
-40 to TJ Operating
+125 Range (OC)
(2) Peak capacitor discharge current for tw = 1 ms. tw is defined as five time constants of an exponentially decaying current pulse
(crowbar applications).
'M Indicates UL Recognized - File #E69369
MT2
a
_2
MT1
MT2 G
MT1 G
MT2 MT2 MT1
Sensitive Gate
Case 29-04 Case 318E Case 77
VDRM TQ-226AA (TQ-92) Style 11 TO-22SAA (TQ-126)
(Volts) Style 12 SOT-223 StyleS
ITSM(Amps) 8 10 25
,I
MT2 MT1
Sensitive Gate
MT1
G
Case 77 Case 221 A-04
T0-225AA (TO-126) TO-220AB VORM
Style 5 Style 4 (Volts)
T2500N BOO
25 30 60 ITSM(Amps)
6 AMPS BAMPS
TC = BO°C TC=BO°C TC=70°C TC=BO°C
MT1
MT2
G
MT1
MT2
,G
MT1
MT2
G
Sensitive Gate
8 AMPS
TC=80°C
MT2
MTl
MT2
)~
G
Sensitive Gate
~,'
MT2
G
Isolated'M
100 80 ITSM(Amps)
10 AMPS 12 AMPS
Tc=70°c Tc = 75°C Tc=85°c
~,I ~,I
MT2 MT2
MT1
MTI ~ MT2
G
G
MT2
G
MT2
G
MT2 G
Isolated ~ Sensitive Gate Isolated~
Case 221 A-04 Case 221 C-02 Case 221 A-()4 Case 221 C-02 Case 221 A-04
VORM TO-22OAB Style 3 TO-220AB Style 3 TQ-220AB
(Volts) Style 4 Style 4 Style 4
ITSM(Amps) 100
TJ Operating -40 to
Range (OC) +125
~ Indicates UL Recognized - File #E69369
12 AMPS 15 AMPS
TC = 80°C I TC=70°C TC=90°C TC=BO°C TC = 90°C
MT2
MT1
MT2
G
Sensitive Gate
~11
MT2
G
High
High Performance Isolated~
Performance
Case 221 A-04 Case221A~ Case 221 A-04 Case 221 Ao.OO Case 221 C-02
T~220AB ~220AB ~220AB T~220AB Style 3 VDRM
Style 4 Style 4 Style 4 Style 4 (Volts)
Min. Max.
IGT @ 25°C (mA)
50 35 O.S 5.0 50 50 50 MT2(+)G(+)
75 35 O.S 5.0 50 50 50 MT2(+)G(-)
50 35 O.S 5.0 50 50 50 MT2(-)G(-)
75 - - - 75(1) - 75(1) MT2(-)G(+)
VGT @ 25°C (V)
2 1.5 0.45 1.5 2 1.5 2 MT2(+)G(+)
2.5 1.5 0.45 1.5 2 1.5 2 MT2(+)G(-)
2 1.5 0.45 1.5 2 1.5 2 MT2(-)G(-)
2.5 - - - 2.5(1) - 2.5(1) MT2(-)G(+)
Min. Min. Min. Min.
~,'
MT2 MT2
MT2
G
Isolated~
MT1
MT2
G
W,' MT2
G
Isolated~
MTI
MT2
G
TJ Operating -40 to
Range ("C) +125
Vs
V(-)
IH I IS
v (-) -=-+---I""'T= IS~-"5tf==....,;,,;-v (+)
1(-)
Table 3. SIDACs Table 5. Silicon
Bidirectional
High voltage trigger devices similar in operation to a Triac.
Switch (SBS)
Upon reaching the breakover voltage in either direction, the
device switches to a low-voltage on-state. This versatile trigger device exhibits highly symmetrical bi-
I Device Type
I ITSM Amps Min
VBO Yolts
I Max
directional switching characteristics which can be modified
by means of a gate lead. Requires a gate trigger current of
only 250 tJAdc for triggering.
Case 267-0311
YS
MKP3V110 20 100 120 Yolts
Device IS IH
MKP3V120 20 110 130
MKP3V130 20 120 140
Type Min I Max pAMax mAMax
I MKP1V120
. MKP1V130
4
4
110
120
130
140
IGAO
(0,0)
Table 4. Programmable
Unijunction
Transistor Thyristor Surge Suppressors-Secondary Protection
-PUT
Package S0-8
Similar to UJTs, except that lV, Ip and intrinsic standoff 30 AMP, 150 mA Ih, Programmable Bidirectional
voltage are programmable (adjustable) by means of external Surge Suppressor
voltage divider. This stabilizes circuit performance for
variations in device parameters. General operating
frequency range is from 0.01 Hz to 10kHz, making them 30 AMP, 150 rnA Ih, Programmable Bidirectional
suitable for long-duration timer circuits. Surge Suppressor
In Brief ...
Motorola's families of optoelectronic components encompass Page
red and infrared GaAs emitters and silicon detectors that are Optoisolators .................................. 5.8-2
well matched for a variety of applications. Safety Standard Approvals for 6-Pin
Optoisolators Optoisolators ............................... 5.8-2
Motorola's "Global" 6-Pin Dual In-line Package (DIP) Regulatory Approval Cerlification Index ..... . . .. 5.8-2
devices use infrared emitting diodes that are optically coupled VDE Approved Optoisolators .................. 5.8-3
to a wide selection of output (TranSistor, Darlington, Triac, and 6-Pin Dual In-line Package .................... " 5.8-6
Schmitt trigger) silicon detectors. These devices are Small Outline - Surface Mount .................. 5.8-9
guaranteed to provide at least 7500 volts of isolation between
POWER OPTO Isolators ....................... 5.8-10
the input and output and are 100% VISO tested. The entire line
of Motorola &-pin DIP packages are recognized by all major
safety regulatories including UL and VDE. This extensive line
of regulatory approvals attest to their suitability for use under
the most stringent conditions. Motorola also offers a line of
SOIC-8 small outline, surface mount devices that are UL
approved and ideally suited for high density applications.
POWER OPTOTM Isolators
The MOC2A40 and MOC2A60 series are the first
members of the POWER OPTOTM Isolator family from
Motorola. The MOC2A40/60 are 2 Amp @ 40°C/400 or 600
Vac[pk]lZero-Crossing/Optically Coupled Triacs. These
isolated AC output devices are ruggedized to survive the
harsh operating environments inherent in Industrial
Controller applications. Additionally, their thermally optimized
SIP package profile allows for high density stacking on 0.200"
centers and can handle 2 Amps @ 40°C (Free-Air Rating)
without the need for heatsinks, thermal grease, etc.
~
VDE
1M @~
UL eSA
®SETI
~ @
SEMKO DEMKO
®
NEMKO
~
BABT
GlobalOptoisolator™
MOCXXXX .(1)
· · · · · ·
SOCXXXX • (1)
· · · · · · ·
4NXXXXXX • (1)
· · · · · · ·
H1XXXXXX .(1)
· · · · · · ·
MCXXXXXX .(1)
· · · · ·
TIXXXXXX • (1) · · · · · ·
CNXXXXXX • (1)
· · · · ·
• = Approved
Note: Motorola's 8-pin surface mount optocouplers are approved by UL only and have a guaranteed isolation
voltage of 3000 Vac(rms).
All Motorola 6-pin optocouplers are 100% tested for isolation voltage and are guaranteed to 7500 Vac(peak).
(1) VDE 0884 testing is an option; the suffix letter "V" must be added to the standard part number.
THICKNESS THROUGH
INSULATION
1~6
* 1~6
* 5 5
: NC 4 : NC 4
CASE 730A-04
Resistor Darlington
I~C I~C
* * 1~6
6 6
2 5 2 5
3 NC 4 3 NC 4
2~ :
30-NC 4 3 NC
Style 1 Style 3
AC Input
Resistor-Darlington
lfj6
Random Phase Zero Crossing
Output
Schmitt Triggers Triac Driver Triac Driver
1~6
2
:t II
5 :fhIt:4 21~6 5 2 5
3 NC 4 3t0 3 4
3 NC 4
Zero Crossing
Style 5 Style 6 Circuit StyleS
~ ~ ~
emitting diode, IRED, optically coupled to a monolithic silicon
photodetector in a wide array of standard devices and
encourages the use of special designs and selections for
special applications. All Motorola optoisolators have VISO S T
rating of 7500 Vac(pk), exceeding all other industry standard CASE (S) CASE 730C-04 (T) CASE 7300-05
ratings. 730A-04 Surface-mountable Wide-spaced (0.400)
Motorola offers global regulatory approvals, including UL, gulf-wing option lead form option
CSA, AUSTEL, NEMKO, BABT, SETI, SEMKO, and DEMKO.
VDE(1) approved per standard 0884/8.87, with additional Optoisolator
approvals to DIN IEC950 and IEC380NDE 0806, Lead Form Options:
IEC435NDE 0805, IEC65NDE 0860, VDE 110b, also Motorola's 6-pin, dual in-line optoisolators can be
covering all other standards with equal or less stringent ordered in either a surface-mountable, gull-wing lead
requirements, including IEC204NDE 0113, VDE 0160, VDE form or a wide-spaced 0.400" through-hole lead form,
0832, VDE 0833. which is used to satisfy B mm PC board spacing
(1) VOE 0884/8.87 testing is an option; the suffix "YO must be added to the
standard part number (see VOE Approved Optoisolators in Section 3). requirements. Please first consult factory regarding
availability for your lead form option, prior to
ordering!
CASE 730A-{)4
Table 4. Darlington Output
Pinout: 1-Anode, 2-Cathode, 3-N.C., 4-EmiHer, 5-Collector, 6-Base (Style 1)
Current Transfer tr'tf or ton "Iofl*
Ratio (CTR) VCE(sat) Typ VF
V(BR)CEO
0/0 IF VCE VOlts@ IF IC @ IC VCC RL IF Volts Volts@ IF
@
Device Min rnA Volts Max rnA rnA I1S rnA Volts n rnA Min Max rnA
4N31 50 10 10 1.2 8 2 0.6"'17" 50 10 200 30 1.5 10
4N29.A 100 10 10 1 8 2 0.6"/17" 50 10 200 30 1.5 10
4N30 100 10 10 1 8 2 0.6"/17" 50 10 200 30 1.5 10
MCA231 200 1 1 1.2 10 50 80 10 10 100 30 1.5 20
TIL113 300 10 1.25 1 50 125 300 125 15 100 30 1.5 10
4N32 500 10 10 1 8 2 0.6"'45- 50 10 200 30 1.5 10
4N33 500 10 10 1 8 2 0.6"/45" 50 10 200 30 1.5 10
H11B1 500 1 5 1 1 1 1/2 10 10 100 25 1.5 10
MOC8080 500 10 5 1 1 1 1/2 10 100 5 55 1.5 10
Threshold Threshold
Current On Current Off IF(offyIF(on) vCC t r• tf
Device mAMax mAMin Min Max Min Max IlsTyp
H11L1 1.6 0.3 0.5 0.9 3 16 0.1
HllL2 10 0.3 0.5 0.9 3 16 0.1
MOCSOO7 1.6 0.3 0.5 0.9 3 16 0.1
MOC5008 4 0.3 0.5 0.9 3 16 0.1
MOC5009 10 0.3 0.5 0.9 3 16 0.1
All devices are shipped in tape and reel format. (See Tape and Reel Specifications Section for more information.)
*No Base Connection to Pin 7
Table 15. POWER OPTO Isolator 2 Amp Zero-Cross or Random Phase Triac Outputs
Pinout: (1,4,5,6,8 No Pin), 2 - LED Cathode, 3- LED Anode, 7-Main Terminal, 9-Main Terminal
Peak Blocking Led Trigger On State Voltage Zero Crossing dv/dt (static)
Voltage Current If T VTM (Rated 1FT Inhibit Voltage Operating v/llS (VIN = 200 V)
(Volts) (VTM=2V)mA ITM = 2 A) (Volts) (IF = Rated 1FT) Voltage (V/IlS)
Device Min Max Max (Volts) Max Vac Pk (Volts) Min
MOC2A4D-5 400 5 1.3 10 125 400
MOC2A4D-10 400 10 1.3 10 125 400
MOC2A60-5 600 5 1.3 10 125/220 400
MOC2A6D-10 600 10 1.3 10 125/220 400
All devices are shipped in rails.
No suffix = Case 417-02lStyle 2 (Standard Heat Tab),
"F" suffix = Case 417-02lStyle 1 (Flush Mount Heat Tab)
"C" suffix = Case 417B-01/Style 1 (Cut Tab)
In Brief ...
Pressure Sensors Page
Combining integrated circuit technology with the most Introduction ................................. 5.9-2
advanced pressure sensor architecture now offers an The Basic Structure .......................... 5.9-2
unrivaled combination of performance, reliability and design Motorola's Patented X-ducer . . . . . . . . . . . . . . . . .. 5.9-2
adaptability in a single monolithic pressure sensing element Linearity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.9-3
- the Motorola MPX series of pressure transducers. Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.9-3
Available in several versions: Typical Electrical Characteristic Curves ......... 5.9-4
Unibody Cross-sectional Drawings. . . . . . . . . . . .. 5.9-4
• Fully signal conditioned for high-level output; Pressure Side Identification ................... 5.9-5
• High Impedance, temperature compensated and Selector Guide .............................. 5.9-6
calibrated, for low current designs; Reference Table ............................ 5.9-11
• Temperature compensated and calibrated, for simplified Packaging Options .......................... 5.9-12
circuit design;
• Uncompensated for unlimited adaptability
This series of sensors provides both electrical and
mechanical design-in options that uniquely fit the varying
requirements of the system designer.
ETCHEO
r--
I
DIAPHRAGM
BOUNDARY
I TRANSVERSE
I VOlTAGE STRAIN
PIN#
1. GROUND I
2. +VOUT L _'M!t?!!~_
3. Vs
4.-VOUT
50 100
PRESSURE (% FULLSCALE)
~ 25
TA= 25°C
35 r-- MPX2100
30 f--P1>P2 I - TVP
"i0'
-0 "
,,~
1 SPAN
:g-
80
70
RANGE 60
t- MAX "- ~ >
.s.
1
20 50
~~
I-
~
:::J
15 "-
I- 40
o 10 ~ "'MIN
:::J
0 30
~ I
20
~ 10
-5 tOFFSET O~O~~+-~~~~~~--~--~~
kPa 0 25 50 75 100 (TVP)
PSI 3.62 7.25 10.87 14.5 PSI 0 10 20 30 40
kPa PRESSURE DIFFERENTIAL
Figure 4. Output versus Pressure Differential Figure 5. Typical-Output Voltage versus
Pressure and Temperature for Compensated
and Uncompensated Devices
5.0
_I _
M~. --: ~
~
TRANSFER FUNCTION:
4.5
Vout = Vs' (0.OO9'P - O.04) ± error ~
4.0 Vs=5.0Vdc ~
--
3.5 TEMP = 0 to 85°C ~
DIE
DIFFERENTIAUGAUGE ELEMENT BOND ABSOLUTE ELEMENT
P2 P2
Figure 7. Cross-Sectional Diagrams (not to scale)
Figure 7 illustrates the absolute sensing configuration The MPX series pressure sensor operating characteristics
(right) and the differential or gauge configuration in the basic and internal reliability and qualification tests are based on use
chip carrier (Case 344). A silicone gel isolates the die surface of dry air as the pressure media. Media other than dry air may
and wire bonds from harsh environments, while allowing the have adverse effects on sensor performance and long term
pressure signal to be transmitted to the silicon diaphragm. stability. Contact the factory for information regarding media
compatibility in your application.
Table 2. Uncompensated
Max Pressure Over Full Scale Linearity
Device Rating Pressure Offset Span Sensitivity 0/0 of FSS(1)
Series psi kPa (kPa) mV(Typ) mV(Typ) (mV/kPa) (Min) (Max)
MPX10D 1.45 .10 75 20 3s 3.5 -1.0 1.0
MPX50D 7.3 50 200 20 60 1.2 -0.25 0.25
MPX100D,A 14.5 100 200 20 60 0.6 -0.25 0.25
MPX200D,A 29 200 400 20 60 0.3 -0.25 0.25
MPX700A 100 700 2800 20 60 0.086 -1.0 1.0
MPX700D 100 700 2800 20 60 0.086 -0.50 0.50
MPX906D 0,87 6 100 20 20 3.3 -0.50 2.0
Device Measurement/Porting Package oto 1.45 PSI oto 7.3 PSI o to 14.5 PSI o to 29 PSI o to 100 PSI
Type Options Options (0 to 10 kPa) (0 to 50 kPa) (0 to 100 kPa) (0 to 200 kPa) (0 to 700 kPa)
Gauge Vacuum Axial Case 371 D-03 MPX10GVSX MPX50GVSX MPX100GVSX MPX200GVSX -
Table 9. MPX900 Series (Uncompensated) (Water vapor and soapy water vapor tolerant)
Pressure Range
6-Pin
Basic Element Differential Case 867-07 MPX906D
Measurement Package oto 1.45 PSI oto 7.3 PSI o to 14.5 PSI o to 29 PSI o to 100 PSI
Device Type Options Options (0 to 10 kPa) (0 to 50 kPa) (0 to 100 kPa) (0 to 200 kPa) (0 to 700 kPa)
Gauge Vacuum Axial Case 371 D-03 MPX2010GVSX MPX2050GVSX MPX2100GVSX MPX2200GVSX -
Measurement Package 3to15PSI 2.3 to 14.7 PSI 2.3 to 16.6 PSI 3 to 36.2 PSI
Device Type Options Options (20 to 105 kPa) (15 tol02kPa) (15toI15kPa) (20 to 250 kPa)
6-Pin
Basic Element Absolute Case 867-07 MPX4100A MPX4101A MPX4115A MPX4250A
Ported Element Absolute Port Case 867E-03 MPX4100AP MPX4101AP MPX4115AP MPX4250AP
Device Measurement Package o to 1.45 PSI oto 7.3 PSI oto 14.5 PSI 2.3 to 14.7 PSI o to 75 PSI o to 100 PSI o to 150 PSI
Type Options Options (0 to 10 kPa) (0 to 50 kPa) (0 to 100 kPa) (15 to 115 kPa) (0 to 500 kPa) (0 to 700 kPa) (0 to 1000 kPa)
I
~~~~~~~~~~~~~~~~~~~_I_..J
Motorolarf_re_s_s_u_re_X_--D_u_c_e_r
I
l
MPX Y!l. !l. ### Z2.ZZ
MMA.s40G 10Q
MOTOROLA ~I tPACKAGE
MICROMACHINED
REFERENCE TABLE
Table 19. Pressure Unit Conversion Constants (Most Commonly Used - Per International Conventions)
PSI(I) in. H20(2) in. Hg(3) KPascal millibar cm H20(4) mm Hg(5)
PSI(1) 1.000 27.681 2.036 6.8948 68.948 70.309 51.715
in. H20(2) 3.6126 x 10- 2 1.000 7.3554 x 10- 2 0.2491 2.491 2.5400 1.8683
in. Hg(3) 0.4912 13.595 1.000 3.3864 33.864 34.532 25.400
cm H20(4) 1.4223 x Hr2 0.3937 2.8958 x 10-2 0.09806 0.9806 1.000 0.7355
mmHg(5) 1.9337 x 10- 2 0.53525 3.9370 x 10- 2 0.13332 1.3332 1.3595 1.000
BASIC ELEMENT GAUGE PORT GAUGE VACUUM PORT DUAL PORT AXIAL PORT
CASE 344-12 CASE3SD-oS CASE3SD-06 CASE 352-03 CASE 371 c-oo
SUFFIX AID SUFFIX AP IGP SUFFIXGVP SUFFIXDP SUFFIX ASX/GSX
MEDICAL CHIP PACK AXIAL VACUUM PORT STOVEPIPE PORT STOVEPIPE VACUUM PORT
CASE 423-04 CASE 3710-03 CASE 371-07 CASE 371-08
SUFFIX GVSX SUFFIXGVS SUFFIX AS/GS
6-PIN
AXIAL PORT AXIAL VACUUM PORT STOVEPIPE PORT STOVEPIPE VACUUM PORT STOVEPIPE MEDIA PORT
CASE 867F-OO CASE 867G-03 CASE 867E-03 CASE 867A-04 CASE 867H-03
SUFFIX ASX/GSX SUFFIX GVSX SUFFIX AS/GS SUFFIXGVS SUFFIXGVW
..
8-PIN
(NEW)
tfij)
DUAL PISTON FIT SURFACE MOUNT TOP PISTON FIT
CASE 434C-01 CASE 432-01 CASE 434A-03
ACCELEROMETER
PACKAGING
-
DIP PACKAGE
CASE 648C-03
In Brief ...
While Motorola is considered to be the supermarket for Page
semiconductor products, there is not a category in which the RF Discrete Transistors ........................ 5.10-2
selection is more diverse, or more complete, than in products RF Power MOSFETs ........................ 5.10-4
designed for RF system applications. From MOS, bipolar RF Power Bipolar Transistors. . . . . . . . . . . . . . . .. 5.10-6
power and signal transistors to integrated circuits, Motorola's HFTransistors ........................... 5.10-6
RF components cover the entire spectrum from HF to VHF Transistors ......................... 5.10-6
microwave to personal communications. Yet, product expan- UHF Transistors ......................... 5.10-7
sion continues - not only to keep pace with the progressive 900 MHz Transistors ..................... 5.10-8
needs of the industry, but to better serve the needs of designers 1.5GHzTransistors ..................... 5.10-10
for a reliable and comprehensive source of supply. Microwave Transistors ................... 5.10-10
Linear Transistors ....................... 5.10-12
How to Use This Selector Guide RF Small Signal Transistors ................. 5.10-14
This new selector guide combines the RF products of Motorola Selection by Package .................... 5.10-15
Phoenix, Motorola Toulouse (France), and Motorola Hong Kong. Plastic SOE Case .................... 5.10-15
The products in this guide are separated FIRST into major Ceramic SOE Case ................... 5.10-17
categories such as Power FETs, Power Bipolar, Small Signal, Selection by Application . . . . . . . . . . . . . . . . .. 5.10-18
Monolithic Integrated Circuits, and Low and High Power Low Noise ........................... 5.10-18
Amplifiers. SECOND, within each category parts are listed by CATV, MATV and Class A Linear ....... 5.10-19
frequency band, except for small signal transistors and RF Monolithic Integrated Circuits ............... 5.10-20
monolithic integrated circuits, which are divided by Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.10-21
application. Small signal transistor applications are low noise, Antenna Switches ....................... 5.10-21
linear amplifiers, switches, and oscillators. Monolithic Receiver Functions ........................ 5.10-21
integrated circuit application groupings are switching, receiver General Purpose Integrated Circuits ....... 5.10-21
functions and transmitter functions. THIRD, within a
900 MHz Front End ...................... 5.10-21
frequency band, transistors are further grouped by operating
1.5-2.2 GHz Front End .................. 5.10-21
voltage and, finally, output power.
2.4 GHz Front End ...................... 5.10-22
Remember Transmitter Functions ...................... 5.10-22
Applications assistance is only a phone call away - call the General Purpose Integrated Circuits ....... 5.10-22
nearest Semiconductor Sales office or 1-800-521-6274. 900 MHz Transmit Chain ................. 5.10-23
1.5-2.2 GHz Transmit Chain ............. 5.10-24
2.4 GHz Transmit Chain .................. 5.10-25
RF Amplifiers ................................ 5.10-26
High Power ............................... 5.10-28
Land Mobile/Portable .................... 5.10-28
TV Transmitters ......................... 5.10-29
Low Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.10-30
CATV Distribution ....................... 5.10-30
CRT Drivers ............................ 5.10-35
Fiber Optic Receivers . . . . . . . . . . . . . . . . . . .. 5.10-35
¥ ¥
CASE 145A-09
STYLE 1
(.380" STUD)
CASE 145D-02
STYLE 1
(.380"SOE)
~ ~ CASE 211-07
STYLE 1, 2
(.380" FLANGE)
CASE21H1
STYLE 1, 2
(.500" FLANGE)
CASE 244
STYLE 1
(.280" STUD)
~ CASE 249
STYLE 1, 3
(.280" PILL)
>fCASE 305
STYLE 1
(.204" STUD)
~ CASE305A
STYLE 1, 2
(.204" PILL)
X CASE305C
STYLE 1
CASE305D
STYLE 1
~ CASE 316-01
STYLE 1, 3
X
CASE 317
STYLE 1, 2
~
CASE 317D
STYLE 2
~ CASE 319
STYLE 1, 2, 3
CASE 319A
STYLE 2
(.500"CQ) (MACRO-X) (CS-12)
~ ~ CASE 319B
STYLE 1
CASE 328A-03
STYLE 1
¥ CASE 332-04
STYLE 1, 2
u ~ CASE 332A
STYLE 2
CASE 333
STYLE 1
(.280" STUD) (.280" PILL)
~ CASE 333A
~
CASE336E
QCASE 355C
~ CASE 355D
STYLE 1, 2 STYLE 1 STYLE 1 STYLE 1
(MAACPAC)
CASE 376B CASE 376C CASE 390B CASE 395B CASE 395C
STYLE 1 STYLE 1 STYLE 1 STYLE 1 STYLE 1, 2
Table 1. To 54 MHz
Designed for broadband HF & VHF commercial and industrial applications. The high gain and broadband performance of
this device makes it ideal for large-signal, common-source amplifier applications in 12.5 volt mobile and base station
operation.
Pin
Pout Input Power T]
Output Power Typical G ps (Typ)/Freq. Eff., Typ 9JC
Device Watts Watts dBIMHz % °CIW Package/Style
Pin G ps TypicailMD
Pout Input Power Typical
Output Power Typical Gain dB @ d3 d11 9JC
Device Watts Watts 30 MHz dB
I dB 'C/W Package/Style
* New Product
Pin
Pout Input Power 11
Output Power Typical Gps (Typ)IFreq. Eft., TYP 9JC
Device Watts Watts dBIMHz % °CIW Package/Style
Voo =28 Volts, Class AB
MRF158 2 0.02 20/400 55 13.2 305A12
MRF160 4 0.08 17/400 50 7.2 249/3
MRF166C 20 0.4 17/400 55 2.5 319/3
MRF164W 20 0.4 16.5/400 50 1.5 41211
MRF166W 40 2 13/400 50 1.0 41211
MRF175LU 100 10 10/400 55 0.65 33311
MRF177 100 6.4 121400 60 0.65 744A12
MRF177M 100 6.4 121400 60 0.65 390B/1
MRF175GU 150 9.5 12/400 55 0.44 375/2
HF Transistors
Table 1. 1.5 - 30 MHz, HF/SSB
Designed for broadband operation, these devices feature specified Interrnodulation Distortion at rated power output.
Applications include mobile, marine, fixed station, and amateur HF/SSB eqUipment, operating from 12.5, 13.6,28, or 50 volt
supplies.
Pout Pin (Max) GpE(Min)
Output Power Input Power Gain@30MHz BJC
Device Watts Watts dB 0C/W Package/Style
VCC = 12.5 or 13.6 Volts, Class AB
IMRF421 I l00PEP/CW 10 10 0.6 211-1111
VCC = 28 Volts, Class AB
MRF426 25 PEP/CW 0.16 22 2.5 211-07/1
MRF422 150PEP/CW 15 10 0.6 211-11/1
VCC = 50 Volts, Class AB
MRF429 150PEP/CW 7.5 13 0.8 211-11/1
MRF448 250PEP/CW 15.7 12 0.6 211-1111
VHF Transistors
Table 4. 30 - 200 MHz Band
Designed for Military Radio and Commercial Aircraft VHF bands, these 28-volt devices include the all-gold metallized
MRF314/16/17 high-reliability series.
UHF Transistors
Table 6. 100 - 400 MHz Band
Stringent requirements of the UHF Military band are met by MRF325, 326, 327, 329 and 2N6439 types, with all-gold nietal
systems, specified ruggedness and programmed wirebond construction, to assure consistent input impedances for internally
matched parts.
VCC = 24 Volts
TP5002S 1.5 A 0.075 131470 21 249/1
TP5015 15 AS 1.2 111470 7.0 319/2
TP5051 50 AS 6 9/470 1.2 333A12
Microwave Transistors
Table 11. L-Band Pulse Power
These products are designed to operate in short pulse width, 10 !ls, low duty cycle, 1%, power amplifiers operating in the
960-1215 MHz band. All devices have internal impedance matching. The prime application is avionics equipment for
distance measuring (DME), area navigation (TACAN) and interrogation (IFF).
Pout Pin(Max) Gp(Min)
Output Power Input Power Gain @ 1090 MHz 9JC
Device Watts Watts dB °CIW Package/Style
VCC =18 Volts - Class A & AB Common Emitter
MRF1000MA 0.2 0.02 10 25 332-04/2
MRF1000MB 0.2 0.02 10 25 332A12
VCC =35 Volts - Class B & C Common Base
IMRF1004MA I 4 0.4 10 25 332-0411
VCC =50 Volts - Class C Common Base
MRF1090MA 90 9 10 0.6 332-04/1
MRF1150MA 150 25 7.8 0.3 332-04/1
MRF1375 375 80 6.7 0.12 355G/1
Table 12. L-Band Long Pulse Power, Class C Common Base (continued)
Pout Pin(Max) GpB(Min)
Output Power Input Power Gain @ 1215 MHz 8JC
Device Watts Watts dB 0c/w Package/Style
VCC =50 Volts
MRF10070 70 7 10(7) 0.4 376G/l
MRF10150 150 15 10(7) 0.25 376B/l
MRF10350 350 44 9(7) 0.11 355E/l
MRF10500 500 63 9(7) 0.12 3550/1
MRF10501 500 63 9(7) 0.12 355H/1
,CASE 29-04
STYLE 2
CASE244A
STYLE 1
Transistors
Motorola's broad line of RF Small Signal Transistors includes
NPN and PNP Silicon Bipolar Transistors characterized for
low noise amplifiers, mixers, oscillators, multipliers,
non-saturated switches and low-power drivers.
These devices are available in a wide variety of package
(TO-226M) types: plastic Macro-X and Macro-T, ceramic and surface
mounted. Most of these transistors are fully characterized with
s-parameters.
CASE 318A
STYLE 1
LOW PROFILE
(SOT-143)
•CASE 419
STYLE 3, 6
(SC-70/S0T-323)
CASE 751
STYLE 1
(S0-8)
N
Curve numbers apply to transistors ~ 6 t---t---ct-t-ft---cH'--t---c+--t---\---j--;+--j
listed in the subsequent tables. b
is
Selection by Package ~
c..
5
In small-signal RF applications. the package style is often ~
determined by the end application or circuit construction ~ 4r-~r-7t1-~+--r-~~+--~-1--+-~
technique. To aid the circuit designer in device selection. the z
Motorola broad range of RF small-signal amplifier transistors ~
is organized by package. Devices for other applications such -= 3r-+-HI++r-h'-I---;,;;t...,c....+--~-1--+-~
as oscillators or switches are shown in the appropriate
preceding tables. These devices are NPN polarity unless
otherwise designated.
o~_~~_~~_~~_~_~_~~_~
Device
Typ
GHz I IC
mA
Page
5.1.0-15
Typ
dB I MHz
Typ
dB
I MHz
V(BR)CEO
Volts
IC
mA Package
Case 29-0411,2, T0--226AA
LP1001 5 10 - 2.7 500 12.5 1000 15 -
- -
I
LP1001A 5 10 3.2 1000 12.5 1000 15
MPS901(29) 4.5 15 7 2.4 900 12 900 15 30
MPS911(29) 7 30 8 1.7 500 16.5 500 12 40
MPS571 8 50 12 2 500 14 500 10 80
MPS3866 0.8 50 1 - - 10 400 30 400
(29)Packaging Options Available in Tape and Reel and Fan Fold Box
Device
Case 317/2 - MACRo-X
Typ
GHz I IC
mA
Page
5.10-15
TyP
dB
I MHz TyP
dB I MHz
V(BRlCEO
Vots
IC
mA Package
X
MRF951 8 30 - 2.1 2000 12.5 2000 10 100
MRF559 3 100 10 - - 13 512 18 150
MRF581 5 75 11 2 500 15.5 500 18 200
MRF581A 5 75 11 1.8 500 15.5 500 15 200
MRF837 5 75 11 - - 10 870 16 200
Case 317A12 - MACRO-T
BFR90
BFR96
Case 317D/2
MRF553 - - - - - 13 175 16 500
MRF555
MRF557
-
-
-
-
-
-
-
-
-
-
12.5
9
470
870
16
16
400
400
~
Case 318-0816 - SOT-23
MMBR521 LT1(17)(18c) 3.4 -35 - 1.5 500 15 500 -10 -70
MMBR931 LT1 (18c) 3 1 6 4.3 1000 10 1000 5 5
MMBR5031 LT1 (18c) 1 5 - 2.5 450 17 450 10 20
BFS17LT1(18c) 1.3 25 - - - - - 15 -
BFR92ALT1(18c) 4.5 14 - - - 15 - 15 25
MMBR901 LT1 (18c) 4 15 7 1.9 1000 12 1000 15 30
-
~
BFR93ALT1(18c) 3.4 30 2.5 30 - - 12 35
MMBR920LT1 (18c) 4.5 14 - 2.4 500 15 500 15 35
MMBR5179LT1(18c) 1.4 5 4 - - 15 200 12 50
MMBR941 LT1 (18c,d) 8 15 15 2.1 2000 8.5 2000 10 50
MMBR941 BLT1(18c,d) 8 15 15 2.1 2000 8.5 2000 10 50
MMBR911 LT1 (18c) 6 30 8 2 500 17 500 12 60
MMBR571 LT1 (18c) 8 50 12 2 500 16.5 500 10 80
MMBR951 LT1 (18c) 8 30 - 2.1 2000 7.5 2000 10 100
MMBR951ALT1(18c) 8 30 - 2.1 2000 7.5 2000 10 100
(17)PNP
(18)Tapeand Reel Packaging Available by adding suffix: a) R1 ~500 unils; b) R2~2.500 units; c) T1 ~3,OOO units; d) T3~10,OOO units; e) R2~1,500 units.
Device
Typ
GHz I
IC
mA
Page
5.10-15
Typ
dB
I MHz
Typ
dB
I MHz
V(BR)CEO
Volts
IC
mA Package
Case 318A11 - SOT-143
MRF5711 LT1(18c) 8 50 12 1.6 1000 13.5 1000 10 70
MRF5211LT1(17)(18c) 4.2 -50 - 2.8 1000 11 1000 -10 -70
MRF9331 LT1 (18c) 5 1 - 2.5 1000 12.5 1000 8 2
•
MRF9011LT1(18c) 3.8 15 7 2.3 1000 10.2 1000 15 30
MRF9411LT1(18c) 8 15 15 2.1 2000 9.5 2000 10 50
MRF9411 BLT1 (18c) 8 15 15 2.1 2000 9.5 2000 10 50
MRF0211LT1(18c) 5.5 40 12 1.8 1000 9.5 1000 15 70
MRF5811LT1 (18c)* 5 75 11 2.0 500 18.4 500 18 200
MRF9511 LT1 (18c) 8 30 - 2.1 2000 9 2000 10 100
MRF9511ALT1(18c) 8 30 - 2.1 2000 9 2000 10 100
Case 41913 - SC-70/S0T-323
MRF927T1(18c)* 8 5 14 1.7 1000 9.8 1000 10 10
•
MRF947T1 (18c,d) 8 15 15 2.1 2000 10.5 1500 10 50
MRF947AT1(18c) 8 15 15 2.1 2000 10.5 1500 10 50
MRF947BT1(18c,d) 8 15 15 2.1 2000 10.5 1500 10 50
MRF957T1 (18c) 8 30 - 2.0 2000 9 1500 10 100
Case 419/6 - SC-70/S0T-323
•
MRF947RT3(18d) 8 15 - 2.1 2000 10.5 1500 10 50
Device
Case 244A11
Typ
GHz I IC
mA
Page
5.10-15
Typ
dB
I MHz
Typ
dB I MHz
V(BR)CEO
Volts
IC
mA Package
IMR~'
I~I~I
15
(18)Tape and Reel Packaging Available by adding suffix: a) R1 =500 units; b) R2=2,500 units; c) T1 =3,000 units; d) T3=10,OOO units; e) R2=1,500 units.
* New Product
X MACRO-X 317/2
MRF941
MRF951 (20)
- MRF571 MRF581 MRF901 -
~
MMBR941LT1
SOT-23 318-08/6 MMBR941BLT1 MMBR521LT1 MMBR571LT1 - MMBR901LT1 MMBR911LTI
MMBR951 LT1 (20)
MRF927T1
•
MRF947AT1
SC-70/ MRF947T1
SOT-323
419/3,6
MRF947BT1
- - - - -
MRF947RT3
MRF957T1 (20)
•
MRF9411BLT1
MRF9411LT1 MRF5711LT1
SOT-143 318A11
MRF9511LT1(20)
MRF5211LT1
MRF0211LT1
MRF5811LT1 MRF9011LT1 -
MRF9511ALT1
(17)PNP
(20)Higher Current Version
46253 1
24
iD 20
:s
2
:;;: 16
=~
c:l
0 ~
w
'< 12
~ ."- 6iD
&. i'.
~..,.
2,4 5:S
w
en 8 I~ ~ \.. 4~
....2 6/ ~3 1 3U::
c:l
c:l 5 V i""" w
4 2!G
~ ~
1u:
0 0 2
0.1 0.2 0.3 0.5 2 3 10
t, FREQUENCY (GHz)
Gain and Noise Figure versus Frequency
Receiver Functions
General Purpose Integrated Circuits
General Purpose Cascode Amplifier
Small
Signal
Supply Gain
Freq. Volt. Supply @900 Noise Reverse
Range Range Current MHz Figure Isolation System
Device MHz Vdc mA(Typ) dB (Typ) dB (Typ) dB (Typ) Package Applicability
MRFIC0915(18c)* 100-2000 2.7-5.0 2.2 16.5 1.9 44 SOT-143 AMPS,CT1,CT2,GSM,Is-54,
ISM, DECT, PHS, PCS
MRFIC0916(18c)* 100-2000 2.7-5.0 4.7 18.5 1.9 44 SOT-143 AMPS,CT1,CT2,GSM,Is-54,
ISM, DECT, PHS, PeS
Integrated LNAlDownconverter
RF IF Supply Supply Mixer LNA
Freq. Freq. Volt. Current Conv. LNA Noise
Range Range Range RXMode Gain Gain Figure System
Device GHz GHz Vdc mA(Typ) dB (Typ) dB (Typ) dB (Typ) Package Applicability
MRFIC1804(18b) 1.8-1.925 70-325 2.7-3.3 10 4 14 2.3 So-16 DECT,PHS,PCS
MRFIC1814(18b,46a) 1.8-2.0 70-300 2.7-4.5 10 9 17 2.5 TSSOP-16 DECT,PHS,PCS
Transmitter Functions
General Purpose Integrated Circuits
Quadrature Modulator
Supply SSB Pout,
Freq. Volt. Supply Gain Lo 1 dB
Range Range Current Control Leakage Compression System
Device MHz Vdc mA(Typ) dB(Typ) dBm (Typ) dBm(Typ) Package Applicability
MRFICOOOl (18b) 50-260 2.7-5.5 10 30 -55 -10 TSSOP-20 DCS1800, GSM, NADC
PDC,PHS
Analog Cellular
Power
Freq. Added Power Harmonic
Range Supply Volt. Efficiency Gain Output 2fo Pout!Pin Semiconductor
Device MHz Vdc % (Min) dB (Min) dBc dBm(Min) Package Technology
MRFIC0910(18e,46a) 824-905 4.8 50 17.8 -40 30.8/13 PFP-16 LOMaS
MRFIC0911 (18e,46a) 824-905 6.8 50 18.5 -35 31.5/13 PFP-16 LOMaS
MRFIC0912(18e,46a) 824-905 4.6(47) 55 21.8 -20 30.8/9 PFP-16 GaAs
(18)Tape and Reel Packaging Available by adding suffix: a) R1 = 500 units; b) R2 =2.500 units; c) T1 = 3,000 units; d) T3= 10,000 units; e) R2 = 1 ,500 units.
(46)To be introduced: a)1st half of 1996; b) 2nd half of 1996.
(47) Negative supply required
* New Product
GSM Cellular
Power
Freq. Added Power Harmonic
Range Supply Volt. Efficiency Gain Output 2fo Pout/Pin Semiconductor
Device MHz Vdc % (Min) dB (Min) dBc dBm(Min) Package Technology
MRFIC0913(18e,46a) 880-915 4.8(47) 50 24.5 -30 34.5/10 PFP-16 GaAs
MRFIC0917(18e,46a) 880-915 3.6(47) 50 24.5 -30 34.5/10 PFP-16 GaAs
DCS1800, PCS1900
Power
Freq. Added Power Harmonic
Range Supply Volt. Efficiency Gain Output 2fo Pout/Pin Semiconductor
Device MHz Vdc % (Min) dB (Min) dBc dBm(Min) Package Technology
MRFIC1816(18e,46a) 1.5-1.9 5.8(47) 50 16.5 -30 31.5/15 PFP-16 GaAs
MRFIC1818(18e,46a) 1.7-1.9 4.8(47) 35 30 -30 33/3 PFP-16 GaAs
Power Amplifier
Freq. Supply Volt. Supply Small Signal Power Control Pout, 1 dB
Range Range Current Gain Range Compression System
Device MHz Vdc rnA (Typ) dB (Typ) dB (Typ) dBm(Typ) Package Applicability
MRFIC2403(18b) 2200-2700 4.75-5.25 95 23 20 19 SO-16 WLAN,
MMDS, ISM
CASE301AA
STYLE 1
CASE301AB
STYLE 1
, CASE301E
STYLE 1
CASE301F
STYLE 1
, CASE301H
STYLE 2
~ CASE301J
STYLE 1
CASE301K
STYLE 3
, CASE301N
STYLE 1
, CASE301R
STYLE 1
, CASE30H
STYLE 1
, CASE301V
STYLE 1
, CASE301Y
STYLE 1
CASE 825A
STYLE 2
Land Mobile/Portable
The advantages of small size, reproducibility and overall lower cost become more pronounced with increasing frequency of
operation. These amplifiers offer a wide range in power levels and gain, with guaranteed performance specifications for bandwidth,
stability and ruggedness.
I Pout I Pin f
Gp I Vee
Oevice
Output Power
Watts
Input Power
Watts
Frequency
MHz
Power Gain, Min
dB
Supply Voltage
Volts Package/Style I
824-849 MHz, UHF Band - Class AB (Silicon Bipolar Die)
MHW920* 0.8(24) 0.001 824-849 29 6
MHW927B(22) 6(24) 0.001 824-849 37.8 12.5
880-960 MHz (for GSM) - Class AB (Silicon Bipolar Die)
MHW953(22) 3.5 0.001 890-915 35.4 7.2
MHW954(22) 3.5 0.1 890-915 15.4 7.2
~--U-----TI
MHW913 0.1
MHW914(22)
0.001
14
14
880-915
890-915
21.5
41.4
12.5
12.5
301AB/l
301R/l
MHW916
-- ---- 16 0.036
- I 925-960 I 26.5 26 I 301AB/l
TV Transmitters
Table 3. UHF Ultra Linear for TV Applications
_._._-
These amplifiers are characterized for ultra-linear applications in Band IV and Band V TV transmitters.
CATV Distribution
Motorola Hybrids are manufactured using the latest generation technology which has set new standards for CATV system
performance and reliability. These hybrids have been optimized to provide premium performance in all CATV systems up to 152
channels.
Feedforward Hybrids
1MFF124B 1 24 60 +46 -84(31) -79 [ -_7_5____L -_ _ _
10____~. 825N2~
Table 5. 40-550 MHz Hybrids, VCC = 24 Vdc, Class A
Maximum Distortion Specifications
Noise
Hybrid Channel Output 2nd Composite Cross Figure
Gain Loading Level Order Triple Beat Modulation @550MHz
(Nom.) Capacity Test
dB dB dB
Package!
Device dB dBmV dB 77CH I 87CH 77CH L87CH Max Style
--
Conventional Hybrids
MHW6142 14 77 +44 _72(35) -59 - -62 - 7.5 714/1
MHW6172 17 77 +44 _72(35) -59 - -62 - 7 714/1
MHW6182 18 77 +44 _72(35) -58 - -62 - 7 714/1
MHW6222 22 77 +44 -66(35) -57 - -57 - 6 714/1
MHW6272 27 77 +44 -64(35) -57 - -57 - 6.5 714/1
MHW6342 34 77 +44 -64(35) -57 - -57 - 6.5 714/1
1-----1 -- I
Power Doublmg Hybrids
MHW6185-mJ ii--" I 87 +44 -64(36) -64 -66 7 714/1
MHW6205-6A * 20
Feedforward Hybrids
87
I. +44 -63(36)
--
-- -63 -65 6.5 714/1
L
Conventional Hybrids
-
40 -60(39) -62 -- -66 -- RO 714/1
MHW7182 18 40 -62(39) -62 -- -64 -- 6.5 71411
MHW7222 22 0 -55(39) -60 -- -60 -- 7 714/1
MHW7242* 24
MHW7142 _ _-,-__
14_-"_ _ 1_1!__ 40 -60(39) -60 -- -60 -- 7 714/1
MHW7272* 27 40 -60(39) -60 -- -60 -- 6.5 714/1
MHW7292*
~ ...---.-""--
29 0
---- -60(39) -60 --
.- -60 -- 6.5 714/1
~-.,
-59 -63
-59 -59
-58 -59
(39)Composite 2nd order; Vout = +40 dBmVlch
(40)Composite 2nd Order; Vout = +38 dBmVlch
(46)To be introduced: a)lst half of 1996; b) 2nd half of 1996.
*New Product
In Brief . ..
Page
Surface Mount Technology is now being utilized to offer Information for Using Surface Mount Packages"" 5,11-2
answers to many problems that have been created in the Footprints for Soldering , " " " , " ' , " , , " , , " , ' 5,11-5
use of insertion technology,
Limitations have been reached with insertion packages
and PC board technology, Surface Mount Technology offers
the opportunity to continue to advance the state-of-the-art
designs that cannot be accomplished with Insertion
Technology,
Surface Mount Packages allow more optimum device
performance with the smaller Surface Mount configuration,
Internal lead lengths, parasitic capacitance and inductance
that placed limitations on chip performance have been
reduced,
The lower profile of Surface Mount Packages allows
more boards to be utilized in a given amount of space, They
are stacked closer together and utilize less total volume than
insertion populated PC boards,
Printed circuit costs are lowered with the reduction of the
number of board layers required, The elimination or
reduction of the number of plated through holes in the board
contribute significantly to lower PC board prices,
Surface Mount assembly does not require the preparation
of components that is common on insertion technology lines,
Surface Mount components are sent directly to the assembly
line, eliminating an intermediate step,
Automatic placement equipment is available that can
place Surface Mount components at the rate of a few
thousand per hour to hundreds of thousands of components
per hour,
Surface Mount Technology is cost effective, allowing the
manufacturer the opportunity to produce smaller units and
offer increased functions with the same size product.
120
-t\ Board Material = 0.0625"
G-l0/FR-4, 2 oz Copper
- I
o.swaT
I
TA = 25°C
w_
",!Xl
temperature, TA. USing the values provided on the data sheet, ....J:2 1.5Watls
«« +watr
Po can be calculated as follows: :20
ffi I- 100 [\ V I
r-- -l-l 1
Po=
TJ(max)-TA
RaJA
z 70
Another alternative would be to use a ceramic substrate or
o IBoard Mktenal :b.0625" I
~ J
\. , / 5Watls
V I
"' 2 6
1
S 10
A, AREA (SQUARE INCHES)
12 14 16
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated • After soldering has been completed, the device should be
temperature of the device. When the entire device is heated allowed to cool naturally for at least three minutes.
to a high temperature, failure to complete soldering within a Gradual cooling should be used since the use of forced
short time could result in device failure. Therefore, the cooling will increase the temperature gradient and will
following items should always be observed in order to result in latent failure due to mechanical stress.
minimize the thermal stress to which the devices are • Mechanical stress or shock should not be applied during
subjected. cooling,
• Always preheat the device.
• The delta temperature between the preheat and soldering • Soldering a device without preheating can cause excessive
should be 100°C or less.* thermal shock and stress which can result in damage to the
• When preheating and soldering, the temperature of the device.
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When • Due to shadowing and the inability to set the wave height to
using infrared heating with the reflow soldering method, incorporate other surface mount components, the D2PAK is
the difference should be a maximum of 10°C. not recommended for wave soldering.
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
6-PIN DIP
GULL-WING
0079
2,0
TD D D~T
,045 (± ,005)
L
2.4
T~R
,300 (± ,005)
~
L ~ h
~~(m(
0'039
1,0
l 035
0'0,9
r-- ~~;-,
I f-- 0,079 ---J I 1.52
lG 'G~I rOODD~
0,075
1"E r- 0,071 -I
0,041
""T05
0,108
2,75
0,275 0,155
J1+I I+l ~3 I 1
,8
IODDDj"
~ L--.l~
I
I"~~I~I~I
0,050
r- 1,270
1,2 0,8 0,85 (inmChmes)
TO D
4.0
I t
--+--+-+--+--+--+-1- 0.0787 2.743
1 ~2.0 L
I" 0.085 "I
LOO~87 J
2.0
2.159
SMA 5MB
1--QJl1------i
I I r ~----J 4.191 r- Q118
--1 0.100 1-- 3.0 1
D 0~:3 r
4.343
IO
L 0 I" .QJ1Q "I
-
I
0.190
I
f---
2.54
D~2
TO.243
-
2.794 ( inChes)
\--;;;;;;-
SMC
DPAK
r--~--j
0'864~
1 8.38 1
I: 21.95
r
----I
r
0.531 0.197
13.5 I 50
0.42 - f - -
D~ f 2 032 0.24 I ~8
I---r
O.
3.0
10.66 - --- - - - - ~ 6096 0.653
L~ ~9JfU-
I l
0.215
063
1-3.05 L I
~~-
I
I I
5.45
17.02 ( '::05) 12 .7
-.--
0.079
2.0
-L
0.059 1 0.059 1 1 0.059 1
1 1
1.5 1.5 1.5
50T-223 5C-70150T-323
1- {d@}~rn{r~
1 0.91
T
D D
-- 0.036
-t
_I
~8
1.22
-,-,
II I I I
Lilli {or
,,'i~,)
I I I
424
T I
5.28
0.165
.
I I 0.65 6X
-+I I+- (0.0256)
500-123 MICR08
Page
Tape and Reel Specifications ................... 5.12-2
Embossed Tape and Reel Ordering Information. 5.12-3
Embossed Tape and Reel Data for Discretes ... 5.12-4
Lead Tape Packaging Standards
for Axial-Lead Components ................. 5.12-6
Packaging Specifications ....................... 5.12-7
T0-92 EIA Radial Tape in Fan Fold Box
or on Reel ................................. 5.12-7
Fan Fold Box Styles ......................... 5.12-9
Adhesion Pull Tests ......................... 5.12-9
Reel Styles ............................... 5.12-10
Embossed Tape and Reel is used to facilitate automatic pick and place equipment feed requirements. The tape is used as the
shipping container for various products and requires a minimum of handling. The antistatic/conductive tape provides a secure
cavity for the product when sealed with the "peel-back" cover tape.
• Two Reel Sizes Available (7" and 13") • S0-8, Micro8, OPTO SO-8, SOT-223, SMA, 5MB in
• Used for Automatic Pick and Place Feed Systems 12 mmTape
• Minimizes Product Handling • OPAK, PFP-16, SO-14, SO-16, SMC, TSSOP-16,
• EIA481,-1,-2 TSSOP-20, 430 and 430B in 16 mm Tape
• S00-123, SC-59, SC-70/S0T-323, SOT-23, SOT-143 • 02PAK, 03PAK, 6-Pin Optoisolators in 24 mm Tape
in 8 mm Tape
Use the standard device title and add the required suffix as listed in the option table on the following page. Note that the individual
reels have a finite number of devices depending on the type of product contained in the tape. Also note the minimum lot size is
one full reel for each line item, and orders are required to be in increments of the single reel quantity.
MicroS, SO-S,
SOT-223 OPTOSo-S SO-14,16 SMA/SMB SMC
12mm 12mm 16mm
12mm 16mm
UUUD
TSSOP-16 TSSOP-20
16mm 16mm
430, 430B
16mm
o 0 0 0 0 0 0 0 0 0 o 0 0 0 0 0 0 0 0
00000 DIRECTION
OF FEED
D1
For Components
2.0 mm x 1.2 mm and Larger
r- (3.9371 1 mmMax
100mm~
Typical Component
Cavity Center Une
Tape
1mm
(.039") Max 250 mm
1 + - - - - - - - - - - - - ' - - ' - - - - (9.843") - - - - - . j
Typical Component Camber (Top View)
~ Centerline Allowable Camber To Be 1 mml100 mm Nonaccumulative Over 250 mm
DIMENSIONS
Tape
Size 81 MBX D D1 E F K Po P2 RMln TMax WMax
Bmm 4.55mm 1.5+0.1 mm 1.0 Min 1.75iO.l mm 3.5tO.05mm 2.4mmMax 4.0iO.l mm 2.0tO.l mm 25mm 0.6mm B.3mm
(.179") -0.0 (.039") (.069 ±.O04") (.I3B±.OO2") (.094") (.157± .004") (.079±.OO2") (.98") (.024") (.327")
(.059+.004"
12mm B.2mm 1.5 mm Min 5.5iO.05 mm 6.4 mm Max 30mm 12i.30mm
-0.0)
(.323") (.060") (.217± .002") (.252") (1.1B") (.470±'o12")
16mm 12.1mm 7.5iO.l0 mm 7.9mmMax 16.3mm
(.476") (.295±.004") (.311") (.642")
24mm 20.1 mm 11.5±0.1 mm 11.9mm Max 24.3mm
(.791") (.453i.004") (.468") (.957")
Melnc dImenSIons govem - English are In parentheses for reference only.
NOTE 1: AO, BO, and KO are detenmined by component size. The clearance between the components and the cavity must be within .05 mm min. to .50 mm max.,
the component cannot rotate more than 10° within the detenmined cavity.
NOTE 2: If Bl exceeds 4.2 mm (.165) for 8 mm embossed tape, the tape may not feed through all tapefeeders.
NOTE 3: P~ch infonmation is contained in the Embossed Tape and Reel Ordering Information on pg. 5.12-3.
I--- TMax
I Outside Dimension
Measured at Edge
A
~,~!. (=~
,~ll--l'5mmMin
I~" I f \~~"=/J
/ -1 ~" (.06")
-- 13.0mm±0.5mm
(.512" ± .002")
-~
-t--
f
50 mm Min
(1.96p
Full Radius
Inside Dimension
Measured Near Hub
Reel Dimensions
Metric Dimensions Govern - English are in parentheses for reference only
MPQ
Device Quantity Component Tape Reel Reel Max Off
Product Title Per Reel Spacing Spacing Dimension Dimension Alignment
Case Type Category Suffix (Item 3.3.7) A Dimension BDimenslon C D{Max) E
Case 17-{)2 Surmetic 40 & RL 4000 0.2 +/- 0.015 2.062 +/- 0.059 3 14 0.047
600WattTVS
Case 41 A-{)2 1500WattTVS RL4 1500 0.4+/-0.02 2.062 +/- 0.059 3 14 0.047
Case 51-{)2 DO-7Glass RL 3000 0.2+/-0.02 2.062 +/- 0.059 3 14 0.047
(For Reference only)
Case 59-{)3 00-41 Glass & RL 6000 0.2 +/- 0.015 2.062 +/- 0.059 3 14 0.047
00-41 Surmetic 30
Rectifier
Case 59-{)4 500 Watt TVS RL 5000 0.2 +/-0.02 2.062 +/- 0.059 3 14 0.047
Rectifier
Case 194-{)4 110 Amp TVS RL 800 0.4+/-0.02 1.875 +/- '0.059 3 14 0.047
(Automotive)
Rectifier
Case 267-{)2 Rectifier RL 1500 0.4 +/-0.02 2.062 +/- 0.059 3 14 0.047
Case 299-{)2 00-35 Glass RL 5000 0.2 +/-0.02 2.062 +/- 0.059 3 14 0.047
Kraft Paper
Item 3.1.1
Max Off
Alignment
Container
Tape, WhHe
Item 3.2
(Anode)
E
Item 3.3.5
Both Sides
I:J
02
==
+ ..... 1++- 0.250
Item 3.3.2
~O.O 31
Item 3.3.5
1.188
.--
3.50ia.
L-
Item 3.4
Ordering Notes:
When ordering radial tape in fan fold box or on reel, specify the style per
Figures 3 through 8. Add the suffix "RLR" and "Style" to the device title, i.e.
MPS3904RLRA. This will be a standard MPS3904 radial taped and
supplied on a reel per Figure 9.
Fan Fold Box Information - Minimum order quantity 1 Box/$200LL.
Order in increments of 2000.
Reel Information - Minimum order quantity 1 Reel/$200LL.
Order in increments of 2000.
US EUROPE
RLRA RL
RLRE RL1
RLRM ZL1
Specification
Inches Millimeter
Symbol Item Min Max Min Max
D Tape Feedhole Diameter 0.1496 0.1653 3.8 4.2
D2 Component Lead Thickness Dimension 0.015 0.020 0.38 0.51
Fl, F2 Component Lead Pitch 0.0945 0.110 2.4 2.8
H Bottom of Component to Seating Plane .059 .156 1.5 4.0
HI Feedhole Location 0.3346 0.3741 8.5 9.5
H2A Deflection Left or Right 0 0.039 0 1.0
H2B Deflection Front or Rear 0 0.051 0 1.0
H4 Feedhole to Bottom of Component 0.7086 0.768 18 19.5
H5 Feedhole to Seating Plane 0.610 0.649 15.5 16.5
L Defective Unit Clipped Dimension 0.3346 0.433 8.5 11
Ll Lead Wire Enclosure 0.09842 - 2.5 -
P Feedhole Pitch 0.4921 0.5079 12.5 12.9
PI Feedhole Center to Center Lead 0.2342 0.2658 5.95 6.75
P2 First Lead Spacing Dimension 0.1397 0.1556 3.55 3.95
T Adhesive Tape Thickness 0.06 0.08 0.15 0.20
Tl Overall Taped Package Thickness - 0.0567 - 1.44
T2 Carrier Strip Thickness 0.014 0.027 0.35 0.65
W Carrier Strip Width 0.6889 0.7481 17.5 19
WI Adhesive Tape Width 0.2165 0.2841 5.5 6.3
W2 Adhesive Tape Position .0059 0.01968 .15 0.5
NOTES:
1. Maximum alignment deviation between leads not to be greater than 0.2 mm.
2. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm.
3. Component lead to tape adhesion must meet the pull test requirements established in Figures 5, 6 and 7.
4. Maximum non-<:umulative variation between tape feed holes shall not exceed 1 mm in 20 pijches.
5. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive.
6. No more than 1 consecutive missing component is permitted.
7. A tape trailer and leader, having at least three feed holes is required before the first and after the last component.
8. Splices will not interfere with the sprocket feed holes.
Style Mfan fold box is equivalent to styles E and Style P fan fold box is equivalent to styles A and
Fof reel pack dependent on feed orientation from B of reel pack dependent on feed orientation from
box. box.
Figure 2. Style M Figure 3. Style P Figure 4. Fan Fold Box Dimensions
100 GRAM
PULL FORCE
16mm
-+=lI=====I-- ~
HOLDING
(r '\. \
FIXTURE
~ I HOLDING
\I FIXTURE
I
There shall be no deviation in the leads and
no component leads shall be pulled free of
The component shall not pull free with a 300 gram The component shall not pull free with a 70 gram the tape with a 500 gram load applied to the
load applied to the leads for 3 ± 1 second. load applied to the leads for 3 ± 1 second. component body for 3 ± 1 second.
MARKING NOTE
RECESS DEPTH
9.SmmMIN ~
•
ts --1FT
365mm + 3, - Omm
~IT HUB RECESS
76.2mm ± lmm
:.~ 1:1 ~
361mm±lmm
=r
Material used must not cause deterioration of components or degrade lead solderability
Rounded side of transistor and adhesive tape visible. Flat side of transistor and carrier strip visible
(adhesive tape on reverse side).
Flat side of transistor and adhesive tape visible. Rounded side of transistor and carrier strip visible
(adhesive tape on reverse side).
Figure 11. Style E Figure 12. Style F
In Brief ...
With the pace of new semiconductor product Page
introductions, the task of providing an effective and Technical Data Services ......................... 6.1-1
up-to-date perspective of available components is beyond Motorola Semiconductor Master Selection Guide ... 6.1-1
the means of any single document. Hence, a Semiconductor Data Update Magazine ......... 6.1-1
comprehensive Motorola Literature System has been put in Mfax- Touch-Tone Fax ..................... 6.1-1
place to keep semiconductor users totally informed of all Internet Server .............................. 6.1-1
aspects of the Motorola product lines - from new product Motorola Data and Application Literature. . . . . . . . . .. 6.1-2
introductions, to applications, to major changes in directions. Motorola Application Literature. . . . . . . . . . . . . . . .. 6.1-6
The Motorola technical literature library and associated Technical Training .............................. 6.1-7
services consist of the following:
• An extensive library of Data Books, each containing a
complete selection of data sheets associated with a
particular product line.
• A series of User's Manuals and Design Manuals dealing
with the application of highly complex products.
• A wide range of Application Notes and Article Reprints
detailing the utilization of new and significant products.
• Instructor-led Training for: Digital Signal Processing
(DSP) Family; M68000 Family; Embedded Controllers
(EC); MC68360 QUIC; PowerPC; Microcontroller
(MCU); RISC Family; plus the MC68302, MC68332,
MC68340 and the MC68HC16.
These products and services are described on the
following pages. However, because of different conditions
and standards, some of these may not be available outside
the USA.
Motorola Master Selection Guide 6.0-1 Product Uterature and Technical Training
Product Literature and Technical Training 6.0-2 Motorola Master Selection Guide
Technical Data Services
Motorola Semiconductor Mfax - Touch-Tone Fax
Mfaxoffers access to over 30,000 Motorola documents for
Master Selection Guide faxing to customers worldwide. With menus and voice
For the identification and preliminary selection of instruction, customers can request the documents needed
components for circuit and system designs using their own touch-tone telephones from any location 7
days a week and 24 hours a day.
For the design engineer, the Motorola Master Selection A number of features are offered within the Mfax system,
Guide is perhaps the most important single document for the including HOT DOCS (4-digit code identifiers for currently
identification and preliminary selection of components for referenced promotional or advertising material), product data
circuit and system designs. Within its pages is a complete sheets, application notes, engiineering bulletins, article
listing and description of Motorola semiconductor devices reprints, selector guides, Literature Order Forms, and
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Motorola Master Selection Guide 6.1-1 Product Lijerature and Technical Training
Motorola Data and Application Literature
Complete technical data for the world's most universities, and from the industry, add their individual
comprehensive inventory of semiconductor components contributions to the collective literature. From these, Motorola
To complement the industry's broadest line of has selected a number of texts which add substantially to the
semiconductor products, Motorola offers a complete library of comprehension and applications of some of the more complex
Data books which detail the electrical characteristics of its products. By buying these in large quantities and providing
products. These documents are supplemented by User's them to customers at lower than retail cost, Motorola hopes to
Manuals describing the capabilities of the products in circuit foster a more comprehensive acquaintance with these
and system design. products at greatly reduced prices.
Motorola attempts to fill the need for applications For complete summaries and prices, order BR10l/D from
information concerning today's highly complex electronic the Literature Distribution Center.
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Product Literature and Technical Training 6.1-2 Motorola Master Selection Guide
Motorola Data and Application Literature: (continued)
Motorola Master Selection Guide 6.1-3 Product Literature and Technical Training
Motorola Data and Application Literature: (continued)
Product Literature and Technical Training 6.1-4 Motorola Master Selection Guide
Motorola Data and Application Literature: (continued)
MPC601UM/AO, PowerPC 601 - RISC Microprocessor TB324/0, Real Time Digital Signal Processing Applications
User's Manual with Motorola's DSP56000 Family
MPC603eUM/AO, PowerPC 603e RISC Microprocessor TB326/0, Radio Frequency Transistors: Principles and
User's Manual Practical Applications
MPC604UM/AO, PowerPC 604 RISC Microprocessor TB328/0, Programming Microcontrollers in C
User's Manual TB329/0, Sensor Technology and Devices
QSMRM/AO, Queued Serial Module Reference Manual TB330/0, PowerPC Computing
RCPURMlAO, MPC500 Family: RCPU Reference Manual TB331/0, Power Supply Cookbook
SCIMRM/AO, Single-Chip Integration Module Reference TB33210, Digital Signal Processing Using the Motorola
Manual DSP Family
SIMRM/AO, System Integration Module Reference Manual TB333/0, Signal Processing, Image Processing and
SIURM/AO, MPC500 Family: System Integration Unit Graphics Applications with Motorola's DSP96002
Reference Manual Processor. Volume I: Signal Processing
TIM08RM/AO, TIM08 Timer Interface Module Reference TB334/0, Signal Processing, Image Processing and
Manual Graphics Applications with Motorola's DSP96002
TPURM/AO, M68300 Family Time Processor Unit Processor. Volume II: Image Processing and Graphics
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TB335/0, The PowerPC Architecture: A Specification for a
Textbooks New Family of RISC Processors
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SG73/0, Master Selection Guide
TB323/0, The 68000 Book
SEMIVIO/O, Basic Semiconductor Videos
Dr. BuB, DSP Electronic Bulletin Board Freeware Line,
Microcontroller Electronic Bulletin Board
Motorola Master Selection Guide 6.1-5 Product Literature and Technical Training
Motorola Application Literature
Semiconductors in theory and practice
Application Notes, Engineering Bulletins and Article engineering bulletins and article reprints can also be ordered
Reprints are part of a total information system to define the from our Literature Distribution Center.
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Motorola's library consists of more than 300 such documents ordering information. In addition, there may be an alternative
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from discrete power transistors to the most complex Motorola Sales Office.
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Individual application notes, application reports,
DL408/D 8-bit MCU Applications Manual DL412/D Industrial Control Applications Manual
DL409/D 16/32-bit Applications Manual DL413/0 Radio, RF and Video Applications Manual
DL411/D Communications Applications Manual DL414/D FET Applications Manual
Product Literature and Technical Training 6.1-6 Motorola Master Selection Guide
Motorola Technical Training Courses
Registration & Tuition
How to register for open enrollment MOTOROLA COURSE PRICING
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Motorola Master Selection Guide 6.1-7 Product Literature and Technical Training
Motorola Technical Training Courses (continued)
Product Literature and Technical Training 6.1--8 Motorola Master Selection Guide
Motorola Technical Training Courses (continued)
Motorola Master Selection Guide 6.1-9 Product Literature and Technical Training
Motorola Technical Training Courses (continued)
Product Literature and Technical Training 6.1-10 Motorola Master Selection Guide
Motorola Technical Training Courses (continued)
MOTOROLA
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Motorola Master Selection Guide 6.1-11 Product Literature and Technical Training
Product Literature and Technical Training 6.1-12 Motorola Master Selection Guide
Device Index and
Subject Index
In Brief.
Page
Device Index
Device Index ................................... 7.1-1
The following index lists the device numbers of the General Index .................................. 7.2-1
products contained in this selector guide and references the Subject Index .................................. 7.2-9
page number where each device is described in greater
detail.(1) The listing is in a numeric sequence organized in a
"computer sort." This means that all the devices listed herein
follow a 39 character alphabet. This "new" alphabet starts
with a Period, a Dash and a Slash (. - /), followed by the 26
letter alphabet (A thru Z), which is then followed by 10
numbers (0 thru 9).
The ranking or hierarchy of this 39 character alphabet is
as follows:
.-/ABC D E FG H IJ KLM NO PO RSTU VWX
YZ0123456789
Therefore, if you are looking for a device starting with a
letter of the alphabet like an MC1741CP, it would appear
before a device starting with a number, such as 2N1132.
To find a device in this index, start with the first character
of the device and find that section of the index; next move
to the second character in the device number, and move to
that character within the same portion of the listing; and so
on until the device number is found. In other words, it is
used just like a dictionary, character by character.
For example, to find the 2N6837, go to that section of the
listing that begins with the number "2" (Notice that the section
follows all devices that begin with a letter of the alphabet or
"1"). Next, find that portion of the listing that begins with "2N"
(Notice it follows those devices that begin with "2K"). Next,
find that portion of the listing that begins with "2N6" (Notice it
follows those devices that begin with "2N5"). Continue
looking for those portions that begin with the next consecutive
character until you have found the entire number.
Because of the way "Computer Sort" works it is not
necessary to be concerned with the absolute value or
number of characters in a part number, just move across the
device part number, left to right, one character at a time until (1) The device numbers contained in this index are for
you find the number. reference only and do not necessarily represent the complete
device number necessary to order the device. Contact your
Subject Index local Sales Office or Authorized Distributor for complete
This listing is intended to simplify the identification of ordering information.
products where specific device numbers are not known.
Motorola Master Selection Guide 7.0-1 Device Index and Subject Index
Device Index and Subject Index 7.0-2 Motorola Master Selection Guide
Device Index
Device Index Page Device Index Page Device Index Page
AM26LS30 ................... 4.6-7 BC639 ....................... 5.1-4 B0166 ....................... 5.5-9
AM26LS31 ................... 4.6-7 BC640 ....................... 5.1-4 B0169 ..................... " 5.5-9
AM26LS32 ................... 4.6-7 BC807-16LT1 ............... 5.1-10 B0179 ....................... 5.5-9
BAL99LT1 ................... 5.1-35 BC807-25LT1 ............... 5.1-11 B0180 .................... '" 5.5-9
BASl16LT1 .................. 5.1-36 BC807-40LT1 ............... 5.1-11 B0237 .................... '" 5.5-9
BAS16LT1 ................... 5.1-35 BC817-16LTl ............... 5.1-10 B0238 ........ . . . . . . . . . . . . . .. 5.5-9
BAS16WT1 .................. 5.1-35 BC817-25LTl ............... 5.1-10 B0241 B . .. .. .. . .. .. .. .. .. .... 5.5-3
BAS21LT1 ................... 5.1-35 BC817-40LT1 ............... 5.1-10 B0241 C . . . . . . . . . . . . . . . . . . . . .. 5.5-3
BAV170LT1 .................. 5.1-37 BC846ALT1 ................. 5.1-10 B0242B .. .. .. .. .. .. . . .. .. . . .. 5.5-3
BAV199LT1 .................. 5.1-37 BC846AWT1 ................. 5.1-11 B0242C . . . . . . . . . . . . . . . . . . . . .. 5.5-3
BAV70LT1 ................... 5.1-36 BC846BLT1 ................. 5.1-10 B0243B .. .. .. .. .. .. . . .. .. .... 5.5-4
BAV70WT1 .................. 5.1-36 BC846BWT1 ................ 5.1-11 B0243C .................... " 5.5-4
BAV74LT1 ................... 5.1-36 BC847ALT1 ................. 5.1-10 B0244B . . . . .. . . . . . . . . . . . . . . .. 5.5-4
BAV99LT1 ................... 5.1-36 BC847AWTl ................. 5.1-11 B0244C . . . . . . . . . . . . . . . . . . . . .. 5.5-4
BAW156LT1 ................. 5.1-37 BC847BLT1 ................. 5.1-10 B0249C .. .. .. . . .. .. . . .. .. . ... 5.5-7
BAW56LT1 .................. 5.1-36 BC847BWT1 ................ 5.1-11 B0250C ...................... 5.5-7
BAW56WT1 ................. 5.1-36 BC847CLT1 ................. 5.1-10 B0437 ........ . .. .. . . . .. .. ... 5.5-9
BCP53T1 ................... 5.1-15 BC847CWT1 ................ 5.1-11 B0438 ........ . .. .. . . .. .. .... 5.5-9
BCP56T1 ................... 5.1-15 BC848ALT1 ................. 5.1-10 B0440 ... .. .. .. . .. .. .. .. .. ... 5.5-9
BCP68T1 ................... 5.1-16 BC848AWTl ................. 5.1-11 B0441 ....................... 5.5-9
BCP69T1 ................... 5.1-16 BC848BLT1 ................. 5.1-10 B0442 .............. . . . . . . . .. 5.5-9
BC107 ...................... 5.1-17 BC848BWT1 ................ 5.1-11 B0677 .............. . .. .. . ... 5.5-9
BC107B ..................... 5.1-17 BC848CLTl ................. 5.1-10 B0677A ...................... 5.5-9
BC109C ..................... 5.1-17 BC848CWT1 ................ 5.1-11 B0678 ........ . .. .. .. . .. .. ... 5.5-9
BCl77B ..................... 5.1-17 BC856ALT1 ................. 5.1-10 B0678A .. .. .. .. . . .. .. .. .. .... 5.5-9
BC182 ....................... 5.1-2 BC856AWT1 ................. 5.1-11 B0679 ... .. .. .. . .. .. . .. .. .... 5.5-9
BC212 ....................... 5.1-2 BC856BLTl ................. 5.1-10 B0679A .................... " 5.5-9
BC237B ...................... 5.1-2 BC856BWT1 ................ 5.1-11 B0680 .................... '" 5.5-9
BC239 ....................... 5.1-3 BC857ALT1 ................. 5.1-11 B0680A .................... " 5.!>-9
BC307B ...................... 5.1-2 BC857AWT1 ................. 5.1-11 B0681 ...................... 5.5-10
BC327 ....................... 5.1-2 BC857BLT1 ................. 5.1-11 B0682 ...................... 5.5-10
BC328 ....................... 5.1-2 BC857BWT1 ................ 5.1-11 B0776 .... . . . . . . . . . . . . . . . . . .. 5.5-9
BC337 ....................... 5.1-2 BC858ALT1 ................. 5.1-11 B0777 .............. . . . . . . . .. 5.5-9
BC338 ....................... 5.1-2 BC858AWT1 ................. 5.1-11 B0778 ..................... " 5.5-9
BC368 ....................... 5.1-4 BC858BLT1 ................. 5.1-11 B0779 ...................... 5.5-10
BC369 ....................... 5.1-4 BC858BWT1 ................ 5.1-11 B0780 ...................... 5.5-10
BC373 ....................... 5.1-4 BC858CLTl ................. 5.1-11 B0787 .... .. .. .. . .. .. .. .. .... 5.5-9
BC489 ....................... 5.1-4 BC858CWT1 ................ 5.1-11 B0788 ........... . .. .. .. .. ... 5.5-9
BC490 ....................... 5.1-4 BOB01C ..................... 5.1-3 B0789 ....................... 5.5-9
BC517 ....................... 5.1-4 BOB02C .. " ................. 5.1-3 B0790 ............... . . . . . . .. 5.5-9
BC546 ....................... 5.1-2 BOB020 ..................... 5.1-3 B0791 ...................... 5.5-10
BC546A ...................... 5.1-2 BOC01D ..................... 5.1-3 B0792 ...................... 5.5-10
BC546B ...................... 5.1-2 BOC020 ..................... 5.1-3 B0801 ....................... 5.5-4
BC547 ....................... 5.1-2 BOC05 ....................... 5.1-5 B0802 ........... . . . . . . . . . . .. 5.5-4
BC547A ...................... 5.1-2 BOV64B ..................... 5.5-6 B0808 ........ . . . . . . . . . . . . . .. 5.5-5
BC547B ...................... 5.1-2 BOV65B ..................... 5.5-6 B0809 ........ . .. .. .. .. .. . ... 5.5-5
BC547C ...................... 5.1-2 BOW42 ...................... 5.5-6 B0810 ....................... 5.5-5
BC548 ....................... 5.1-2 BOW47 ...................... 5.5-6 BFR90 ............. 5.10--16,5.10--19
BC548A ...................... 5.1-2 BOX33B ..................... 5.5-5 BFR92ALT1 ................ 5.10--16
BC548B ...................... 5.1-2 BOX33C ..................... 5.5-6 BFR93ALT1 ................ 5.10--16
BC548C ...................... 5.1-2 BOX34B ..................... 5.5-5 BFR96 ............. 5.10-16,5.10--19
BC549B ...................... 5.1-3 BOX34C ..................... 5.5-6 BFS17LT1 .................. 5.10--16
BC549C ...................... 5.1-3 BOX53B ..................... 5.5-5 BF199 ....................... 5.1-6
BC550B ...................... 5.1-3 BOX53C ..................... 5.5-5 BF224 ....................... 5.1-6
BC550C ...................... 5.1-3 BOX54B ..................... 5.5-5 BF246A ..................... 5.1-20
BC556 ....................... 5.1-2 BOX54C ..................... 5.5-5 BF246B ..................... 5.1-20
BC556B ...................... 5.1-2 B0135 ........ .. .. .. .. .. .. ... 5.5-9 BF393 ....................... 5.1-5
BC557 ....................... 5.1-2 B0136 ....... . . . . . . . . . . . . . . .. 5.5-9 BF420 ....................... 5.1-5
BC557A ...................... 5.1-2 B0137 ........ . . .. .. .. .. .. ... 5.5-9 BF421 ....................... 5.1-5
BC557B ...................... 5.1-2 B0138 .. . . . .. .. .. .. .. .. .. . ... 5.5-9 BF422 ....................... 5.1-5
BC557C ...................... 5.1-2 B0139 ....................... 5.5-9 BF423 ....................... 5.1-5
BC558B ...................... 5.1-2 B0140 ....................... 5.5-9 BF493S ...................... 5.1-5
BC559B ...................... 5.1-3 B0140-10 .................... 5.5-9 BF720T1 .................... 5.1-16
. BC559C ...................... 5.1-3 B0157 ....... . . . . . . . . . . . . . . .. 5.5-8 BF721T1 .................... 5.1-16
BC560B ...................... 5.1-3 B0158 . . . . . . . . . . . . . . . . . . . . . .. 5.5-8 BF844 ....................... 5.1-5
BC560C ...................... 5.1-3 B0159 .......... .. .. .. .. .. ... 5.5-9 BF959 ....................... 5.1-6
BC618 ....................... 5.1-4 B0165 ....................... 5.5-9 BSP16T1 .................... 5.1-16
Universal Cordless Phone Subsystem ICs ................ 4.7--3 Voltage Regulator/Supervisory .......................... 4.2-,.5
Voltage Regulators .................................... 4.9-2
Universal Cordless Telephone Subsystem IC .............. 4.7-4
Universal Cordless Telephone Subsystem IC with Scrambler 4.7-5 w
Universal Microprocessor Power Supply Controllers ....... 4.2-15
Wideband (FM/FSK) IFs ................................ 4.7-2
Universal Motor Speed Controller ....................... 4.3-10
Wideband FM IF Subsystem ............................ 4.7-9
Universal Voltage Mon~or ............................. 4.2-20 Wideband FM IF System ............................... 4.7-8
Wideband Single Conversion Receivers - VHF ............ 4.7-2
v
VCO ................................................ 3.1--39
x
Very High Voltage Single-Ended Controller with XNOR Gates ........................................ 3.1-27
OrK:;hip Power Switch .............................. 4.2-11 XOR Gates .......................................... 3.1-27
VHF Transistors, RF ........................... 5.10-6-5.10-7
Video Amplifiers, RF ................................. 5.10--35
z
VidElo Capture Chip Sets ............................... 4.8--3 Zener Diodes, Axial Leaded for Through-hole
Designs ..................................... 5.2-2,5.2-16
Video Circuits . . . . . . . . . . . .. . . . . . . . . .. . . . . . . . . . . . . . . . . . . 4.8--3
Zener Diodes, Current Regulator .........•............. 5.2--31
Video Circuits - Miscellaneous .......................... 4.8-4 Zener Diodes, Surmetic 30 ............................ 5.2-18
Video Data Converters ................................. 4.8-4 Zener Diodes, Voltage Reference ....................... 5.2--31
Voice Switched Speakerphone Circuit ..... 4.7-25, 4.7-26, 4.7-28 Zener Diodes, Voltage Regulator ...................•... 5.2-16
Voice Switched Speakerphone with I!Processor Interface .. 4.7-27 Zero Voltage Controller ................................. 4.3--3
Voice/Data Communication (Digital Transmission) ........ 4.7-18 Zero Voltage Switch ................................... 4.3-2
For changes to this Information contact Technical Publications at FAX (602) 244-6560
6/1/96
For changes to this Information contact Technical Publications at FAX (602) 244-6560
5/1/96
INTERNATIONAL DISTRIBUTORS
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Introduction
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~ and Programmable
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