Unit-3 3. Bipolar Junction Transistor
Unit-3 3. Bipolar Junction Transistor
Unit-3 3. Bipolar Junction Transistor
Emitter:
Emitter is heavily doped so that it can inject a large number of charge carriers into
the base. The size of the emitter is always greater than the base.
Base:
The middle layer is called base. It is very lightly doped. The base of the transistor
is very thin as compared to emitter and collector.
Collector:
The N-type material is provided negative supply and P-type material is given
positive supply to make the circuit Forward bias.
The N-type material is provided positive supply and P-type material is given
negative supply to make the circuit Reverse bias.
The direction of current indicated in the circuits above, also called as
the Conventional Current, is the movement of hole current which is opposite to
the electron current.
Bipolar junction transistors are classified into two types based on their
construction-
I. NPN transistor
I.NPN transistor:
Construction of NPN:
Fig.-NPN
Symbol-NPN
Electric current always flows from p-region to n-region. In npn transistor, the
electric current is majorly conducted by free electrons.
II.PNP transistor:
Fig.-PNP
The pnp transistor has two p-n junction. One junction is formed between the
emitter and the base. This junction is called emitter-base junction or emitter
junction. The other junction is formed between the base and the collector. This
junction is called collector-base junction or collector junction.
Symbol:
Symbol-PNP
Electric current always flows from p-region to n-region. In pnp transistor, the
electric current is majorly conducted by holes.
3.4 Advantages
There are many advantages of a transistor such as −
I. Active mode
Emitter current : A forward current flows from emitter into base consisting of
electrons and hole current flowing from base to emitter.
Base current : A recombination current flows from the base which in the external
circuit appears as base current supplied by power supply which is exactly equal to
the rate at which charge carriers (holes) are lost in base due to recombination. This
current will be small as base is lightly doped and numbers of charge carriers are
less.
β linearly relates the collector current (IC) to the base current (IB):
α is usually very close to, but less than, 1. That means IC is very close to, but less
than IE in active mode.
Relation between α & β:-
If β is 100, for example, that means α is 0.99. So, if IC is 100mA, for example, then
IE is 101mA
In saturation mode both of the "diodes" in the transistor are forward biased.
In reverse bias condition, no current flows through the device. Hence, no current
flows through the transistor. Therefore, the transistor is in off state and acts like an
open switch.
As in cutoff region, the collector current, emitter current and base currents are nil,
we can write as
The cutoff mode of the transistor is used in switching operation for switch
OFF application.
IV. Reverse active mode:
The reverse active mode is just opposite to the active mode because in this mode of
operation the emitter-base junction is reverse biased while the collector-base
junction is forward biased. Transistor is never operated in reverse active mode.
In transistor electric current is carried by both free electrons and holes. The
direction of holes is assumed as same as the direction of the current.
Collector current-
Ic= αIE+ICO
Exact equation-
Ic= βIB+(1+β)ICO
IE= Ic+IB
Operating point
When a value for the maximum possible collector current is considered, that point
will be present on the Y-axis, which is nothing but the saturation point. As well,
when a value for the maximum possible collector emitter voltage is considered,
that point will be present on the X-axis, which is the cutoff point.
When a line is drawn joining these two points, such a line can be called as Load
line. This line, when drawn over the output characteristic curve, makes contact at
a point called as Operating point.
This operating point is also called as quiescent point or simply Q-point. There
can be many such intersecting points, but the Q-point is selected in such a way
that irrespective of AC signal swing, the transistor remains in active region.
The load line has to be drawn in order to obtain the Q-point. A transistor acts as a
good amplifier when it is in active region and when it is made to operate at Q-
point, faithful amplification is achieved.
Faithful amplification is the process of obtaining complete portions of input
signal by increasing the signal strength. This is done when AC signal is applied at
its input.
DC Load line:
When the transistor is given the bias and no signal is applied at its input, the load
line drawn at such condition can be understood as DC condition. Here there will
be no amplification as the signal is absent. The circuit will be as shown below.
As VCC and RC are fixed values, the above one is a first degree equation and hence
will be a straight line on the output characteristics. This line is called as D.C.
Load line. The figure below shows the DC load line.
To obtain the load line, the two end points of the straight line are to be
determined. Let those two points be A and B.
To obtain A
When collector emitter voltage VCE = 0, the collector current is maximum and is
equal to VCC/RC. This gives the maximum value of VCE. This is shown as
This gives the point A (OA = VCC/RC) on collector current axis, shown in the
above figure.
To obtain B
When the collector current IC = 0, then collector emitter voltage is maximum and
will be equal to the VCC. This gives the maximum value of IC. This is shown as
(As IC = 0)
This gives the point B, which means (OB = VCC) on the collector emitter voltage
axis shown in the above figure.
Hence we got both the saturation and cutoff point determined and learnt that the
load line is a straight line. So, a DC load line can be drawn.
The plot indicates the four regions of operation: the saturation, the cutoff, the
active and the breakdown. Each family of curves is drawn for a different base
current and in this plot IB 4> IB3 >IB2 >IB1
The characteristics of each region of operation are summarized below.
I. Cutoff region:
When the reverse biasing voltage across the collector junction is increased, the
effective base width reduces. This modulation of base width by collector voltage is
called early effect.
In common emitter configuration, base is the input terminal, collector is the output
terminal, and emitter is the common terminal. The emitter terminal is grounded in
the common emitter configuration. So the common emitter configuration is also
known as grounded emitter configuration.
In common base configuration, emitter is the input terminal, collector is the output
terminal, and base is the common terminal. The base terminal is grounded in the
common base configuration. So the common base configuration is also known as
grounded base configuration.
Common Base (CB) Configuration of Transistor
3.12. Photodiode:
A photodiode is a p-n junction device that consumes light energy to generate
electric current. It is also sometimes referred as photo-detector, photo-sensor, or
light detector.
Working of Photodiode
The working principle of a photodiode is, when a photon of ample energy strikes
the diode, it makes a couple of an electron-hole. This mechanism is also called as
the inner photoelectric effect. If the absorption arises in the depletion region
junction, then the carriers are removed from the junction by the inbuilt electric
field of the depletion region. Therefore, holes in the region move toward the anode,
and electrons move toward the cathode, and a photocurrent will be generated.
Modes of Operation
The operating modes of the photodiode include three modes, namely Photovoltaic
mode, Photoconductive mode and avalanche diode mode
Photovoltaic Mode:
This mode is also known as zero bias mode, in which a voltage is produced by the
lightened photodiode. It gives a very small dynamic range & non-linear necessity
of the voltage formed.
Photoconductive Mode:
The photodiode used in this photoconductive mode is more usually reverse biased.
The reverse voltage application will increase the depletion layer‟s width, which in
turn decreases the response time & the junction capacitance. This mode is too
fast and displays electronic noise
Avalanche Diode Mode:
Avalanche diodes operate in a high reverse bias condition, which permits
multiplication of an avalanche breakdown to each photo-produced electron-hole
pair. This outcome in an internal gain in the photodiode, which slowly increases
the device response.
Photodiode symbol:
The arrows striking the diode represent light or photons. A photodiode has two
terminals:
i. cathode and
ii. anode.
Objectives and limitations of photodiode:
High gain
PN junction photodiode
PIN photodiode
Avalanche photodiode
Photodiode applications:
2. Smoke detectors
3. Space applications
Solar Cell converts light energy into the electric energy. A solar cell is basically a
p-n junction diode. It utilizes photovoltaic effect to convert light energy into
electrical energy.
As shown in the given diagram the solar cell is like an ordinary diode. It consists of
silicon, germanium PN junction with a glass windows on the top surface layer of
P-Type, the P-Type material is made very thin and wide so that the incident light
photon may easily reach to PN junction. When light reaches the p-n junction, the
light photons can easily enter in the junction, through very thin p-type layer. The
light energy, in the form of photons, supplies sufficient energy to the junction to
create a number of electron-hole pairs. In this way free electrons and holes are
generated on both sides of the junction. Due to these electrons and holes current
are produces. This current is directly proportional to the illumination‟s and also
depends on the size of the surface area being illuminated.
1. Silicon.
2. GaAs.
3. CdTe.
4. CuInSe2
The capacitance of the MOS capacitor depends upon the voltage applied on the
gate terminal. Usually the body is grounded when the gate voltage is applied.
The flat band voltage is an important term related to the MOS capacitor. It is
defined as the voltage at which there is no charge on the capacitor plates and hence
there is no static electric field across the oxide. An applied positive gate voltage
larger than the flat band voltage (Vgb > Vfb) then positive charge is induced on the
metal (poly silicon) gate and negative charge in the semiconductor. The only
negative charged electrons are available as negative charges and they accumulate
at the surface. This is known as surface accumulation.