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    Transistor: Robert L. Boylestad and Louis Nashelsky

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    Rafael Peluzio
    Capítulo 3 Eletrônica

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Transistor: Robert L. Boylestad and Louis Nashelsky

    Uploaded by

    Rafael Peluzio
    49 views23 pages
    Capítulo 3 Eletrônica

    Original Title

    cap3

    Copyright

    © © All Rights Reserved

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    PDF, TXT or read online from Scribd

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    Capítulo 3 Eletrônica

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    49 views23 pages

    Transistor: Robert L. Boylestad and Louis Nashelsky

    Uploaded by

    Rafael Peluzio
    Capítulo 3 Eletrônica

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 23

    TRANSISTOR

    Copyright ©2002 by Pearson Education, Inc.


    Robert L. Boylestad and Louis Nashelsky
    Upper Saddle River, New Jersey 07458
    Electronic Devices and Circuit Theory, 8e
    All rights reserved.
    TRANSISTOR

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    FIGURE 3-2 Types of transistors: (a) pnp; (b) npn.

    Menos dopada
    Fortemente 1/10
    dopada Dopagem leve

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    FIGURE 3-3 Forward-biased junction of a pnp transistor.
    OPERAÇÃO TRANSISTOR

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    FIGURE 3-4 Reverse-biased junction of a pnp transistor.
    OPERAÇÃO TRANSISTOR

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    FIGURE 3-5 Majority and minority carrier flow of a pnp transistor.
    OPERAÇÃO TRANSISTOR
    FIGURE 3-6 Notation and symbols used with the common-base configuration: (a) pnp transistor; (b) npn transistor.

    Configuração Base-Comum

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    FIGURE 3-7 Input or driving point characteristics for a common-base silicon transistor amplifier.

    Curva característica de entrada

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    FIGURE 3-8 Output or collector characteristics for a common-base transistor amplifier.

    Curva característica de saída


    Curva característica de saída

    Portadores
    majoritários

    Copyright ©2002 by Pearson Education, Inc.


    Upper Saddle River, New Jersey 07458
    All rights reserved.
    Configuração Emissor-Comum

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    Configuração Emissor-Comum
    Curva característica de saída Curva característica de entrada
    Portadores
    majoritários
    Determinação de bCA e bCC a partir das características do coletor
    Curvas características bCA = bCC

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    Relação entre b e a

    𝛽 𝛼
    𝛼= 𝛽=
    𝛽+1 1−𝛼
    FIGURE 3-20 Notation and symbols used with the common-collector configuration: (a) pnp transistor; (b) npn transistor.

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    Coletor comum
    FIGURE 3-22 Defining the linear (undistorted) region of operation for a transistor.

    Limites operação do transistor


    Folhas de dados de um transistor
    Folhas de dados de um transistor

    Robert L. Boylestad and Louis Nashelsky Copyright ©2002 by Pearson Education, Inc.
    Electronic Devices and Circuit Theory, 8e Upper Saddle River, New Jersey 07458
    All rights reserved.
    Transistor specification sheet
    FIGURE 3-27 Checking the forward-biased base-to-
    emitter junction of an npn transistor.

    FIGURE 3-28 Checking the reverse-biased base-to-collector


    junction of an npn transistor.

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