Lecture 3 Introduction To 8086 Assembly Language
Lecture 3 Introduction To 8086 Assembly Language
Lecture 3
Introduction to 8086 Assembly Language
Usama Khalid
Spring - 2021
2
ASCII and Unicode Data
• Many Windows-based applications use the Unicode system to store
alphanumeric data.
• stores each character as 16-bit data
• Codes 0000H–00FFH are the same as standard ASCII code.
• Remaining codes, 0100H–FFFFH, store all special characters from
many character sets.
• Allows software for Windows to be used in many countries around
the world.
• For complete information on Unicode, visit: http://www.unicode.org
3
BCD (Binary-Coded Decimal) Data
• The range of a BCD digit extends from 00002 to 10012, or 0–9 decimal, stored in two
forms:
• Stored in packed form:
• packed BCD data stored as two digits per byte
• used for BCD addition and subtraction in the instruction set of the microprocessor
• Stored in unpacked form:
• unpacked BCD data stored as one digit per byte
• returned from a keypad or keyboard
• If a system requires complex arithmetic, BCD data are seldom used.
• there is no simple and efficient method of performing complex BCD arithmetic
4
Byte-Sized Data (8-bit)
• Stored as unsigned and signed integers.
• Difference in these forms is the weight of the leftmost
bit position.
• value 128 for the unsigned integer
• minus 128 for the signed integer
• In signed integer format, the leftmost bit represents
the sign bit of the number.
• also a weight of minus 128
• Unsigned integers range 00H to FFH (0–255) — [All
positive numbers]
• Signed integers from -128 to + 127
• Positive numbers: 00F to 7F (0 to +127)
• Negative numbers: 80F to FF (-1 to -128)
• All negative numbers are represented in 2’s
Complement.
• Define using the assembler directive define byte, or DB. 5
Word-Sized Data (16-bit)
• A word (16-bits) is formed with two bytes of data.
• The least significant byte always stored in the lowest-numbered memory
location.
• Define using the assembler directive define word, or DW.
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Machine/Assembly Language
• Machine Language
• Set of fundamental instructions the machine can execute
• Expressed as a pattern of 1’s and 0’s
• Assembly Language
• Alphanumeric equivalent of machine language
• Mnemonics more human-oriented than 1’s and 0’s
• Assembler
• Computer program that translates (one-to-one mapping) assembly to
machine language
• Computer’s native language is machine/assembly language
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Why Assembly Language Programming?
• Faster and shorter programs.
• Compilers do not always generate optimum code.
• Instruction set knowledge is important for machine designers.
• Compiler writers must be familiar with details of machine language.
• Small controllers embedded in many products
• Have specialised functions,
• Rely so heavily on input/output functionality,
• HLLs inappropriate for product development.
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Programmer’s Model: Instruction Set
Architecture
• Instruction set: collection of all machine operations
• Programmer sees set of instructions, and machine resources
manipulated by them
• ISA includes
• Instruction set,
• Memory, and
• Programmer-accessible registers.
• Temporary or scratch-pad memory used to implement some
functions is not part of ISA
• Not programmer accessible
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Organization of 8086 Processor
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CPU Registers
• Fourteen 16-bit registers • Segment Registers
• Data Registers • CS (Code Segment)
• AX (Accumulator Register): AH and AL • DS (Data Segment)
• BX (Base Register): BH and BL • SS (Stack Segment)
• CX (Count Register): CH and CL • ES (Extra Segment)
• DX (Data Register): DH and DL • FLAGS Register
• Pointer and Index Registers • Zero flag
• SI (Source Index) • Sign flag
• DI (Destination Index) • Parity flag
• SP (Stack Pointer) • Carry flag
• BP (Base Pointer)
• Overflow flag
• IP (Instruction Pointer)
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Fetch-Execute Process
• Program Counter (PC) or Instruction Pointer
(IP)
• Holds address of next instruction to fetch
• Instruction Register (IR)
• Stores the instruction fetched from memory
• Fetch-Execute process
• Read an instruction from memory addressed by
PC
• Increment program counter
• Execute fetched instruction in IR
• Repeat process
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Assembly Language Syntax
• Program consists of statement per line.
• Each statement is an instruction or assembler directive
• Statement syntax
• Name operation operand(s) comment
• Name field
• Used for instruction labels, procedure names, and variable names
• Assembler translates names into memory addresses
• Names are 1-31 characters including letters, numbers and
• special characters ? . @ _ $ %
• Names may not begin with a digit
• If a period is used, it must be first character
• Case insensitive
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Assembly Language Syntax
• Examples of legal names
• COUNTER1
• @character
• SUM_OF_DIGITS
• $1000
• Done?
• .TEST
• Examples of illegal names
• TWO WORDS
• 2abc
• A45.28
• You&Me
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Assembly Language Syntax
• Operation field • Operand field
• instruction • Specifies data to be acted on
• Symbolic operation code (opcode) • Zero, one, or two operands
• Symbolic opcodes translated into • NOP
machine language opcode • INC AX
• Describes operation’s function; e.g. • ADD AX, 2
MOV, ADD, SUB, INC.
• Assembler directive
• Contains pseudo-operation code
(pseudo-op)
• Not translated into machine code
• Tell the assembler to do something.
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Assembly Language Syntax
• Comment field
• A semicolon marks the beginning of a comment
• A semicolon in beginning of a line makes it all a comment line
• Good programming practice dictates comment on every line
• Examples
• MOV CX, 0 ; move 0 to CX
• Do not say something obvious
• MOV CX, 0 ; CX counts terms, initially 0
• Put instruction in context of program
• ; initialize registers
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Data Representation
• Numbers
• ‘A’ has ASCII code 41H • Carriage Return has ASCII code
• ‘a’ has ASCII code 61H 0DH
• ‘0’ has ASCII code 30H • Back Space has ASCII code 08H
• Line feed has ASCII code 0AH • Horizontal tab has ASCII code 09H
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Data Representation
• The value of the content of registers or memory is dependent on the
programmer.
• Let AL=FFH
• represents the unsigned number 255
• represents the signed number -1 (in 2’s complement)
• Let AH=30H
• represents the decimal number 48
• represents the character ‘0’
• Let BL=80H
• represents the unsigned number +128
• represents the signed number -128
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Variable Declaration
• Each variable has a type and assigned a memory address.
• Data-defining pseudo-ops
• DB — define byte
• DW — define word
• DD — define double word (two consecutive words)
• DQ — define quad word (four consecutive words)
• DT — define ten bytes (five consecutive words)
• Each pseudo-op can be used to define one or more data items of
given type.
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Byte Variables
• Assembler directive format defining a byte variable
• name DB initial value
• a question mark (“?”) place in initial value leaves variable uninitialized
• I DB 4 — define variable I with initial value 4
• J DB ? — Define variable J with uninitialised value
• Name DB “Course” — allocate 6 bytes for Name
• K DB 5, 3, -1 — allocates 3 bytes
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Word Variables
• Assembler directive format defining a word variable
• name DW — initialize value
• I DW 4 • K DW 1ABCH
• J DW -2
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Doubleword Variables
• Assembler directive format defining a word variable
• name DD — initial value
• I DD 1FE2AB20H
• J DD -4
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Named Constants
• EQU pseudo-op used to assign a name to constant.
• Makes assembly language easier to understand.
• No memory allocated for EQU names.
• LF EQU 0AH
• MOV DL, 0AH
• MOV DL, LF
• PROMPT EQU “Type your name”
• MSG DB “Type your name”
• MDG DB PROMPT
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DUP Operator
• Used to define arrays whose elements share common initial value.
• It has the form: repeat_count DUP (value)
• Numbers DB 100 DUP(0)
• Allocates an array of 100 bytes, each initialised to 0.
• Names DW 200 DUP(?)
• Allocates an array of 200 uninitialised words.
• Two equivalent definitions
• Line DB 5, 4, 3 DUP(2, 3 DUP(0), 1)
• Line DB 5, 4, 2, 0, 0, 0, 1, 2, 0, 0, 0, 1, 2, 0, 0, 0, 1
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Instruction Types
• Data transfer instructions
• Transfer information between registers and memory locations or I/O ports.
• MOV, XCHG, LEA, PUSH, POP, PUSHF, POPF, IN, OUT.
• Arithmetic instructions
• Perform arithmetic operations on binary or binary-coded-decimal (BCD)
numbers.
• ADD, SUB, INC, DEC, ADC, SBB, NEG, CMP, MUL, IMUL, DIV, IDIV, CBW, CWD.
• Bit manipulation instructions
• Perform shift, rotate, and logical operations on memory locations and
registers.
• SHL, SHR, SAR, ROL, ROR, RCL, RCR, NOT, AND, OR, XOR, TEST.
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Instruction Types
• Control transfer instructions
• Control sequence of program execution; include jumps and procedure
transfers.
• JMP, JG, JL, JE, JNE, JGE, JLE, JNG, JNL, JC, JS, JA, JB, JAE, JBE, JNB, JNA, JO, JZ,
JNZ, JP, JCXZ, LOOP, LOOPE, LOOPZ, LOOPNE, LOOPNZ, CALL, RET.
• String instructions
• Move, compare, and scan strings of information.
• MOVS, MOVSB, MOVSW, CMPS, CMPSB, CMPSW. SCAS, SCASB, SCASW, LODS,
LODSB, LODSW, STOS, STOSB, STOSW.
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Instruction Types
• Interrupt instructions
• Interrupt processor to service specific condition.
• INT, INTO, IRET.
• Processor control instructions
• Set and clear status flags, and change the processor execution state.
• STC, STD, STI.
• Miscellaneous instructions
• NOP, WAIT.
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General Rules
• Both operands have to be of the same size.
• MOV AX, BL — illegal
• MOV AL, BL — legal
• MOV AH, BL — legal
• Both operands cannot be memory operands simultaneously.
• MOV i, j — illegal
• MOV AL, i — legal
• First operand cannot be an immediate value.
• ADD 2, AX — illegal
• ADD AX, 2 — legal
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Memory Segmentation
• Data Segment
• contains variable definitions
• declared by .DATA
• Stack Segment
• used to store the stack
• declared by .STACK size
• default stack size is 1Kbyte.
• Code Segment
• contains program’s instructions
• declared by .CODE
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Memory Models
• SMALL
• code in one segment & data in one segment
• MEDIUM
• code in more than one segment & data in one segment
• COMPACT
• code in one segment & data in more than one segment
• LARGE
• code in more than one segment & data in more than one segment & no array larger
than 64K bytes
• HUGE
• code in more than one segment & data in more than one segment & arrays may be
larger than 64K bytes
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Program Structure: An Example
TITLE PRGM1 ; add the numbers
.MODEL SMALL
MOV AX, A
.STACK 100H
.DATA ADD AX, B
A DW 2 MOV SUM, AX
B DW 5 ; exit to DOS
SUM DW ?
.CODE MOV AX, 4C00H
MAIN PROC INT 21H
; initialise DS MAIN ENDP
MOV AX, @DATA
MOV DS, AX
END MAIN
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The Programming Model
• 8086/88 architectures considered as program visible.
• Internal registers are used during programming and are specified by the
instructions.
• There are registers which are program invisible, which means;
• not addressable directly during applications programming.
• 80286/88 contain program-invisible registers to control and operate
protected memory, and other features of the microprocessor.
The Programming Model of the 8086/88
• There are fourteen 16-bit general purpose registers;
• AX (8-bit access using AH, AL)
• BX (8-bit access using BH, BL)
• CX (8-bit access using CH, CL)
• DX (8-bit access using DH, DL)
• BP, SP
• SI, DI
• Flags
• IP
• CS, DS, ES, SS
Multipurpose Registers [1/2]
• AX — a 16-bit register (AX), or as either of two 8-bit registers (AH and
AL).
• AX, AH, AL terminologies will be used ahead.
• The accumulator is used for instructions such as multiplication, division, and
some of the adjustment instructions (e.g., Offset Address).
• BX, addressable as BH, BL.
• BX register (Base index) sometimes holds offset address of a location in the
memory system in all versions of the microprocessor.
Multipurpose Registers [2/2]
• CX, addressable as CH, or CL.
• a (Count) general-purpose register that also holds the count for various
instructions
• DX, addressable as DH, or DL.
• a (Data) general-purpose register.
• holds a part of the result from a multiplication or part of dividend before a
division.
Index Registers
• BP — points to a memory (Base Pointer) location for memory data
transfers.
• DI — often addresses (Destination Index) string destination data for
the string instructions.
• SI — the (Source Index) register addresses source string data for the
string instructions.
• similar to DI, SI also functions as a general-purpose register.
Special Purpose Registers
• Include IP, SP, and FLAGS
• IP — addresses the next instruction in a section of memory.
• defined as (Instruction Pointer) a code segment.
• SP — addresses an area of memory called the stack.
• The (Stack Pointer) stores data through this pointer
Flags
• FLAGS — indicate the condition (state) of the microprocessor and control its
operation.
• The rightmost five and the overflow flag are changed by most arithmetic and
logic operations.
• although data transfers do not affect them.
• Flags never change for any data transfer or program control operation.
• Some of the flags are also used to control features found in the microprocessor.
Description of Flag Bits
• Conditional Flags:
• C (Carry) — holds the carry after addition or borrow after subtraction.
• also indicates error conditions.
• P (Parity) — is the count of ones in a number expressed as even or
odd. Logic 0 for odd parity; logic 1 for even parity.
• if a number contains three binary one bits, it has odd parity,
• if a number contains no one bits, it has even parity.
Description of Flag Bits
• A (Auxiliary carry) — holds the carry (half-carry) after addition or the
borrow after subtraction between bit positions 3 and 4 of the result.
Generally used for BCD addition/subtraction.
• Z (Zero) — shows that the result of an arithmetic or logic operation is zero.
• If Z = 1, the result is zero; if Z = 0, the result is not zero.
• S (Sign) — flag holds the arithmetic sign of the result after an arithmetic or
logic instruction executes.
• If S = 1, the sign bit (leftmost bit of a number) is set or negative; if S = 0, the sign bit
is cleared or positive.
• T (Trap) — The trap flag enables trapping through an on-chip debugging
feature.
Description of Flag Bits
• Control Flags:
• I (Interrupt) — controls operation of the INTR (interrupt request) input pin.
• If I = 1, the INTR pin is enabled; if I = 0, the INTR pin is disabled.
• The state of the I flag bit is controlled by the STI (set I flag) and CLI (clear I flag)
instructions.
• D (Direction) — selects increment or decrement mode for the DI and/or SI
registers.
• If D = 1, the registers are automatically decremented; if D = 0, the registers are
automatically incremented.
• The D flag is set with the STD (set direction) and cleared with the CLD (clear
direction) instructions.
• O (Overflow) — occurs when signed numbers are added or subtracted.
• an overflow indicates the result has exceeded the capacity of the machine.
Description of Flag Bits
• Control Flags:
• O (Overflow) — occurs when signed numbers are added or
subtracted.
• an overflow indicates the result has exceeded the capacity of the machine.
• For example, if 7FH (+127) is added—using an 8-bit addition—to 01H (+1), the
result is 80H (–128). This result represents an overflow condition indicated by
the overflow flag for signed addition.
• For unsigned operations, the overflow flag is ignored.
Segment Registers
• Generate memory addresses when combined with other registers in the
microprocessor.
• CS (Code Segment) — segment holds code (programs and procedures) used
by the microprocessor.
• DS (Data Segment) — contains most data used by a program.
• Data are accessed by an offset address or contents of other registers that hold the
offset address.
• ES (Extra Segment) — an additional data segment used by some
instructions to hold destination data.
• SS (Stack Segment) — defines the area of memory used for the stack.
• Stack entry point is determined by the stack segment and stack pointer registers.
• The BP register also addresses data within the stack segment.
Real Mode Memory Addressing
• 8086 and 8088 operate in the real mode memory addressing.
• Real mode operation allows addressing of only the first 1M byte of
memory space.
• the first 1M byte of memory is called the real memory, conventional memory,
or DOS memory system.
• The DOS operating system requires that the microprocessor operates in real
mode. Windows OS doesn’t use the real mode addressing.
Segments and Offsets
• All real mode memory addresses must consist of a segment address
plus an offset address.
• Segment address defines the beginning address of any 64K-byte memory
segment.
• Offset address selects any location within the 64K byte memory segment.
• Figure 2–3 shows how the segment plus offset addressing scheme
selects a memory location.
Point to Remember!!
• Physical Address and Logical Address:
• The physical address is of 20-bit (in case of 8086) that is actually put
on the address lines and decoded by the memory interfacing circuitry.
• The 20-bit can have a range of 00000H to FFFFFH. This is the actual physical
location of memory.
• The offset address is a location with in a 64K-byte. Therefore its range from
0000H to FFFFH.
• The logical address consists of segment address and offset address
[Segment Address : Offset Address].
• Figure 2–3 The real mode
memoryaddressing scheme, using a
segment address plus an offset.
• This shows a memory segment
beginning at 10000H, ending at
location IFFFFH.
• 64K bytes in length
• Also shows how an offset address,
called a displacement, of F000H
selects location 1F000H in the
memory.
• Once the beginning address is known, the ending address is found by
adding FFFFH.
• because a real mode segment of memory is 64K in length.
• The offset address is always added to the segment starting address to
locate the data.
• Segment and offset address is sometimes written as 1000:2000.
• a segment address of 1000H; an offset of 2000H.
Thank You