Lecture-1.

3
COMPUTER HARDWARE COMPONENTS
Following are the computer hardware components:
 ALU
 REGISTERS
 MEMORY

ALU (ARITHMETIC LOGIC UNIT)

 An arithmetic logic unit (ALU) is a combinational digital electronic circuit that
performs arithmetic and bitwise logical operations on integer binary numbers. 
 An ALU is a fundamental building block of many types of computing circuits, including
the central processing unit (CPU) of computers, FPUs, and graphics processing
units (GPUs).
 A single CPU, FPU or GPU may contain multiple ALUs. A floating-point unit (FPU,
colloquially a math coprocessor) is a part of a computer system specially designed to
carry out operations on floating-point numbers
 The inputs to an ALU are the data to be operated on, called  operands, and a code
indicating the operation to be performed; the ALU's output is the result of the performed
operation.
 ALU also exchanges additional information with a status register, which relates to the
result of the current or previous operations.

SIGNALS
 Fig.1.3.1 Basic ALU Design
An ALU has a variety of input and output nets, which are the shared electrical connections used
to convey digital signals between the ALU and external circuitry. When an ALU is operating,
external circuits apply signals to the ALU inputs and, in response, the ALU produces and
conveys signals to external circuitry via its outputs.

DATA
A basic ALU has three parallel data buses consisting of two input operands (A and B) and a
result output (Y). Each data bus is a group of signals that conveys one binary integer number.
Typically, the A, B and Y bus widths (the number of signals comprising each bus) are identical
and match the native word size of the encapsulating CPU (or other processor).

OPCODE
The opcode input is a parallel bus that conveys to the ALU an operation selection code, which is
an enumerated value that specifies the desired arithmetic or logic operation to be performed by
the ALU. The opcode size (its bus width) is related to the number of different operations the
ALU can perform; for example, a four-bit opcode can specify up to sixteen different ALU
operations. Generally, an ALU opcode is not the same as a machine languageopcode, though in
some cases it may be directly encoded as a bit field within a machine language opcode.

STATUS
The status outputs are various individual signals that convey supplemental information about the
result of an ALU operation. These outputs are usually stored in registers so they can be used in
future ALU operations or for controlling conditional branching. The collection of bit registers
that store the status outputs are often treated as a single, multi-bit register, which is referred to as
the "status register" or "condition code register". General-purpose ALUs commonly have status
signals such as:

 Carry-out, which conveys the carry resulting from an addition operation, the borrow

resulting from a subtraction operation, or the overflow bit resulting from a binary shift
operation.
 Zero, which indicates all bits of the Y bus are logic zero.
 Negative, which indicates the result of an arithmetic operation is negative.
 Overflow which indicates the result of an arithmetic operation has exceeded the numeric
range of the Y bus.
 Parity which indicates whether an even or odd number of bits on the Y bus are logic
one.The status input allows additional information to be made available to the ALU when
performing an operation. Typically, this is a "carry-in" bit that is the stored carry-out from a
previous ALU operation.
CIRCUIT OPERATION:
 An ALU is a combinational logic circuit, meaning that its outputs will change
asynchronously in response to input changes.
 In normal operation, stable signals are applied to all of the ALU inputs and, when enough
time (known as the "propagation delay") has passed for the signals to propagate through
the ALU circuitry, the result of the ALU operation appears at the ALU outputs.
  The external circuitry connected to the ALU is responsible for
 ensuring the stability of ALU input signals throughout the operation, and
 for allowing sufficient time for the signals to propagate through the ALU before sampling
the ALU result.
 In general, external circuitry controls an ALU by applying signals to its inputs.
 For example, a CPU begins an ALU addition operation by routing operands from their
sources (which are usually registers) to the ALU's operand inputs, while the control
unit simultaneously applies a value to the ALU's opcode input, configuring it to perform
addition. At the same time, the CPU also routes the ALU result output to a destination
register that will receive the sum. The ALU's input signals, which are held stable until the
next clock, are allowed to propagate through the ALU and to the destination register
while the CPU waits for the next clock. When the next clock arrives, the destination
register stores the ALU result and, since the ALU operation has completed, the ALU
inputs may be set up for the next ALU operation.

FUNCTIONS:
Arithmetic operations

 Add: A and B are summed and the sum appears at Y and carry-out.
 Add with carry: A, B and carry-in are summed and the sum appears at Y and carry-out.
 Subtract: B is subtracted from A (or vice-versa) and the difference appears at Y and
carry-out. For this function, carry-out is effectively a "borrow" indicator. This operation may
also be used to compare the magnitudes of A and B; in such cases the Y output may be
ignored by the processor, which is only interested in the status bits (particularly zero and
negative) that result from the operation.
 Subtract with borrow: B is subtracted from A (or vice-versa) with borrow (carry-in)
and the difference appears at Y and carry-out (borrow out).
 Two's complement (negate): A (or B) is subtracted from zero and the difference appears
at Y.
 Increment: A (or B) is increased by one and the resulting value appears at Y.
 Decrement: A (or B) is decreased by one and the resulting value appears at Y.
 Pass through: all bits of A (or B) appear unmodified at Y. This operation is typically
used to determine the parity of the operand or whether it is zero or negative.

BITWISE LOGICAL OPERATIONS

 AND: The bitwise AND of A and B appears at Y.
 OR: the bitwise OR of A and B appears at Y.
 Exclusive-OR: the bitwise XOR of A and B appears at Y.
 One's complement: all bits of A (or B) are inverted and appear at Y.

BIT SHIFT OPERATIONS

Bit shift examples for an eight-bit ALU

Type Left shift Right shift

Arithmetic

Logical

Rotate

Rotate through
carry

Table 1.3.1 Shift Operations

ALU shift operations cause operand A (or B) to shift left or right (depending on the opcode) and
the shifted operand appears at Y.
 Arithmetic shift: the operand is treated as a two's complement integer, meaning that the
most significant bit is a "sign" bit and is preserved.
 Logical shift: a logic zero is shifted into the operand. This is used to shift unsigned integers.
 Rotate: the operand is treated as a circular buffer of bits so its least and most significant bits
are effectively adjacent.
 Rotate through carry: the carry bit and operand are collectively treated as a circular buffer
of bits.
Although an ALU can be designed to perform complex functions, the resulting higher circuit
complexity, cost, power consumption and larger size makes this impractical in many cases. 
Consequently, ALUs are often limited to simple functions that can be executed at very high
speeds (i.e., very short propagation delays), and the external processor circuitry is responsible for
performing complex functions by orchestrating a sequence of simpler ALU operations.
HOMEWORK (ASSESMENT)
Q1. In an operation performed by the ALU, carry bit is set to 1 if the end carry C 8 is ________.
It is cleared to 0 (zero) if the carry is ______ _______.
A. one,zero
B. zero,one
C. zero,zero
D. one,one
Answer: A
Q2. Processors of all computers, whether micro, mini or mainframe must have
A. ALU
B. Primary Storage
C. Control unit
D. All of above
Answer: B
Q3. A computer has 16 register, an ALU with 32 operations and a shifter with eight operations
all Connected to a common bus system.
(ii) Formulate a control word for a micro operation.
(iii) (ii) Specify the number of pits in each field on the control word and give a general
encoding scheme.
OR
OTHER REFERENCES

• http://www.ddegjust.ac.in/studymaterial/msc-cs/ms-07.pdf
• http://www.svecw.edu.in/Docs%5CITIIBTechIISemLecCOA.pdf
• https://www.geeksforgeeks.org/memory-organisation-in-computer-architecture/
• https://study.com/academy/lesson/arithmetic-logic-unit-alu-definition-design-function.html
• https://www.tutorialspoint.com/computer_logical_organization/cpu_architecture.htm

SUGGESTED BOOK REFERENCES

• J.P. Hayes, “Computer Architecture and Organization”, Third Edition.
• Mano, M., “Computer System Architecture”, Third Edition, Prentice Hall.
• Stallings, W., “Computer Organization and Architecture”, Eighth Edition.

VIDEO REFERENCES
 https://www.youtube.com/watch?v=Z5JC9Ve1sfI
 https://www.youtube.com/watch?v=fpnE6UAfbtU
 https://www.youtube.com/watch?v=WLKGmfiorcQ