Arithmetic logic unit

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Arithmetic Logic Unit schematic symbol

Cascadable 8 Bit ALU Texas Instruments SN74AS888

In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic
and logical operations. The ALU is a fundamental building block of the central
processing unit (CPU) of a computer, and even the simplest microprocessors contain one
for purposes such as maintaining timers. The processors found inside modern CPUs and
graphics processing units (GPUs) accommodate very powerful and very complex ALUs;
a single component may contain a number of ALUs.

Mathematician John von Neumann proposed the ALU concept in 1945, when he wrote a
report on the foundations for a new computer called the EDVAC. Research into ALUs
remains an important part of computer science, falling under Arithmetic and logic
structures in the ACM Computing Classification System.

Contents
[hide]

• 1 Numerical systems
• 2 Practical overview
o 2.1 Simple operations
 o 2.2 Complex operations
o 2.3 Inputs and outputs
o 2.4 ALUs vs. FPUs
• 3 See also
• 4 References

• 5 External links

[edit] Numerical systems

Main article: Signed number representations

An ALU must process numbers using the same format as the rest of the digital circuit.
The format of modern processors is almost always the two's complement binary number
representation. Early computers used a wide variety of number systems, including ones'
complement, two's complement sign-magnitude format, and even true decimal systems,
with ten tubes per digit[disputed – discuss]

ALUs for each one of these numeric systems had different designs, and that influenced
the current preference for two's complement, as this is the representation that makes it
easier for the ALUs to calculate additions and subtractions.[citation needed]

The ones' complement and two's complement number systems allow for subtraction to be
accomplished by adding the negative of a number in a very simple way which negates the
need for specialized circuits to do subtraction; however, calculating the negative in two's
complement requires adding a one to the low order bit and propagating the carry. An
alternative way to do two's complement subtraction of A−B is to present a one to the
carry input of the adder and use ¬B rather than B as the second input.

[edit] Practical overview

Most of a processor's operations are performed by one or more ALUs. An ALU loads
data from input registers, an external Control Unit then tells the ALU what operation to
perform on that data, and then the ALU stores its result into an output register. Other
mechanisms move data between these registers and memory.

[edit] Simple operations

A simple example arithmetic logic unit (2-bit ALU) that does AND, OR, XOR, and
addition

Most ALUs can perform the following operations:

• Integer arithmetic operations (addition, subtraction, and sometimes multiplication

and division, though this is more expensive)
• Bitwise logic operations (AND, NOT, OR, XOR)
• Bit-shifting operations (shifting or rotating a word by a specified number of bits
to the left or right, with or without sign extension). Shifts can be interpreted as
multiplications by 2 and divisions by 2.

[edit] Complex operations

This section's tone or style may not be appropriate for Wikipedia. Specific
concerns may be found on the talk page. See Wikipedia's guide to writing better
articles for suggestions. (January 2011)

Engineers can design an Arithmetic Logic Unit to calculate any operation. The more
complex the operation, the more expensive the ALU is, the more space it uses in the
processor, the more power it dissipates. Therefore, engineers compromise. They make the
ALU powerful enough to make the processor fast, but yet not so complex as to become
prohibitive. For example, computing the square root of a number might use:

1. Calculation in a single clock Design an extraordinarily complex ALU that

calculates the square root of any number in a single step.
2. Calculation pipeline Design a very complex ALU that calculates the square root
of any number in several steps. The intermediate results go through a series of
circuits arranged like a factory production line. The ALU can accept new numbers
to calculate even before having finished the previous ones. The ALU can now
produce numbers as fast as a single-clock ALU, although the results start to flow
out of the ALU only after an initial delay.
 3. interactive calculation Design a complex ALU that calculates the square root
through several steps. This usually relies on control from a complex control unit
with built-in microcode.
4. Co-processor Design a simple ALU in the processor, and sell a separate
specialized and costly processor that the customer can install just beside this one,
and implements one of the options above.
5. Software libraries Tell the programmers that there is no co-processor and there is
no emulation, so they will have to write their own algorithms to calculate square
roots by software.
6. Software emulation Emulate the existence of the co-processor, that is, whenever
a program attempts to perform the square root calculation, make the processor
check if there is a co-processor present and use it if there is one; if there isn't one,
interrupt the processing of the program and invoke the operating system to
perform the square root calculation through some software algorithm.

The options above go from the fastest and most expensive one to the slowest and least
expensive one. Therefore, while even the simplest computer can calculate the most
complicated formula, the simplest computers will usually take a long time doing that
because of the several steps for calculating the formula.

Powerful processors like the Intel Core and AMD64 implement option #1 for several
simple operations, #2 for the most common complex operations and #3 for the extremely
complex operations.

[edit] Inputs and outputs

The inputs to the ALU are the data to be operated on (called operands) and a code from
the control unit indicating which operation to perform. Its output is the result of the
computation.

In many designs the ALU also takes or generates as inputs or outputs a set of condition
codes from or to a status register. These codes are used to indicate cases such as carry-in
or carry-out, overflow, divide-by-zero, etc.

[edit] ALUs vs. FPUs

A Floating Point Unit also performs arithmetic operations between two values, but they
do so for numbers in floating point representation, which is much more complicated than
the two's complement representation used in a typical ALU. In order to do these
calculations, a FPU has several complex circuits built-in, including some internal ALUs.

In modern practice, engineers typically refer to the ALU as the circuit that performs
integer arithmetic operations (like two's complement and BCD). Circuits that calculate
more complex formats like floating point, complex numbers, etc. usually receive a more
specific name such as FPU.
[edit] See also
• 7400 series
• 74181
• adder (electronics)
• multiplication ALU
• digital circuit
• division (electronics)
• Control Unit

[edit] References
• Hwang, Enoch (2006). Digital Logic and Microprocessor Design with VHDL.
Thomson. ISBN 0-534-46593-5. http://faculty.lasierra.edu/~ehwang/digitaldesign.
• Stallings, William (2006). Computer Organization & Architecture: Designing for
Performance 7th ed. Pearson Prentice Hall. ISBN 0-13-185644-8.
http://williamstallings.com/COA/COA7e.html.

[edit] External links

• A Simulator of Complex ALU in MATLAB
• An ALU implemented in Minecraft

[hide]v · d · eCPU technologies

ISA : CISC · EDGE · EPIC · MISC · OISC · RISC · VLIW ·

NISC · ZISC · Harvard architecture · von Neumann
Architecture architecture · 4-bit · 8-bit · 12-bit · 16-bit · 18-bit · 24-bit · 31-
bit · 32-bit · 36-bit · 48-bit · 64-bit · 128-bit · Comparison of
CPU architectures

Instruction pipelining · In-order & out-of-

Pipelineorder execution · Register renaming ·
Speculative execution · Hazards

LevelBit · Instruction · Superscalar · Data · Task

Parallelism
Multithreading · Simultaneous
Threadsmultithreading · Hyperthreading ·
Superthreading

Flynn's taxonomySISD · SIMD · MISD · MIMD

Types Digital signal processor · Microcontroller · System-on-a-chip ·

 Vector processor

Arithmetic logic unit (ALU) · Barrel shifter · Floating-point

unit (FPU) · Back-side bus · Multiplexer · Demultiplexer ·
Components Registers · Memory management unit (MMU) · Translation
lookaside buffer (TLB) · Cache · Register file · Microcode ·
Control unit · Clock rate

Power APM · ACPI · Dynamic frequency scaling · Dynamic voltage

management scaling · Clock gating

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Contents
[hide]

• 1 Summary
o 1.1 EN
o 1.2 ES
o 1.3 ET

• 2 Licensing

[edit] Summary
Description
English: A simple example arithmetic logic unit (ALU) that does AND,
OR, XOR, and addition.
Date 16 November 2006
Source English: Own work created with Eagle by Cadsoft
Author en:User:Cburnett
Permission See below.
(Reusing this
file)

[edit] EN

This ALU is a 2-bit ALU with two inputs (operands) named A and B: A[0] & B[0] are
the least-significant bits and A[1] & B[1] are the most-significant bits.

Each bit of this ALU is identical with the exception of the handling of the carry bit. The
handling of one bit is explained below.

The A & B inputs lead into the four gates on the left (from top to bottom): XOR, AND,
OR, and XOR. The top three gates perform XOR, AND, and OR operations on A & B.
The last gate is the initial gate into a full adder.

The final step to each bit is the multiplexer at the end. The 3-bit OP input (from the
control unit) determines which of the functions is outputted:

• OP = 000 → XOR
• OP = 001 → AND
• OP = 010 → OR
 • OP = 011 → Addition

Clearly, the last four inputs of the multiplexer are free for other functions (subtraction,
multiplication, division, NOT A, NOT B, etc.). Although OP[2] is not currently used
(though it is included and connected), it will be needed in order to use more than the 4
operations listed above.

The carry in and carry out, called flags, are typically connected to some form of a status
register.

[edit] ES

Esta ALU es una ALU de 2-bits con dos entradas (operandos) llamadas A y B: A[0] y
B[0] corresponden al bit menos significativo y A[1] y B[1] corresponden al bit más
significativo.

Cada bit de esta ALU es idéntico con la excepción del direccionamiento del bit del
acarreo. El manejo de este bit es explicado más adelante.

Las entradas A y B van hacia las cuatro puertas de la izquierda (de arriba a abajo): XOR,
AND, OR, y XOR. Las tres primeras puertas realizan las operaciones XOR, AND, y OR
sobre los datos A y B. La última puerta es la puerta inicial de un sumador completo.

El paso final de las operaciones sobre cada bit es la multiplexación de los datos. La
entrada OP de 3-bits (desde la unidad de control) determina cual de las funciones se van a
realizar:

• OP = 000 → XOR
• OP = 001 → AND
• OP = 010 → OR
• OP = 011 → Adición

Claramente se ve que las otras cuatro entradas del multiplexor están libres para otras
operaciones (sustracción, multiplicación, división, NOT A, NOT B, etc.). Aunque OP[2]
actualmente no es usada en este montaje (a pesar de estar incluída y conectada), ésta sería
usada en el momento de realizar otras operaciones además de las 4 operaciones listadas
arriba.

Los datos de acarreo de entrada y acarreo de salida, llamados flags (banderas), son
típicamente conectados a algún tipo de registro de estado.

[edit] ET

See ALU on 2-bitine ALU, millel on 2 sisendit A ja B: A[0] & B[0] on vähima kaaluga
bitt ja A[1] & B[1] suurima kaaluga bit. Iga ALU bitt peale ülekandebiti on identsed.
A & B sisendid ühendavad 4 elementi vasakul (ülevalt alla): XOR, AND, OR, ja XOR. 3
ülemist elementi teostavad XOR, AND ja OR operatsioone A & B peal. Viimane element
on algne element summatorile.

Iga biti viimane samm on multiplekser lõpus. 3-bitine OP sisend (kontrollblokist)määrab,

milline funktsioon läheb väljundisse :

• OP = 000 → XOR
• OP = 001 → AND
• OP = 010 → OR
• OP = 011 → Liitmine

Multiplekseri 4 viimast sisendit on vabad muude operatsioonide jaoks (lahutamine,

korrutamine, jagamine, NOT A, NOT B, jne). Kuigi OP[2] ei kasutata (kuigi see on
ühendatud ja skeemis olemas) läheb seda vaja täiendavate funktsioonide kasutamiseks
kui eelpool ära toodud.

Ülekandebitid on tüüpiliselt ühendatud mingisuguse olekuregistriga.

[edit] Licensing

I, the copyright holder of this work, hereby publish it under the following license:

Permission is granted to copy, distribute and/or modify this document under

the terms of the GNU Free Documentation License, Version 1.2 or any
later version published by the Free Software Foundation; with no Invariant
Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the
license is included in the section entitled GNU Free Documentation License.
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s

(The C input was not

curren 2,042×2,16 Cburne
13:55, 5 January 2007 connected to OP[2] on
t 6 (51 KB) tt
the top multiplexer)

({{Information |
Description='''en:''' An
simple example
arithmetic logic unit
(ALU) that does AND,
OR, XOR, and
05:42, 17 November 2,045×2,16 Cburne addition. |Source=Own
2006 6 (46 KB) tt work created with
Eagle by Cadsoft |
Date=November 16,
2006 |
Author=en:User:Cburn
ett |Permission=GFDL
|other_v)

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• Arithmetic logic unit