Lab 4: Design and Analysis of BJT Biasing and Amplifier Circuit

Micro-electronics Devices and Circuits Lab.
(EET-2131)
Lab 4: Design and analysis of BJT
Biasing and Amplifier circuit.
Department of Electronics & Communication Engineering

Siksha 'O' Anusandhan University, Bhubaneswar
Branch: ECE/EE/EEE Section: Sub-group Number:

Sl. No. Name Registration No. Signature
1.
Lab Partners
2.
3.
4.
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I. Objectives
 Design a voltage divider biased circuit for CE amplifier having a DC emitter current IE=1mA
using a power supply VCC= +12 V.
 Perform AC analysis on the circuit to estimate the amplifier parameters. (Use Cin = 10μF,
Cout = 0.1μF, Cb = 100 μF, Rsig = 50Ω)
 Plot the frequency response curve by representing the voltage gain in dB.
 Determine the upper and lower 3-dB frequencies and bandwidth of CE BJT Amplifiers.
II. Pre-Lab
THEORY:
Figure -1 shows CE BJT amplifier circuit with coupling and by-pass capacitor. Voltage divider
Network is used for biasing the amplifier circuit.
Fig.1. The common-emitter BJT amplifier.
DC Analysis:
Figure 2.(a) and (b) shows the most commonly used voltage divider biasing in discrete-circuit
transistor amplifier and Thevenin equivalent circuit respectively. Emitter resistor RE in the circuit
provides stabilization.
Fig.2.Voltage Divider biasing for BJTs
Microelectronic Devices & Circuits Lab. Lab.: 4

2
To make IE insensitive to temperature and β variation, the design circuit must satisfy the following
two constraints:
𝑉𝐵𝐵 ≫ 𝑉𝐵𝐸
𝑅𝐸 ≫ 𝑅𝐵/(𝛽 + 1)
To satisfy the above constraints, as a rule of thumb, one designs for VBB about 1/3 VCC, VCB (or
VCE) about 1/3 VCC and ICRC about 1/3 VCC .Typically one selects R1 and R2 such that their current
(IR) is in the range of IE to 0.1IE.
AC Analysis:
 Draw the small signal equivalent circuit shown in Fig.3.
Fig. 3. The hybrid π model of CE amplifier with voltage divider bias
Small signal parameters: 𝑔𝑚 = 𝐼𝐶 / VT , 𝑟𝜋 = 𝛽/𝑔𝑚
𝑅 𝑟
𝑔 𝑅
𝑅 𝑅 𝑟
𝑅 𝑅 𝑟
𝑅 𝑅
Frequency response:
Emitter resistance is used to provide stability. To compensate effect of emitter resistance emitter
bypass capacitor is used which provides AC ground to the emitter. This will increase gain of
amplifier. CE amplifier does not provide constant voltage gain at all frequencies. At low frequency
reactance of capacitor is high, hence emitter bypass capacitor does not provide a perfect AC
ground (Emitter impedance is high) and also there is voltage drop across coupling capacitors
because of high reactance at low frequencies. Thus amplifier gain reduces at low frequency.
Similarly Gain of CE amplifier also reduces at very high frequency because of internal
capacitances.
Figure-4 shows the gain frequency response curve for CE amplifier. The low-frequency response
is determined by the input and output coupling capacitors and the emitter bypass capacitor. The
overall low-frequency response is determined by the combination of three high-pass filter
networks due to the three capacitors. The lower cutoff frequency is the highest of these three.

3
The high-frequency response is determined by a combination of internal transistor capacitances

and stray capacitances from the circuit wiring.
Fig 4. Frequency response curve
a) Mid-band:
 The frequency range of interest for amplifiers.

 Large capacitors can be treated as short circuit and small capacitors can be
treated as open circuit.
 Gain is constant and can be obtained by small-signal analysis
b) Low-frequency band:
 Gain drops at frequencies lower than f L .

 Large capacitors can no longer be treated as short circuit.
 The gain roll-off is mainly due to coupling and by-pass capacitors.
c) High-frequency band:
 Gain drops at frequencies higher than f H .

 Small capacitors can no longer treat as open circuit.
 The gain roll-off is mainly due to parasitic capacitances of the BJT.
III. DESIGN CALCULATION AND OBSERVATION
DC Analysis:
 Calculate resistors value for biasing circuit (RE,RC,R1and R2). Mantain the table-1 .
 Draw the designed voltage divider biased circuit (Fig.2.)
AC Analysis:
 Draw the small signal ac equivalent circuit for calculation of amplifier parameters (Av, Rout
and Rin).

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IV. Lab Component
EQUIPMENTS/ COMPONENTS REQUIRED:
Sl. No. Items Required Specification Quantity

1. Universal Trainer Kit ------------------- 1 No.
2. Multimeter Digital 1 No.
3. CRO 30 MHz 1 No.
4. Function Generator 2 MHz 1 No.
5. Transistor 2N3904 1 No.
6. Resistors According to the design.
7. Capacitors According to the design.
8. CRO Probe 1:1 BNC – Crocodile 3 Nos.
9. Connecting wires 23 SWG As required
10. Potentiometer 0-10kΩ 1 No.
V. Procedure:
1. Issue all the components/equipment as per your design.

2. Check all the required designed resistors values.
3. Implement the designed biased circuit i.e Fig.2 on the bread board to measure IC and VC.
Calculate small signal model parameters gm and 𝑟 by taking observed β (IC/IB).Maintain the
table-2.
4. Calculate all amplifier parameters (AV, Rout and Rin). Maintain the table-3.
5. Connect the circuit as shown in circuit diagram (Fig.1).
6. Apply the input of 20mV peak-to-peak and 1 KHz frequency using function Generator.
7. Now, connect the scope probe to the amplifier input and calculate the voltage gain, υout / υin .
8. For plotting the frequency response, the input voltage is kept Constant at 20mV peak-to-peak
and the frequency is varied from 50Hz to 1GHz using function generator.
9. Note down the value of output voltage for each frequency and calculate the corresponding
voltage gain by using the expression, Av= (Vout/Vin).
10. All the readings are tabulated (table-4) and voltage gain in dB is calculated by Using The
expression Av (dB)= 20 log10 (Vout/Vin) .
11. A graph is drawn by taking frequency on x-axis and gain in dB on y-axis on Semi-log graph.
12. The band width of the amplifier is calculated from the graph Using the expression, Bandwidth,
BW= f H  f L
Where f L lower cut-off frequency of CE amplifier, and
Where f H upper cut-off frequency of CE amplifier
Maintain the table-5.

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VI. Observations:
Table 1:
Sl. No. Components Designed Value
1. RE
2. RC
3. R1
4. R2
Table-2:
Sl. Components Observed/Calculated Value
No.
1. IC
2 IB
3. Vc
4. 
5. gm
6. 𝑟
Table -3:
Sl. No. Amplifier Calculated Values
Parameters
1. Av
2. Rin
3. Ro
Table -4:
Sl. Input signal Output Voltage Voltage Gain Voltage Gain in dB =
No. Frequency in Hz (Vo) in volt (Av)=Vo/Vi 20log10(Vo/Vi)
1. 50
2. 60
3. 70
4. 80
5. 90
6. 100
7. 200
8. 300
9. 400

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10. 500
11. 600
12. 700
13. 800
14. 900
15. 1000
16. 2000
17. 3000
18. 4000
19. 5000
20. 6000
21. 7000
22. 8000
23.
Table -5:
Sl. No. Parameter Practical Value
1. Max. Absolute Gain

2. Max. Gain in dB
3. 3dB Gain
4. Lower Cutoff Frequency
5. Upper Cutoff Frequency
6. Bandwidth
VII. PRECAUTIONS:
 Avoid loose connection / improper wire connections.

 Follow lab safety rules.
VIII. Discussions
Answer the following questions in your own words.

1. What could be reason(s) for the difference in theoretical gain and the gain obtained from
the designed circuit?
2. Mention the requirement of input and output capacitors in the design of the amplifier
circuits.
3. Why the amplifier (CE) provides a phase reversal?
4. In the dc equivalent circuit of an amplifier, how are capacitors treated?
5. What is the effect of bypass capacitor on frequency response?
6. Define lower and upper cutoff frequencies for an amplifier.
7. State the reason for fall in gain at low and high frequencies.

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Micro-electronics Devices and Circuits Lab.

Department of Electronics & Communication Engineering

Branch: ECE/EE/EEE Section: Sub-group Number:

Fig.1. The common-emitter BJT amplifier.

Fig.2.Voltage Divider biasing for BJTs

Microelectronic Devices & Circuits Lab. Lab.: 4

 Draw the small signal equivalent circuit shown in Fig.3.

Fig. 3. The hybrid π model of CE amplifier with voltage divider bias

Small signal parameters: 𝑔𝑚 = 𝐼𝐶 / VT , 𝑟𝜋 = 𝛽/𝑔𝑚

Microelectronic Devices & Circuits Lab. Lab.: 4

The high-frequency response is determined by a combination of internal transistor capacitances

Fig 4. Frequency response curve

 The frequency range of interest for amplifiers.

 Gain drops at frequencies lower than f L .

 Gain drops at frequencies higher than f H .

III. DESIGN CALCULATION AND OBSERVATION

Microelectronic Devices & Circuits Lab. Lab.: 4

IV. Lab Component

EQUIPMENTS/ COMPONENTS REQUIRED:

Sl. No. Items Required Specification Quantity

1. Issue all the components/equipment as per your design.

Microelectronic Devices & Circuits Lab. Lab.: 4

Microelectronic Devices & Circuits Lab. Lab.: 4

1. Max. Absolute Gain

 Avoid loose connection / improper wire connections.

Answer the following questions in your own words.

Microelectronic Devices & Circuits Lab. Lab.: 4

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