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CA Chap1 Introduction NLT2021

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Computer Architecture

Ngo Lam Trung


Department of Computer Engineering
School of Information and Communication Technology (SoICT)
Hanoi University of Science and Technology
E-mail: trungnl@soict.hust.edu.vn

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Course administration
❑ Instructor: Ngo Lam Trung
803 B1, SoICT, HUST
❑ Text: [Required] Computer Organization and
Design, 5th edition revised printing
Patterson & Hennessy 2014.
[Optional] Computer Organization and
Architecture, 10th Edition, William Stalling
❑ Slides: pdf
❑ Schedule: as in timetable

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Course content
❑ Chapter 1: Introduction
❑ Chapter 2: Instruction Set Architecture
❑ Chapter 3: Computer Arithmetic
❑ Chapter 4: CPU
❑ Chapter 5: Memory
❑ Chapter 6: I/O system
❑ Chapter 7: Multicores and multiprocessors

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Computers are so important
❑ Current modern life
l Modern automobiles
l Cellphones
l WWW
l Search engines

❑ Future
l Tailored medical care based on individual genome
l Super-human: transfer human’s brain (14 billion of neural) to a
mechanical body (robot) for interstellar traveling

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Outcomes from this course
❑ Understanding of how high level language programs (C,
Java…) translate into computer language programs, and
how hardware execute the latter programs.
❑ Hardware/software interface, and how software instruct
hardware to perform functions.
❑ The factors that determine computer performance.
❑ What techniques can be used to improve computer
performance.
❑ Why computer moves from sequential to parallel
processing.

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Prerequisites - What You Should Already Knew

❑ What is computer
❑ Look and feel of computer
l How computer parts look like?

❑ Basic logic design


l Combinational, sequential circuit design

❑ Create, compile, and run C/C++ programs

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Chapter 1: Introduction

1. Computer Abstraction and Technology


2. Performance Evaluation

[with materials from Computer Organization and Design, 5th Edition,


Patterson & Hennessy, ©2014, MK
CO&ISA, NLT 2021 and M.J. Irwin’s presentation, PSU 2008] 8
1. Computer Abstraction and Technology
❑ What is a computer?
❑ Computer classification
❑ Computer generations
❑ The key of computer evolution: IC making technology
❑ Computer organization

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1. Computer Abstraction and Technology
❑ What is a computer?
❑ A machine that
l Accepts input data
l Processes data by executing a stored program
l Produces output

❑ Which one is computer?

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Classes of Computers
❑ Supercomputers
l Super fast + expensive for high-end applications

❑ Server
l Network based
l High capacity, performance, reliability
l Range from small servers to building sized

❑ Desktop computers
l General purpose, variety of software
l Subject to cost/performance tradeoff

❑ Embedded computers
l Hidden as components of systems
l Stringent power/performance/cost constraints

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Dominant look and feel of computer classes

Embedded

PC

Server
Super computer
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Price/performance of computer classes

Super $Millions
Mainframe
$100s Ks
Server $10s Ks
Differences in scale,
not in substance Workstation $1000s

Personal $100s

Embedded $10s

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Post-PC era
❑ PDA, smart phone, tablet…
❑ Smart TV, set top box…

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Eight important ideas

Design for Simplification Make common Performance


Moore’s law via abstraction cases fast via Parallelism

Performance Performance Memory Dependability


via Pipelining via Prediction hierarchy via
redundancy
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What’s below your program?
❑ High-level language program (in C)
swap (int v[], int k)
{ int temp;
temp = v[k];
v[k] = v[k+1]; one-to-many
v[k+1] = temp;
C compiler
}

❑ Assembly language program (for MIPS CPU)


swap: sll $2, $5, 2
add $2, $4, $2
lw $15, 0($2)
lw $16, 4($2) one-to-one
sw $16, 0($2)
sw $15, 4($2)
assembler
jr $31

❑ Machine (object, binary) code (for MIPS CPU)


000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
. . .
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Levels of Program Code

❑ High-level language
l Level of abstraction closer to
problem domain
l Provides for productivity and
portability

❑ Assembly language
l Textual representation of
instructions

❑ Hardware representation
l Binary digits (bits)
l Encoded instructions and
data
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Hardware/software interface: below your program

❑ Application software
l Written in high-level language (HLL)

❑ System software
l Compiler: translates HLL code to
machine code
l Operating System: service code
- Handling input/output
- Managing memory and storage
- Scheduling tasks & sharing resources

❑ Hardware
l Processor, memory, I/O controllers

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Computer Organization
❑ Computer’s basic operation
l Input data
l Process data by executing stored program
l Output data

❑ What are required components of computer?


l For data input:
l For storing information:
l For program execution and data processing:
l For data output:

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Computer Organization
❑ Five classic components of a computer – input, output,
memory, datapath, and control

❑ datapath +
control =
processor
(CPU)

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A similar view
❑ Usually, the Link unit is hidden

Memory

Control Input

Processor Link Input/Output

Datapath Output

CPU To/from network I/O

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Opening the box: anatomy of computer

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Opening the box: anatomy of computer

The story of each component


worth a separate course!

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Inside the Processor (CPU)

❑ Datapath: performs operations on data


❑ Control: sequences datapath, memory, ...
❑ Cache memory
l Small fast SRAM memory for immediate access to data

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Inside the Processor

◼ AMD Barcelona: 4 processor cores

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AMD’s Barcelona Multicore Chip
❑ Four out-of-
order cores
on one chip

512KB L2
512KB L2
2MB shared L3 Cache

Core 1 Core 2 ❑ 1.9 GHz


clock rate
❑ 65nm
technology
Northbridge
❑ Three levels
512KB L2
512KB L2
of caches
(L1, L2, L3)
Core 3 Core 4 on chip
❑ Integrated
Northbridge
CO&ISA, NLT 2021 http://www.techwarelabs.com/reviews/processors/barcelona/ 26
Key to computer evolution: IC making technology

The chip manufacturing process

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Video: How an IC is made

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Moore’s Law

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How do we benefit from this? 29
Key to computer evolution: IC making technology

❑ Electronics technology continues to evolve


l Increased capacity and performance
l Reduced cost

Year Technology Relative performance/cost


1951 Vacuum tube 1
1965 Transistor 35
1975 Integrated circuit (IC) 900
1995 Very large scale IC (VLSI) 2,400,000
2005 Ultra large scale IC 6,200,000,000

[Textbook]
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2. Computer performance evaluation
❑ To maximize performance, need to minimize execution
time

performanceX = 1 / execution_timeX

If computer X is n times faster than Y, then

performanceX execution_timeY
-------------------- = --------------------- = n
performanceY execution_timeX

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Relative Performance Example
❑ If computer A runs a program in 10 seconds and
computer B runs the same program in 15 seconds, how
much faster is A than B?
We know that A is n times faster than B if

performanceA execution_timeB
-------------------- = --------------------- = n
performanceB execution_timeA

The performance ratio is 15


------ = 1.5
10

So A is 1.5 times faster than B

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Performance Factors
❑ CPU execution time (CPU time) – time the CPU spends
working on a task
Does not include time waiting for I/O or running other programs

CPU execution time # CPU clock cycles


= x clock cycle time
for a program for a program

= #-------------------------------------------
CPU clock cycles for a program
clock rate

❑ Can improve performance by reducing either the length


of the clock cycle or the number of clock cycles required
for a program
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Review: Machine Clock Rate

❑ Clock rate (clock cycles per second in MHz or GHz) is


inverse of clock cycle time (clock period)
CC = 1 / CR

one clock period

10 nsec clock cycle => 100 MHz clock rate


5 nsec clock cycle => 200 MHz clock rate
2 nsec clock cycle => 500 MHz clock rate
1 nsec (10-9) clock cycle => 1 GHz (109) clock rate
500 psec clock cycle => 2 GHz clock rate
250 psec clock cycle => 4 GHz clock rate
200 psec clock cycle => 5 GHz clock rate

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Improving Performance Example
❑ A program runs on computer A with a 2 GHz clock in 10
seconds. What clock rate must computer B run at to run
this program in 6 seconds? Assume that, computer B
will require 1.2 times as many clock cycles as computer
A to run the program.
CPU timeA = -------------------------------
CPU clock cyclesA
clock rateA
CPU clock cyclesA = 10 sec x 2 x 109 cycles/sec
= 20 x 109 cycles
1.2 x 20 x 109 cycles
CPU timeB = -------------------------------
clock rateB
1.2 x 20 x 109 cycles = 4 GHz
clock rateB = -------------------------------
6 seconds
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Clock Cycles per Instruction
❑ Not all instructions take the same amount of time to
execute
l Average execution time ~ average clock cycles per instruction

# CPU clock cycles # Instructions Average clock cycles


= x
for a program for a program per instruction

❑ Clock cycles per instruction (CPI) – the average number of


clock cycles each instruction takes to execute
A way to compare two different implementations of the same ISA

CPI for this instruction class


A B C
CPI 1 2 3
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Using the Performance Equation
❑ Computers A and B implement the same ISA. Computer
A has a clock cycle time of 250 ps and an effective CPI of
2.0 for some program and computer B has a clock cycle
time of 500 ps and an effective CPI of 1.2 for the same
program. Which computer is faster and by how much?
Each computer executes the same number of
instructions, I, so
CPU timeA = I x 2.0 x 250 ps = 500 x I ps
CPU timeB = I x 1.2 x 500 ps = 600 x I ps

Clearly, A is faster … by the ratio of execution times

performanceA execution_timeB 600 x I ps


------------------- = --------------------- = ---------------- = 1.2
performanceB execution_timeA 500 x I ps

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The Performance Equation
❑ Our basic performance equation is then calculated

CPU time = Instruction_count x CPI x clock_cycle

Instruction_count x CPI
= -----------------------------------------------
clock_rate

❑ Key factors that affect performance (CPU execution time)


The clock rate: CPU specification
CPI: varies by instruction type and ISA implementation
Instruction count: measure by using profilers/ simulators

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Dynamic Instruction Count

How many Each “for” consists of two


instructions are instructions: increment index,
executed in this check exit condition
program fragment? 12,422,450 Instructions
250 instructions
for i = 1, 100 do 2 + 20 + 124,200 instructions
20 instructions 100 iterations
for j = 1, 100 do 12,422,200 instructions in all
40 instructions 2 + 40 + 1200 instructions
for k = 1, 100 do 100 iterations
10 instructions 124,200 instructions in all
endfor 2 + 10 instructions
endfor 100 iterations for i = 1, n
endfor 1200 instructions in while x > 0
Static count = 326 all

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Improving performance by CPI
Op Freq CPIi Freq x CPIi
ALU 50% 1
Load 20% 5
Store 10% 3
Branch 20% 2

𝐴𝑣𝑔 𝐶𝑃𝐼 = ෍ 𝑓𝑟𝑒𝑞𝑖 ∗ 𝐶𝑃𝐼𝑖 =

❑ How much faster would the machine be if a better data cache


reduced the average load time to 2 cycles?

❑ What if branch instruction is only one cycle?

❑ What if two ALU instructions could be executed at once?

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How to improve performance?
❑ Shorter clock cycle = faster clock rate
→ latest CPU technology
❑ Smaller CPI
→ optimizing Instruction Set Architecture
❑ Smaller instruction count
→ optimizing algorithm and compiler
❑ To get best performance, multiple criteria are combined
and considered at design time
→ specific CPU for specific class computation problem

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Faster Clock  Shorter Running Time

Suppose addition takes 1 ns


Clock period = 1 ns; 1 cycle
Clock period = ½ ns; 2 cycles Solution
1 GHz

4 steps

20 steps

2 GHz In this example, addition time


does not improve in going from
1 GHz to 2 GHz clock

Faster steps do not necessarily mean


shorter travel time.

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