Precision Quad Operational Amplifiers

TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS

SLOS093C – OCTOBER 1987 – REVISED MAY 1999
D Trimmed Offset Voltage: D, J, N, OR PW PACKAGE

(TOP VIEW)
TLC27M9 . . . 900 µV Max at TA = 25°C,
VDD = 5 V
1OUT 1 14 4OUT
D Input Offset Voltage Drift . . . Typically 1IN – 2 13 4IN –
0.1 µV/Month, Including the First 30 Days 1IN + 3 12 4IN +
D Wide Range of Supply Voltages Over VDD 4 11 GND
Specified Temperature Range: 2IN + 5 10 3IN +
0°C to 70°C . . . 3 V to 16 V 2IN – 6 9 3IN –
– 40°C to 85°C . . . 4 V to 16 V 2OUT 7 8 3OUT
– 55°C to 125°C . . . 4 V to 16 V
D Single-Supply Operation FK PACKAGE
D Common-Mode Input Voltage Range
(TOP VIEW)
1OUT
4OUT
1IN –
4IN –
Extends Below the Negative Rail (C-Suffix,
NC
I-Suffix Types)
D Low Noise . . . Typically 32 nV/√Hz
3 2 1 20 19
at f = 1 kHz 1IN + 4 18 4IN +
D Low Power . . . Typically 2.1 mW at NC 5 17 NC
TA = 25°C, VDD = 5 V VDD 6 16 GND
D Output Voltage Range Includes Negative NC 7 15 NC
3IN +
2IN + 8 14
Rail 9 10 11 12 13
D High Input Impedance . . . 1012 Ω Typ
2IN –
3IN –
2OUT
NC
3OUT
D ESD-Protection Circuitry
D Small-Outline Package Option Also
Available in Tape and Reel NC – No internal connection
D Designed-In Latch-Up Immunity

DISTRIBUTION OF TLC27M9
INPUT OFFSET VOLTAGE
description 40
The TLC27M4 and TLC27M9 quad operational 301 Units Tested From 2 Wafer Lots
35 VDD = 5 V
amplifiers combine a wide range of input offset
TA = 25°C
voltage grades with low offset voltage drift, high 30 N Package
Percentage of Units – %
input impedance, low noise, and speeds

comparable to that of general-purpose bipolar 25
devices.These devices use Texas Instruments
silicon-gate LinCMOS technology, which 20
provides offset voltage stability far exceeding the
stability available with conventional metal-gate 15
processes.
10
The extremely high input impedance, low bias
currents, make these cost-effective devices ideal 5
for applications that have previously been
reserved for general-purpose bipolar products, 0
– 1200 – 600 0 600 1200
but with only a fraction of the power consumption.
VIO – Input Offset Voltage – µV
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Copyright  1998, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

description (continued)
Four offset voltage grades are available (C-suffix and I-suffix types), ranging from the low-cost TLC27M4 (10
mV) to the high-precision TLC27M9 (900 µV). These advantages, in combination with good common-mode
rejection and supply voltage rejection, make these devices a good choice for new state-of-the-art designs as
well as for upgrading existing designs.
In general, many features associated with bipolar technology are available on LinCMOS operational
amplifiers, without the power penalties of bipolar technology. General applications such as transducer
interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the
TLC27M4 and TLC27M9. The devices also exhibit low voltage single-supply operation, and low power
consumption, making them ideally suited for remote and inaccessible battery-powered applications. The
common-mode input voltage range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density
system applications.
The device inputs and outputs are designed to withstand – 100-mA surge currents without sustaining latch-up.
The TLC27M4 and TLC27M9 incorporate internal ESD-protection circuits that prevent functional failures at
voltages up to 2000 V as tested under MIL-STD-883C, Method 3015; however, care should be exercised in
handling these devices, as exposure to ESD may result in the degradation of the device parametric
performance.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of – 55°C to 125°C.
AVAILABLE OPTIONS
PACKAGE
CHIP
VIOmax SMALL CHIP CERAMIC PLASTIC
TA TSSOP FORM
AT 25°C OUTLINE CARRIER DIP DIP
(PW) (Y)
(D) (FK) (J) (N)
900 µV TLC27M9CD — — TLC27M9CN — —
2 mV TLC27M4BCD — — TLC27M4BCN — —
0°C to 70°C
5 mV TLC27M4ACD — — TLC27M4ACN — —
10 mV TLC27M4CD — — TLC27M4CN TLC27M4CPW TLC27M4Y
900 µV TLC27M9ID — — TLC27M9IN — —
2 mV TLC27M4BID — — TLC27M4BIN — —
– 40°C to 85°C
5 mV TLC27M4AID — — TLC27M4AIN — —
10 mV TLC27M4ID — — TLC27M4IN TLC27M41PW —
900 µV TLC27M9MD TLC27M9MFK TLC27M9MJ TLC27M9MN — —
– 55°C to 125°C
10 mV TLC27M4MD TLC27M4MFK TLC27M4MJ TLC27M4MN — —
The D and PW package is available taped and reeled. Add R suffix to the device type (e.g., TLC279CDR).
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

equivalent schematic (each amplifier)

VDD
P3 P4
R6
R1 R2 N5
IN –
P5 P6
P1 P2
IN + C1
R5
OUT
N3
N1 N2 N4 N6 N7
R3 D1 R4 D2 R7
GND

TLC27M4Y chip information

This chip, when properly assembled, displays characteristics similar to the TLC27M4C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS

VDD
(14) (13) (12) (11) (10) (9) (8) (4)
(3)
1IN + + (1)
(2) 1OUT
1IN – –
(5)
+ 2IN +
(7)
2OUT (6)
– 2IN –
68 (10)
3IN + + (8)
(9) 3OUT
3IN – –
(12)
+ 4IN +
(14)
4OUT (13)
– 4IN –
(11)
(1) (2) (3) (4) (5) (6) (7)
GND
108
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ± 10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VDD
Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VDD
Input current, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
Output current, lO (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 mA
Total current into VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA
Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 mA
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN –.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C TA = 125°C

PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING
D 950 mW 7.6 mW/°C 608 mW 494 mW —
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
N 1575 mW 12.6 mW/°C 1008 mW 819 mW —
PW 700 mW 5.6 mW/°C 448 mW — —
recommended operating conditions

C SUFFIX I SUFFIX M SUFFIX
UNIT
MIN MAX MIN MAX MIN MAX
Supply voltage, VDD 3 16 4 16 4 16 V
VDD = 5 V – 0.2 3.5 – 0.2 3.5 0 3.5
Common mode input voltage,
Common-mode voltage VIC V
VDD = 10 V – 0.2 8.5 – 0.2 8.5 0 8.5
Operating free-air temperature, TA 0 70 – 40 85 – 55 125 °C

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

TLC27M4C
TLC27M4AC
PARAMETER TEST CONDITIONS TA† TLC27M4BC UNIT
TLC27M9C
MIN TYP MAX
VO = 1.4 V,, VIC = 0,, 25°C 1.1 10
TLC27M4C
RS = 50 Ω, RL = 100 kΩ Full range 12
mV
VO = 1.4 V,, VIC = 0,, 25°C 0.9 5
TLC27M4AC
RS = 50 Ω, RL = 100 kΩ Full range 6.5
VIO Input offset voltage
VO = 1.4 V,, VIC = 0,, 25°C 250 2000
TLC274BC
µV
VO = 1.4 V,, VIC = 0,, 25°C 210 900
TLC279C
Average temperature coefficient of input 25°C to
αVIO 1.7 µV/°C
offset voltage 70°C
25°C 0.1
IIO Input offset current (see Note 4) VO = 2
2.5
5VV, VIC = 2
2.5
5V pA
70°C 7 300
25°C 0.6
IIB Input bias current (see Note 4) VO = 2 5V
2.5 V, VIC = 2 5V
2.5 pA
70°C 40 600
– 0.2 – 0.3
25°C to to V
Common-mode input voltage
g range
g 4 4.2
VICR
(see Note 5) – 0.2
Full range to V
3.5
25°C 3.2 3.9
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ 0°C 3 3.9 V
70°C 3 4
25°C 0 50
VOL Low-level output voltage VID = – 100 mV, IOL = 0 0°C 0 50 mV
70°C 0 50
25°C 25 170
Large-signal
L i l diff
differential
ti l
AVD VO = 0.25 V to 2 V, RL = 100 kΩ 0°C 15 200 V/mV
voltage amplification
am lification
70°C 15 140
25°C 65 91
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 91 dB
70°C 60 92
25°C 70 93
Supply-voltage
S l lt rejection
j ti ratio
ti
kSVR VDD = 5 V to 10 V, VO = 1.4 V 0°C 60 92 dB
(∆VDD /∆VIO)
70°C 60 94
25°C 420 1120
2 5 V,
VO = 2.5 V VIC = 2.5
2 5 V,
V
IDD Supply current (four amplifiers) 0°C 500 1280 µA
No load
70°C 340 880
† Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.


TLC27M4C
TLC27M4AC
PARAMETER TEST CONDITIONS TA† TLC27M4BC UNIT
TLC27M9C
MIN TYP MAX
VO = 1.4 V,, VIC = 0,, 25°C 1.1 10
TLC27M4C
mV
VO = 1.4 V,, VIC = 0,, 25°C 0.9 5
TLC27M4AC
VO = 1.4 V,, VIC = 0,, 25°C 260 2000
TLC27M4BC
µV
VO = 1.4 V,, VIC = 0,, 25°C 220 1200
TLC27M9C
αVIO 2.1 µV/°C
25°C 0.1
IIO Input offset current (see Note 4) VO = 5 V,
V VIC = 5 V pA
70°C 7 300
25°C 0.7
IIB Input bias current (see Note 4) VO = 5 V,
V VIC = 5 V pA
70°C 50 600
– 0.2 – 0.3
25°C to to V
g range
g 9 9.2
VICR
(see Note 5) – 0.2
Full range to V
8.5
25°C 8 8.7
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ 0°C 7.8 8.7 V
70°C 7.8 8.7
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 0°C 0 50 mV
70°C 0 50
25°C 25 275
Large-signal
L i l diff
differential
ti l
AVD VO = 1 V to 6 V, RL = 100 kΩ 0°C 15 320 V/mV
am lification
70°C 15 230
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 94 dB
70°C 60 94
25°C 70 93
Supply-voltage
S l lt rejection
j ti ratio
ti
kSVR VDD = 5 V to 10 V, VO = 1.4 V 0°C 60 92 dB
(∆VDD /∆VIO)
70°C 60 94
25°C 570 1200
VO = 5 V,
V VIC = 5 V,
V
IDD Supply current (four amplifiers) 0°C 690 1600 µA
No load
70°C 440 1120
† Full range is 0°C to 70°C.


TLC27M4I
TLC27M4AI
PARAMETER TEST CONDITIONS TA† TLC27M4BI UNIT
TLC27M9I
MIN TYP MAX
VO = 1.4 V,, VIC = 0,, 25°C 1.1 10
TLC27M4I
mV
VO = 1.4 V,, VIC = 0,, 25°C 0.9 5
TLC27M4AI
VO = 1.4 V,, VIC = 0,, 25°C 250 2000
TLC27M4BI
µV
VO = 1.4 V,, VIC = 0,, 25°C 210 900
TLC27M9I
αVIO 1.7 µV/°C
25°C 0.1
2.5
5VV, VIC = 2
2.5
5V pA
85°C 24 1000
25°C 0.6
2.5 V, VIC = 2 5V
2.5 pA
85°C 200 2000
– 0.2 – 0.3
25°C to to V
g range
g 4 4.2
VICR
(see Note 5) – 0.2
Full range to V
3.5
25°C 3.2 3.9
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ – 40°C 3 3.9 V
85°C 3 4
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 – 40°C 0 50 mV
85°C 0 50
25°C 25 170
Large-signal
L i l diff
differential
ti l
AVD VO = 0.25 V to 2 V, RL = 100 kΩ – 40°C 15 270 V/mV
am lification
85°C 15 130
25°C 65 91
CMRR Common-mode rejection ratio VIC = VICRmin – 40°C 60 90 dB
85°C 60 90
25°C 70 93
Supply-voltage
S l lt rejection
j ti ratio
ti
kSVR VDD = 5 V to 10 V, VO = 1.4 V – 40°C 60 91 dB
(∆VDD /∆VIO)
85°C 60 94
25°C 420 1120
2 5 V,
VO = 2.5 V VIC = 2.5
2 5 V,
V
IDD Supply current (four amplifiers) – 40°C 630 1600 µA
No load
85°C 320 800
† Full range is – 40°C to 85°C.


TLC27M4I
TLC27M4AI
PARAMETER TEST CONDITIONS TA† TLC27M4BI UNIT
TLC27M9I
MIN TYP MAX
VO = 1.4 V,, VIC = 0,, 25°C 1.1 10
TLC27M4I
mV
VO = 1.4 V,, VIC = 0,, 25°C 0.9 5
TLC27M4AI
VO = 1.4 V,, VIC = 0,, 25°C 260 2000
TLC27M4BI
µV
VO = 1.4 V,, VIC = 0,, 25°C 220 1200
TLC27M9I
αVIO 2.1 µV/°C
25°C 0.1
V VIC = 5 V pA
85°C 26 1000
25°C 0.7
V VIC = 5 V pA
85°C 220 2000
– 0.2 – 0.3
25°C to to V
Common-mode input 9 9.2
VICR
voltage range (see Note 5) – 0.2
Full range to V
8.5
25°C 8 8.7
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ – 40°C 7.8 8.7 V
85°C 7.8 8.7
25°C 0 50
VOL Low-level output voltage VID = – 100 mV, IOL = 0 – 40°C 0 50 mV
85°C 0 50
25°C 25 275
Large-signal
L i l diff
differential
ti l
AVD VO = 1 V to 6 V, RL = 100 kΩ – 40°C 15 390 V/mV
am lification
85°C 15 220
25°C 65 94
85°C 60 94
25°C 70 93
Supply-voltage
S l lt rejection
j ti ratio
ti
(∆VDD /∆VIO)
85°C 60 94
25°C 570 1200
V
VO = 5 V, VIC = 5 V,
V
No load
85°C 410 1040


TLC27M4M
PARAMETER TEST CONDITIONS TA† TLC27M9M UNIT
MIN TYP MAX
VO = 1.4 V,, VIC = 0,, 25°C 1.1 10
TLC27M4M mV
VO = 1.4 V,, VIC = 0,, 25°C 210 900
TLC27M9M µV
αVIO 1.7 µV/°C
25°C 0.1 pA
2.5
5VV, VIC = 2
2.5
5V
125°C 1.4 15 nA
25°C 0.6 pA
2.5 V, VIC = 2 5V
2.5
125°C 9 35 nA
0 – 0.3
25°C to to V
g range
g 4 4.2
VICR
(see Note 5) 0
Full range to V
3.5
25°C 3.2 3.9
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ – 55°C 3 3.9 V
125°C 3 4
25°C 0 50
125°C 0 50
25°C 25 170
Large-signal
Large signal differential
AVD VO = 0.25 V to 2 V, RL = 100 kΩ – 55°C 15 290 V/mV
am lification
125°C 15 120
25°C 65 91
125°C 60 91
25°C 70 93
Supply-voltage
Supply voltage rejection ratio
(∆VDD /∆VIO)
125°C 60 94
25°C 420 1120
VO = 2.5
2 5 V,
V VIC = 2
2.5
5VV,
No load
125°C 280 720


TLC27M4M
PARAMETER TEST CONDITIONS TA† TLC27M9M UNIT
MIN TYP MAX
VO = 1.4 V,, VIC = 0,, 25°C 1.1 10
TLC27M4M mV
VO = 1.4 V,, VIC = 0,, 25°C 220 1200
TLC27M9M µV
αVIO 2.1 µV/°C
25°C 0.1 pA
V VIC = 5 V
125°C 1.8 15 nA
25°C 0.7 pA
V VIC = 5 V
125°C 10 35 nA
0 – 0.3
25°C to to V
g range
g 9 9.2
VICR
(see Note 5) 0
Full range to V
8.5
25°C 8 8.7
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ – 55°C 7.8 8.6 V
125°C 7.8 8.8
25°C 0 50
125°C 0 50
25°C 25 275
L i l diff
Large-signal ti l
differential
AVD VO = 1 V to 6 V, RL = 100 kΩ – 55°C 15 420 V/mV
am lification
125°C 15 190
25°C 65 94
125°C 60 93
25°C 70 93
Supply-voltage
S l lt rejection
j ti ratio
ti
(∆VDD /∆VIO)
125°C 60 94
25°C 570 1200
VO = 5 V,
V VIC = 5 V,
V
No load
125°C 360 960

electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)

TLC27M4Y
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
VO = 1.4 V,, VIC = 0,,
VIO Input offset voltage 11
1.1 10 mV
RS = 50 Ω, RL = 100 kΩ
αVIO Temperature coefficient of input offset voltage TA = 25°C to 70°C 1.7 µV/°C
IIO Input offset current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.1 pA
IIB Input bias current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.6 pA
– 0.2 – 0.3
VICR Common-mode input voltage range (see Note 5) to to V
4 4.2
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ 3.2 3.9 V
VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV
AVD Large-signal differential voltage amplification VO = 0.25 V to 2 V, RL= 100 kΩ 25 170 V/mV
CMRR Common-mode rejection ratio VIC = VICRmin 65 91 dB
kSVR Supply-voltage rejection ratio (∆VDD /∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 70 93 dB
VO = 2.5 V, VIC = 2.5 V,
IDD Supply current (four amplifiers) 420 1120 µA
No load
electrical characteristics, VDD = 10 V, TA = 25°C (unless otherwise noted)

TLC27M4Y
MIN TYP MAX
VO = 1.4 V,, VIC = 0,,
VIO Input offset voltage 11
1.1 10 mV
RS = 50 Ω, RL = 100 kΩ
αVIO Temperature coefficient of input offset voltage TA = 25°C to 70°C 2.1 µV/°C
IIO Input offset current (see Note 4) VO = 5 V, VIC = 5 V 0.1 pA
IIB Input bias current (see Note 4) VO = 5 V, VIC = 5 V 0.7 pA
– 0.2 – 0.3
VICR Common-mode input voltage range (see Note 5) to to V
9 9.2
VOH High-level output voltage VID = 100 mV, RL = 100 kΩ 8 8.7 V
VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV
AVD Large-signal differential voltage amplification VO = 1 V to 6 V, RL = 100 kΩ 25 275 V/mV
CMRR Common-mode rejection ratio VIC = VICRmin 65 94 dB
kSVR Supply-voltage rejection ratio (∆VDD /∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 70 93 dB
VO = 5 V, VIC = 5 V,
IDD Supply current (four amplifiers) 570 1200 µA
No load

operating characteristics at specified free-air temperature, VDD = 5 V

TLC27M4C
TLC27M4AC
PARAMETER TEST CONDITIONS TA TLC27M4BC UNIT
TLC27M9C
MIN TYP MAX
25°C 0.43
VIPP = 1 V 0°C 0.46
RL = 100 Ω, 70°C 0.36
SR Slew rate at unity gain CL = 20 pF
pF, V/µs
See Figure 1 25°C 0.40
VIPP = 2.5 V 0°C 0.43
70°C 0.34
f = 1 kHz, RS = 20 Ω
Vn Equivalent input noise voltage 25°C 32 nV/√Hz
See Figure 2
25°C 55
VO = VOH, CL = 20 pF,
F
BOM Maximum output-swing bandwidth 0°C 60 kHz
RL = 100 kΩ
kΩ, See Figure 1
70°C 50
25°C 525
VI = 10 mV,
V CL = 20 pF,
F
B1 Unity-gain bandwidth 0°C 610 kHz
See Figure 3
70°C 400
25°C 40°
VI = 10 mV,
V f = B1,
φm Phase margin 0°C 41°
CL = 20 pF
F, See Figure 3
70°C 39°

TLC27M4C
TLC27M4AC
PARAMETER TEST CONDITIONS TA TLC27M4BC UNIT
TLC27M9C
MIN TYP MAX
25°C 0.62
VIPP = 1 V 0°C 0.67
RL = 100 Ω, 70°C 0.51
pF, V/µs
VIPP = 5.5 V 0°C 0.61
70°C 0.46
f = 1 kHz, RS = 20 Ω,
See Figure 2
25°C 35
F
BOM Maximum output-swing bandwidth 0°C 40 kHz
RL = 100 kΩ
kΩ, See Figure 1
70°C 30
25°C 635
VI = 10 mV,
V CL = 20 pF,
F
B1 Unity-gain bandwidth 0°C 710 kHz
See Figure 3
70°C 510
25°C 43°
VI = 10 mV,
V f = B1,
φm Phase margin 0°C 44°
CL = 20 pF
F, See Figure 3
70°C 42°


TLC27M4I
TLC27M4AI
PARAMETER TEST CONDITIONS TA TLC27M4BI UNIT
TLC27M9I
MIN TYP MAX
25°C 0.43
VIPP = 1 V – 40°C 0.51
RL = 100 Ω, 85°C 0.35
pF, V/µs
VIPP = 2.5 V – 40°C 0.48
85°C 0.32
f = 1 kHz, RS = 20 Ω,
See Figure 2
25°C 55
F
BOM Maximum output-swing bandwidth – 40°C 75 kHz
RL = 100 kΩ
kΩ, See Figure 1
85°C 45
25°C 525
V
VI = 10 mV, CL = 20 pF,
F
B1 Unity-gain bandwidth – 40°C 770 kHz
See Figure 3
85°C 370
25°C 40°
V
VI = 10 mV, f = B1,
φm Phase margin – 40°C 43°
CL = 20 pF
F, See Figure 3
85°C 38°

TLC27M4I
TLC27M4AI
PARAMETER TEST CONDITIONS TA TLC27M4BI UNIT
TLC27M9I
MIN TYP MAX
25°C 0.62
VIPP = 1 V – 40°C 0.77
RL = 100 Ω, 85°C 0.47
pF, V/µs
VIPP = 5.5 V – 40°C 0.70
85°C 0.44
f = 1 kHz, RS = 20 Ω,
See Figure 2
25°C 35
F
RL = 100 kΩ
kΩ, See Figure 1
85°C 25
25°C 635
V
VI = 10 mV,
B1 Unity-gain bandwidth CL = 20 pF, – 40°C 880 kHz
See Figure 3
85°C 480
25°C 43°
V
VI = 10 mV, f = B1,
CL = 20 pF
F, See Figure 3
85°C 41°


TLC27M4M
PARAMETER TEST CONDITIONS TA TLC27M9M UNIT
MIN TYP MAX
25°C 0.43
VIPP = 1 V – 55°C 0.54
RL = 100 Ω, 125°C 0.29
pF, V/µs
VIPP = 2.5 V – 55°C 0.50
125°C 0.28
f = 1 kHz, RS = 20 Ω,
See Figure 2
25°C 55
F
RL = 100 kΩ
kΩ, See Figure 1
125°C 40
25°C 525
V
VI = 10 mV, CL = 20 pF,
F
See Figure 3
125°C 330
25°C 40°
V
VI = 10 mV, f = B1,
CL = 20 pF
F, See Figure 3
125°C 36°

TLC27M4M
PARAMETER TEST CONDITIONS TA TLC27M9M UNIT
MIN TYP MAX
25°C 0.62
VIPP = 1 V – 55°C 0.81
RL = 100 Ω, 125°C 0.38
pF, V/µs
VIPP = 5.5 V – 55°C 0.73
125°C 0.35
f = 1 kHz, RS = 20 Ω,
See Figure 2
25°C 35
F
RL = 100 kΩ
kΩ, See Figure 1
125°C 20
25°C 635
VI = 10 mV,
V CL = 20 pF,
F
See Figure 3
125°C 440
25°C 43°
VI = 10 mV,
V f = B1,
CL = 20 pF
F, See Figure 3
125°C 39°

operating characteristics, VDD = 5 V, TA = 25°C

TLC27M4Y
MIN TYP MAX
RL = 100 kΩ, VIPP = 1 V 0.43
pF, V/µs
See Figure 1 VIPP = 2.5 V 0.40
f = 1 kHz, RS = 20 Ω,
Vn Equivalent input noise voltage 32 nV/√Hz
See Figure 2
BOM Maximum output-swing bandwidth 55 kHz
RL = 100 kΩ, See Figure 1
VI = 10 mV, CL = 20 pF,
B1 Unity-gain bandwidth 525 kHz
See Figure 3
VI = 10 mV, f = B1,
φm Phase margin 40°
CL = 20 pF, See Figure 3
operating characteristics, VDD = 10 V, TA = 25°C

TLC27M4Y
MIN TYP MAX
RL = 100 kΩ, VIPP = 1 V 0.62
pF, V/µs
See Figure 1 VIPP = 5.5 V 0.56
f = 1 kHz, RS = 20 Ω,
Vn Equivalent input noise voltage 32 nV/√Hz
See Figure 2
BOM Maximum output-swing bandwidth 35 kHz
RL = 100 kΩ, See Figure 1
VI = 10 mV, CL = 20 pF,
B1 Unity-gain bandwidth 635 kHz
See Figure 3
VI = 10 mV, f = B1,
φm Phase margin 43°
CL = 20 pF, See Figure 3

PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits

Because the TLC27M4 and TLC27M9 are optimized for single-supply operation, circuit configurations used for
the various tests often present some inconvenience since the input signal, in many cases, must be offset from
ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to
the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either
circuit gives the same result.
VDD VDD+
– –
VO VO
+ +
VI VI
CL RL CL RL
VDD –
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 1. Unity-Gain Amplifier
2 kΩ 2 kΩ
VDD VDD+
20 Ω – –
1/2 VDD VO VO
+ +
20 Ω
20 Ω 20 Ω
VDD –
Figure 2. Noise-Test Circuit
10 kΩ
10 kΩ
VDD+
VDD 100 Ω
VI –
100 Ω
VI
– VO
+
VO
+
1/2 VDD CL
CL
VDD –
Figure 3. Gain-of-100 Inverting Amplifier

input bias current

Because of the high input impedance of the TLC27M4 and TLC27M9 operational amplifiers, attempts to
measure the input bias current can result in erroneous readings. The bias current at normal room ambient
temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two
suggestions are offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between
the device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using
a picoammeter) with no device in the test socket. The actual input bias current can then be calculated
by subtracting the open-socket leakage readings from the readings obtained with a device in the test
socket.
One word of caution—many automatic testers as well as some bench-top operational amplifier testers use the
servo-loop technique with a resistor in series with the device input to measure the input bias current; the voltage
drop across the series resistor is measured and the bias current is calculated. This method requires that a device
be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not feasible
using this method.
7 1
V = VIC
8 14
Figure 4. Isolation Metal Around Device Inputs

(J and N packages)
low-level output voltage

To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise
results in the device low-level output being dependent on both the common-mode input voltage level as well
as the differential input voltage level. When attempting to correlate low-level output readings with those quoted
in the electrical specifications, these two conditions should be observed. If conditions other than these are to
be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.

input offset voltage temperature coefficient

Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these
measurements be performed at temperatures above freezing to minimize error.
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
generally measured by monitoring the distortion level of the output, while increasing the frequency of a
sinusoidal input signal until the maximum frequency is found above which the output contains significant
distortion. The full-peak response is defined as the maximum output frequency, without regard to distortion,
above which full peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified
in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained
(Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
(a) f = 1 kHz (b) 1 kHz < f < BOM (c) f = BOM (d) f > BOM
Figure 5. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,
short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET
devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more
pronounced with reduced supply levels and lower temperatures.

TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage Distribution 6, 7
αVIO Temperature coefficient of input offset voltage Distribution 8, 9
vs High-level output current 10, 11
VOH High level output voltage
High-level vs Supply voltage 12
vs Free-air temperature 13
vs Common-mode input voltage 14, 15
vs Differential input voltage
g 16
VOL Low level output voltage
Low-level
vs Low-level output current 18, 19
vs Su
Supply
ly voltage 20
AVD Differential voltage
g amplification vs Free-air temperature 21
vs Frequency 32, 33
IIB Input bias current vs Free-air temperature 22
IIO Input offset current vs Free-air temperature 22
VIC Common-mode input voltage vs Supply voltage 23
vs Supply
y voltage
g 24
IDD Supply current
vs Supply
y voltage
g 26
SR Slew rate
Normalized slew rate vs Free-air temperature 28
VO(PP) Maximum peak-to-peak output voltage vs Frequency 29
B1 Unity gain bandwidth
Unity-gain
vs Supply voltage 31
Phase shift vs Frequency 32, 33
vs Su
Supply
ly voltage 34
φm Phase margin
g vs Free-air temperature 35
vs Load capacitance 36
Vn Equivalent input noise voltage vs Frequency 37

DISTRIBUTION OF TLC27M4 DISTRIBUTION OF TLC27M4

INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE
60 60
612 Amplifiers Tested From 6 Wafer Lots 612 Amplifiers Tested From 4 Wafer Lots
VDD = 5 V VDD = 10 V
50 TA = 25°C 50 TA = 25°C
N Package N Package
40 40
30 30
20 20
10 10
0 0
–5 –4 –3 –2 –1 0 1 2 3 4 5 –5 –4 –3 –2 –1 0 1 2 3 4 5
VIO – Input Offset Voltage – mV VIO – Input Offset Voltage – mV
Figure 6 Figure 7
DISTRIBUTION OF TLC27M4 AND TLC27M9 DISTRIBUTION OF TLC27M4 AND TLC27M9

INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT TEMPERATURE COEFFICIENT
60 60
224 Amplifiers Tested From 6 Wafer Lots 224 Amplifiers Tested From 6 Wafer Lots
VDD = 5 V VDD = 10 V
50 TA = 25°C to 125°C 50 TA = 25°C to 125°C
N Package N Package
Outliers: Outliers:
(1) 33.0 µV/C (1) 34.6 µV/°C

40 40
30 30
20 20
10 10
0 0
– 10 – 8 – 6 – 4 – 2 0 2 4 6 8 10 – 10 – 8 – 6 – 4 – 2 0 2 4 6 8 10
αVIO – Temperature Coefficient – µV/°C αVIO – Temperature Coefficient – µV/°C
Figure 8 Figure 9

TYPICAL CHARACTERISTICS†
HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE

vs vs
HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT
5 16
VID = 100 mV VID = 100 mV
TA = 25°C 14 TA = 25°C
VOH – High-Level Output Voltage – V

4 VDD = 16 V
12
VDD = 5 V
10
3
VDD = 4 V
8
VDD = 10 V
2 VDD = 3 V
6
4
1
2
0 0
0 –2 –4 –6 –8 – 10 0 – 5 – 10 – 15 – 20 – 25 – 30 – 35 – 40
IOH – High-Level Output Current – mA IOH – High-Level Output Current – mA
Figure 10 Figure 11
HIGH-LEVEL OUTPUT VOLTAGE

HIGH-LEVEL OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
16
VDD – 1.6
VID = 100 mV IOH = – 5 mA
14
RL = 100 kΩ VDD – 1.7 VID = 100 mA
TA = 25°C VDD = 5 V
12
VDD – 1.8
10
VDD – 1.9
8
VDD – 2
VDD = 10 V
6
VDD – 2.1
4
VDD – 2.2
2
VDD – 2.3
0
0 2 4 6 8 10 12 14 16 VDD – 2.4
– 75 – 50 – 25 0 25 50 75 100 125
VDD – Supply Voltage – V
TA – Free-Air Temperature – °C
Figure 12 Figure 13
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE

vs vs
COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE
700 500
VDD = 5 V
650 VDD = 10 V
IOL = 5 mA
VOL – Low-Level Output Voltage – mV

IOL = 5 mA
TA = 25°C 450
TA = 25°C
600
550
400
VID = – 100 mV
500 VID = – 100 mV
VID = – 1 V
350
450 VID = – 2.5 V
400
VID = – 1 V 300
350
300 250
0 0.5 1 1.5 2 2.5 3 3.5 4 0 1 2 3 4 5 6 7 8 9 10
VIC – Common-Mode Input Voltage – V VIC – Common-Mode Input Voltage – V
Figure 14 Figure 15

vs vs
DIFFERENTIAL INPUT VOLTAGE FREE-AIR TEMPERATURE
800 900
IOL = 5 mA IOL = 5 mA
800 VID = – 1 V
700 VIC = |VID/2|

VIC = 0.5 V
TA = 25°C 700
600
600 VDD = 5 V
500
VDD = 5 V 500
400
400
VDD = 10 V
300
300
VDD = 10 V
200 200
100 100
0 0
0 –1 –2 –3 –4 –5 –6 –7 –8 – 9 – 10 – 75 – 50 – 25 0 25 50 75 100 125
VID – Differential Input Voltage – V TA – Free-Air Temperature – °C
Figure 16 Figure 17


vs vs
LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
1 3
VID = – 1 V
0.9 VIC = 0.5 V VID = – 1 V
TA = 25°C VIC = 0.5 V
2.5
VOL – Low-Level Output Voltage – V
VOL – Low-Level Output Voltage – V

0.8 TA = 25°C VDD = 16 V
VDD = 5 V
0.7
VDD = 4 V 2
0.6
VDD = 10 V
VDD = 3 V
0.5 1.5
0.4
1
0.3
0.2
0.5
0.1
0 0
0 1 2 3 4 5 6 7 8 0 5 10 15 20 25 30
IOL – Low-Level Output Current – mA IOL – Low-Level Output Current – mA
Figure 18 Figure 19
LARGE-SIGNAL LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION DIFFERENTIAL VOLTAGE AMPLIFICATION
vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE
500 500
TA = – 55°C
450 RL = 100 kΩ 450 RL = 100 kΩ
– 40°C
VD – Large-Signal Differential
400 400
Voltage Amplification – V/mV
Voltage Amplification – V/mV
0°C
350 350
25°C VDD = 10 V
300 300
70°C
ÌÌÌÌÌ
250 250
85°C
ÁÁ
200
150
ÌÌÌÌÌÁÁ
TA = 125°C 200
150
ÁÁ ÁÁ
AVD
AVD
VDD = 5 V
A
A
100 100
50 50
0 0
0 2 4 6 8 10 12 14 16 – 75 – 50 – 25 0 25 50 75 100 125
VDD – Supply Voltage – V TA – Free-Air Temperature – °C
Figure 20 Figure 21

COMMON-MODE
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT INPUT VOLTAGE POSITIVE LIMIT
vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
10000 16
I IB and I IO – Input Bias and Offset Currents – pA
VDD = 10 V
TA = 25°C
VIC = 5 V
14
VIC – Common-Mode Input Voltage – V

See Note A
1000
12
IIB
10
100
IIO 8
10
6
4
1
2
0.1 0
25 45 65 85 105 125 0 2 4 6 8 10 12 14 16
TA – Free-Air Temperature – °C VDD – Supply Voltage – V
NOTE A: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 22 Figure 23
SUPPLY CURRENT SUPPLY CURRENT

vs vs
1600 1000
VO = VDD/2 VO = VDD /2
No Load TA = – 55°C 900 No Load
1400
800
1200
I DD – Supply Current – µ A
I DD – Supply Current – µ A
700
– 40°C
1000
600
0°C VDD = 10 V
800 500
25°C 400
600 VDD = 5 V
70°C 300
400
TA = 125°C 200
200
100
0 0
0 2 4 6 8 10 12 14 16 – 75 – 50 – 25 0 25 50 75 100 125
Figure 24 Figure 25

SLEW RATE SLEW RATE

vs vs
0.9 0.9
AV = 1
AV = 1
VIPP = 1 V
RL = 100 kΩ RL = 100 kΩ
0.8 VDD = 10 V
0.8 CL = 20 pF CL = 20 pF
VIPP = 5.5 V
TA = 25°C See Figure 1
SR – Slew Rate – V/ µs
0.7
SR – Slew Rate – V/ µs
See Figure 1
0.7
0.6 VDD = 10 V
0.6 VIPP = 1 V
0.5
0.5
0.4
0.4 VDD = 5 V
0.3
VIPP = 1 V
VDD = 5 V
VIPP = 2.5 V
0.3 0.2
0 2 4 6 8 10 12 14 16 – 75 – 50 – 25 0 25 50 75 100 125
Figure 26 Figure 27
NORMALIZED SLEW RATE MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE

vs vs
FREE-AIR TEMPERATURE FREQUENCY
1.4 10
VO(PP) – Maximum Peak-to-Peak Output Voltage – V
AV = 1
9
1.3 VIPP = 1 V
VDD = 10 V
RL = 100 kΩ 8 VDD = 10 V
1.2 CL = 20 pF TA = 125°C
Normalized Slew Rate
7
VDD = 5 V TA = 25°C
1.1 TA = – 55°C
6
1 5
VDD = 5 V
4
0.9
3
0.8 RL = 100 kΩ
2
See Figure 1
0.7
1
0.6 0
– 75 – 50 – 25 0 25 50 75 100 125 1 10 100 1000
TA – Free-Air Temperature – °C f – Frequency – kHz
Figure 28 Figure 29

UNITY-GAIN BANDWIDTH UNITY-GAIN BANDWIDTH

vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
900 800
VI = 10 mV
VDD = 5 V
CL = 20 pF
VI = 10 mV 750
800 TA = 25°C
CL = 20 pF
B1 – Unity-Gain Bandwidth – kHz

B1 – Unity-Gain Bandwidth – kHz
See Figure 3
See Figure 3 700
700
650
600 600
550
500
500
400
450
300 400
– 75 – 50 – 25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16
TA – Free-Air Temperature – °C VDD – Supply Voltage – V
Figure 30 Figure 31
LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
107
VDD = 5 V
RL = 100 kΩ
106
TA = 25°C
ÌÌÌ
105 0°
Voltage Amplification
AVD
104 30°
Phase Shift
103 60°
102 90°
ÁÁ Phase Shift
ÁÁ
AVD
101 120°
A
1 150°
0.1 180°
1 10 100 1k 10 k 100 k 1M
f – Frequency – Hz
Figure 32

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
107
VDD = 10 V
RL = 100 kΩ
106
TA = 25°C
ÌÌ
105 0°
ÌÌ
Voltage Amplification
AVD
10 4 30°
Phase Shift
103 60°
ÁÁ
102 90°
ÁÁ
Phase Shift
AVD
101 120°
ÁÁ
A
1 150°
0.1 180°
1 10 100 1k 10 k 100 k 1M
Figure 33
PHASE MARGIN PHASE MARGIN

vs vs
50° 45°
VI = 10 mV VDD = 5 V
CL = 20 pF VI = 10 mV
48° TA = 25°C TA = 25°C
43°
See Figure 3 See Figure 3
46°
φ m – Phase Margin
41°
44°
39°
42°
37°
40°
38° 35°
0 2 4 6 8 10 12 14 16 – 75 – 50 – 25 0 25 50 75 100 125
Figure 34 Figure 35

PHASE MARGIN
vs
CAPACITIVE LOAD
44°
VDD = 5 V
42°
VI = 10 mV
TA = 25°C
40° See Figure 3
38°
36°
34°
32°
30°
28°
0 10 20 30 40 50 60 70 80 90 100
CL – Capacitive Load – pF
Figure 36
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
300
VDD = 5 V
Vn – Equivalent Input Noise Voltage – nV/ Hz
RS = 20 Ω
TA = 25°C
250
See Figure 2
200
150
100
50
0
1 10 100 1000
Figure 37

APPLICATION INFORMATION
single-supply operation
While the TLC27M4 and TLC27M9 perform well using dual power supplies (also called balanced or split
supplies), the design is optimized for single-supply operation. This design includes an input common-mode
voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The
supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly
available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is
recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that
is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).
The low input bias current of the TLC27M4 and TLC27M9 permits the use of very large resistive values to
implement the voltage divider, thus minimizing power consumption.
The TLC27M4 and TLC27M9 work well in conjunction with digital logic; however, when powering both linear
devices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, high-frequency applications may require RC decoupling.
VDD
R4
R1 VREF = VDD R3
R2 R1 + R3
VI –
VO R4 + V
+ VO = (VREF – VI) REF
R2
VREF
R3 C
0.01 µF
Figure 38. Inverting Amplifier With Voltage Reference

single-supply operation (continued)
–
Power
Output + Logic Logic Logic Supply
(a) COMMON SUPPLY RAILS
–
Power
Output + Logic Logic Logic Supply
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
Figure 39. Common Versus Separate Supply Rails
input characteristics
The TLC27M4 and TLC27M9 are specified with a minimum and a maximum input voltage that, if exceeded at
either input, could cause the device to malfunction. Exceeding this specified range is a common problem,
especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper
range limit is specified at VDD – 1 V at TA = 25°C and at VDD – 1.5 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27M4 and TLC27M9
very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage
drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus
dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)
alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.
The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of
operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC27M4 and
TLC27M9 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards
and sockets can easily exceed bias current requirements and cause a degradation in device performance. It
is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement
Information section). These guards should be driven from a low-impedance source at the same voltage level
as the common-mode input (see Figure 40).
Unused amplifiers should be connected as unity-gain followers to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias current requirements of the TLC27M4 and TLC27M9 result in a very
low noise current, which is insignificant in most applications. This feature makes the devices especially
favorable over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices
exhibit greater noise currents.

noise performance (continued)
– – –
VI
VO VO VO
+ +
VI +
VI
(a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER
Figure 40. Guard-Ring Schemes
output characteristics
The output stage of the TLC27M4 and TLC27M9 is designed to sink and source relatively high amounts of
current (see typical characteristics). If the output is subjected to a short-circuit condition, this high current
capability can cause device damage under certain conditions. Output current capability increases with supply
voltage.
All operating characteristics of the TLC27M4 and TLC27M9 were measured using a 20-pF load. The devices
drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole
occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many
cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
(a) CL = 20 pF, RL = NO LOAD (b) CL = 170 pF, RL = NO LOAD
2.5 V
–
VO
+
VI
CL TA = 25°C
f = 1 kHz
VIPP = 1 V
– 2.5 V
(d) TEST CIRCUIT
(c) CL = 190 pF, RL = NO LOAD
Figure 41. Effect of Capacitive Loads and Test Circuit

output characteristics (continued)

Although the TLC27M4 and TLC27M9 possess excellent high-level output voltage and current capability,
methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup
resistor (RP) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages
to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a
comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance
between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With
very low values of RP, a voltage offset from 0 V at the output occurs. Second, pullup resistor RP acts as a drain
load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying
the output current.
VDD
C
VI + IP RP VDD – VO
Rp =
IF + IL + IP
– VO IP = Pullup current required
–
IF by the operational amplifier VO

(typically 500 µA)
+
R2
R1 IL RL
Figure 42. Resistive Pullup Figure 43. Compensation for

to Increase VOH Input Capacitance
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for
oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads
(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with
the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically.
electrostatic discharge protection

The TLC27M4 and TLC27M9 incorporate an internal electrostatic discharge (ESD) protection circuit that
prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care
should be exercised, however, when handling these devices, as exposure to ESD may result in the degradation
of the device parametric performance. The protection circuit also causes the input bias currents to be
temperature-dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27M4 and
TLC27M9 inputs and outputs were designed to withstand – 100-mA surge currents without sustaining latch-up;
however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection
diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply
voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.

latch-up (continued)
The current path established if latch-up occurs is usually between the positive supply rail and ground; it can be
triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
1N4148
470 kΩ
100 kΩ
5V
1/4
TLC27M4
–
47 kΩ VO
100 kΩ +
R2
68 kΩ
1 µF 100 kΩ
C2
R1 C1 2.2 nF
68 kΩ 2.2 nF
NOTE: VOPP ≈ 2 V
1
fO =
2π √R1R2C1C2
Figure 44. Wien Oscillator
IS
5V
1/4
VI + TLC27M9
– 2N3821
NOTE: VI = 0 V to 3 V
V
IS = I
R
Figure 45. Precision Low-Current Sink

5V
Gain Control
1 MΩ
(see Note A)
1 µF 100 kΩ
+
–
10 kΩ +
0.1 µF
+ + 1 µF
1/4
1 kΩ TLC27M4 100 kΩ
100 kΩ
NOTE A: Low to medium impedance dynamic mike
Figure 46. Microphone Preamplifier
10 MΩ
VDD
–
1 kΩ 1/4
TLC27M4
–
+
1/4 VO
TLC27M4 +
VREF
15 nF
100 kΩ
150 pF
NOTE: VDD = 4 V to 15 V
VREF = 0 V to VDD – 2 V
Figure 47. Photo-Diode Amplifier With Ambient Light Rejection

1 MΩ
VDD
33 pF
–
VO
+ 1/4
TLC27M4
1N4148
100 kΩ
100 kΩ
NOTE: VDD = 8 V to 16 V
VO = 5 V, 10 mA
Figure 48. Low-Power Voltage Regulator
5V
1 MΩ
0.01 µF
VI + 0.22 µF
VO
– 1/4
TLC27M4
1 MΩ
100 kΩ
100 kΩ
10 kΩ
0.1 µF
Figure 49. Single-Rail AC Amplifier

IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  1999, Texas Instruments Incorporated

Precision Quad Operational Amplifiers

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TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9

LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS

D Trimmed Offset Voltage: D, J, N, OR PW PACKAGE

D Designed-In Latch-Up Immunity

input impedance, low noise, and speeds

LinCMOS is a trademark of Texas Instruments Incorporated.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

equivalent schematic (each amplifier)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

TLC27M4Y chip information

BONDING PAD ASSIGNMENTS

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DISSIPATION RATING TABLE

TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C TA = 125°C

recommended operating conditions

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)

electrical characteristics, VDD = 10 V, TA = 25°C (unless otherwise noted)

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

operating characteristics at specified free-air temperature, VDD = 5 V

operating characteristics at specified free-air temperature, VDD = 10 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

operating characteristics at specified free-air temperature, VDD = 5 V

operating characteristics at specified free-air temperature, VDD = 10 V

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

operating characteristics at specified free-air temperature, VDD = 5 V

operating characteristics at specified free-air temperature, VDD = 10 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

operating characteristics, VDD = 5 V, TA = 25°C

operating characteristics, VDD = 10 V, TA = 25°C

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

single-supply versus split-supply test circuits

(a) SINGLE SUPPLY (b) SPLIT SUPPLY

Figure 1. Unity-Gain Amplifier

(a) SINGLE SUPPLY (b) SPLIT SUPPLY

Figure 2. Noise-Test Circuit

(a) SINGLE SUPPLY (b) SPLIT SUPPLY

Figure 3. Gain-of-100 Inverting Amplifier

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

PARAMETER MEASUREMENT INFORMATION

input bias current

Figure 4. Isolation Metal Around Device Inputs

low-level output voltage

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION