Unisonic Technologies Co., LTD: Dual Full-Bridge PWM Motor Driver
Unisonic Technologies Co., LTD: Dual Full-Bridge PWM Motor Driver
Unisonic Technologies Co., LTD: Dual Full-Bridge PWM Motor Driver
, LTD
L6219 LINEAR INTEGRATED CIRCUIT
DESCRIPTION
The L6219 motor driver is designed to drive both windings of a
bipolar stepper motor or bidirectionally control two dc motors. Both
bridges are capable of sustaining 45V and include internal
SOP-24
pulse-width modulation (PWM) control of the output current to
750mA .The outputs have been optimized for a low output saturation
voltage drop (less than 1.8V total source plus sink at 500mA ).
For PWM current control, the maximum output current is
determined by the user’s selection of a reference voltage and
sensing resistor. Two logic-level inputs select output current limits of
0, 33, 67,or 100% of the maximum level. A phase input to each
bridge determines load current direction.
The bridges include both ground clamp and flyback diodes for
protection against inductive transients. Internally generated delays
prevent cross-over currents when switching current direction. Special
power-up sequencing is not required. Thermal protection circuitry
disables the outputs if the chip temperature exceeds safe operating
limits.
FEATURES
*Interchangeable with SGS L6219
*750mA Continuous Output Current
*45V Output Sustaining Voltage
*Internal Clamp Diodes
*Internal PWM Current Control
*low Output Saturation Voltage
*Internal Thermal Shutdown Circuitry
ORDERING INFORMATION
Ordering Number
Package Packing
Lead Free Halogen Free
L6219L-S24-R L6219G-S24-R SOP-24 Tape Reel
L6219G-S24-R
(1)Packing Type (1) R: Tape Reel
(2)Package Type (2) S24: SOP-24
(3)Green Package (3) G: Halogen Free and Lead Free, L: Lead Free
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Copyright © 2019 Unisonic Technologies Co., Ltd QW-R109-005.D
L6219 LINEAR INTEGRATED CIRCUIT
MARKING
PIN CONFIGURATION
VB LOAD
OUT1A 1 24
B SUPPLY
OUT2A 2 23 SENSE1
SENSE2 3 1 22 COMP IN1
OUT2B 5 20 I01
GROUND 19
6 GROUND
GROUND
7 18 GROUND
I02 8 17 I11
I12 9 θ1 16 PHASE1
PHASE2 10 θ2 15 VREF1
VREF2 11 14 RC1
TRUTH TABLE
PHASE OUTA OUTB
H H L
L L H
APPLICATION INFORMATION
Logic Control Of Output Current
Two logic level inputs (I0 and I1) allow digital selection of the motor winding current at 100%, 67%, 33%, or 0% of
the maximum level per the table. The 0% output current condition turns off all drivers in the bridge and can be used
as an OUTPUT ENABLE function.
These logic level inputs greatly enhance the implementation of μP-controlled drive formats.
During half-step operations, the I0 and I1 allow the μP to control the motor at a constant torque between all
positions in an eight-step sequence. This is accomplished by digitally selection 100% drive current when only one
phase is on and 67% drive current when two phases are on. Logic highs on both I0 and I1 turn off all drivers to allow
rapid current decay when switching phases. This helps to ensure proper motor operation at high step rates.
The logic control inputs can also be used to select a reduced current level (and reduced power dissipation) for
“hold” conditions and/or increased current (and available torque )for start-up conditions.
Current-Control Truth Table
I0 I1 Output Current
L L VREF/10RS=ITRIP
H L VREF/15RS=2/3 ITRIP
L H VREF/30RS=1/3 ITRIP
H H 0
General
The PHASE input to each bridge determines the direction motor winding current flows. An internally generated
dead time (approximately 2μs) prevents crossover currents that can occur when switching the PHASE input.
All four drivers in the bridge output can be tuned off between steps (I0=I1≥2.4V) resulting in a fast current decay
through the internal output clamp and flyback diodes. The fast current decay is desirable in half-step and high-speed
applications. The PHASE,I0, and I1 inputs float high.
Varying the reference voltage (VREF) provides continuous control of the peak load current for microstepping
applications.
Thermal protection circuitry turns off all drivers when the junction temperature reaches +170C. It is only intended
to protect the device from failures due to excessive junction temperature and should not imply that output short
circuits are permitted. The output drivers are re-enabled when the junction temperature cools to +145C.
The UTC L6219 output drivers are optimized for low output saturation voltages-less than 1.8V total (source plus
sink) at 500mA.Under normal operating conditions, when combined with the excellent thermal properties of the
batwing package design, this allows continuous operation of both bridges simultaneously at 500mA.
Current Sensing
To minimize current sensing inaccuracies caused by ground trace IR drops, each current-sensing resistor should
have a separate return to the ground terminal of the device. For low-value sense resistors, the IR drops in the PCB
can be significant and should be taken into account. The use of sockets should be avoided as their contact
resistance can cause variations in the effective value of RS.
Generally, larger values of RS reduce the aforementioned effects but can result in excessive heating and power
loss in the sense resistor. The selected value of RS should not cause the absolute maximum voltage rating of 1.5 V,
for the SENSE terminal, to be exceeded. The recommended value of RS is in the range of:
RS=0.75/ITRIP(max) ±50% .
If desired, the reference input voltage can be filtered by placing a capacitor from REFIN to ground. The ground
return for this capacitor as well as the bottom of any resistor divider used should be independent of the high-current
power-ground trace to avoid changes in REFIN due to IR drops.
Thermal Considerations
For reliable operation, it is recommended that the maximum junction temperature be kept below 110°C to 125°C.
The junction temperature can be measured best by attaching a thermocouple to the power pins (6, 7, 18 and 19) of
the device and measuring the pin temperature, TTAB. The junction temperature can then be approximated by using
the formula:
TJ=TTAB +(2×ILOAD×VF×RθJT)
where VF can be chosen from the electrical specification table for the given level of ILOAD. The value for RθJT is
approximately 6°C/W.
The power dissipation can be improved 20% to 30% by adding a section of printed circuit board copper (typically 6
to 18 square centimeters) connected to the power pins of the device.
The thermal performance in applications that run at high load currents, high duty cycles, or both can be improved
by adding external diodes from each output to ground in parallel with the internal diodes. Fast-recovery (≤200 ns)
diodes should be used to minimize switching losses.
Load Supply Terminal
The load supply terminal, VBB, should be decoupled with an electrolytic capacitor (≥47μF is recommended), placed
as close to the device as is physically practical. To minimize the effect of system ground IR drops on the logic and
reference input signals, the system ground should have a low-resistance return to the load supply voltage.
Fixed Off-Time Selection
With increasing values of tOFF, switching losses decrease, low level load current regulation improves, EMI
reduces, PWM frequency decreases, and ripple current increases. The value of tOFF can be chosen for optimization
of these parameters. For applications where audible noise is a concern, typical values of tOFF should be chosen in
the range of 15 to 35μs.
TYPICAL APPLICATION
PWM1
PWM2
TYPICAL CHARACTERISTIC
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all UTC products described or contained herein.
UTC products are not designed for use in life support appliances, devices or systems where malfunction
of these products can be reasonably expected to result in personal injury. Reproduction in whole or in
part is prohibited without the prior written consent of the copyright owner. UTC reserves the right to
make changes to information published in this document, including without limitation specifications and
product descriptions, at any time and without notice. This document supersedes and replaces all
information supplied prior to the publication hereof.