Unit - 1: 1. Functional Units
Unit - 1: 1. Functional Units
Unit - 1: 1. Functional Units
1. FUNCTIONAL UNITS
A computer consists of five functionally independent main parts:
● Input,
● Memory,
● Arithmetic and Logic unit,
● Output unit
● Control Units,
The input unit accepts coded information from human operators, from electromechanical
devices such as key boards, or from other computers over digital communication lines. The
information received is either stored in the computer's memory for later reference or immediately
used by the arithmetic and logic circuitry to perform the desired operations. The processing steps
are determined by a program stored in the memory. Finally, the results are sent back to the
outside world through the output unit. All of these actions are coordinated by the control unit.
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particularly for information that is access infrequently. A wide selection of secondary storage
devices is available, including magnetic disks and tapes and optical disks
Output Unit
The output unit is the counterpart of the input unit. Its function is to send processed results to
the outside world. The most familiar example of such a device is a printer. Printers employ
mechanical impact heads, inkjet streams, or photocopying techniques, as in laser printers, to
perform the printing. It is possible to produce printers capable of printing as many as 10,000
lines per minute. This is a tremendous speed for a mechanical device but is still very slow
compared to the electronic speed of a processor unit.
Monitors, Speakers, Headphones and projectors are also some of the output devices. Some
units, such as graphic displays, provide both an output function and an input function. The dual
role of input and output of such units are referred with single name as I/O unit in many cases.
Speakers, Headphones and projectors are some of the output devices. Storage devices such as
hard disk, floppy disk, flash drives are also used for input as well as output.
Arithmetic and Logic Unit.
Most computer operations are executed in the arithmetic and logic unit (ALU) of the
processor. Consider a typical example: Suppose two numbers located in the memory are to be
added. They are brought into the processor, and the actual addition is carried out by the ALU.
The sum may then be stored in the memory or retained in the processor for immediate use. Any
other arithmetic or logic operation, for example, multiplication, division, or comparison of
numbers, is initiated by bringing the required operands into the processor, where the
operation is performed by the ALU. When operands are brought into the processor, they are
stored in high-speed storage elements called registers. Each register can store one word of data.
Access times to registers are somewhat faster than access times to the fastest cache unit in the
memory hierarchy.
The control and the arithmetic and logic units are many times faster than other devices
connected to a computer system. This enables a single processor to control a number of external
devices such as keyboards, displays, magnetic and optical disks, sensors, and mechanical
controllers.
Control Unit
The memory, arithmetic and logic, and input and output 'units store and process information
and perform input and output operations. The operation of these units must be coordinated in
some way. This is the task of the control unit. The control unit is effectively the nerve center that
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sends control signals to other units and senses their states. I/O transfers, consisting of input and
output operations, controlled by the instructions ofI/O programs that identify the devices
involved and the information to be transferred.
However, the actual timing signals that govern the transfers are generated by the control
circuits. Timing signals are signals that determine when a given action is to take place. Data
transfers between the processor and the memory are also controlled by the control unit through
timing signals.
The operation of a computer can be summarized as follows:
1. The computer accepts information in the form of programs and data through an input unit
and stores it in the memory.
2. Information stored in the memory is fetched, under program control, into an arithmetic and
logic unit, where it is processed.
3. Processed information leaves the computer through an output unit.
4. All activities inside the machine are directed by the control unit.
2. I/O UNITS (PERIPHERAL DEVICES)
Peripheral devices are connected to the computer externally. These devices are used for
performing some specific functions. Peripheral devices are as follows:
1. Input Devices
2. Output Devices
3. Other Peripherals
INPUT DEVICES
Input devices are those devices which take input from user's in the simple form and
convert the data/information into digital form i.e. 1 or 0. Following are the examples of various
input devices, which are connected to the computer for this purpose.
Input ouput device categorization:
1) Online input devices/Direct line entry devices:-On line input devices are those devices which
are directly connected to computer example keyboard, mouse etc.
2) Offline input devices/Source entry devices:-Offline input devices are those devices which are
not directly connected to computer example scanning device.
1. Keyboard
2. Mouse
3. Light Pen
4. Optical/magnetic Scanner
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5. Touch Screen
6. Microphone for voice as input
7. Track Ball
Keyboard
A keyboard (as shown in following figure) is the most common input device. Several
kinds of keyboards are available, but they resemble each other with minor variations. The
keyboard in most common use is the QWERTY board. Generally standard keyboard has 104
keys. In these keyboards, the cursor control keys are duplicated to allow easier use of the
numeric pad.
Keyboard
Alphabets:-A to Z, a to z.
Numeric key:-0 to 9
Special keys:-shift, spacebar, ctr, alt etc.
Functions key:-F1,F2.....F12.
Mouse
A mouse is an electro-mechanical, hand-held device (as shown in following figure). It is
used as a pointer. It can perform functions like selecting menu commands, moving icons,
resizing windows, starting programs, and choosing options.
The most conventional kind of mouse has two buttons on top: the left one being used
most frequently.
Mouse Actions Left Click: Used to select an item.
Double Click: Used to start a program or open a file.
Right Click: Usually used to display a set of commands.
Drag and Drop: It allows you to select and move an item from one location to another. To
achieve this place the cursor over an item on the screen, click the left mouse button and while
holding the button down move the cursor to where you want to place the item, and then release
it.
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Fig. 1.4 Mouse
Light pen
An input device that utilizes a light-sensitive detector to select objects on a display
screen. A light pen is similar to a mouse (as shown in figure 1.5), except that with a light pen you
can move the pointer and select objects on the display screen by directly pointing to the objects
with the pen.
Optical Scanner
These devices are used for automatic data collection. The devices of this category
completely eliminate manual input of data. For example, the bar-code reader is actually just a
special type of image scanner. An image scanner translates printed images into an electronic
format that can be stored in a computer’s memory, and with the right kind of software, one can
alter a stored image. Another example of scanner is optical character recognition (OCR) device,
used by banks to convert the scanned image of a typed or printed page into text that can be edited
on the computer.
Touch Screen
Touch panel displays and pads are now being offered as alternatives to keyboard. Here
the input can be given through the computer screen, that accepts the input through monitor; users
touch electronic buttons displayed on the screen or they may use light pen.
It allows the user to operate/make selections by simply touching the display screen. A
display screen that is sensitive to the touch of a finger or stylus. Widely used on ATM machines,
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retail point-of-sale terminals, car navigation systems, medical monitors and industrial control
panels.
Joystick:-
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The joystick is a vertical stick which moves the graphic cursor in a direction the stick is
moved. It typically has a button on top that is used to select the option pointed by the cursor.
Joystick is used as an input device primarily used with video games, training simulators and
controlling robots
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Voice Input Systems: This devices converts spoken words to M/C language form. A micro
phone is used to convert human speech into electric signals. The signal pattern is then
transmitted to a computer when it’s compared to a dictionary of patterns that have been
previously placed in a storage unit of computer. When a close match is found, the word is
recognized.
Summary of Input Devices
Input Device Advantages Disadvantages
Light Pen No typing skills are required Needs much software to make it versatile
Bar Code Reader Quick and easy entry of data Needs specialized software
Touch Screen Easy operation Intuitive Needs specialized hardware and software
sophisticated operations
OUTPUT DEVICES
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After processing the inputted data, the computer will give its output. This output can be
in two different formats:
• Softcopy – Visual (monitor) or Sound (speakers)
• Hardcopy – Output on a tangible (something you can touch) such as a printer printout.
Some of the commonly used output devices are:
1. Monitor (Visual Display Unit)
2. Printers
3. Plotter
4. Speakers
Monitor
Out of all the output devices, monitor (as shown in following figure) is perhaps the most
important output device because people interact with this device most intensively than others.
Computer information is displayed, visually with a video adapter card and monitor. Information
processed within the CPU, that needs to be visually displayed, is sent to video adapter. The video
adapter converts information from the format used, in the same manner as a television displays
information sent to it by a cable service.
Two basic types of monitors are used with microcomputers, which are as follows:
1. CRT
2. LCD
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monitors can have resolutions of 1024 x 768 pixels or even 1280 x 1024 pixels. Thus monitors
are available either in low resolution or in high resolution.
Printer
Printers are used to produce paper (commonly known as hardcopy) output. Based on the
technology used, they can be classified as Impact or Non-impact printers.
Impact printers use the typewriting printing mechanism wherein a hammer strikes the
paper through a ribbon in order to produce output. Dot-matrix and Character printers fall under
this category.
Non-impact printers do not touch the paper while printing. They use chemical, heat or
electrical signals to etch the symbols on paper. Inkjet, Deskjet, Laser, Thermal printers fall under
this category of printers.
When we talk about printers we refer to two basic qualities associated with printers:
resolution, and speed. Print resolution is measured in terms of number of dots per inch (dpi).
Print speed is measured in terms of number of characters printed in a unit of time and is
represented as characters-per-second (cps), lines-per-minute (lpm), or pages-per-minute (ppm).
Some of the most commonly used printers are:
1. Laser Printer
2. Ink Jet Printer
3. Dot Matrix Printer
4. Line Printer
Daisy Wheel Printers
This type of printer is rarely used any more since new printer technology, which is more
efficient and economic, has been discovered. The principle of this type of printer is that number
and letter are each situated on metal leafs as shown.
These leafs make part of the daisy wheel. In order to print, the daisy wheel rotates while a
hammer will strike each character, which will make contact with the printer ribbon and the
paper.
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Laser Printer: A laser printer produces high quality print that one normally finds in publishing.
It is extremely fast and quiet. Moreover, the operation of a laser printer is easy with automatic
paper loading and no smudging or messing up of ink ribbons. The fastest laser printer can print
up to 200 pages per minute in monochrome (black and white) and up to 100 pages per minute in
colour.
Laser Printer
Ink-Jet Printer: An ink-jet printer creates an image directly on paper by spraying ink through as
many as 64 tiny nozzles. Although the image it produces is not generally quite as sharp as the
output of a laser printer, the quality of ink-jet images is still high.
These types of printers are the most popular nowadays. It is basically what most home
users have today. These printers have good resolution, are silent and for small amount of printing
are not particularly expensive. These printers are called page printers.
There are two types of technologies used:
1. The first type (called Bubble Jet) has a chamber containing ink. The ink is heated up with tiny
electrical heaters. This will cause the ink to expand and form a bubble. The bubble will burst and
the ink transferred on paper.
2. The second type (called Ink Jet) uses a piezo quartz nozzle. When electricity is passed through
it, it vibrates and transfers the ink on paper.
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In the inkjet printing mechanism, the print head has several tiny nozzles, also called jets.
As the paper moves past the print head, the nozzles spray ink onto it, forming the characters and
images.
Dot Matrix Printer: The dot matrix printer was very popular at one point of time. It is a very
versatile and inexpensive output device. In dot matrix printer the print head physically "hits" the
paper through the ribbon and produces text (or images) by combinations of dots; hence the name
dot matrix printer. Its speed is measured in characters per second (CPS). Although it is less
expensive, it is louder, slower and produces lower print quality.
Dot matrix printers are categorized as character printers because they write one character
at a time. The printing head is made up of several pins, which form a column. The printing head
is attached to a belt which moves it from side to side along the width of the paper and at the same
time the paper is rolled up by means of a roller. In order to write, the head pins are fired with the
aid of an electro magnet, which hit the ribbon and paper.
Dot Matrix Printer Versatile graphics and text, cheap Average quality, slow speed
Line Printer Can cope with high volumes Very noisy, average quality
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Flatbed Plotter Large paper handling capabilities Very expensive
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4. Memory buffer register (MBR): contains a word of data to be written to
memory or the word most recently read.
All CPU designs include a register or set of register often known as program status word (PSW).
PSW typically contain condition code pulse other status information. Common flags include the
following: sign, zero, carry, equal, overflow and interrupt enable/disable.
Design issues for register organization in CPU
(a) Number of register
Fewer register result in more memory reference, more register do not noticeably reduce memory
reference. Generally 8 to 32 register usage appears to be optimum.
(b) General purpose registers Vs Special purpose registers
In special purpose register, the operand specifier must only identify one of a set of specified
registers rather than one out of all registers, but it limits the programming flexibility.
No final and best solution can be drawn but the current trend seems towards the use of special
purpose registers.
(c) Register length
The length of register should be at least long enough to hold the largest address. Data register
should hold the value of most data types.
(d) Allocation of control information
The allocation of control information between the register and memory is also one of the main
design challenges. Generally, we dedicate the first few hundreds or thousands of main memory
location for control purpose.
3. INSTRUCTION FORMATS
A computer will usually have a variety of instruction code formats. It is the function of
the control unit within the CPU to interpret each instruction code and provide the necessary
control functions needed to process the instruction.
Opcode Mode Address
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instruction are divided into groups called fields. The most common fields found in instruction
formats are:
1. An operation code field that specifies the operation to be performed.
2. An address field that designates a memory address or a processor registers.
3. A mode field that specifies the way the operand or the effective address is determined.
● The operation code field of an instruction is a group of bits that define various processor
operations, such as add, subtract, complement, and shift.
● The bits that define the mode field of an instruction code specify a variety of alternatives
for choosing the operands from the given address.
● In this section we are concerned with the address field of an instruction format and
consider the effect of including multiple address fields is an instruction.
Operations specified by computer instructions are executed on some data stored in memory
or processor registers, Operands residing in processor registers are specified with a register
address. A register address is a binary number of k bits that defines one of 2k registers in the
CPU. Thus a CPU with 16 processor registers R0 through R15 will have a register address field
of four bits. The binary number 0101, for example, will designate register R5.
Computers may have instructions of several different lengths containing varying number of
addresses. The number of address fields in the instruction format of a computer depends on the
internal organization of its registers. Most computers fall into one of three types of CPU
organizations:
1. Single accumulator organization.
2. General register organization.
3. Stack organization.
Single accumulator organization
An example of an accumulator-type organization is the basic computer. All operations are
performed with an implied accumulator register. The instruction format in this type of computer
uses one address field.
For example, the instruction that specifies an arithmetic addition is defined by an assembly
language instruction as ADD.
Where X is the address of the operand. The ADD instruction in this case results in the
operation
AC ← AC + M[X].
AC is the accumulator register and M[X] symbolizes the memory word located at address X.
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General register organization
The instruction format in this type of computer needs three register address fields. Thus
the instruction for an arithmetic addition may be written in an assembly language as ADD R1,
R2, R3
To denote the operation R1 ← R2 + R3. The number of address fields in the instruction
can be reduced from three to two if the destination register is the same as one of the source
registers. Thus the instruction
ADD R1, R2
Would denote the operation R1 ← R1 + R2. Only register addresses for R1 and R2 need be
specified in this instruction.
Computers with multiple processor registers use the move instruction with a mnemonic
MOV to symbolize a transfer instruction. Thus the instruction
MOV R1, R2
Denotes the transfer R1 ← R2 (or) R2 ← R1, depending on the particular computer. Thus
transfer-type instructions need two address fields to specify the source and the destination.
General register-type computers employ two or three address fields in their instruction format.
Each address field may specify a processor register or a memory word. An instruction
symbolized by
ADD R1, X
Would specify the operation R1 ← R + M [X]. It has two address fields, one for register R1 and
the other for the memory address X.
Stack organization
Computers with stack organization would have PUSH and POP instructions which require an
address field. Thus the instruction
PUSH X
Will push the word at address X to the top of the stack. The stack pointer is updated
automatically. Operation-type instructions do not need an address field in stack-organized
computers. This is because the operation is performed on the two items that are on top of the
stack. The instruction
ADD
in a stack computer consists of an operation code only with no address field. This operation has
the effect of popping the two top numbers from the stack, adding the numbers, and pushing the
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sum into the stack. There is no need to specify operands with an address field since all operands
are implied to be in the stack.
Most computers fall into one of the three types of organizations that have just been
described. Some computers combine features from more than one organization structure. As a
consequence; the processor has some of the characteristics of a general register type and some of
the characteristics of a accumulator type. All arithmetic and logic instruction, as well as the load
and store instructions, use the accumulator register, so these instructions have only one address
field. On the other hand, instructions that transfer data among the seven processor registers have
a format that contains two register address fields.
To illustrate the influence of the number of addresses on computer programs, we will
evaluate the arithmetic statement X = (A + B) ∗ (C + D).
Using zero, one, two, or three address instruction. We will use the symbols ADD, SUB,
MUL, and DIV for the four arithmetic operations; MOV for the transfer-type operation; and
LOAD and STORE for transfers to and from memory and AC register. We will assume that the
operands are in memory addresses A, B, C, and D, and the result must be stored in memory at
address X.
THREE-ADDRESS INSTRUCTIONS
Computers with three-address instruction formats can use each address field to specify
either a processor register or a memory operand. The program in assembly language that
evaluates X = (A + B) ∗ (C + D) is shown below, together with comments that explain the
register transfer operation of each instruction.
ADD R1, A, B R1 ← M [A] + M [B]
ADD R2, C, D R2 ← M [C] + M [D]
MUL X, R1, R2 M [X] ← R1 ∗ R2
It is assumed that the computer has two processor registers, R1 and R2. The symbol M
[A] denotes the operand at memory address symbolized by A. The advantage of the three-
address format is that it results in short programs when evaluating arithmetic expressions. The
disadvantage is that the binary-coded instructions require too many bits to specify three
addresses. An example of a commercial computer that uses three-address instructions is the
Cyber 170. The instruction formats in the Cyber computer are restricted to either three register
address fields or two register address fields and one memory address field.
TWO-ADDRESS INSTRUCTIONS
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Two address instructions are the most common in commercial computers. Here again
each address field can specify either a processor register or a memory word. The program to
evaluate X = (A + B) ∗ (C + D) is as follows:
MOV R1, A R1 ← M [A]
ADD R1, B R1 ← R1 + M [B]
MOV R2, C R2 ← M [C]
ADD R2, D R2 ← R2 + M [D]
MUL R1, R2 R1 ← R1∗R2
MOV X, R1 M [X] ← R1
The MOV instruction moves or transfers the operands to and from memory and processor
registers. The first symbol listed in an instruction is assumed to be both a source and the
destination where the result of the operation is transferred.
ONE-ADDRESS INSTRUCTIONS
One-address instructions use an implied accumulator (AC) register for all data
manipulation. For multiplication and division there is a need for a second register. However, here
we will neglect the second and assume that the AC contains the result of tall operations. The
program to evaluate X = (A + B) ∗ (C + D) is
LOAD A AC ← M [A]
ADD B AC ← A [C] + M [B]
STORE T M [T] ← AC
LOAD C AC ← M [C]
ADD D AC ← AC + M [D]
MUL T AC ← AC ∗ M [T]
STORE X M [X] ← AC
All operations are done between the AC register and a memory operand. T is the address of a
temporary memory location required for storing the intermediate result.
ZERO-ADDRESS INSTRUCTIONS
A stack-organized computer does not use an address field for the instructions ADD and
MUL. The PUSH and POP instructions, however, need an address field to specify the operand
that communicates with the stack. The following program shows how X = (A + B) ∗ (C + D)
will be written for a stack organized computer. (TOS stands for top of stack)
PUSH A TOS ← A
PUSH B TOS ← B
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ADD TOS ← (A + B)
PUSH C TOS ← C
PUSH D TOS ← D
ADD TOS ← (C + D)
MUL TOS ← (C + D) ∗ (A + B)
POP X M [X] ← TOS
To evaluate arithmetic expressions in a stack computer, it is necessary to convert the expression
into reverse Polish notation. The name “zero-address” is given to this type of computer because
of the absence of an address field in the computational instructions.
4. ADDRESSING MODES
The operation field of an instruction specifies the operation to be performed. This operation
must be executed on some data stored in computer registers or memory words. The way the
operands are chosen during program execution is dependent on the addressing mode of the
instruction. The addressing mode of the instruction. The addressing mode specifies a rule for
interpreting or modifying the address field of the instruction before the operand is actually
referenced.
Computers use addressing mode techniques for the purpose of accommodating one or both
of the following provisions:
1. To give programming versatility to the user by providing such facilities as pointers to
Memory, counters for loop control, indexing of data, and program relocation
2. To reduce the number of bits in the addressing field of the instruction.
3. The availability of the addressing modes gives the experienced assembly language
programmer flexibility for writing programs that are more efficient with respect to the
number of instructions and execution time.
To understand the various addressing modes to be presented in this section, it is imperative that
we understand the basic operation cycle of the computer. The control unit of a computer is
designed to go through an instruction cycle that is divided into three major phases:
1. Fetch the instruction from memory
2. Decode the instruction.
3. Execute the instruction.
There is one register in the computer called the program counter of PC that keeps track of
the instructions in the program stored in memory. PC holds the address of the instruction to be
executed next and is incremented each time an instruction is fetched from memory. The
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decoding done in step 2 determines the operation to be performed, the addressing mode of the
instruction and the location of the operands. The computer then executes the instruction and
returns to step 1 to fetch the next instruction in sequence.
The instruction may have more than one address field, and each address field may be
associated with its own particular addressing mode. Although most addressing modes modify the
address field of the instruction, there are two modes that need no address field at all. These are
the implied and immediate modes.
The most well known addressing mode are:
● Implied Addressing Mode.
● Immediate Addressing Mode
● Register Addressing Mode
● Register Indirect Addressing Mode
● Auto-increment or Auto-decrement Addressing Mode
● Direct Addressing Mode
● Indirect Addressing Mode
● Displacement Address Addressing Mode
● Relative Addressing Mode
● Index Addressing Mode
● Stack Addressing Mode
Implied Addressing Mode:
In this mode the operands are specified implicitly in the definition of the instruction. For
example, the instruction “complement accumulator” is an implied-mode instruction because the
operand in the accumulator register is implied in the definition of the instruction.
Zero-address instructions in a stack-organized computer are implied-mode instructions
since the operands are implied to be on top of the stack.
It was mentioned previously that the address field of an instruction may specify either a
memory word or a processor register. When the address field specifies a processor register, the
instruction is said to be in register-mode.
Advantage: no memory reference.
Disadvantage: limited operand
Register direct addressing mode:
` In this mode, the operands are in registers that reside within the CPU. The particular
register is selected from the register field in the instruction. A k-bit field can specify any one of
2k registers
For example MOV A, B
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Effective Address (EA) = (R)
Advantage: Large address space.
⮚ The address field of the instruction uses fewer bits to select a register than would have
been required to specify a memory address directly.
Disadvantage: Extra memory reference
Auto increment or Auto decrement Addressing Mode:
This is similar to the register indirect mode except that the register is incremented or
decremented after (or before) its value is used to access memory. When the address stored in the
register refers to a table of data in memory, it is necessary to increment or decrement the register
after every access to the table. This can be achieved by using the increment or decrement
instruction.
The address field of an instruction is used by the control unit in the CPU to obtain the
operands from memory. Sometimes the value given in the address field is the address of the
operand, but sometimes it is the address from which the address has to be calculated.
To differentiate among the various addressing modes it is necessary to distinguish
between the address part of the instruction and the effective address used by the control when
executing the instruction.
Effective Address
The effective address is defined to be the memory address obtained from the computation
dictated by the given addressing mode. The effective address is the address of the operand in a
computational-type instruction. It is the address where control branches in response to a branch-
type instruction.
Direct Addressing Mode
In this mode the effective address is equal to the address part of the instruction. The
operand resides in memory and its address is given directly by the address field of the
instruction.
For example LDA 4000H
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Effective Address (EA) = A
Advantage: Simple.
Disadvantage: limited address field
Indirect Addressing Mode
In this mode the address field of the instruction gives the address where the effective
address is stored in memory. Control unit fetches the instruction from the memory and uses its
address part to access memory again to read the effective address.
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Relative Addressing Mode
● In this mode the content of the program counter (PC) is added to the address part of the
instruction in order to obtain the effective address.
● The address part of the instruction is usually a signed number (either a +ve or a –ve
number).
● When the number is added to the content of the program counter, the result produces an
effective address whose position in memory is relative to the address of the next
instruction.
Effective Address (EA) = PC + A
Indexed Addressing Mode
● In this mode the content of an index register (XR) is added to the address part of the
instruction to obtain the effective address.
● The index register is a special CPU register that contains an index value.
● Note: If an index-type instruction does not include an address field in its format, the
instruction is automatically converted to the register indirect mode of operation.
Effective Address (EA) = XR + A
Base Register Addressing Mode
● In this mode the content of a base register (BR) is added to the address part of the
instruction to obtain the effective address.
● This is similar to the indexed addressing mode except that the register is now called a
base register instead of the index register.
● The base register addressing mode is used in computers to facilitate the relocation of
programs in memory i.e. when programs and data are moved from one segment of
memory to another.
Effective Address (EA) = BR + A
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Stack Addressing Mode
● The stack is the linear array of locations. It is sometimes referred to as push down list or
last in First out (LIFO) queue. The stack pointer is maintained in register.
Effective Address (EA) = TOS
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Figure: Numerical example for addressing Modes
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The program control functions are used when a series of conditional or unconditional
jump and return instruction are required. These instructions allow the program to execute only
certain sections of the control logic if a fixed set of logic conditions are met. The most common
instructions for the program control available in most controllers are described in this section.
The program control instructions provide decision making capabilities and change the
path taken by the program when executed in computer. These instructions specify conditions for
altering the content of the program counter. The change in value of program counter as a result
of execution of program control instruction causes a break in sequence of instruction execution.
Some typical program control instructions are:
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instructions executing on the processor. The status register in a traditional processor design
includes at least three central flags: Zero, Carry, and Overflow, which are set or cleared
automatically as effects of arithmetic and bit manipulation operations.
A status register may often have other fields as well, such as more specialized flags,
interrupt enable bits, and similar types of information. During an interrupt, the status of the
thread currently executing can be preserved (and later recalled) by storing the current value of
the status register along with the program counter and other active registers into the machine
stack or some other reserved area of memory.
Common flags:-
This is a list of the most common CPU status register flags, implemented in almost all modern
processors.
Flag Name Description
Z Zero flag Indicates that the result of an arithmetic or logical operation
(or, sometimes, a load) was zero.
C Carry flag Enables numbers larger than a single word to be
added/subtracted by carrying a binary digit from a less
significant word to the least significant bit of a more
significant word as needed. It is also used to extend bit shifts
and rotates in a similar manner on many processors
(sometimes done via a dedicated X flag).
S/N Sign flag Indicates that the result of a mathematical operation is
Negative flag negative. In some processors, the N and S flags are distinct
with different meanings and usage: One indicates whether the
last result was negative whereas the other indicates whether a
subtraction or addition has taken place.
V/ O / W Overflow flag Indicates that the signed result of an operation is too large to fit
in the register width using twos complement representation.
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BC Branch if Carry C=1
BNC Branch if not Carry C=0
BP Branch if Plus S=0
BM Branch if Minus S=1
BV Branch if Overflow V=1
BNV Branch if not Overflow V=0
Unsigned Compare(A-B):-
Mnemonics Branch Instruction Tested Control
BHI Branch if Higher A>B
BHE Branch if Higher or Equal A >= B
BLO Branch if Lower A<B
BLE Branch if Lower or Equal A <= B
BE Branch if Equal A=B
BNE Branch if not Equal A not = B
Compare(A-B):-
Mnemonics Branch Instruction Tested control
BGT Branch if Greater Than A>B
BGE Branch if Greater Than or Equal A >= B
BLT Branch if Less Than A<B
BLE Branch if Less Than or Equal A <= B
BE Branch if Equal A=B
BNE Branch if not Equal A not = B
Conditional Branch instruction are represented with the help of mnemonics. Each Mnemonic is
constructed with B (Branch) and abbreviation of condition name.
For Example:-
BC ----> Branch if Carry
If condition state is used for the Negative than N is inserted to define the Zero state i.e.
BNC----> Branch if Not Carry
If tested condition is true Program control is transfer to the address specified by instruction. If
the tested condition is false than control continuous with instruction that follows.
8. SUBROUTINE CALLS
Among computer control instructions, we can find subroutine call instructions with the
acronym "Call" and subroutine return instructions with the acronym "Ret".
A subroutine is a sequence of instructions ended with the return instruction "Ret". In the
subroutine call instruction there is always placed the address of the first instruction in the
subroutine called the subroutine address.
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The mechanism of subroutine calls and the implementation of "Call" & "Ret" instructions
are based on the use of the stack.
Execution of the subroutine "Call" instruction consists in:
1. storing in the stack the current contents of the program counter (i.e. the return address do
the next instruction after the call) by "Push" operation,
2. writing to the program counter the address embedded in the "Call" instruction,
3. Fetching next instruction according to the new contents of the program counter.
Address written to the stack will be used by the return instruction "Ret" for automatic return
from the subroutine to the next instruction after the "Call" instruction.
Execution of the return from subroutine instruction "Ret" consists in:
1. reading from the top of the stack of the return address ( to the instruction succeeding the
"call" instruction),
2. writing this address to the program counter,
3. execution of the "Pop" operation on the stack,
4. Fetching a new instruction according to the new contents of the program counter.
The address written down to the stack during a subroutine call is sometimes called
a trace and the subroutine call is called a jump with a trace.
We frequently use nested subroutine calls, where during execution of a subroutine a new
subroutine is called from its body. The mechanism of the return from the subroutine according to
the trace stored in the stack enables automatic returns to subsequent calling program contexts
with the preserved proper order of returns.
The following below represents actions concerned with nested subroutine calls from a
leading program thread. During the call of the subroutine 1 (Call 500 stored at address 100), the
return address 101 is stored in the stack. During the call of subroutine 2 (Call 900 written at
address 600), the return address 601 is stored in the stack. When returning from subroutine 2, the
address 601 is taken from the stack. When returning from the subroutine 1, the address 101 is
taken from the stack.
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Figure: The use of stack in subroutine calls
9. PROGRAM INTERRUPT
When a Process is executed by the CPU and when a user Request for another Process
then this will create disturbance for the Running Process. This is also called as the Interrupt.
Interrupts can be generated by User, Some Error Conditions and also by Software’s and the
hardware’s. But CPU will handle all the Interrupts very carefully because when Interrupts are
generated then the CPU must handle all the Interrupts Very carefully means the CPU will also
Provides Response to the Various Interrupts those are generated. So that When an interrupt has
Occurred then the CPU will handle by using the Fetch, decode and Execute Operations.
Interrupts allow the operating system to take notice of an external event, such as a mouse
click. Software interrupts, better known as exceptions, allow the OS to handle unusual events
like divide-by-zero errors coming from code execution.
The sequence of events is usually like this:
1. Hardware signals an interrupt to the processor
2. The processor notices the interrupt and suspends the currently running software
3. The processor jumps to the matching interrupt handler function in the OS
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4. The interrupt handler runs its course and returns from the interrupt
5. The processor resumes where it left off in the previously running software
The most important interrupt for the operating system is the timer tick interrupt. The
timer tic interrupt allows the OS to periodically regain control from the currently running user
process. The OS can then decide to schedule another process, return back to the same process, do
housekeeping, etc. The timer tick interrupt provides the foundation for the concept of preemptive
multitasking.
10. TYPES OF INTERRUPTS
There are three types of Interrupts as follows:
1) Internal Interrupt
2) Software Interrupt
3) External Interrupt
1. INTERNAL INTERRUPT
As clear to its name, internal interrupts are those which are occurred due to Some
Problem in the Execution. It seems to be used mostly to refer to what are also known as
exceptions: interrupts that occur in response to a processing error, such as referencing an invalid
address in memory, division by zero, or similar error condition.
2. SOFTWARE INTERRUPT
A software interrupt is a type of interrupt generated by executing an instruction is called
software interrupt. A software interrupt is invoked by software, unlike a hardware interrupt, and
is considered one of the ways to communicate with the kernel or to invoke system calls,
especially during error or exception handling. Software interrupts are generally used to make
system calls.
3. EXTERNAL INTERRUPT
External interruptions are generated by peripheral devices, such as keyboards, printers,
communication cards, etc. The External Interrupt occurs when any Input and Output Device
request for any Operation and the CPU will Execute that instructions first.
These interruptions are not sent directly to the CPU but they are sent to an integrated
circuit whose function is to exclusively handle this type of interruptions.
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