Data Sheet No.

PD60269

IRS2003(S)PbF
HALF-BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation
Product Summary
• Fully operational to +200 V VOFFSET 200 V max.
• Tolerant to negative transient voltage, dV/dt
immune IO+/- 130 mA/270 mA
• Gate drive supply range from 10 V to 20 V
• Undervoltage lockout VOUT 10 V - 20 V
• 3.3 V, 5 V, and 15 V logic compatible
• Cross-conduction prevention logic ton/off (typ.) 680 ns/150 ns
• Matched propagation delay for both channels
• Internal set deadtime Deadtime (typ.) 520 ns
• High-side output in phase with HIN input
• Low-side output out of phase with
 input Packages
• RoHS compliant
Description
The IRS2003 is a high voltage, high speed power
MOSFET and IGBT drivers with dependent high- and
low-side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge- 8-Lead PDIP 8-Lead SOIC
IRS2003 IRS2003S
dized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output, down
to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side
configuration which operates up to 200 V.

Typical Connection
   



 
  


  





(Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only. Please refer to
our Application Notes and DesignTips for proper circuit board layout.

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 IRS2003(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.

Symbol Definition Min. Max. Units

VB High-side floating absolute voltage -0.3 225
VS High-side floating supply offset voltage VB - 25 VB + 0.3
VHO High-side floating output voltage VS - 0.3 VB + 0.3
V
VCC Low-side and logic fixed supply voltage -0.3 25
VLO Low-side output voltage -0.3 VCC + 0.3
VIN Logic input voltage (HIN &
 ) -0.3 VCC + 0.3
dVs/dt Allowable offset supply voltage transient — 50 V/ns
(8 Lead PDIP) — 1.0
PD Package power dissipation @ TA ≤ +25 °C W
(8 Lead SOIC) — 0.625
(8 Lead PDIP) — 125
RthJA Thermal resistance, junction to ambient °C/W
(8 Lead SOIC) — 200
TJ Junction temperature — 150
TS Storage temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) — 300

Recommended Operating Conditions

The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential.

Symbol Definition Min. Max. Units

VB High-side floating supply absolute voltage VS + 10 VS + 20
VS High-side floating supply offset voltage Note 1 200
VHO High-side floating output voltage VS VB
V
VCC Low-side and logic fixed supply voltage 10 20
VLO Low-side output voltage 0 VCC
VIN Logic input voltage (HIN &
 ) 0 VCC
TA Ambient temperature -40 125 °C

Note 1: Logic operational for VS of -5 V to +200 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).

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 IRS2003(S)PbF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 °C unless otherwise specified.

Symbol Definition Min. Typ. Max. Units Test Conditions

ton Turn-on propagation delay — 680 820 VS = 0 V
toff Turn-off propagation delay — 150 220 VS = 200 V
tr Turn-on rise time — 70 170
tf Turn-off fall time — 35 90 ns
Deadtime, LS turn-off to HS turn-on &
DT 400 520 650
HS turn-on to LS turn-off
MT Delay matching, HS & LS turn-on/off — — 60

Static Electrical Characteristics

VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.

Symbol Definition Min. Typ. Max. Units Test Conditions

VIH Logic “1” (HIN) & Logic “0” (
 ) input voltage 2.5 — —
VCC = 10 V to 20 V
VIL Logic “0” (HIN) & Logic “1” (
 ) input voltage — — 0.8
V
VOH High level output voltage, VBIAS - VO — 0.05 0.2
IO = 2 mA
VOL Low level output voltage, VO — 0.02 0.1
ILK Offset supply leakage current — — 50 VB = VS = 200 V
IQBS Quiescent VBS supply current — 30 55
IQCC Quiescent VCC supply current — 150 270 VIN = 0 V or 5 V
µA
IIN+ Logic “1” input bias current — 3 10 HIN = 5 V,
 = 0 V
IIN- Logic “0” input bias current — — 5 HIN = 0 V,
 = 5 V
VCC supply undervoltage positive going
VCCUV+ 8 8.9 9.8
threshold
V
VCC supply undervoltage negative going
VCCUV- 7.4 8.2 9
threshold
VO = 0 V, VIN = VIH
IO+ Output high short circuit pulsed current 130 290 —
PW ≤ 10 µs
mA
VO = 15 V, VIN = VIL
IO- Output low short circuit pulsed current 270 600 —
PW ≤ 10 µs

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 IRS2003(S)PbF
Functional Block Diagram

VB

HV
Q
LEVEL
SHIFT HO
PULSE R
FILTER S

VS
IHN
PULSE
GEN

UV
DEAD TIME & DETECT
SHOOT-THROUGH
PREVENTION
VCC
VCC

LO
LIN

COM

Lead Definitions
Symbol Description
HIN Logic input for high-side gate driver output (HO), in phase

 Logic input for low-side gate driver output (LO), out of phase
VB High-side floating supply
HO High-side gate drive output
VS High-side floating supply return
VCC Low-side and logic fixed supply
LO Low-side gate drive output
COM Low-side return

Lead Assignments

1 VCC VB 8 1 VCC VB 8
2 HIN HO 7 2 HIN HO 7

3 LIN VS 6 3 LIN VS 6

4 COM LO 5 4 COM LO 5

8 Lead PDIP 8 Lead SOIC

IRS2003PbF IRS2003SPbF

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 IRS2003(S)PbF




 


   

 


 

Figure 1. Input/Output Timing Diagram

 


   

 

  

Figure 2. Switching Time Waveform Definitions

  





 
 





Figure 3. Deadtime Waveform Definitions

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 IRS2003(S)PbF

1400 1400
1200

Turn-On Delay Time (ns)

1200
Turn-On Delay Time (ns)

1000 Max.
1000
M a x.
800 800

600 600 Typ.

Typ .
400 400

200 200

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) VBIAS Supply Voltage (V)

Figure 4A. Turn-On Time vs. Temperature Figure 4B. Turn-On Time vs. Supply Voltage

1000 500
Turn-Off Delay Time (ns)

Max.
400
Turn-On Delay Time (ns)

800

600 300
Typ.
200 M a x.
400

200 100
Typ.

0 0
-5 0 -2 5 0 25 50 75 100 125
0 2 4 6 8 10 12 14 16 18 20
Temperature (oC)
Input Voltage (V)

Figure 4C. Turn-On Time vs. Input Voltage Figure 5A. Turn-Off Time vs. Temperature

500 1000
(ns)
Turn-Off Delay Time (ns)

Time(ns)

400 800
Delay Time

300 M a x. 600
Turn-OffDelay

Max .
200 400
Turn-Off

Typ .
100 200
Typ.
0 0
10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18
VBIAS Supply Voltage (V)
Input Voltage (V)

Figure 5B. Turn-Off Time vs. Supply Voltage Figure 5C. Turn-Off Time vs. Input Voltage

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 IRS2003(S)PbF

500 500
500

Turn-On Rise Time (ns)

400 400
400
Turn-On Rise Time (ns)

300 300
300
M ax.
200 200
200 Max.
Max.

100 100
100
Typ.
Typ.
Typ.
0 00
-50 -25 0 25 50 75 100 125 110
0 112
2 114
4 116
6 118
8 220
0
o
Temperature ( C) VBIAS Supply Voltage (V)

Figure 6A. Turn-On Rise Time Figure 6B. Turn-On Rise Time
vs. Temperature vs. Voltage

200 200
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)

150 150

Max.
100 100
Max.

50 50
Typ. Typ.
0
0
-50 -25 0 25 50 75 100 125
10 12 14 16 18 20
o
Temperature ( C)
Input Voltage (V)
Figure 7A. Turn-Off Fall Time Figure 7B. Turn-Off Fall Time vs. Voltage
vs. Temperature

1400 1400

1200 1200

1000 1000
Deadtime (ns)
Deadtime (ns)

Max.
800 M a x. 800
Typ .
600 600
T yp.
400 400
M in . Min .
200 200

0 0
-5 0 -2 5 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) VBIAS Supply Voltage (V)

Figure 8A. Deadtime vs. Temperature Figure 8B. Deadtime vs. Voltage

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 IRS2003(S)PbF

5 5

(V)(V)
4 4
Input Voltage (V)

Voltage
InputVoltage
3 3
Mi n. Mi n.

Input
2 2

1 1
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) VBIAS Supply Voltage (V)
Figure 9A. Logic "1" Input Voltage Figure 9B. Logic "1" Input Voltage
vs. Temperature vs. Supply Voltage

4 4

3.2 3.2
Input Voltage (V)
Input Voltage (V)

2.4 2.4

1.6 1.6
Max. Max.
0.8 0.8

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Vcc Supply Voltage (V)

Figure 10A. Logic "0"(HIN) & Logic "1" (LIN ) Figure 10B. Logic "0"(HIN) & Logic "1" ( LIN )
Input Voltage vs. Temperature Input Voltage vs. Voltage

0.5 0.5
High Level Output Voltage (V)
High Level Output Voltage (V)

0.4 0.4

0.3
0.3
Max.

0.2 0.2
Max.

0.1 0.1
Typ. Typ.

0.0
0.0
-50 -25 0 25 50 75 100 125
10 12 14 16 18 20
Temperature ( oC) VBIAS Supply Voltage (V)

Figure 11A. High Level Output Voltage Figure 11B. High Level Output Voltage
vs. Temperature vs. Supply Voltage

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 IRS2003(S)PbF

0.5 0.5

Low Level Output Voltage (V)

Low Level Output Voltage (V)

0.4 0.4

0.3 0.3

0.2 0.2
Max.
0.1 Max. 0.1
Typ. Typ.
0.0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) V BIAS Supply Voltage (V)
Figure 12A. Low Level Output Voltage Figure 12B. Low Level Output Voltage
vs. Temperature vs. Supply Voltage
Offset Supply Leakge Current (µA)

500
Offset Supply Leakge Current (µA)
500

400 400

300 300

200 200

100 100 Max.

M a x.

0 0
-5 0 -2 5 0 25 50 75 100 125 0 200 400 600 800
Temperature (oC) VB Boost Voltage (V)

Figure 13A. Offset Supply Current Figure 13B. Offset Supply Current vs. Voltage
vs. Temperature

150 150
VBS Supply Current (µA)
VBS Supply Current (µA)

120 120

90 90

60 60
M ax. Max.

30 30
Typ. Ty p.
0 0
-5 0 -2 5 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) VBS Floating Supply Voltage (V)

Figure 14A. VBS Supply Current Figure 14B. VBS Supply Current vs. Voltage
vs. Temperature

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 IRS2003(S)PbF

700 700
VCC Supply Current (µA)

VCC Supply Current (µA)

600 600
500 500
400 400
300 Max. 300 Max.

200 200

100 100
Typ. Typ.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Vcc Supply Voltage (V)

Figure 15A. Vcc Supply Current Figure 15B. Vcc Supply Current vs. Voltage
vs. Temperature

30 30
Logic “1” Input Current (µA)
Logic “1” Input Current (µA)

25 25

20 20

15 15
Max. Max.
10 10
Max
5 5 Typ.
Typ.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Vcc Supply Voltage (V)

Figure 16A. Logic "1" Input Current Figure 16B. Logic "1" Input Current
vs. Temperature vs. Voltage

6 6
Logic "0" Input Bias Current (µA)
Logic “0” Input Bias Current (µA)

5 Max 5 Max

4 4

3 3

2 2

1 1

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperatur e ( °C) Supply V oltage (V )
FFigure
ig u r e 1 7 A . LLogic
17A. o g ic ""0"
0 " IInput
n p u t Bias
B i a s Current
C urr en t Figure 17B. Logic "0" Input Bias Current
vs. Temperature vs. Voltage

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 IRS2003(S)PbF
11 11
Max.

Vcc UVLO Threshold -(V)

Vcc UVLO Threshold +(V)

10 10
Typ .
Typ. Max.
9 9
Min. Typ.
Typ.
8 8

7 7 Min.

6 6
-5 0 -2 5 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (oC) Temperature (oC)

Figure 18A. Vcc Undervoltage Threshold(+) Figure 18B. Vcc UndervoltageThreshold (-)
vs. Temperature vs. Temperature

500 500
Output Source Current (mA)
Output Source Current (mA)

400 400
Typ.
300 300

200 200
Min. Typ.
100 100
Min.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) V BIAS Supply Voltage (V)

Figure 19A. Output Source Current Figure 19B. Output Source Current
vs. Temperature vs. Supply Voltage

1000 1000
Output Sink Current (mA)

Output Sink Current (mA)

800 800
Typ.

600 600

400 400
Typ.
Min.
200 200
Min.

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) S
VBIAS Supply Voltage (V)( )

Figure 20A. Output Sink Current Figure 20B. Output Sink Current
vs. Temperature vs. Supply Voltage

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 IRS2003(S)PbF
Case Outlines

01-6014
8-Lead PDIP 01-3003 01 (MS-001AB)

INCHES MILLIMETERS
D B DIM
MIN MAX MIN MAX
A 5 FOOTPRINT A .0532 .0688 1.35 1.75
A1 .0040 .0098 0.10 0.25
8X 0.72 [.028]
b .013 .020 0.33 0.51
8 7 6 5 c .0075 .0098 0.19 0.25
6 H D .189 .1968 4.80 5.00
E E .1497 .1574 3.80 4.00
0.25 [.010] A
1 2 3 4 6.46 [.255] e .050 BASIC 1.27 BASIC
e1 .025 BASIC 0.635 BASIC
H .2284 .2440 5.80 6.20
K .0099 .0196 0.25 0.50
L .016 .050 0.40 1.27
6X e 3X 1.27 [.050]
8X 1.78 [.070] y 0° 8° 0° 8°

e1 K x 45°
A
C y

0.10 [.004]
A1 8X L 8X c
8X b
7
0.25 [.010] C A B

NOTES: 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.

1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
2. CONTROLLING DIMENSION: MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
A SUBSTRATE.
01-6027
8-Lead SOIC 01-0021 11 (MS-012AA)

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 IRS2003(S)PbF

Tape & Reel LOADED TAPE FEED DIRECTION

8-lead SOIC
B A H

F
C

N OT E : CO NTROLLING
D IM ENSION IN MM E

CA R R I E R T A P E D IM E N S I O N F O R 8 S O I CN
M etr ic Im p er i al
Co d e M in M ax M in M ax
A 7 .9 0 8.1 0 0. 31 1 0 .3 18
B 3 .9 0 4.1 0 0. 15 3 0 .1 61
C 11 .7 0 1 2. 30 0 .4 6 0 .4 84
D 5 .4 5 5.5 5 0. 21 4 0 .2 18
E 6 .3 0 6.5 0 0. 24 8 0 .2 55
F 5 .1 0 5.3 0 0. 20 0 0 .2 08
G 1 .5 0 n/ a 0. 05 9 n/ a
H 1 .5 0 1.6 0 0. 05 9 0 .0 62

B
C
A
E

RE E L D IM E NS I O N S FO R 8 S O IC N
M etr ic Im p er i al
Co d e M in M ax M in M ax
A 32 9. 60 3 30 .2 5 1 2 .9 76 13 .0 0 1
B 20 .9 5 2 1. 45 0. 82 4 0 .8 44
C 12 .8 0 1 3. 20 0. 50 3 0 .5 19
D 1 .9 5 2.4 5 0. 76 7 0 .0 96
E 98 .0 0 1 02 .0 0 3. 85 8 4 .0 15
F n /a 1 8. 40 n /a 0 .7 24
G 14 .5 0 1 7. 10 0. 57 0 0 .6 73
H 12 .4 0 1 4. 40 0. 48 8 0 .5 66

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 IRS2003(S)PbF

LEADFREE PART MARKING INFORMATION

Part number IRSxxxxx

Date code YWW? IR logo

Pin 1 ?XXXX
Identifier
Lot Code
? MARKING CODE (Prod mode - 4 digit SPN code)
P Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002

ORDER INFORMATION
8-Lead PDIP IRS2003PbF
8-Lead SOIC IRS2003SPbF
8-Lead SOIC Tape & Reel IRS2003STRPbF

The SOIC-8 is MSL2 qualified.

This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 11/27/2006

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