Data Sheet No.

PD60278

IRS4426/IRS4427/IRS4428(S)PbF
DUAL LOW SIDE DRIVER
Features Product Summary
• Gate drive supply range from 6 V to 20 V
• CMOS Schmitt-triggered inputs
• Matched propagation delay for both channels
• Outputs out of phase with inputs (IRS4426) IO+/- 1.5 A / 1.5 A
• Outputs in phase with inputs (IRS4427)
• OutputA out of phase with inputA and VOUT 6 V - 20 V
outputB in phase with inputB (IRS4428) ton/off (typ.) 50 ns & 50 ns
• RoHS compliant

Descriptions
The IRS4426/IRS4427/IRS4428 are low voltage,
high speed power MOSFET and IGBT driver. Pro- Packages
prietary latch immune CMOS technologies en-
able ruggedized monolithic construction. Logic
inputs are compatible with standard CMOS or
LSTTL outputs. The output drivers feature a high
pulse current buffer stage designed for mini-
mum driver cross-conduction. Propagation
delays between two channels are matched.

8 Lead PDIP 8-Lead SOIC

Block Diagram

1 8
NC NC
TO
2 7
INA OUTA
LOAD
3 6
GND Vs

4 5
INB OUTB

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Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to GND. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.

Symbol Definition Min. Max. Units

VS Fixed supply voltage -0.3 20 (Note 1)
VO Output voltage -0.3 VS + 0.3 V
VIN Logic input voltage -0.3 VS + 0.3
(8 Lead PDIP) — 1.0
PD Package power dissipation @ TA ≤ +25 °C W
(8 lead SOIC) — 0.625
(8 lead PDIP) — 125
RthJA Thermal resistance, junction to ambient °C/W
(8 lead SOIC) — 200
TJ Junction temperature — 150
TS Storage temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) — 300
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.

Recommended Operating Conditions

The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to GND.

Symbol Definition Min. Max. Units

VS Fixed supply voltage 6 20
VO Output voltage 0 VS V
VIN Logic input voltage 0 VS
TA Ambient temperature -40 125 °C

DC Electrical Characteristics
VBIAS (VS) = 15 V, TA = 25 °C unless otherwise specified. The VIN and IIN parameters are referenced to GND and are
applicable to input leads: INA and INB. The VO and IO parameters are referenced to GND and are applicable to the
output leads: OUTA and OUTB.

Symbol Definition Min. Typ. Max. Units Test Conditions

Logic “0” input voltage (OUTA=LO, OUTB=LO)
(IRS4426)
VIH Logic “1” input voltage (OUTA=HI, OUTB=HI) 2.5 — — V
(IRS4427)
Logic “0” input voltage (OUTA=LO), Logic “1”
input voltage (OUTB=HI) (IRS4428)

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DC Electrical Characteristics cont.

VBIAS (VS) = 15 V, TA = 25 °C unless otherwise specified. The VIN, and IIN parameters are referenced to GND and are
applicable to input leads: INA and INB. The VO and IO parameters are referenced to GND and are applicable to the
output leads: OUTA and OUTB.

Symbol Definition Min. Typ. Max. Units Test Conditions

Logic “1” input voltage (OUTA=HI, OUTB=HI)
(IRS4426)
Logic “0” input voltage (OUTA=LO, OUTB=LO)
VIL — — 0.6
(IRS4427)
V
Logic “I” input voltage (OUTA=HI), Logic “0”
input voltage (OUTB=LO) (IRS4428)
VOH High level output voltage, VBIAS-VO — — 1.4 Io = 0 A
VOL Low level output voltage, VO — — 0.15 Io = 20 mA
VIN = 0 V (IRS4426)
VIN = VS (IRS4427)
IIN+ Logic “1” input bias current (OUT=HI) — 5 15
VINA = 0 V (IRS4428)
VINB = VS (IRS4428)
µA VIN = VS (IRS4426)
VIN = 0 V (IRS4427)
IIN- Logic “0” input bias current (OUT=LO) — -10 -30
VINA = VS (IRS4428)
VINB = 0 V (IRS4428)
IQS Quiescent Vs supply current — 100 200 VIN = 0 V or VS
VO = 0 V, VIN = 0 V
(IRS4426)
VO = 0 V, VIN = VS
(IRS4427)
IO+ Output high short circuit pulsed current --- 2.3 —
VO = 0 V, VINA = 0 V
(IRS4428)
VO = 0 V, VINB = VS
(IRS4428)
A
PW ≤ 10 µs
VO = 15 V, VIN = VS
(IRS4426)
VO = 15 V, VIN = 0 V
(IRS4427)
IO- Output low short circuit pulsed current --- 3.3 —
VO = 15 V, VINA = VS
(IRS4428)
VO = 15 V, VINB = 0 V
(IRS4428)
PW ≤ 10 µs

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AC Electrical Characteristics
VBIAS (VS) = 15 V, CL = 1000 pF, TA = 25 oC unless otherwise specified.

Symbol Definition Min. Typ. Max. Units Test Conditions

Propagation delay characteristics
td1 Turn-on propagation delay — 50 95
td2 Turn-off propagation delay — 50 95 ns Fig. 4
tr Turn-on rise time — 25 55
tf Turn-off fall time — 25 55

Functional Block Diagram IRS4426

5V
Vs

INA OUTA
PREDRV DRV

5V
Vs

INB OUTB
PREDRV DRV

GND

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 IRS4426/IRS4427/IRS4428(S)PbF

Functional Block Diagram IRS4427

Vs

INA OUTA
PREDRV DRV

Vs

INB OUTB
PREDRV DRV

GND

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Functional Block Diagram IRS4428

5V
Vs

INA OUTA
PREDRV DRV

Vs

INB OUTB
PREDRV DRV

GND

Lead Definitions
Symbol Description
VS Supply voltage
GND Ground
INA Logic input for gate driver output (OUTA), out of phase (IRS4426, IRS4428), in phase (IRS4427)
INB Logic input for gate driver output (OUTB), out of phase (IRS4426), in phase (IRS4427, IRS4428)
OUTA Gate drive output A
OUTB Gate drive output B

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Lead Assignments

INA OUTA INA OUTA INA OUTA

GND VS GND VS GND VS

V S

INB OUTB INB OUTB INB OUTB

8 Lead PDIP 8 Lead PDIP 8 Lead PDIP

IRS4426 IRS4427 IRS4428

Part Number

Lead Assignments

INA OUTA INA OUTA INA OUTA

GND VS GND VS GND VS

V S

INB OUTB INB OUTB INB OUTB

8 Lead SOIC 8 Lead SOIC 8 Lead SOIC

IRS4426S IRS4427S IRS4428S

Part Number

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INA (IRS4426, IRS4428)

INB (IRS4426)

INA (IRS4427)
INB (IRS4427, IRS4428)

OUTA
OUTB

Figure 1. Timing Diagram

INA (IRS4426, IRS4428)

INB (IRS4426)

INA (IRS4427)
INB (IRS4427, IRS4428)
td1 td2
tr tf

OUTA
OUTB

Figure 2. Switching Time Waveforms

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 IRS4426/IRS4427/IRS4428(S)PbF

VS = 15 V VS = 15 V

6 6
4.7 µF 0.1 µF 4.7 µF 0.1 µF

INA INA
2 7 2 7

OUTA OUTA
CL = 1000 pF CL = 1000 pF

INB INB
4 5 4 5
OUTB OUTB

CL = 1000 pF CL = 1000 pF

3 VS = 15 V 3

IRS4426 IRS4427
6 4.7 µF 0.1 µF

INA
2 7

OUTA
CL = 1000 pF

INB
4 5

OUTB

CL = 1000 pF

IRS4428

Figure 3. Switching Time Test Circuits

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5 6
Logic "1" Input Voltage (V)

Logic "1" Input Voltage (V)

4 5

4
3
Min. 3 Min.

2
2
1
1

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperatur e (o C) Supply Voltage (V)

Figure 4A. Logic "1" Input Voltage vs. Figur e 4B. Logic "1" Input Voltage
Temperature vs. Supply Voltage

5 6
Logic "0" Input Voltage (V)

Logic "0" Input Voltage (V)

4 5

4
3
3
2
2
1 Min.
Min.
1

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperatur e (o C) Supply Voltage (V)

Figure 5A. Logic "0" Input Voltage vs. Figure 5B. Logic "0" Input Voltage
Temperature vs. Supply Voltage

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5 5
High L evel Output Vol tage (V)

High L evel Output Vol tage (V)

4 4

3 3

M ax
2 2
Max.
1 1

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (o C) V B AIS Supply Voltage (V)

Figure 6A. High Level Output Voltage Figure 6B. High Level Output Voltage
vs. Temperature (Io = 0 mA) vs. Su pply Voltage (Io = 0 mA)

1.0 1.0
Low Level Output Volt age (V)

Low Level Output Volt age (V)

0.8 0.8

0.6 0.6

0.4 0.4

0.2 M ax. 0.2

M ax
0.0 0.0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature ( o C) V BIAS Supply Volt age (V)

Figure 7A. Low Level Ou tput Voltage vs. Figur e 7B. Low Level Output vs.
Tem perature (Io = 20 m A) Supply Voltage (I o = 20 m A)

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Logic "1" Input Bias Curr ent (µA )

30 30
Logi c "1" Input Bias Current (µA)
υ

20 20
Max.
Max.

10 10

Typ. Typ.

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) Supply Voltage (V)

Figure 8A. Logic "1" Input Bias Current vs. Figure 8B. Logic "1" Input Bias Current
Temperature vs. Supply Voltage
Logi c "0" Input Bias Current (µA)

Logic "0" Input Bias Curr ent (µ A)

50 50

40 40
Max. Max.
30 30

20 20
Typ. Typ.
10 10

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (o C) Supply Voltage (V)

Figure 9A. Logic "0" Input Bias Cur rent Figure 9B. Logic "0" Input Bias Curr ent
vs. Temperature vs. Supply Voltage

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 IRS4426/IRS4427/IRS4428(S)PbF

500
500

VS Sup ply Current (µ A)

VS Sup ply Current (µA )

400 400

300 300
Max.
200 200 Max.

Typ.
100 100
Typ.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (o C) VS Supply Voltage (V)

Figure 10A. VS Supply Curre nt vs. Tempe rature Figure 10B. VS Supply Current
vs. VS Supply Voltage

3.0 5
Output Source Curr ent (A)
Output Source Curr ent (A)

Typ.

2.5 4

2.0 3
Min.

1.5 2 Typ.

1.0 1
Min.

0.5 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) Supply Voltage (V)

Figure 11A. Output Source Current vs. Temperature Figure 11B. Output Source Current
vs. Supply Voltage

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5.0 5

Output Sink Current (A)

Output Sink Current (A)

Typ. 4
4.0
3
3.0
2
Typ.

2.0
1
Min. Min.

1.0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) Supply Voltage (V)

Figure 12A. Output Sink Current vs. Temperature Figure 12B. Output Sink Current
vs. Supply Voltage

300 300
Turn-On Propagation Delay (ns)

Turn-On Propagation Delay (ns)

200 200

100 100 Max.

Max.
Typ.
Typ.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) Supply Voltage (V)

Figure 13A. Turn-On Propagation De lay Figure 13B. Turn-On Propagation De lay
vs. Tempe rature vs. Supply Voltage

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300

T urn -Off Pr opagation Delay (ns)

300
T urn -Off Pr opagation Delay (ns)

200 200

Max.
100 100
Max.

Typ. Typ.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) Supply Voltage (V)

Figure 14A. Turn-Off Propagation De lay Figure 14B. Turn-Off Propagation Delay
vs. Tempe rature vs. Supply Voltage

75 75
T ur n - On Rise Time ( n s )
T ur n - On Rise Time ( n s )

60 60
Max.
45 45

30 30
Max.
Typ.
15 15
Typ.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (o C) Supply Voltage (V)

Figure 15A. Turn-On Rise Time vs. Temperature Figure 15B. Turn-On Rise Time vs. Supply Voltage

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75 75
Tur n - Off F all Time (ns)

T ur n -Off Fall Time (ns)

60 60

45 45
Max.
30 30
Max.

15 15
Typ.
Typ.

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
o
Temperature ( C) Supply Voltage (V)

Figure 16A. Turn-Off Fall Time vs. Temperature Figure 16B. Tur n-Off Fall Time vs. Supply Voltage

Caseoutline

8 Lead PDIP 01-3003 01

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 IRS4426/IRS4427/IRS4428(S)PbF

Case Outline - 8 Lead SOIC

(MS-012AA) 01-0021 09

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 IRS4426/IRS4427/IRS4428(S)PbF

Tape & Reel LOAD ED TA PE FEED DIRECTION

8-lead SOIC
B A H

F
C

N OT E : CO NTROLLING
D IM ENSION IN M M E

C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N
M e tr ic Im p e r i a l
Co d e M in M ax M in M ax
A 7 .9 0 8.1 0 0. 3 1 1 0 .3 1 8
B 3 .9 0 4.1 0 0. 1 5 3 0 .1 6 1
C 1 1 .7 0 1 2. 30 0 .4 6 0 .4 8 4
D 5 .4 5 5.5 5 0. 2 1 4 0 .2 1 8
E 6 .3 0 6.5 0 0. 2 4 8 0 .2 5 5
F 5 .1 0 5.3 0 0. 2 0 0 0 .2 0 8
G 1 .5 0 n/ a 0. 0 5 9 n/ a
H 1 .5 0 1.6 0 0. 0 5 9 0 .0 6 2

B
C
A
E

R E E L D IM E N S I O N S F O R 8 S O IC N
M e tr ic Im p e r i a l
Co d e M in M ax M in M ax
A 32 9. 60 3 30 .2 5 1 2 .9 7 6 1 3 .0 0 1
B 2 0 .9 5 2 1. 45 0. 8 2 4 0 .8 4 4
C 1 2 .8 0 1 3. 20 0. 5 0 3 0 .5 1 9
D 1 .9 5 2.4 5 0. 7 6 7 0 .0 9 6
E 9 8 .0 0 1 02 .0 0 3. 8 5 8 4 .0 1 5
F n /a 1 8. 40 n /a 0 .7 2 4
G 1 4 .5 0 1 7. 10 0. 5 7 0 0 .6 7 3
H 1 2 .4 0 1 4. 40 0. 4 8 8 0 .5 6 6

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 IRS4426/IRS4427/IRS4428(S)PbF

LEADFREE PART MARKING INFORMATION

Part number IRxxxxxx

S
Date code YWW? IR logo

Pin 1 ?XXXX
Identifier
Lot Code
? MARKING CODE (Prod mode - 4 digit SPN code)
P Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002

ORDER INFORMATION
8-Lead PDIP IRS4426PbF
8-Lead SOIC IRS4426SPbF
8-Lead PDIP IRS4427PbF
8-Lead SOIC IRS4427SPbF
8-Lead PDIP IRS4428PbF
8-Lead SOIC IRS4428SPbF

The SOIC-8 is MSL2 qualified.

This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 11/20/2006
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