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A B C D E

Cover Sheet
888Z4.5 / LA-1302 Mother Board Rev : 0.5 for Layout
Intel (Northwood) with Intel 845M+ICH3
1 1

SHEET TITLE
1 Cover Page
2 Block Diagram
3,4 Northwood CPU / Fan / Thermal
5 CPU Decoupling
6,7,8 North Bridge Intel 845MP
9,10,11 DDR-SODIMM
12 Clock Generator
13,14,15 VGA ATI M7C/ Penal interface
2
16, 17 VGA DDR SGRAM/ CRT & TVOUT CONNECTOR 2

18,19,20 South Bridge ICH3M


21 Card Bus Controller / Card Bus Socket
22 IEEE1394 VT6306 / PHY
23 LAN Controller RTL8100BL
24 Audio DJ OZ163
25 AC97 Codec_ALC201
26 Audio EQ_TAS3002
27 AMP & Audio Jack stencil not open:
28 HDD/CDROM J1
29 LPC EC_PC87591 U24
3

30 PJP2 3

BIOS & I/O Port PJP4


31 Printer/USB Port/TP C715
32 C716
Dot Matrix LCD/FIR/Reset/PS PC155
33 DC/DC Interface C72
34 C94
Mimi-PCI & Docking
35 SIO VT1211
36 SD CONTROLLER/SOCKET/UNSED GATES
37 5V/3V/12V
38 CHARGER
39 CPU_CORE
4 40 DETECTOR 4

41 DDR/Connector
42 Notes & PIR List
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 1 of 45
A B C D E
A B C D E

Compal confidential Block Diagram


Model Name : 888Z4/LA-1301 (Intel Northwood) +CPU_CORE +1.2VS
Intel Y1
14.318MHZ
Northwood Micro-FCPGA +3VS
Power On/Off VID SELECT page 3,4,5 Clock Generator
1 Reset Circuit /CPU_CORE Decouple W320-04/9508-05 1

CAP.
New
page 29 page 5 page12 +3VSUS
+3VRUN

+1.8VS +1.5VS +CPU_CORE


+3VS CRT Connector
page 17 Brookdale-M
MCH-M
LCDVDD +5VS FOR INVERTER +3VS +1.8VS page6,7,8
+2.5V
DC/DC Interface TFT/HPA Panel
RTC Battery Interface
ATI M7C

MA(0..13)
page +1.5VS

MD(0..63)
page 30 page 13 13,14,15 +2.5VS

+2.5VS page 16 +2.5V +3VS +2.5V +3VS +1.25VS


TV OUT SGRAM DDR page 9 DDR page 10 TERMINATION
Connector 8/16MB SO-DIMM 0 SO-DIMM 1 RESISTORS
page 17
2
(Bank 0,1) (Bank 2,3) 2

PCI BUS HUB LINK


AC Link AD(0..31) DDR page 11
Decoupling
+3VS +5VS +3VALW +3V +3VS +1.8VS +CPU_CORE +3VS +1.8VALW +3VALW
Mini PCI PCMCIA VIA VT6306 ICH3-M
Socket CB1410 1394 Controller
page 31 page 21 page 22 421 BGA
page 18,19,20

S1_VCC +3VALW +5VS +5VALW +3VALW


+5VALW
* HSP Modem Card
Slot 0 +12VALW USB USB
* Combo for HSP Modem and page 21 Port 0,1 Port 2
802.11b page 31
* Controllerless Modem S1_VPP Bluetooth
page 31
* Combo for Controllerless
3 Modem and 802.11b LPC BUS 3

+5VCD +5VS
AC Link HDD Docking Connector
+3VALW OR +2.5VALW +3VS +3VALW
14M_5V
RJ45/RJ11 Super I/O KeyBoard Connector * DC-IN
Jack LAN OZ163 page 28 * 2 USB Port
* TV Out (S Video)
page 23 RTL8100BL SMC47N227 NS87591 AC Link * VGA Out
page 24
page 23 page 35 page 29 * 2 PS/2
+3VS AVDD +5VALW * LAN
AC97 +5VS
* Parallel Port
* Serial Port
6-7A 6-7A 3A 50mA
+5VS
Touch Pad KBD
page 29
Codec
page 25
* Line Out
+3VALWP +5VALWP +2.5VALWP +12VALWP page 31 * Headphone
* Microphone
+1.25VP 3A
Power Circuit I/O Buffer page 34
DC/DC +1.2VP 300mA
PIO page 30 +3VCD +5VAMP +5VCD +5VCD +5VALW
page 37,38,39,40,41 page 31
Audio AMP CD-ROM +3VCD +3VALW
+3VALW EQ Jack Connector +5VAMP +5VALW
4 BIOS page 26 page 27 page 28 4

page 30
EN_CDPLAY#
PCB1
+3VS +3VS,+5VS Speaker
page 27
Smart Card SD Compal Electronics, Inc.
Title
LA-1302 PCB Connector CONTROLLER THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
page 36 page 36
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 2 of 45
A B C D E
5 4 3 2 1

+CPU_CORE

AC10
AC12
AC14
AC16
AC18

AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18

AB11
AB13
AB15
AB17
AB19

AE10
AE12
AE14
AE16
AE18
AE20

AF11
AF13
AF15
AF17
AF19

AF21
AC8

AD7
AD9
AA8

AB7
AB9

AE6
AE8

AF2

AF5
AF7
AF9

C10
C12
C14
C16
C18
C20

D11
D13
D15
D17
D19
A10
A12
A14
A16
A18
A20

B11
B13
B15
B17
B19

E10
C8

D7
D9
A8

B7
B9
HA#[3..31] U13A HD#[0..63]
6 HA#[3..31] HD#[0..63] 6

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
HA#3 K2 B21 HD#0
HA#4 A#3 D#0 HD#1
K4 B22
D HA#5 A#4 D#1 HD#2 D
L6 A23
HA#6 A#5 D#2 HD#3
K1 A25
HA#7 A#6 D#3 HD#4
L3 C21
HA#8 A#7 D#4 HD#5
M6 D22
HA#9 A#8 D#5 HD#6
L2 B24
HA#10 A#9 D#6 HD#7
M3 C23
HA#11 A#10 D#7 HD#8
M4 C24
HA#12 A#11 D#8 HD#9
N1 B25
HA#13 A#12 D#9 HD#10
M1 G22
HA#14 A#13 D#10 HD#11
N2 H21
HA#15 A#14 D#11 HD#12
N4 C26
HA#16 A#15 D#12 HD#13
N5 D23
HA#17 A#16 D#13 HD#14
T1 J21
HA#18 A#17 D#14 HD#15
R2 D25
HA#19 A#18 D#15 HD#16
P3 H22
HA#20 A#19 D#16 HD#17
P4 E24
HA#21 A#20 D#17 HD#18
R3 G23
HA#22 A#21 D#18 HD#19
T2 F23
HA#23 A#22 D#19 HD#20
U1 F24
HA#24 A#23 D#20 HD#21
P6 E25
HA#25 A#24 D#21 HD#22
U3 F26
HA#26 A#25 D#22 HD#23
T4 D26
HA#27 A#26 D#23 HD#24
V2 L21
HA#28 A#27 D#24 HD#25
R6 G26
HA#29 A#28 D#25 HD#26
W1 H24
HA#30
HA#31
T5
U4
V3
A#29
A#30
A#31
Mobile D#26
D#27
D#28
M21
L22
J24
HD#27
HD#28
HD#29
A#32 D#29 HD#30
W2 K23
A#33 D#30 HD#31
Y1 H25
A#34 D#31 HD#32
AB1 M23
C 6 HREQ#[0..4]
HREQ#[0..4]

HREQ#0 J1
A#35
NorthWood D#32
D#33
D#34
N22
P21
M24
HD#33
HD#34
HD#35
C

HREQ#1 REQ#0 D#35 HD#36


K5 N23
HREQ#2 REQ#1 D#36 HD#37
J4 M26
HREQ#3 REQ#2 D#37 HD#38
J3 N26
HREQ#4 REQ#3 D#38 HD#39
H3 N25
REQ#4 D#39 HD#40
6 HADS# G1 R21
ADS# D#40 HD#41
P24
D#41 HD#42
R25
D#42 HD#43
AC1 R24
+CPU_CORE AP#0 D#43 HD#44
V5 T26
R233 10K_0402 AP#1 D#44 HD#45
AA3 T25
BINIT# D#45 HD#46
1 2 AC3 T22
IERR# D#46 HD#47
T23
D#47
1 2 R221 220_1%_0402 U26 HD#48
D#48 HD#49
6 HBR0# H6 U24
BR0# D#49 HD#50
6 HBPRI# D2 U23
BPRI# D#50 HD#51
6 HBNR# G2 V25
BNR# D#51 HD#52
6 HLOCK# G4 U21
LOCK# D#52 HD#53
V22
D#53 HD#54
V24
CLK_HCLK D#54 HD#55
12 CLK_HCLK AF22 W26
CLK_HCLK# BCLK0 D#55 HD#56
12 CLK_HCLK# AF23 Y26
BCLK1 D#56 HD#57
W25
D#57 HD#58
Y23
D#58 HD#59
Y24
D#59 HD#60
6 HIT# F3 Y21
HIT# D#60 HD#61
6 HITM# E3 AA25
HITM# D#61 HD#62
6 HDEFER# E2 AA22
DEFER# D#62 HD#63
AA24
D#63

VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9

B B

AC11
AC13
AC15
AC17
AC19

AC22
AC25

AD10
AD12
AD14
AD16
AD18
AD21
AD23
AA11
AA13
AA15
AA17
AA19
AA23
AA26

AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24

AC2

AC5
AC7
AC9
AD1

AD4
AD8
AA1

AA4
AA7
AA9

AB3
AB6
AB8
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26

E20
E18
E16
E14
E12
F13
F15
F17
F19

F11
H1
H4

A3
A9

E8
F9
NorthWood

+CPU_CORE

+12VS +12VS

Fan1 Control circuit Fan2 Control circuit


2

2
R91 R314
3.48K_1% Q12 +5VS @3.48K_1% Q1 +5VS
1

1
FMMT619 1 @FMMT619 1
D7 D1
1

1
2 2
3 1SS355 3 @1SS355
1

2
C429 +5VS C240 +5VS
.1UF_0402 D15 @.1UF_0402 D11
2

2
.1UF_0402 1N4148 +5VFAN1 @.1UF_0402 @1N4148 +5VFAN2
2

2
1 2 1 2
C108 C238
2

C424 2.2UF_16V_0805 JP13 C239 @2.2UF_16V_0805 JP4


5 VCC 5 VCC
1

1
1

1
C722 C123 1 C723 C1 1
29 EN_FAN1 1 3 29 EN_FAN2 1 3
A Q17 2 Q13 2 A
4 2 4 2
3 3
1 2 3 1 2SA1036K 1000PF_0402 1 2 3 1 @2SA1036K @1000PF_0402
R249 13K_1% U19 10UF_10V_0805 53398-0310 R144 @13K_1% U17 @10UF_10V_0805 @53398-0310
2

2
2 2
VEE LMV321_SOT23-5 VEE @LMV321_SOT23-5
FANSPEED1 29
PIR PIR
1 2 1 2
R245 7.32K_1% R143 @7.32K_1%
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC. 3
Date: Wednesday, May 29, 2002 Sheet of 45
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
+CPU_CORE

1
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26

AF10
AF12
AF14
AF16
AF18
AF20
AF26
R226 200_0402

AE7
AE9

C11
C13
C15
C17
C19

C22
C25

D10
D12
D14
D16
D18
D20
D21
D24
AF1

AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26

E11
E13
E15
E17
E19
E23
E26

F10
F12
F14
F16
F18

F22
F25
C2

C5
C7
C9

D3
D6
D8
H_A20M# R197

B4
B8

E1

E4
E7
E9

F2

F5
2 1
R230 200_0402
U13B GTL Reference Voltage
2 1 H_SMI# Trace width > 7 mils 49.9_1%_0402

VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
SKTOCC#
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
R234 200_0402
H_IGNNE# +H_GTLREF1

2
2 1
R231 200_0402

1
2 1 H_STPCLK#

1
R191 200_0402 F1 J26 C338 C343 R196
6 H_RS#0 RS#0 DP#0
2 1 H_DPSLP# G5 K25
6 H_RS#1 RS#1 DP#1
R229 200_0402 F4 K26 All of these pin 220PF_0402 100_1%_0402
6 H_RS#2 RS#2 DP#2
H_NMI 1UF_10V

2
2 1 AB2 L25 connected
RSP# DP#3
R228

2
200_0402 6 H_TRDY# J6 TRDY#
D 2 1 H_INIT# inside D
R240 200_0402 AA21
H_INTR H_A20M# GTLREF0
2 1 18 H_A20M# C6 AA6
H_F_FERR# A20M# GTLREF1
18 H_F_FERR# B6 F20
H_IGNNE# FERR# GTLREF2
R224 56_0402 18 H_IGNNE# B2 IGNNE# GTLREF3 F6 Layout note :
2 1 H_F_FERR# H_SMI# B5 A22 +CPU_CORE 1. Place R_A and R_B near CPU.
18 H_SMI# SMI# NC1
R194 301_1%_0402 H_PWRGD AB23 A7 2. Place decoupling cap 220PF near CPU.(Within
18 H_PWRGD PWRGOOD NC2
2 1 H_PWRGD H_STPCLK# Y4
18 H_STPCLK#
H_DPSLP# STPCLK# 500mils)
18 H_DPSLP# AD25
51.1_1% H_INTR DPSLP# TESTTHI0_1 R192
R187 18 H_INTR D1 AD24 1 2 56_0402
H_RESET# H_NMI LINT0 TESTHI0
2 1 18 H_NMI E5 AA2
H_INIT# LINT1 TESTHI1 TESTTHI2_7 R193
18 H_INIT# W5 AC21 1 2 56_0402
H_RESET# INIT# TESTHI2
R75 200_0402 6 H_RESET# AB25 AC20
PM_CPUPERF# RESET# TESTHI3
2 1 AC24
TESTHI4
AC23
TESTHI5 ITPCLKOUT0 R200
6 H_DBSY# H5 AA20 1 2 56_0402
DBSY# ITPCLKOUT0 ITPCLKOUT1 R195
Place resistor <100mils from 6 H_DRDY# H2 AB22 1 2 56_0402
DRDY# ITPCLKOUT1 TESTTHI8_10 R225
CPU pin 12 H_BSEL0 AD6 BSEL0 U6 1 2 56_0402
TESTHI8
12 H_BSEL1 AD5 BSEL1 W4
TESTHI9
Y3

+1.2VS
H_THERMDA
H_THERMDC
B3
C4
THERMDA
Mobile TESTHI10
GHI#
A6 PM_CPUPERF#
H_DSTBN#[0..3]
PM_CPUPERF# 18
H_DSTBN#[0..3] 6
THERMDC H_DSTBN#0
E22
H_THERMTRIP# DSTBN#0 H_DSTBN#1
1 2 A2 THERMTRIP# K22
R92 56_0402 DSTBN#1 H_DSTBN#2
R22

AC6
AB5
BPM#0
NorthWood DSTBN#2
DSTBN#3
W22 H_DSTBN#3
H_DSTBP#[0..3]
H_DSTBP#[0..3] 6
ITP_BPM0 BPM#1 H_DSTBP#0
AC4 F21
ITP_BPM1 BPM#2 DSTBP#0 H_DSTBP#1
Y6 J23
ITP_PRDY# BPM#3 DSTBP#1 H_DSTBP#2
AA5 P23
C ITP_PREQ# BPM#4 DSTBP#2 H_DSTBP#3 C
AB4 W23
BPM#5 DSTBP#3

ITP_TCK D4 L5
TCK ADSTB#0 H_ADSTB#0 6
ITP_TDI C1 R5
TDI ADSTB#1 H_ADSTB#1 6
D5
+1.2VS ITP_TMS TDO H_DBI#[0..3]
F7 H_DBI#[0..3] 6
Murata LQG21F4R7N00 ITP_TRST# TMS H_DBI#0
E6 E21
TRST# DBI#0 H_DBI#1
G25
L14 4.7UH_80mA DBI#1 H_DBI#2
P26
H_VCCA DBI#2 H_DBI#3
1 2 AD20 V21
4.7UH_80mA TP1 VCCA DBI#3 +CPU_CORE
L15 1 A5
H_VCCIOPLL AE23 VCCSENSE
1 2 AE25
VCCIOPLL DBR#
AF25 R232 56_0402
NC7 H_PROCHOT#
AF3 NC8 C3 1 2
PROCHOT#
1

MCERR# V6
If used ITP port must depop + C49 + C59 AB26 H_SLP#
33UF_D2_16V 33UF_D2_16V SLP# H_SLP# 18
AC26 2 1 +CPU_CORE
RP16 8P4R_1.5K_0804 ITP_CLK0 H_VSSA
2

AD26 AD22
ITP_TDI H_VSSA ITP_CLK1 VSSA R188 200_0402
1 8 A4 1
ITP_TMS VSSSENSE
2 7 L24
ITP_TRST# COMP0 TP2
3 6 P1
ITP_TCK COMP1
4 5 AD2
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
NC3
2

AF4 VCCVID
AD3
R190 R113 NC4

VID0
VID1
VID2
VID3
VID4
12 CLK_ITPP

AE21 NC5
NC6
+3VS
12 CLK_ITPP#

AF24
+CPU_CORE

W21
W24
M22
M25
G21
G24

AE5
AE4
AE3
AE2
AE1
N21
N24

R23
R26

U22
U25
51.1_1% 51.1_1%
K21
K24

P22
P25

V23
V26

Y22
Y25
T21
T24
L23
L26
J22
J25

W3
W6
M2

M5
G3
G6

N3
N6

R1

R4

U2

U5
K3
K6

P2

P5

V1

V4

Y2

Y5
F8

T3
T6
L1

L4
J2

J5

NorthWood
1

1
2
3
4
R117 51.1_1%
B 2 1 ITP_PREQ# +1.2VS R104 RP112 B
2 1 ITP_PRDY# 1K_0402
8P4R_1K_0804
R116 51.1_1%
C135

8
7
6
5
R119 51.1_1% CPU_VID4 CPU_VID4
CPU_VID4 39
2 1 ITP_BPM0 CPU_VID3 .1UF_0402 CPU_VID3
CPU_VID3 39
2 1 ITP_BPM1 CPU_VID2 CPU_VID2
CPU_VID2 39
CPU_VID1 CPU_VID1
CPU_VID1 39
R118 51.1_1% CPU_VID0 CPU_VID0
CPU_VID0 39

+5VALW
Thermal Sensor ADM1032AR +3VS
H_THERMDA W=15mil
R85
2

+5VS
@0_0402

2
C129
29 THERMDA_591 .1UF_0402 R246
R244
2

2
@301_1%_0402
1
1

2
R519 1K_0402
C122 6,13,18,21,22,23,29,34,35,36 PCIRST# R242
2200PF_0402 U56 R248

2
1K_0402 PROCHOT# 470_0402

1
2

R241
G
2

R81 2 D+ VDD1 1 0_0402


470_0402
1

1
@0_0402 R82 1
PROCHOT#
1

29 THERMDC_591 3 6 PROCHOT# 29 37,40 MAINP 1 3 Q23 2


D- ALERT
3
D

@0_0402 3904 Q22


H_THERMDC
1
8 4 1 Q18
SCLK THERM Q21 3904
24,29,34 EC_SMC2 2 3904
A 7 5 3 1 A
24,29,34 EC_SMD2 SDATA GND 2N7002 R237
Q19 2 1 2 H_PROCHOT#
3904 3
470_0402
2

ADM1032AR_SOP-8 1 R238
R83 2 1 2 H_THERMTRIP#
R02 10K_0402 3
470_0402
Address:1001_100X PIR1
Compal Electronics, Inc.
1

Title
SCHEMATIC, M/B LA-1302
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
+3VALW DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC. 4
Date: Wednesday, May 29, 2002 Sheet of 45
5 4 3 2 1
A B C D E

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Layout note : AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Layout note : DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
Place close to CPU power and USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Place close to CPU, Use 2~3 vias per PAD. ground pin as possible
Place .22uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls. (<1inch)
Use 2~3 vias per PAD.

R02
Please place these cap in the socket cavity area +CPU_CORE PIR2 Used ESR 15m ohm cap total ESR=2.5m ohm

+CPU_CORE
1 1

1
+ C73 + C126 + C72 + C60 + C94
1

1
220UF_D2_4V_25m
C357 C370 C378 C346 C355 @220UF_D2_4V_25m @220UF_D2_4V_25m @220UF_D2_4V_25m @220UF_D2_4V_25m
10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R

2
2

2
+CPU_CORE
+CPU_CORE

1
1

1
+ C715 + C342 + C364 + C716 + C390
C347 C367 C376 C345 C358 4SP560M 220UF_D2_4V_25m 220UF_D2_4V_25m 4SP560M @220UF_D2_4V_25m
10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R
2

2
+CPU_CORE
Please place these cap on the socket north side

1
+CPU_CORE C79 C95 C100 C105 C78 C96 C103 C111 C113 C99

.22UF_X7R .22UF_X7R .22UF_X7R .22UF_X7R .22UF_X7R .22UF_X7R .22UF_X7R .22UF_X7R .22UF_X7R .22UF_X7R

2
1

1
C102 C379 C350 C340 C421
10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R
2

2
2 2

+CPU_CORE
1

C363 C339 C352 C368 C397


10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R
2

+CPU_CORE
1

C404 C331 C380 C428


10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R
2

Please place these cap on the socket south side

+CPU_CORE

M1 M2
1

HOLEI HOLEI
3 C387 C150 C408 C56 C305 3

1
10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R
2

1
+CPU_CORE

H1 H2 H4 H8 H6 H3 H5 H7 H11 H9 H10 H21 H16 H14 H17 H24


HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEB HOLEB HOLEB HOLEB HOLEE HOLEF HOLEC HOLED HOLEK
1

1
C67 C334 C383 C372 C393
10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R
2

1
+CPU_CORE

Fiducial Mark
1

C61 C112 C80 C97 FD3 FD2 FD1 FD4 FD6 FD5
10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 10UF_6.3V_1206_X7R 1 1 1 1 1 1
2

H13 H12 H19 H22 H15 H23 H20 H18 H25


FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK HOLEH HOLEH HOLEH HOLEH HOLEI HOLEJ HOLEL HOLEK HOLEL

1
CF23 CF10 CF11 CF5 CF7 CF15 CF16
1 1 1 1 1 1 1

1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK

4 CF20 CF6 CF21 CF13 CF12 CF18 CF14 4


1 1 1 1 1 1 1
EMI Clip PAD for CPU FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK

PAD1 PAD3 PAD5 PAD7 CF3 CF19 CF25 CF24 CF28 CF27 CF26
1 1 1 1 1 1 1
1 1 1 1
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
Title
Compal Electronics, Inc.
R03 PIR 30
@PAD-2.5X3 @PAD-2.5X3 @PAD-2.5X3 @PAD-2.5X3 CF1 CF4 CF8 CF2 CF9 CF17 CF22 SCHEMATIC, M/B LA-1302
1 1 1 1 1 1 1
Size Document Number Rev
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK 401216 1B

Date: Wednesday, May 29, 2002 Sheet 5 of 45


A B C D E
A B C D E

HD#[0..63]
HD#[0..63] 3
HA#[3..31]
3 HA#[3..31]
U9A AGP_AD[0..31] U9B HUB_PD[0..10]
13 AGP_AD[0..31] HUB_PD[0..10] 18
HA#3 T4 AA2 HD#0 AGP_AD0 R27 P25 HUB_PD0
HA#4 HA#3 HD#0 HD#1 AGP_AD1 G_AD0 HI_0 HUB_PD1
T5 AB5 R28 P24
HA#5 HA#4 HD#1 HD#2 AGP_AD2 G_AD1 HI_1 HUB_PD2
T3 AA5 T25 N27
HA#6 HA#5 HD#2 HD#3 AGP_AD3 G_AD2 HI_2 HUB_PD3
U3 AB3 R25 P23
HA#7 HA#6 HD#3 HD#4 AGP_AD4 G_AD3 HI_3 HUB_PD4
R3 AB4 T26 M26
1 HA#8 HA#7 HD#4 HD#5 AGP_AD5 G_AD4 HI_4 HUB_PD5 1
P7 AC5 T27 M25
HA#9 HA#8 HD#5 HD#6 AGP_AD6 G_AD5 HI_5 HUB_PD6
R2 AA3 U27 L28
HA#10 HA#9 HD#6 HD#7 AGP_AD7 G_AD6 HI_6 HUB_PD7
P4 AA6 U28 L27
HA#10 HD#7 G_AD7 HI_7

HUB
HA#11 R6 AE3 HD#8 AGP_AD8 V26 M27 HUB_PD8
HA#12 HA#11 HD#8 HD#9 AGP_AD9 G_AD8 HI_8 HUB_PD9
P5 AB7 V27 N28
HA#13 HA#12 HD#9 HD#10 AGP_AD10 G_AD9 HI_9 HUB_PD10
P3 AD7 T23 M24
HA#14 HA#13 HD#10 HD#11 AGP_AD11 G_AD10 HI_10
N2 AC7 U23
HA#15 HA#14 HD#11 HD#12 AGP_AD12 G_AD11
N7 AC6 T24
HA#16 HA#15 HD#12 HD#13 AGP_AD13 G_AD12
N3 AC3 U24 N25 HUB_PSTRB 18
HA#17 HA#16 HD#13 HD#14 AGP_AD14 G_AD13 HI_STB
K4 AC8 U25 N24 HUB_PSTRB# 18
HA#18 HA#17 HD#14 HD#15 AGP_AD15 G_AD14 HI_STB# +1.8VS +VS_HUBREF
M4 AE2 V24
HA#19 HA#18 HD#15 HD#16 AGP_AD16 G_AD15
M3 AG5 Y27 36.5_1%
HA#20 HA#19 HD#16 HD#17 AGP_AD17 G_AD16 HLRCOMP R220
L3 AG2 Y26 P27 1 2
HA#21 HA#20 HD#17 HD#18 AGP_AD18 G_AD17 HLRCOMP
L5 AE8 AA28 P26
HA#22 HA#21 HD#18 HD#19 AGP_AD19 G_AD18 HI_REF
K3 AF6 AB25

1
HA#23 HA#22 HD#19 HD#20 AGP_AD20 G_AD19 C384
J2 AH2 AB27
HA#24 HA#23 HD#20 HD#21 AGP_AD21 G_AD20 AGP_SBA[0..7] .01UF_0402
M5 AF3 AA27 AGP_SBA[0..7] 13
HA#25 HA#24 HD#21 HD#22 AGP_AD22 G_AD21
J3 AG3 AB26
HA#26 HA#25 HD#22 HD#23 AGP_AD23 G_AD22 AGP_SBA0

2
L2 AE5 Y23 AH28
HA#27 HA#26 HD#23 HD#24 AGP_AD24 G_AD23 SBA0 AGP_SBA1
H4
HA#27 HD#24
AH7 AB23
G_AD24 SBA1
AH27 Place this cap near MCH
HA#28 N5 AH3 HD#25 AGP_AD25 AA24 AG28 AGP_SBA2 Place closely
HA#29 HA#28 HD#25 HD#26 AGP_AD26 G_AD25 SBA2 AGP_SBA3 +AGPREF
G2 AF4 AA25 AG27 ball P26
HA#30 HA#29 HD#26 HD#27 AGP_AD27 G_AD26 SBA3 AGP_SBA4
M6 AG8 AB24 AE28
HA#31 HA#30 HD#27 HD#28 AGP_AD28 G_AD27 SBA4 AGP_SBA5
L7 AG7 AC25 AE27
HA#31 HD#28 HD#29 AGP_AD29 G_AD28 SBA5 AGP_SBA6
AG6 AC24 AE24

1
HD#29 HD#30 AGP_AD30 G_AD29 SBA6 AGP_SBA7 C361
4 H_ADSTB#0
R5
HADSTB#0 HD#30
AF8 AC22
G_AD30 SBA7
AE25 Place closely pin P22

AGP
N6 AH5 HD#31 AGP_AD31 AD24 .1UF_0402
4 H_ADSTB#1 HADSTB#1 HD#31 HD#32 G_AD31
AC11
HD#32 HD#33 CLK_AGP_MCH

2
AC12 13 AGP_C/BE#[0..3]
HD#33 HD#34 AGP_C/BE#0
4 H_RESET# AE17 AE9 V25 AA21

2
CPURST# HD#34 HD#35 AGP_C/BE#1 G_C/BE#0 AGPREF R66
4 H_TRDY# U7 AC9 V23
HTRDY# HD#35 G_C/BE#1
HOST
Y4 AE10 HD#36 AGP_C/BE#2 Y25 AD25 GRCOMP 2 1 40.2_1% R222
2 3 HDEFER# DEFER# HD#36 G_C/BE#2 GRCOMP 2
Y7 AD9 HD#37 AGP_C/BE#3 AA23 @33_0402
3 HBPRI# BPRI# HD#37 G_C/BE#3
W5 AG9 HD#38 P22 CLK_AGP_MCH
3 HLOCK# HLOCK# HD#38 66IN CLK_AGP_MCH 12
J27 AC10 HD#39
4,13,18,21,22,23,29,34,35,36 PCIRST# RSTIN# HD#39 HD#40

1
H26 AE12 13 AGP_ST[0..2]
TESTIN# HD#40 HD#41 AGP_ST0 C386
4 H_DBSY# V5 AF10 AG25
DBSY# HD#41 HD#42 AGP_ST1 ST0 AGP_RBF# @10PF_0402
4 H_DRDY# V4 AG11 AF24 AE22 AGP_RBF# 13
DRDY# HD#42 HD#43 AGP_ST2 ST1 RBF# AGP_WBF#
3 HIT# Y5 AG10 AG26 AE23 AGP_WBF# 13
HIT# HD#43 HD#44 ST2 WBF#
3 HITM# Y3 AH11
HITM# HD#44 HD#45
3 HBR0# V7 AG12
BREQ#0 HD#45 HD#46 AGP_ADSTB0
3 HADS# V3 AE13 13 AGP_ADSTB0 R24
ADS# HD#46 HD#47 AGP_ADSTB0# AD_STB0
3 HBNR# W3 AF12 13 AGP_ADSTB0# R23 A19
BNR# HD#47 HD#48 AGP_ADSTB1 AD_STB#0 VSS11
AG13 13 AGP_ADSTB1 AC27 A23
HD#48 HD#49 AGP_ADSTB1# AD_STB1 VSS12 +1.5VS
AH13 13 AGP_ADSTB1# AC28 A27
HD#49 HD#50 AGP_SBSTB AD_STB#1 VSS13
4 H_RS#0 W2 AC14 13 AGP_SBSTB AF27 D5
RS#0 HD#50 HD#51 AGP_SBSTB# SB_STB VSS14
4 H_RS#1 W7 AF14 AF26 D9
RS#1 HD#51 HD#52 13 AGP_SBSTB# SB_STB# VSS15
4 H_RS#2 W6 AG14 D13

1
HREQ#[0..4] RS#2 HD#52 HD#53 VSS16
3 HREQ#[0..4] HD#53
AE14
VSS17
D17 Place this cap near AGP
HREQ#0 U6 AG15 HD#54 13 AGP_FRAME# AGP_FRAME# Y24 D21 R166
HREQ#1 HREQ#0 HD#54 HD#55 AGP_DEVSEL# G_FRAME# VSS18 1K_1%_0402
T7 AG16 13 AGP_DEVSEL# W28 E1
HREQ#2 HREQ#1 HD#55 HD#56 AGP_IRDY# G_DEVSEL# VSS19
R7 AG17 13 AGP_IRDY# W27 E4
HREQ#3 HREQ#2 HD#56 HD#57 AGP_TRDY# G_IRDY# VSS20
U5 AH15 13 AGP_TRDY# W24 E26
HREQ#4 HREQ#3 HD#57 HD#58 AGP_STOP# G_TRDY# VSS21

2
U2 AC17 13 AGP_STOP# W23 E29 AGP_NBREF
HREQ#4 HD#58 HD#59 AGP_PAR G_STOP# VSS22
AF16 13 AGP_PAR W25 F8

1
HD#59 HD#60 AGP_REQ# G_PAR VSS23
AE15 AG24 F12
HD#60 G_REQ# VSS24

1
CLK_GHT HD#61 13 AGP_REQ# AGP_GNT# R168 C282
12 CLK_GHT J8 AH17 AH25 F16
CLK_GHT# BCLK HD#61 HD#62 13 AGP_GNT# AGP_PIPE# G_GNT# VSS25 1K_1%_0402 .1UF_0402
12 CLK_GHT# K8 AD17 AF22 F20
BCLK# HD#62 HD#63 PIPE# VSS26
AE16 F24
H_DBI#[0..3] HD#63 VSS27

2
G26
4 H_DBI#[0..3] H_DBI#0 VSS28

2
AD5 H9
H_DBI#1 DBI#0 H_DSTBN#0 VSS29
AG4 AD4 N22 H11
H_DBI#2 DBI#1 HDSTBN#0 H_DSTBN#1 VSS0 VSS30
AH9 AE6 K27 H13
H_DBI#3 DBI#2 HDSTBN#1 H_DSTBN#2 VSS1 VSS31
AD15 AE11 K5 H15
3 +CPU_CORE DBI#3 HDSTBN#2 H_DSTBN#3 VSS2 VSS32 3
AC15 L24 H17
HDSTBN#3 H_DSTBP#0 VSS3 VSS33
AD3 M23 H19
HDSTBP#0 H_DSTBP#1 VSS4 VSS34
AE7 K7 H21
HDSTBP#1 H_DSTBP#2 +CPU_CORE VSS5 VSS35
AD11 J26 J1
1

H_SWNG0 HDSTBP#2 H_DSTBP#3 VSS6 VSS36


AA7 AC16 A3 J4
HUB Interface Reference
1

R212 C356 H_SWNG1 HSWNG0 HDSTBP#3 VSS7 VSS37


AD13 A7 J6
1

301_1%_0402 .01UF_0402 HSWNG1 +V_MCH_GTLREF VSS8 VSS38


A11
VSS9 VSS39
J22
+1.8VS Layout note :
M7 R223 A15 J29
HVREF0 VSS10 VSS40
2

HVREF1
R8 R_E 1. Place R_C and R_D close to MCH
49.9_1%_0402Trace 2. Place capacitors near MCH.
2

Y8
HVREF2 BROOKDALE(MCH-M)
AC2 AB11 width>=7mils
1

HRCOMP0 HVREF3
2

AC13 AB17
HRCOMP1 HVREF4

1
R213
R02
1

1
+1.5VS R214 C371
1

150_1%_0402
R204 R210
BROOKDALE(MCH-M) R227 C394 C362 PIR3 301_1%_0402 @470PF
R_F
100_1%_0402
2

2
R_C
24.9_1% 24.9_1% 1UF_10V 220PF_0402 AGP_FRAME#

2
1 8

1
AGP_TRDY#
2

2 7
AGP_PAR RP111 R215
2

3 6
+CPU_CORE AGP_STOP# 4 5 @8P4R_8.2K_0804 @56.2_1%

H_DSTBN#[0..3] AGP_GNT# 1 4
H_DSTBN#[0..3] 4
H_DSTBP#[0..3] AGP_REQ# RP11

2
2 3
H_DSTBP#[0..3] 4 GTL Reference Voltage +VS_HUBREF
1

@4P2R_8.2K
1

1
R208 C351 Layout note : AGP_IRDY# 1 4
301_1%_0402 .01UF_0402 AGP_DEVSEL# 2 3 RP15 R216
1. Place R_E and R_F near MCH @4P2R_8.2K 0_0402
2

2. Place decoupling cap 220PF near MCH pin.(Within

1
AGP_WBF#
2

500mils) 1 8
+1.5VS AGP_PIPE# RP12 R219

12
2 7
1

AGP_RBF# 3 6 @8P4R_8.2K_0804 R_D 301_1%_0402 C385


4 R211 R218 8.2K_0402 R217 @8.2K_0402 .01UF_0402 4
4 5
150_1%_0402 2 1 AGP_ADSTB0 2 1 AGP_ADSTB0#
R201 2K_1%_0402 R203 @1K_0402 R202 6.2K_0402

2
R206 8.2K_0402 R205 @8.2K_0402 AGP_ST0 AGP_ST0 2 1 2 1 AGP_ST1 2 1 AGP_ST1
AGP_ADSTB1 AGP_ADSTB1#
2

2 1 2 1 0=System memory is DDR 0=533Mhz


R189 6.2K_0402
R199 8.2K_0402 R198 @8.2K_0402 1=System memory is SDR AGP_ST2 2 1 1=400Mhz
2 1 AGP_SBSTB 2 1 AGP_SBSTB#
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 6 of 45
A B C D E
A B C D E

U9D
U9C
M8 R22 9 DDR_SDQ[0..63] DDR_SDQ[0..63]
+CPU_CORE VTT_0 VCC1_5_0 +1.5VS DDR_SDQ0
U8 R29 G28 E14 DDR_CLK0 9
VTT_1 VCC1_5_1 DDR_SDQ1 SDQ0 SCK0
AA9 U22 F27 F15 DDR_CLK0# 9
VTT_2 VCC1_5_2 DDR_SDQ2 SDQ1 SCK#0
AB8 U26 C28 J24 DDR_CLK1 9
VTT_3 VCC1_5_3 DDR_SDQ3 SDQ2 SCK1
AB18 W22 E28 G25 DDR_CLK1# 9
VTT_4 VCC1_5_4 DDR_SDQ4 SDQ3 SCK#1
AB20 W29 H25 G6 DDR_CLK2 9
VTT_5 VCC1_5_5 DDR_SDQ5 SDQ4 SCK2
AC19 AA22 G27 G7 DDR_CLK2# 9
VTT_6 VCC1_5_6 DDR_SDQ6 SDQ5 SCK#2
AD18 AA26 F25
VTT_7 VCC1_5_7 DDR_SDQ7 SDQ6
AD20 AB21 B28 G15 DDR_CLK3 10
VTT_8 VCC1_5_8 DDR_SDQ8 SDQ7 SCK3
AE19 AC29 E27 G14 DDR_CLK3# 10
VTT_9 VCC1_5_9 DDR_SDQ9 SDQ8 SCK#3
AE21 AD21 C27 E24 DDR_CLK4 10
1 VTT_10 VCC1_5_10 DDR_SDQ10 SDQ9 SCK4 1
AF18 AD23 B25 G24 DDR_CLK4# 10
VTT_11 VCC1_5_11 DDR_SDQ11 SDQ10 SCK#4
AF20 AE26 C25 H5 DDR_CLK5 10
VTT_12 VCC1_5_12 DDR_SDQ12 SDQ11 SCK5
AG19 AF23 B27 F5 DDR_CLK5# 10
VTT_13 VCC1_5_13 DDR_SDQ13 SDQ12 SCK#5
AG21
VTT_14 VCC1_5_14
AG29 Layout note : D27
SDQ13
AG23 AJ25 DDR_SDQ14 D26 K25
VTT_15 VCC1_5_15 DDR_SDQ15 SDQ14 SCK6
AJ19
VTT_16 Trace width 5mil ; Spacing E25
SDQ15 SCK#6
J25
AJ21 N14 DDR_SDQ16 D24 G17
AJ23
VTT_17 VCC1_5_16
N16 10mil DDR_SDQ17 E23
SDQ16 SCK7
G16
VTT_18 VCC1_5_17 SDQ17 SCK#7
VCC1_5_18
P13 Trace A to ball U13/T13 or DDR_SDQ18 C22
SDQ18 SCK8
H7
P15 DDR_SDQ19 E21 H6
A5
VCC1_5_19
P17
U17/T7 =1.5" Max DDR_SDQ20 C24
SDQ19 SCK#8
+2.5V VCCSM1 VCC1_5_20 SDQ20
A9 R14 DDR_SDQ21 B23 E9 DDR_SCS#0
VCCSM2 VCC1_5_21 SDQ21 SCS#0 DDR_SCS#0 9
A13 R16 DDR_SDQ22 D22 F7 DDR_SCS#1
VCCSM3 VCC1_5_22 SDQ22 SCS#1 DDR_SCS#1 9
A17 T15 DDR_SDQ23 B21 F9 DDR_SCS#2
VCCSM4 VCC1_5_23 SDQ23 SCS#2 DDR_SCS#2 10
A21 U14 +1.5VS DDR_SDQ24 C21 E7 DDR_SCS#3
VCCSM5 VCC1_5_24 SDQ24 SCS#3 DDR_SCS#3 10
A25 U16 DDR_SDQ25 D20 G9
VCCSM6 VCC1_5_25 DDR_SDQ26 SDQ25 SCS#4
C1 C19 G10
VCCSM7 SDQ26 SCS#5

MEMORY
C29 Murata LQG21N4R7K10 DDR_SDQ27 D18

1
VCCSM8 DDR_SDQ28 SDQ27
D7 L29 C20
VCCSM9 VCC1_8_0 +1.8VS L34 L35 DDR_SDQ29 SDQ28 DDR_SDQS0
D11 N26 E19 F26 DDR_SDQS0 9
VCCSM10 VCC1_8_1 DDR_SDQ30 SDQ29 SDQS0 DDR_SDQS1
D15 L25 C18 C26 DDR_SDQS1 9
VCCSM11 VCC1_8_2 4.7UH_30mA 4.7UH_30mA DDR_SDQ31 SDQ30 SDQS1 DDR_SDQS2
D19 M22 E17 C23 DDR_SDQS2 9
VCCSM12 VCC1_8_3 DDR_SDQ32 SDQ31 SDQS2 DDR_SDQS3
D23 N23 E13 B19 DDR_SDQS3 9
VCCSM13 VCC1_8_4 DDR_SDQ33 SDQ32 SDQS3 DDR_SDQS4
D25 C12 D12 DDR_SDQS4 9
VCCSM14 DDR_SDQ34 SDQ33 SDQS4 DDR_SDQS5

2
F6
VCCSM15
"Trace A" B11
SDQ34 SDQS5
C8 DDR_SDQS5 9
F10 T17 VCC_MCH_PLL1 "Trace A" DDR_SDQ35 C10 C5 DDR_SDQS6
VCCSM16 VCCGA1 SDQ35 SDQS6 DDR_SDQS6 9
F14 T13 VCC_MCH_PLL0 DDR_SDQ36 B13 E3 DDR_SDQS7
VCCSM17 VCCHA1 SDQ36 SDQS7 DDR_SDQS7 9
F18 DDR_SDQ37 C13 E15 DDR_SDQS8
DDR_SDQS8 9

1
VCCSM18 DDR_SDQ38 SDQ37 SDQS8
F22 C11
VCCSM19 VSS_MCH_PLL1 C381 C389 DDR_SDQ39 SDQ38 DDR_SMA[0..12]
G1 U17 + + D10 DDR_SMA[0..12] 9,10
VCCSM20 VSSGA2 VSS_MCH_PLL0 33UF_D2_16V 33UF_D2_16V DDR_SDQ40 SDQ39 DDR_SMA0
G4 U13 E10 E12
VCCSM21 VSSHA2 DDR_SDQ41 SDQ40 SMA0/CS#11 DDR_SMA1
G29
VCCSM22
"Trace A" C9
SDQ41 SMA1/CS#10
F17
2 DDR_SDQ42 DDR_SMA2 2

2
H8 D8 E16
VCCSM23 SDQ42 SMA2/CS#6
POWER/GND

H10 AA4 DDR_SDQ43 E8 G18 DDR_SMA3


VCCSM24 VSS83 DDR_SDQ44 SDQ43 SMA3/CS#9 DDR_SMA4
H12
VCCSM25 VSS84
AA8 "Trace A" E11
SDQ44 SMA4/CS#5
G19
H14 AA29 DDR_SDQ45 B9 E18 DDR_SMA5
VCCSM26 VSS85 DDR_SDQ46 SDQ45 SMA5/CS#8 DDR_SMA6
H16 AB6 B7 F19
VCCSM27 VSS86 DDR_SDQ47 SDQ46 SMA6/CS#7 DDR_SMA7
H18 AB9 C7 G21
VCCSM28 VSS87 DDR_SDQ48 SDQ47 SMA7/CS#4 DDR_SMA8
H20 AB10 C6 G20
VCCSM29 VSS88 DDR_SDQ49 SDQ48 SMA8/CS#3 DDR_SMA9
H22 AB12 D6 F21
VCCSM30 VSS89 DDR_SDQ50 SDQ49 SMA9/CS#0 DDR_SMA10
H24 AB13 D4 F13
VCCSM31 VSS90 DDR_SDQ51 SDQ50 SMA10 DDR_SMA11
K22 AB14 B3 E20
VCCSM32 VSS91 DDR_SDQ52 SDQ51 SMA11/CS#2 DDR_SMA12
K24 AB15 E6 G22
VCCSM33 VSS92 DDR_SDQ53 SDQ52 SMA12/CS#1
K26 AB16 B5
VCCSM34 VSS93 DDR_SDQ54 SDQ53 DDR_SBS0
L23 AB19 C4 G12 DDR_SBS0 9,10
VCCSM35 VSS94 DDR_SDQ55 SDQ54 SBS0 DDR_SBS1
K6 AB22 E5 G13 DDR_SBS1 9,10
VCCSM36 VSS95 DDR_SDQ56 SDQ55 SBS1
J5 AC1 C3
VCCSM37 VSS96 DDR_SDQ57 SDQ56 DDR_CKE0
J7 AC4 D3 G23 DDR_CKE0 9
VCCSM38 VSS97 DDR_SDQ58 SDQ57 SCKE0 DDR_CKE1
AC18 F4 E22 DDR_CKE1 9
VSS98 DDR_SDQ59 SDQ58 SCKE1 DDR_CKE2
AC20 F3 H23 DDR_CKE2 10
VSS99 DDR_SDQ60 SDQ59 SCKE2 DDR_CKE3
L1 AC21 B2 F23 DDR_CKE3 10
VSS41 VSS100 DDR_SDQ61 SDQ60 SCKE3
L4
VSS42 VSS101
AC23 C2
SDQ61 SCKE4
J23 Layout note
L6 AC26 DDR_SDQ62 E2 K23 R236 30.1_1%
L8
VSS43 VSS102
AD6 DDR_SDQ63 G5
SDQ62 SCKE5
2 1
Place R620
VSS44 VSS103 SDQ63 +1.25VS
L22 AD8 DDR_CB[0..7] closely pinJ28
VSS45 VSS104 9 DDR_CB[0..7]
L26 AD10 DDR_CB0 C16 J28 SM_RCOMP
VSS46 VSS105 DDR_CB1 SDQ64/CB0 SMRCOMP RCVIN# C399 .1UF_0402_X5R
N1 AD12 D16 G3
VSS47 VSS106 DDR_CB2 SDQ65/CB1 RCVENIN# RCVOUT#
N4 AD14 B15 H3 2 1
VSS48 VSS107 DDR_CB3 SDQ66/CB2 RCVENOUT# C411 @47PF_0402
N8 AD16 C14 R239 0_0402
VSS49 VSS108 DDR_CB4 SDQ67/CB3
N13 AD19 B17 H27 R_J
VSS50 VSS109 DDR_CB5 SDQ68/CB4 SSI_ST
N15 AD22 C17
VSS51 VSS110 DDR_CB6 SDQ69/CB5 DDR_SRAS#
N17 AE1 C15 F11 DDR_SRAS# 9,10
VSS52 VSS111 DDR_CB7 SDQ70/CB6 SRAS# DDR_SWE#
N29 AE4 D14 G11 DDR_SWE# 9,10
VSS53 VSS112 SDREF SDQ71/CB7 SWE# DDR_SCAS#
P6 AE18 G8 DDR_SCAS# 9,10
3 VSS54 VSS113 SCAS# 3
P8 AE20
VSS55 VSS114
P14 AE29 J21
VSS56 VSS115 SDREF_M SDREF0
P16 AF5 2 1 J9 AD26
VSS57 VSS116 SDREF1 NC0
R1
VSS58 VSS117
AF7 R235 0_0402 NC1
AD27 Layout note
R4 AF9

1
VSS59 VSS118 Place R_J closely Ball
R13 AF11
VSS60 VSS119 C402 BROOKDALE(MCH-M)
R15 AF13 H3<40mil,Ball H3 to G3 trace
VSS61 VSS120 .1UF_0402_X5R
R17 AF15
VSS62 VSS121 must

2
R26 AF17
VSS63 VSS122
T6 AF19 routing 1"
VSS64 VSS123
T8 AF21
VSS65 VSS124
T14 AF25
VSS66 VSS125
T16
VSS67 VSS126
AG1 Layout note
T22 AG18
U1
VSS68 VSS127
AG20 Please
VSS69 VSS128
U4
VSS70 VSS129
AG22 closely
U15 AH19
VSS71 VSS130 pinJ21 and
U29 AH21
VSS72 VSS131
V6 AH23 J9
VSS73 VSS132
V8 AJ3
VSS74 VSS133
V22 AJ5
VSS75 VSS134
W1 AJ7
VSS76 VSS135
W4 AJ9
VSS77 VSS136
W8 AJ11
VSS78 VSS137
W26 AJ13
VSS79 VSS138
Y6 AJ15
VSS80 VSS139
Y22 AJ17
VSS81 VSS140
AA1 AJ27
VSS82 VSS141

BROOKDALE(MCH-M)
4 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 7 of 45
A B C D E
5 4 3 2 1

Layout note : DDR Memory interface


Layout note : Processor system bus
Distribute as close as possible
Distribute as close as possible to MCH Processor Quadrant.(between VCCSM and VSS pin)
to MCH Processor Quadrant.(between VTTFSB and VSS pin)

+CPU_CORE +2.5V

D D
1

1
C336 C337 C341 C359 C373 C407 C418 C415 C400 C416 C423 C413 C417
.1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X5 R .1UF_0402_X5 R .1UF_0402_X 5R .1UF_0402_X5 R .1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X5 R .1UF_0402_X5 R 22UF_10V_1 206 22UF_10V_12 06
2

2
+2.5V

+CPU_CORE

1
C426 C409 C410 C420 C406
1

1
.1UF_0402_X5 R .1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X5 R
C348 C335 C344 C392 C353

2
.1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X5 R .1UF_0402_X5 R .1UF_0402_X 5R
2

2
+2.5V

+CPU_CORE

1
C403 C412 C422 C414
1

.1UF_0402_X5 R .1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X 5R


C374 C365 C332

2
C 10UF_6.3V_1206 _X5R 10UF_6.3V_120 6_X5R 10UF_6.3V_120 6_X5R C
2

+2.5V

1
+ C405
Layout note : AGP/CORE 150UF_6.3V_D2

Distribute as close as possible

2
to MCH Processor Quadrant.(between VCCAGP/VCCCORE
and VSS pin)

+1.5VS
1

C349 C360 C354 C375 C369 C382


.1UF_0402_X 5R .1UF_0402_X 5R .1UF_0402_X5 R .1UF_0402_X5 R .1UF_0402_X 5R .1UF_0402_X 5R
2

B B

+1.5VS
1

C398 C401 + C366


10UF_6.3V_1206 _X5R 10UF_6.3V_120 6_X5R 150UF_6.3V_D2
2

Layout note : Hub-Link


Distribute as close as possible
to MCH Processor Quadrant.(between VCCHL and VSS pin)

+1.8VS

A A
1

C391 C395 C388 C396


10UF_6.3V_1206 _X5R .1UF_0402_X 5R .1UF_0402_X5 R .1UF_0402_X 5R
2

Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 8 of 45
5 4 3 2 1
A B C D E F G H

+2.5V +2.5V DDR_DQ[0..63]


DDR_DQ[0..63] 10
SDREF_DIMM DDR_F_CB[0..7]
DDR_F_CB[0..7] 10
RP42 4P2R_22 RP50 4P2R_22 DDR_DQS[0..8]
DDR_DQS[0..8] 10
DDR_SDQ0 1 4 DDR_DQ0 DDR_SDQ30 1 4 DDR_DQ30 JP17
DDR_SDQ4 2 3 DDR_DQ4 DDR_SDQ26 2 3 DDR_DQ26 1 2 2 1
VREF VREF SDREF
3
VSS VSS
4 R136 0_0402 LENGTH < 3 "

1
DDR_DQ4 5 6 DDR_DQ0 C184
RP19 4P2R_22 RP27 4P2R_22 DDR_DQ5 DQ0 DQ4 DDR_DQ1
7
DQ1 DQ5
8 SDREF width 12 mil, space 12 mil
DDR_SDQ1 1 4 DDR_DQ1 DDR_SDQ31 1 4 DDR_DQ31 9 10 .1UF_0402
DDR_SDQ5 DDR_DQ5 DDR_SDQ27 DDR_DQ27 DDR_DQS0 VDD VDD

2
2 3 2 3 11 12
DDR_DQ3 DQS0 DM0 DDR_DQ6
13 14 DDR_SMA[0..12] 7,10
DQ2 DQ6
15 16
RP43 4P2R_22 RP51 4P2R_22 DDR_DQ7 VSS VSS DDR_DQ2
17 18
DDR_SDQ6 DDR_DQ6 DDR_CB5 DDR_F_CB5 DDR_DQ12 DQ3 DQ7 DDR_DQ8 RP30 4P2R_10
1 4 1 4 19 20
DDR_SDQS0 DDR_DQS0 DDR_CB4 DDR_F_CB4 DQ8 DQ12 DDR_SMA12 1
2 3 2 3 21 22 4 DDR_F_SMA12
1 DDR_DQ13 VDD VDD DDR_DQ9 DDR_SMA9 2 1
Layout note 23 24 3 DDR_F_SMA9
DDR_DQS1 DQ9 DQ13
25 26
RP20 4P2R_22 RP28 4P2R_22 DQS1 DM1
27 28
DDR_SDQ2 DDR_DQ2 DDR_CB1 DDR_F_CB1 DDR_DQ14 VSS VSS DDR_DQ10 RP31 4P2R_10
Place these resistor 1 4 1 4 29
DQ10 DQ14
30
DDR_SDQ3 2 3 DDR_DQ3 DDR_CB0 2 3 DDR_F_CB0 DDR_DQ11 31 32 DDR_DQ15 DDR_SMA7 1 4 DDR_F_SMA7
closely DIMM0, 33
DQ11 DQ15
34 DDR_SMA8 2 3 DDR_F_SMA8
VDD VDD
all trace length<750mil 7 DDR_CLK1 35
CK0 VDD
36
RP44 4P2R_22 RP52 4P2R_22 37 38
7 DDR_CLK1# CK0# VSS
DDR_SDQ8 1 4 DDR_DQ8 DDR_CB2 1 4 DDR_F_CB2 39 40 RP41 4P2R_10
DDR_SDQ7 DDR_DQ7 DDR_SDQS8 DDR_DQS8 VSS VSS DDR_SMA10 1
2 3 2 3 4 DDR_F_SMA10
DDR_SMA0 2 3 DDR_F_SMA0
DDR_DQ20 41 42 DDR_DQ16
RP21 4P2R_22 RP29 4P2R_22 DDR_DQ17 DQ16 DQ20 DDR_DQ21
43 44
DDR_SDQ9 DDR_DQ9 DDR_CB3 DDR_F_CB3 DQ17 DQ21 RP54 4P2R_10
1 4 1 4 45 46
DDR_SDQ12 DDR_DQ12 DDR_CB6 DDR_F_CB6 DDR_DQS2 VDD VDD DDR_SMA2 1
2 3 2 3 47 48 4 DDR_F_SMA2
DDR_DQ22 DQS2 DM2 DDR_DQ18 DDR_SMA5 2
49 50 3 DDR_F_SMA5
DQ18 DQ22
51 52
RP45 4P2R_22 RP53 4P2R_22 DDR_DQ23 VSS VSS DDR_DQ19
53 54
DDR_SDQS1 DDR_DQS1 DDR_DQ28 DQ19 DQ23 DDR_DQ24 RP18 4P2R_10
1 4 1 4 55 56
DDR_SDQ13 DDR_DQ13 DDR_CB7 DDR_F_CB7 DQ24 DQ28 DDR_SMA1 1
2 3 2 3 57 58 4 DDR_F_SMA1
DDR_DQ29 VDD VDD DDR_DQ25 DDR_SMA3 2
59 60 3 DDR_F_SMA3
DDR_DQS3 DQ25 DQ29
61 62
RP22 4P2R_22 RP40 4P2R_22 DQS3 DM3
63 64
DDR_SDQ10 DDR_DQ10 DDR_SDQ36 DDR_DQ36 DDR_DQ26 VSS VSS DDR_DQ30 RP115 4P2R_10
1 4 1 4 65 66
DDR_SDQ14 DDR_DQ14 DDR_SDQ32 DDR_DQ32 DDR_DQ27 DQ26 DQ30 DDR_DQ31 DDR_SMA6 1
2 3 2 3 67 68 4 DDR_F_SMA6
DQ27 DQ31 DDR_SMA4 2
69 70 3 DDR_F_SMA4
DDR_F_CB4 VDD VDD DDR_F_CB5
71 72
RP46 4P2R_22 RP55 4P2R_22 DDR_F_CB0 CB0 CB4 DDR_F_CB1
73 74
DDR_SDQ15 DDR_DQ15 DDR_SDQ33 DDR_DQ33 CB1 CB5 R133 10_0402
1 4 1 4 75 76
DDR_SDQ11 DDR_DQ11 DDR_SDQ37 DDR_DQ37 DDR_DQS8 VSS VSS DDR_SMA11 1
2 3 2 3 77 78 2 DDR_F_SMA11
DDR_F_CB6 DQS8 DM8 DDR_F_CB2
79 80
CB2 CB6
81 82
2 RP23 4P2R_22 RP32 4P2R_22 DDR_F_CB7 VDD VDD DDR_F_CB3 2
83 84 10 DDR_F_SMA[0..12]
DDR_SDQ16 DDR_DQ16 DDR_SDQ38 DDR_DQ38 CB3 CB7
1 4 1 4 85 86
DDR_SDQ20 DDR_DQ20 DDR_SDQS4 DDR_DQS4 DU DU/RESET#
2 3 2 3 87 88
VSS VSS
7 DDR_CLK0 89
CK2 VSS
90 Layout note
7 DDR_CLK0# 91 92
RP47 4P2R_22 RP56 4P2R_22 CK2# VDD
93
VDD VDD
94 Place these resistor
DDR_SDQ21 1 4 DDR_DQ21 DDR_SDQ39 1 4 DDR_DQ39 DDR_CKE1 95 96 DDR_CKE0
7 DDR_CKE1 CKE1 CKE0 DDR_CKE0 7 closely DIMM0,
DDR_SDQ17 2 3 DDR_DQ17 DDR_SDQ34 2 3 DDR_DQ34 97 98
DDR_SMA12 DU/A13 DU/BA2 DDR_SMA11
99
A12 A11
100 all trace length<=750mil
DDR_SMA9 101 102 DDR_SMA8
RP24 4P2R_22 RP33 4P2R_22 A9 A8
103 104
DDR_SDQ18 DDR_DQ18 DDR_SDQ44 DDR_DQ44 DDR_SMA7 VSS VSS DDR_SMA6
1 4 1 4 105 106
DDR_SDQS2 DDR_DQS2 DDR_SDQ35 DDR_DQ35 DDR_SMA5 A7 A6 DDR_SMA4
2 3 2 3 107 108
DDR_SMA3 A5 A4 DDR_SMA2
109 110
DDR_SMA1 A3 A2 DDR_SMA0
111
A1 A0
112 Layout note
RP48 4P2R_22 RP57 4P2R_22 113 114
DDR_SDQ19 DDR_DQ19 DDR_SDQ45 DDR_DQ45 DDR_SMA10 VDD VDD DDR_SBS1
1 4 1 4 115
A10/AP BA1
116 Place these resistor
DDR_SDQ22 2 3 DDR_DQ22 DDR_SDQ40 2 3 DDR_DQ40 DDR_SBS0 117 118 DDR_SRAS#
DDR_SWE# 119
BA0 RAS#
120 DDR_SCAS# closely DIMM0,
DDR_SCS#0 WE# CAS# DDR_SCS#1
7 DDR_SCS#0 121
S0# S1#
122 DDR_SCS#1 7 all trace length Max=1.3"
RP25 4P2R_22 RP34 4P2R_22 123 124
DDR_SDQ24 DDR_DQ24 DDR_SDQS5 DDR_DQS5 DU DU +1.25VS
1 4 1 4 125 126
DDR_SDQ23 DDR_DQ23 DDR_SDQ41 DDR_DQ41 DDR_DQ36 VSS VSS DDR_DQ32
2 3 2 3 127 128
DDR_DQ33 DQ32 DQ36 DDR_DQ37
129 130
DQ33 DQ37
131 132
RP49 4P2R_22 RP58 4P2R_22 DDR_DQS4 VDD VDD RP127 4P2R_56
133 134
DDR_SDQ25 DDR_DQ25 DDR_SDQ43 DDR_DQ43 DDR_DQ38 DQS4 DM4 DDR_DQ34 DDR_CKE0
1 4 1 4 135 136 1 4
DDR_SDQ28 DDR_DQ28 DDR_SDQ42 DDR_DQ42 DQ34 DQ38 DDR_CKE1
2 3 2 3 137 138 2 3
DDR_DQ39 VSS VSS DDR_DQ35
139 140
DDR_DQ44 DQ35 DQ39 DDR_DQ40
141 142
RP26 4P2R_22 RP35 4P2R_22 DQ40 DQ44 RP124 4P2R_56
143 144
DDR_SDQS3 DDR_DQS3 DDR_SDQ47 DDR_DQ47 DDR_DQ45 VDD VDD DDR_DQ41 DDR_SCS#0 1
1 4 1 4 145 146 4
3 DDR_SDQ29 DDR_DQ29 DDR_SDQ46 DDR_DQ46 DDR_DQS5 DQ41 DQ45 DDR_SCS#1 2 3
2 3 2 3 147 148 3
DQS5 DM5
149 150
DDR_DQ43 VSS VSS DDR_DQ42
151 152
DDR_DQ47 DQ42 DQ46 DDR_DQ46
153 154
DQ43 DQ47
155 156
DDR_SDQ[0..63] VDD VDD
7 DDR_SDQ[0..63] 157 158 DDR_CLK2# 7
DDR_CB[0..7] VDD CK1#
7 DDR_CB[0..7] 159 160 DDR_CLK2 7
DDR_SDQS[0..8] RP59 4P2R_22 VSS CK1
7 DDR_SDQS[0..8] 161 162
DDR_SDQ49 DDR_DQ49 DDR_DQ49 VSS VSS DDR_DQ48
1 4 163 164
DDR_SDQ48 DDR_DQ48 DDR_DQ53 DQ48 DQ52 DDR_DQ52
2 3 165 166
DQ49 DQ53
167 168
DDR_DQS6 VDD VDD
169 170
RP36 4P2R_22 DDR_DQ54 DQS6 DM6 DDR_DQ50
171 172
DDR_SDQ53 DDR_DQ53 DQ50 DQ54
1 4 173 174
DDR_SDQ52 DDR_DQ52 DDR_DQ55 VSS VSS DDR_DQ51
2 3 175 176
DDR_DQ56 DQ51 DQ55 DDR_DQ57
177 178
RP61 4P2R_22 DQ56 DQ60
179
VDD VDD
180 Layout note
DDR_SDQ56 1 4 DDR_DQ56 RP60 4P2R_22 DDR_DQ60 181 182 DDR_DQ61
DDR_SDQ51 DDR_DQ51 DDR_SDQ54 DDR_DQ54 DDR_DQS7 DQ57 DQ61
2 3 1 4 183
DQS7 DM7
184 Place these resistor
DDR_SDQS6 2 3 DDR_DQS6 185 186
DDR_DQ62 VSS VSS DDR_DQ58 closely DIMM0,
187 188
RP38 4P2R_22 DDR_DQ63 DQ58 DQ62 DDR_DQ59
189 190 all trace
DDR_SDQ60 DDR_DQ60 RP37 4P2R_22 DQ59 DQ63
1 4 191 192
DDR_SDQ57 DDR_DQ57 DDR_SDQ55 DDR_DQ55 VDD VDD length<=750mil
2 3 1 4 10,12 DIMM_SMDATA 193 194
DDR_SDQ50 DDR_DQ50 SDA SA0 RP114 4P2R_10
2 3 10,12 DIMM_SMCLK 195 196
SCL SA1 DDR_SBS0
197 198 7,10 DDR_SBS0 1 4 DDR_F_SBS0 DDR_F_SBS0 10
+3VS VDD_SPD SA2 DDR_SWE#
199 200 7,10 DDR_SWE# 2 3 DDR_F_SWE# DDR_F_SWE# 10
RP62 4P2R_22 VDD_ID DU
DDR_SDQS7 1 4 DDR_DQS7
DDR_SDQ61 2 3 DDR_DQ61 DDR-SODIMM_200_Normal RP113 4P2R_10
7,10 DDR_SCAS# DDR_SCAS# 1 4 DDR_F_SCAS# DDR_F_SCAS# 10
7,10 DDR_SRAS# DDR_SRAS# 2 3 DDR_F_SRAS#
4 DDR_F_SRAS# 10 4
RP39 4P2R_22 DIMM0
DDR_SDQ62 1 4 DDR_DQ62 R134 10_0402
DDR_SDQ58 2 3 DDR_DQ58 top side 7,10 DDR_SBS1 DDR_SBS1 1 2 DDR_F_SBS1 DDR_F_SBS1 10

RP63 4P2R_22
DDR_SDQ63 1 4 DDR_DQ63 Compal Electronics, Inc.
DDR_SDQ59 2 3 DDR_DQ59 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 9 of 45
A B C D E F G H
A B C D E

+2.5V +2.5V
+1.25VS +1.25VS
SDREF_DIMM
DDR_F_CB[0..7] 9
JP28
RP64 4P2R_56 RP131 4P2R_56 RP95 4P2R_56
DDR_DQS[0..8] 9 1 2
DDR_DQ4 VREF VREF
1 4 4 1 DDR_DQ26 4 1 DDR_DQ48 3 4
VSS VSS

1
DDR_DQ0 2 3 3 2 DDR_DQ30 3 2 DDR_DQ49 DDR_DQ[0..63] DDR_DQ0 5 6 DDR_DQ4
DDR_DQ[0..63] 9 DQ0 DQ4
DDR_DQ1 7 8 DDR_DQ5 C456
DQ1 DQ5 .1UF_0402
DDR_F_SMA[0..12] 9 9 10
RP65 4P2R_56 RP79 4P2R_56 RP96 4P2R_56 DDR_DQS0 VDD VDD

2
11 12
DDR_DQ5 DQS0 DM0
1 4 4 1 DDR_F_CB1 4 1 DDR_DQ52 DDR_SMA[0..12] 7,9
DDR_DQ6 13 14 DDR_DQ3
DDR_DQ1 DQ2 DQ6
2 3 3 2 DDR_DQ27 3 2 DDR_DQ53 15 16
DDR_DQ2 VSS VSS DDR_DQ7
17 18
DDR_DQ8 DQ3 DQ7 DDR_DQ12 +1.25VS
19 20
RP66 4P2R_56 RP78 4P2R_56 RP97 4P2R_56 DQ8 DQ12
21 22
1 DDR_DQS0 1 VDD VDD RP83 4P2R_56 1
4 4 1 DDR_F_CB5 4 1 DDR_DQ54 DDR_DQ9 23 24 DDR_DQ13
DDR_DQ6 DQ9 DQ13
2 3 3 2 DDR_DQ31 3 2 DDR_DQS6 DDR_DQS1 25 26 4 1 DDR_SMA11
DQS1 DM1
27 28 3 2 DDR_SMA12
DDR_DQ10 VSS VSS DDR_DQ14
29 30
RP67 4P2R_56 RP80 4P2R_56 RP98 4P2R_56 DDR_DQ15 DQ10 DQ14 DDR_DQ11
31 32
DDR_DQ3 DQ11 DQ15 RP84 4P2R_56
1 4 4 1 DDR_F_CB0 4 1 DDR_DQ50 33 34
DDR_DQ2 VDD VDD
2 3 3 2 DDR_F_CB4 3 2 DDR_DQ55 7 DDR_CLK4 35 36 4 1 DDR_SMA6
CK0 VDD
7 DDR_CLK4# 37 38 3 2 DDR_SMA9
CK0# VSS
39 40
RP68 4P2R_56 RP129 4P2R_56 VSS VSS
DDR_DQ7 RP99 4P2R_56 RP85 4P2R_56
1 4 4 1 DDR_F_CB2
DDR_DQ8 2 3 3 2 DDR_DQS8 4 1 DDR_DQ51 DDR_DQ16 41 42 DDR_DQ20 4 1 DDR_SMA7
DQ16 DQ20
3 2 DDR_DQ56 DDR_DQ21 43 44 DDR_DQ17 3 2 DDR_SMA8
DQ17 DQ21
45 46
RP69 4P2R_56 RP128 4P2R_56 DDR_DQS2 VDD VDD
47 48
DDR_DQ12 RP100 4P2R_56 DQS2 DM2 RP86 4P2R_56
1 4 4 1 DDR_F_CB3 DDR_DQ18 49 50 DDR_DQ22
DDR_DQ9 DQ18 DQ22
2 3 3 2 DDR_F_CB6 4 1 DDR_DQ57 51 52 4 1 DDR_SMA4
VSS VSS
3 2 DDR_DQ60 DDR_DQ19 53 54 DDR_DQ23 3 2 DDR_SMA5
DDR_DQ24 DQ19 DQ23 DDR_DQ28
55 56
RP70 4P2R_56 RP81 4P2R_56 DQ24 DQ28
57 58
DDR_DQS1 1 RP119 4P2R_56 DDR_DQ25 VDD VDD DDR_DQ29 RP126 4P2R_56
4 4 1 59 60
DDR_DQ13 2 DQ25 DQ29
3 3 2 DDR_F_CB7 4 1 DDR_DQ61 DDR_DQS3 61 62 4 1 DDR_SMA2
DQS3 DM3
3 2 DDR_DQS7 63 64 3 2 DDR_SMA3
DDR_DQ30 VSS VSS DDR_DQ26
65 66
RP71 4P2R_56 RP89 4P2R_56 DDR_DQ31 DQ26 DQ30 DDR_DQ27
67 68
DDR_DQ14 RP101 4P2R_56 DQ27 DQ31 RP87 4P2R_56
1 4 4 1 DDR_DQ36 69 70
DDR_DQ10 VDD VDD
2 3 3 2 DDR_DQ32 4 1 DDR_DQ58 DDR_F_CB5 71 72 DDR_F_CB4 4 1 DDR_SMA0
CB0 CB4
3 2 DDR_DQ62 DDR_F_CB1 73 74 DDR_F_CB0 3 2 DDR_SMA1
CB1 CB5
75 76
RP72 4P2R_56 RP122 4P2R_56 DDR_DQS8 VSS VSS
77 78
DDR_DQ11 RP118 4P2R_56 DQS8 DM8
1 4 4 1 DDR_DQ37 DDR_F_CB2 79 80 DDR_F_CB6 R139 56_0402
DDR_DQ15 CB2 CB6
2 3 3 2 DDR_DQ33 4 1 DDR_DQ59 81 82 1 2 DDR_SMA10
2 VDD VDD 2
3 2 DDR_DQ63 DDR_F_CB3 83 84 DDR_F_CB7
CB3 CB7
85 86
RP132 4P2R_56 RP90 4P2R_56 DU DU/RESET# RP125 4P2R_56
87 88
DDR_DQ20 VSS VSS
1 4 4 1 DDR_DQ38 7 DDR_CLK3 89 90 4 1 DDR_SRAS#
DDR_DQ16 CK2 VSS
2 3 3 2 DDR_DQS4 7 DDR_CLK3# 91 92 3 2 DDR_SBS0
CK2# VDD
93 94
DDR_CKE3 VDD VDD DDR_CKE2
7 DDR_CKE3 95 96 DDR_CKE2 7
RP73 4P2R_56 RP91 4P2R_56 CKE1 CKE0 RP88 4P2R_56
97 98
DDR_DQ17 DU/A13 DU/BA2
1 4 4 1 DDR_DQ39 DDR_F_SMA12 99 100 DDR_F_SMA11 4 1 DDR_SCAS#
DDR_DQ21 A12 A11
2 3 3 2 DDR_DQ34 DDR_F_SMA9 101 102 DDR_F_SMA8 3 2 DDR_SWE#
A9 A8
103 104
DDR_F_SMA7 VSS VSS DDR_F_SMA6
105 106
RP74 4P2R_56 RP92 4P2R_56 DDR_F_SMA5 A7 A6 DDR_F_SMA4 R346 56_0402
107 108
DDR_DQS2 1 A5 A4
4 4 1 DDR_DQ44 DDR_F_SMA3 109 110 DDR_F_SMA2 1 2 DDR_SBS1
DDR_DQ18 2 A3 A2
3 3 2 DDR_DQ35 DDR_F_SMA1 111 112 DDR_F_SMA0
A1 A0
113 114
DDR_F_SMA10 VDD VDD DDR_F_SBS1
115 116 DDR_F_SBS1 9
RP75 4P2R_56 RP93 4P2R_56 DDR_F_SBS0 A10/AP BA1 DDR_F_SRAS#
9 DDR_F_SBS0 117 118 DDR_F_SRAS# 9
DDR_DQ22 BA0 RAS#
1 4 4 1 DDR_DQ40 9 DDR_F_SWE#
DDR_F_SWE# 119 120 DDR_F_SCAS#
DDR_F_SCAS# 9
DDR_DQ19 WE# CAS#
2 3 3 2 DDR_DQ45 7 DDR_SCS#2
DDR_SCS#2 121 122 DDR_SCS#3
DDR_SCS#3 7
S0# S1#
123 124
DU DU
125 126
RP130 4P2R_56 RP121 4P2R_56 DDR_DQ32 VSS VSS DDR_DQ36
127 128
DDR_DQ23 DQ32 DQ36
1 4 4 1 DDR_DQS5 DDR_DQ37 129 130 DDR_DQ33 7,9 DDR_SBS0 DDR_SBS0
DDR_DQ24 DQ33 DQ37
2 3 3 2 DDR_DQ41 131 132 7,9 DDR_SWE# DDR_SWE#
DDR_DQS4 VDD VDD
133 134
DDR_DQ34 DQS4 DM4 DDR_DQ38
135 136
RP76 4P2R_56 RP94 4P2R_56 DQ34 DQ38
137 138
DDR_DQ28 VSS VSS
1 4 4 1 DDR_DQ42 DDR_DQ35 139 140 DDR_DQ39 7,9 DDR_SCAS# DDR_SCAS#
DDR_DQ25 DQ35 DQ39
2 3 3 2 DDR_DQ43 DDR_DQ40 141 142 DDR_DQ44 7,9 DDR_SRAS# DDR_SRAS#
DQ40 DQ44
143 144
DDR_DQ41 VDD VDD DDR_DQ45
145 146
3 RP77 4P2R_56 RP120 4P2R_56 DDR_DQS5 DQ41 DQ45 3
147 148
DDR_DQS3 1 DQS5 DM5
4 4 1 DDR_DQ47 149 150 7,9 DDR_SBS1 DDR_SBS1
DDR_DQ29 2 VSS VSS
3 3 2 DDR_DQ46 DDR_DQ42 151 152 DDR_DQ43
DDR_DQ46 DQ42 DQ46 DDR_DQ47
153 154
DQ43 DQ47
155 156
VDD VDD
157 158 DDR_CLK5# 7
VDD CK1#
Layout note 159
VSS CK1
160 DDR_CLK5 7
161 162
DDR_DQ48 VSS VSS DDR_DQ49
Place these resistor 163
DQ48 DQ52
164
DDR_DQ52 165 166 DDR_DQ53
closely DIMM1, DQ49 DQ53
167 168
DDR_DQS6 VDD VDD
all trace 169 170
DDR_DQ50 DQS6 DM6 DDR_DQ54 +1.25VS
171 172
length<=800mil DQ50 DQ54
173 174
DDR_DQ51 VSS VSS DDR_DQ55
175 176
DDR_DQ57 DQ51 DQ55 DDR_DQ56
177 178
DQ56 DQ60 RP82 4P2R_56
179 180
DDR_DQ61 VDD VDD DDR_DQ60 DDR_CKE3
181 182 1 4
DDR_DQS7 DQ57 DQ61 DDR_CKE2
183 184 2 3
DQS7 DM7
185 186
DDR_DQ58 VSS VSS DDR_DQ62
187 188
DDR_DQ59 DQ58 DQ62 DDR_DQ63 RP123 4P2R_56
189 190
DQ59 DQ63 DDR_SCS#3 1
191 192 4
VDD VDD DDR_SCS#2 2
9,12 DIMM_SMDATA 193 194 +3VS 3
SDA SA0
9,12 DIMM_SMCLK 195 196
SCL SA1
197 198
+3VS VDD_SPD SA2
199 200
VDD_ID DU
Layout note
DDR-SODIMM_200_Reverse Place these resistor
closely DIMM0,
4 4
all trace length
DIMM1 Max=1.3"
EMI Clip PAD for Memory Door bot side

PAD12 PAD13 PAD14 PAD9 PAD10 PAD11


Compal Electronics, Inc.
1 1 1 1 1 1 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
@PAD-2.5X4 @PAD-2.5X4 @PAD-2.5X4 @PAD-2.5X4 @PAD-2.5X4 @PAD-2.5X4 AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 10 of 45
A B C D E
A B C D E

Layout note :
Distribute as close as possible
to DDR-SODIMM.

+2.5V
1

1
1 C457 C461 C460 C464 C465 C463 C189 C462 C192 C187 1
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2

2
+2.5V +2.5V
1

1
C458 C186 C190 C191 C185 C188 + C521 + C522 + C234
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R @330UF_D2_6.3V 150UF_6.3V_D2 150UF_6.3V_D2
2

2
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V

2 2
+1.25VS
1

1
C193 C194 C195 C196 C197 C198 C199 C201 C200 C516
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2

2
+1.25VS
1

1
C202 C515 C203 C514 C204 C504 C207 C205 C513 C206
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2

2
+1.25VS
1

1
C512 C208 C209 C210 C211 C212 C213 C233 C511 C510
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2

2
3 3

+1.25VS
1

C214 C215 C216 C217 C218 C219 C220 C221 C222 C223
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2

+1.25VS
1

C224 C225 C226 C227 C508 C228 C509 C507 C505 C506
.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2

+1.25VS

4 4
1

C229 C231 C232 C230


.1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R .1UF_0402_X5R
2

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 11 of 45
A B C D E
A B C D E F G H

+3VS L37 +3V_CLK


BLM21A601SPT
SEL1 SEL0 Function 1 2 Width=40 mils

1
L38

1
0 0 66Mhz Host CLK BLM21A601SPT +
1 2 C452 C469 C467 C470 C438 C440 C436 C439
0 1 100Mhz Host CLK 22UF_10V_1206 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402

2
1 0 200Mhz Host CLK
1 1 133Mhz Host CLK +3VS_VDD48M
1 L36 1
10_0805
Width=15 mils 1 2 +3VS
*BLM21A601SPT

1
C437 C435

14
19
32
37
46
50
1
8
U25 +3VS_CLKVDD .1UF_0402 10UF_10V_0805
+3VS

2
VDD_PCI
VDD_PCI
VDD_REF

VDD_3V66
VDD_3V66
VDD_48MHZ
VDD_CPU
VDD_CPU
Place Crystal within 500 mils of CK_Titan L39
+3VS BLM21A601SPT
2 1 2 26 Width=15 mils 1 2
+3VS C468 10PF_0402 XTAL_IN VDD_CORE

1
1 caps are internal Y2

1
to CK_TITAN 14.318MHZ C459 C466
R282 R277 .1UF_0402 10UF_10V_0805

2
@1K_0402 1K_0402 2 1 3 27
C473 10PF_0402 XTAL_OUT GND_CORE
CLK_BCLK
2

2
45 1 2 CLK_HCLK 3
H_BSEL2 CPUCLKT2 R270 33.2_1%
40 1 2
H_BSEL0 SEL2 R260 49.9_1%_0402
4 H_BSEL0 55
BSEL0 SEL1
4 H_BSEL1 1 2 54
SEL0
Place resistor near R184,R185 ;Trace
R283 @1K_0402
R264 @0_0402
<=400mils
+3VS 1 2
1

R276 R2611 2 49.9_1%_0402


R275 R281 @1K_0402 25 44 CLK_BCLK# R2711 2 33.2_1%
18,29 PM_SLP_S1# PWR_DWN# CPU_CLKC2 CLK_HCLK# 3
1K_0402 34
18 PM_STPPCI# PCI_STOP#
1K_0402 R265 1 2 0_0402 53 49 CLK_HT 1 2
18,39 PM_STPCPU# CPU_STOP# CPUCLKT1 CLK_GHT 6
R268 33.2_1% 1 2
2 R258 49.9_1%_0402 2
2

Place resistor near R182,R183 ;Trace


32 CK408_PWRGD# 28 <=400mils
VTT_PWRGD#
R2591 2 49.9_1%_0402
R263 1 2 10K_0402 48 CLK_HT# R2691 2 33.2_1% CLK_GHT# 6
+3VS R254 1 CPUCLKC1
2 @10K_0402 43
MULT0 CLK_ITP
52 1 2 CLK_ITPP 4
CPUCLKT0 R266 33.2_1% 1 2
R256 49.9_1%_0402
DIMM_SMDATA 29 Place resistor near R180,R181 ;Trace
DIMM_SMCLK SDATA
30 <=500mils
SCLK
R2571 2 49.9_1%_0402
51 CLK_ITP# R2671 2 33.2_1% CLK_ITPP# 4
CPUCLKC0
33
3V66_0/DRCG
35 24
3V66_1/VCH_CLK 66MHZ_IN/3V66_5

Please closely pin42 23 CLK66MCH R304 1 2 33.2_1%


66MHZ_OUT2/3V66_4 CLK_AGP_MCH 6
R279 1 2 475_1% 42 22 CLK66AGP R309 1 2 33.2_1%
IREF 66MHZ_OUT1/3V66_3 CLK_AGP 13
21 CLKICHHUB R308 1 2 33.2_1%
66MHZ_OUT0/3V66_2 CLK_ICHHUB 18

R280 1 2 22_0402 CLK_ICH48M 39 7 CLKPCI_F2 R300 1 2 33.2_1%


18 CLK_ICH48 48MHZ_USB PCICLK_F2 CLK_ICHPCI 18
6
PCICLK_F1
5
PCICLK_F0
R272 1 2 22_0402 CLK_SD48M 38
36 CLK_SD48 48MHZ_DOT
18 CLKPCI_MINI R303 1 2 33.2_1%
PCICLK6 CLK_PCI_MINI 34
17 CLKPCI_1394 R313 1 2 33.2_1%
PCICLK5 CLK_PCI_1394 22
16 CLKPCI_SD R312 1 2 33.2_1%
3 PCICLK4 CLK_PCI_SD 36 3
R284 1 2 10_0402 CLK_ICH14M 56 13 CLKPCI_EC R302 1 2 33.2_1%
18 CLK_ICH14 REF PCICLK3 CLK_PCI_EC 29
1 2 12 CLKPCI_SIO R311 1 2 33.2_1%
35 CLK_SIO14 GND_48MHZ PCICLK2 CLK_PCI_SIO 35
R285 10_0402 11 CLKPCI_PCM R310 1 2 33.2_1%
CLK_PCI_PCM 21
GND_3V66
GND_3V66

GND_IREF PCICLK1
GND_CPU
GND_REF

10 CLKPCI_LAN R301 1 2 33.2_1%


GND_PCI
GND_PCI

PCICLK0 CLK_PCI_LAN 23
25 CLK_AC14 1 2
R286 10_0402

R02 PIR4 W320-04


15
20
31
36
41
47
4
9

or ICS 9508-05

Note:
CPU_CLK[2:0] needs to be running in C3, C4.

+12VS
2

Q25
G

2N7002

18,20 SMB_DATA 1 3 DIMM_SMDATA 9,10


D

4 4

+12VS

Q30
2
G

2N7002 Compal Electronics, Inc.


1 3 Title
18,20 SMB_CLK DIMM_SMCLK 9,10
SCHEMATIC, M/B LA-1302
D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 12 of 45
A B C D E F G H
1 2 3 4 5 6 7 8

AGP_AD[0:31] U2A
6 AGP_AD[0:31]
AGP_AD0 K28 AJ2
AGP_AD1 AD0 GPIO0
L29 AD1 Part 1 of 5 GPIO1 AK2
AGP_AD2 L27 AK1 LCDVDD +12VALW +12VALW +3V
AGP_AD3 AD2 GPIO2
L30 AD3 GPIO3 AH3
AGP_AD4 L28 AH2 +3VS
AD4 GPIO4

1
AGP_AD5 M29 AJ1
AD5 GPIO5

1
AGP_AD6 M27 AF4 R38 C315 C316 C319
+1.5VS AGP_AD7 AD6 GPIO6 R33 R167
M30 AH1

GPIO /
AD7 GPIO7 1K_0402

1
AGP_AD8 N30 AG3 100K_0402 100K_0402 .1UF_0402 1000PF_0402
AD8 GPIO8 Q15

ROM
AGP_AD9 留 TEST PAD R512

2
10 mil N28 AD9 GPIO9 AF3 1
AGP_AD10 22UF_10V_1206

2
P29 AD10 AG2 2
1
AGP_AD11 GPIO10 10K_0402
P27 AD11 GPIO11 AF2 3
AGP_AD12 P30 AG1 SI2302DS
A R207 AD12 GPIO12 LCDVDD A
AGP_AD13

2
P28 AD13 GPIO13 AF1 1 1
1K_0402 AGP_AD14 R29 AE2 2 2 R164 C317
AD14 GPIO14 MSEN# 17,29,34

1
AGP_AD15 R27 AE1 3 3 C292 4.7UF_10V_0805
+AGPREF AGP_AD16 AD15 GPIO15 Q7 Q16 150K_0402 @1000PF_0402
2

U28 AD16
AGP_AD17 U30 AE5 INTERNAL PULL UP 2N7002 2N7002
10 mil AGP_AD18 AD17 ROMCS# C298

2
V27
AD18

1
AGP_AD19 V29 AJ5 4.7UF_10V_0805
AGP_AD20 AD19 ZV_LCDDATA0
V28 AD20 AK5
ZV_LCDDATA1
1

PCI/AGP HOST BUS


AGP_AD21 V30 AG6
AGP_AD22 AD21 ZV_LCDDATA2
R209 W27 AH6
AGP_AD23 AD22 ZV_LCDDATA3 ENVDD 22K Q14
1K_0402 W30 AD23 AJ6 2
AGP_AD24 ZV_LCDDATA4
AA28 AK6
AGP_AD25 AD24 ZV_LCDDATA5 DTC124EK
Y30 AG7
AGP_AD26 AD25 ZV_LCDDATA6 22K
2

AA27 AH7
AGP_AD27 AD26 ZV_LCDDATA7
AA30 AJ7

INTERFACE
AGP_AD28 AD27 ZV_LCDDATA8 +3VS PID[0..3]

3
AB28 AK7 35 PID[0..3]
AGP_AD29 AD28 ZV_LCDDATA9
AA29 AG8
AGP_AD30 AD29 ZV_LCDDATA10
AB27 AD30 AH8
ZV_LCDDATA11

2
ZV PORT / EXT
AGP_AD31 AB30 AJ8
AGP_C/BE#[0:3] AD31 ZV_LCDDATA12 R45
6 AGP_C/BE#[0..3] AK8
AGP_C/BE#0 ZV_LCDDATA13
N27 AG9
@22PF_0402 AGP_C/BE#1 C/BE#0 ZV_LCDDATA14 4.7K_0402 INV_B+
R30 AH9
AGP_C/BE#2 C/BE#1 ZV_LCDDATA15 C50 L12
C68 R51 U29 AJ9
C/BE#2 ZV_LCDDATA16
AGP_C/BE#3 留 TEST PAD D13 .1UF_0402

1
1 2 1 2 W28 AK9 +5VALW
C/BE#3 ZV_LCDDATA17 ENVEE DISPOFF# FBM-L11-201209-221
AG10 29 ENVEE 1 2
ZV_LCDDATA18

TMDS
@0_0402 AG30 AH10
12 CLK_AGP PCICLK ZV_LCDDATA19

1
PCIRST# AH30 AJ10 RB751V C51 C48
4,6,18,21,22,23,29,34,35,36 PCIRST# RST# ZV_LCDDATA20
AGP_REQ# AF29 AK10
6 AGP_REQ# REQ# ZV_LCDDATA21
AGP_GNT# AF27 AG11 D14 1000PF_0402 4.7UF_25V_1206
B 6 AGP_GNT# GNT# ZV_LCDDATA22 B
AGP_PAR

2
6 AGP_PAR R28 AH11 29 ENBKL 1 2
+3VS AGP_STOP# PAR ZV_LCDDATA23
6 AGP_STOP# T27
AGP_DEVSEL# STOP# RB751V
R50 6 AGP_DEVSEL# T29 AJ4
DEVSEL# ZV_LCDCNTL0
1 2 PM_C3_STAT# 6 AGP_TRDY#
AGP_TRDY# T28 TRDY# AK4
AGP_IRDY# ZV_LCDCNTL1
10K_0402 6 AGP_IRDY# T30 AH5
AGP_FRAME# IRDY# ZV_LCDCNTL2 LCDVDD_1
6 AGP_FRAME# U27 FRAME# AG5
+3VALW PIRQA# ZV_LCDCNTL3 JP11 L13
18,20,21,22 PIRQA# AH29 INTA#
R64 26 1
SUS_STAT# R53 @0_0402 LVDS1_0- LVDS1_2+ 26 1 LCDVDD
1 2 6 AGP_WBF# 1 2 AE27 AK16 27 2
WBF/SERR# TXOUT_L0N LVDS1_0+ LVDS1_2- 27 2 C300 C52 FBM-L11-201209-221
AJ16 28 3
10K_0402 TXOUT_L0P 28 3

1
18 PM_C3_STAT# PM_C3_STAT# AG29 AK17 LVDS1_1- 29 4 C53
AGP_BUSY# STP_AGP# TXOUT_L1N LVDS1_1+ LVDS1_1+ 29 4 10UF_10V_0805 1000PF_0402
18 AGP_BUSY# AG28 AJ17 30 5
AGP_RBF# AGP_BUSY# TXOUT_L1P LVDS1_2- LVDS1_1- 30 5 .01UF_0402
6 AGP_RBF# AE30 AK18 31 6
AGP_ADSTB0 RBF# TXOUT_L2N LVDS1_2+ 31 6

2
6 AGP_ADSTB0 N29 AD_STB0 AJ18 32 7 INV_B+
TXOUT_L2P 32 7

LVDS
AGP_ADSTB1 W29 AK20 LVDS2_2+ 33 8
6 AGP_ADSTB1 AD_STB1 TXOUT_L3N 33 8
AGP_SBSTB AC29 AJ20 LVDS2_2- 34 9
6 AGP_SBSTB SB_STB TXOUT_L3P 34 9
AGP_SBA[0:7] AK19 LVDS1_C- 35 10
6 AGP_SBA[0:7] TXCLK_LN +3VS 35 10
+3VS AGP_SBA0 AD29 AJ19 LVDS1_C+ LVDS1_0+ 36 11 DISPOFF#
AGP_SBA1 SBA0 TXCLK_LP LVDS2_0- LVDS1_0- 36 11 +3VS
AE28 AH18 37 12 INVT_PWM 29
AGP_SBA2 SBA1 TXOUT_U0N LVDS2_0+ 37 12
R02 PIR5 AD30
SBA2 TXOUT_U0P
AG18 38
38 13
13

AGP2X

1
AGP_SBA3 LVDS2_1- LVDS1_C+ RP5
AD27 SBA3 AH19 39 14
AGP_SBA4 TXOUT_U1N LVDS2_1+ R68 LVDS1_C- 39 14 PID4 PID0
L20 AC30 AG19 40 15 PID4 35 8 1
AGP_SBA5 SBA4 TXOUT_U1P LVDS2_2- 40 15 PID0 PID1
FBM-L11-201209-221 AC27 AH20 41 16 7 2
C81 AGP_SBA6 SBA5 TXOUT_U2N LVDS2_2+ 10K_0402 LVDS2_1+ 41 16 PID1 PID2
AB29 AG20 42 17 6 3
.1UF_0402 AGP_SBA7 SBA6 TXOUT_U2P LVDS2_1- 42 17 PID2 PID3
AC28 SBA7 AH22 43 18 5 4
+3VS TXOUT_U3N 43 18 PID3

2
AG22 44 19
+3VS +3VS C98 AGP_ST0 TXOUT_U3P LVDS2_C- ENVEE LVDS2_0+ 44 19
6 AGP_ST0 AF30 AH21 45 20
ST0 TXCLK_UN 45 20
1

6 AGP_ST1 AGP_ST1 AF28 AG21 LVDS2_C+ LVDS2_0- 46 21 8P4R_10K_0804


ST1 TXCLK_UP 46 21
1

10UF_10V_0805 6 AGP_ST2 AGP_ST2 AE29 47 22


ST2 47 22
1

C R72 ENVDD LVDS2_C+ R173 C


AE13 1 Q9 48 23
R73 10K_0402 AGP_SBSTB# AD28 DIGON LVDS2_C- 48 23 PID4
2

AF13 2 49 24 1 2
TFT LCD CONN.

AGP4X
U6 R74 6 AGP_SBSTB# SB_STB# BLON# 2N7002 49 24
2

AGP_ADSTB0#M28
2

6 AGP_ADSTB0# ADSTB0# 3 50 25
@0_0402 AGP_ADSTB1# Y29 50 25
AJ13
VDD

6 AGP_ADSTB1# ADSTB1# TX0M


10K_0402 2 R163 1 AK13 LVDS 50 PIN CONN. 10K_0402
@100K_0402 TX0P
2

AGP_NBREF K30 AJ14


AGPREF TX1M +SVDD
1 4 2 1 K29 AK14
X1/CLK CLK AGPTEST TX1P

TMDS
R159 47_1%_0402 TX2M
AJ15
10 mil 1 2 715_1%_0402 AJ24 AK15
R2SET TX2P
7 8 R58 AJ12
S1 SD CRMA TXCM
17,34 CRMA AK24 AK12
C_R TXCP

1
DAC2
6 5 LUMA AK23
GND

S0 LEE 17,34 LUMA Y_G +3VS


COMPS AK22 AF12 R548 R69 +SVDD
17,34 COMPS COMP_B DVIDDCCLK
1

R70
AG24
AG25
H2SYNC DVIDDCDATA
AE12 PIR 10K_0402 10K_0402
R80 R79 R546 V2SYNC L21
SM560_SO-8
3

AF11
@0_0402 10_0402 @0_0402 C720 HPD U7 FCM2012C80_0805

2
R547 AH25
CRT2DDCCLK (10 mil) XTALIN
2 1 1 2 AH26 AK28 RED 17 1 6 1 2
CRT2DDCDATA R (10 mil) CLKIN/X1 VDD MCLK_SPREAD
2

11

AK27 GREEN 17 2 5
R555 10_0402 G (10 mil) NC/X2 CLKOUT
22PF_0402 AK26 4 7
SSC

B BLUE 17 SS% FS1

1
10_0402 (10 mil) SSON#
R03 PIR 21 1 2
Close to U6 AJ26
AJ25
SSIN HSYNC
AG26
AG27 (10 mil)
HSYNC 17 3
GND SSON#
8
C107 C106
SSOUT VSYNC VSYNC 17 4.7U_0805 0.1U_0402
@10K_0402
2

Close to U6

2
+3VS W180

2
AK25 1 2
DAC1

C721 X1 R59 RSET (10 mil) R55 R76


R579 R580
CLK

22PF_0402 4 3 XTALIN 1 2 XTALIN_F AJ29 499_1%_0402 1K_0402


VDD OUT XTALIN @10K_0402 @10K_0402
1 2 120_0402 TP3 1 XTALOUT AJ30
ST GND XTALOUT

1
1

D C77 AH28 D
SG-710ECK_27MHz_3.3V_20ppm VGADDCDATA DDCDATA 17
1

C120 @22PF_0402 1 2 AH24 AH27


TESTEN VGADDCCLK DDCCLK 17
R67 1K_0402
.1UF_0402 R56 SUS_STAT# AJ28 AJ27 MCLK_SPREAD
18,35 SUS_STAT# SUS_STAT# AUXWIN
2

150_1%_0402 R65 2 @10K_0402


2

1
M7-C +3VS
Compal Electronics, Inc.
Title

IF OSC USED, R59 120 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1302
Divider circuit for 1.8Vdc XTALIN from 3.3Vdc OSC out AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
OHM ON, R56 ON Custom 1B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 13 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

MEMORY INTERFACE

NMD[0:63]
NMD[0:63] 16
NMA[0:13]
NMA[0:13] 16
NDQM[0:7]
A NDQM[0:7] 16 A

U2B U2C
J30 B26 NMD0 C7 H2 R21 1 2 0_0402 NMA0
DQA0 AA0 NMD1 DQB0 AB0 R23 0_0402 NMA1
J29 DQA1 Part 2 of 5 AA1 A26
NMD2
D7 DQB1 Part 3 of 5 AB1 H1
R26
1 2
0_0402 NMA2
H30 DQA2 AA2 B25 C6 DQB2 AB2 J2 1 2
H29 A25 NMD3 D6 J1 R27 1 2 0_0402 NMA3
DQA3 AA3 NMD4 DQB3 AB3 R160 0_0402 NMA4
F30 DQA4 AA4 C22 C4 DQB4 AB4 K4 1 2
F29 D21 NMD5 D4 K3 R158 1 2 0_0402 NMA5
DQA5 AA5 NMD6 DQB5 AB5 R171 0_0402 NMA6
E30 DQA6 AA6 C21 C3 DQB6 AB6 L4 1 2
E29 D20 NMD7 D3 M3 R174 1 2 0_0402 NMA7
DQA7 AA7 NMD8 DQB7 AB7 R170 0_0402 NMA8
J28 DQA8 AA8 C20 A5 DQB8 AB8 L3 1 2
J27 D22 NMD9 B5 M4 R172 1 2 0_0402 NMA9
DQA9 AA9 NMD10 DQB9 AB9 R47 0_0402 NMA10
H28 DQA10 AA10 C23 A4 DQB10 AB10 N2 1 2
H27 D23 NMD11 B4 N1 R46 1 2 0_0402 NMA11
DQA11 AA11 NMD12 DQB11 AB11 R177 0_0402 NMA12
F28 DQA12 AA12 A27 A2 DQB12 AB12 N4 1 2
F27 B27 NMD13 B2 N3 R181 1 2 0_0402 NMA13
DQA13 AA13 NMD14 DQB13 AB13
E28 DQA14 A1 DQB14
E27 NMD15 B1
DQA15 NMD16 DQB15
D30 DQA16 E4 DQB16
D29 G30 NMD17 E3 D5 NDQM0
B DQA17 DQMA#0 NMD18 DQB17 DQMB#0 NDQM1 B
C30 DQA18 DQMA#1 G28 F3 DQB18 DQMB#1 B3
C29 B30 NMD19 F4 G3 NDQM2
DQA19 DQMA#2 NMD20 DQB19 DQMB#2 NDQM3
A30 DQA20 DQMA#3 D26 H3 DQB20 DQMB#3 E1
A29 D16 NMD21 H4 U1 NDQM4
DQA21 DQMA#4 NMD22 DQB21 DQMB#4 NDQM5
A28 DQA22 DQMA#5 B15 J3 DQB22 DQMB#5 V3
B28 D11 NMD23 J4 AB1 NDQM6
DQA23 DQMA#6 NMD24 DQB23 DQMB#6 NDQM7
D28 B10 C1 AC3

MEMORY INTERFACE
DQA24 DQMA#7 NMD25 DQB24 DQMB#7
C28 DQA25 C2 DQB25 Close to memory
NMD26
MEMORY INTERFACE

D27 DQA26 QSA0 G29 D1 DQB26 QSB0 C5


C27 G27 NMD27 D2 A3
DQA27 QSA1 NMD28 DQB27 QSB1 VDQS2 R146 1
D25 DQA28 QSA2 B29 F1 DQB28 QSB2 G4 2 33_0402 NDQS2
NDQS2 16
C25 C26 NMD29 F2 E2
DQA29 QSA3 NMD30 DQB29 QSB3
D24 DQA30 QSA4 C16 G1 DQB30 QSB4 U2
C24 A15 NMD31 G2 V4 VDQS5 R52 1 2 33_0402 NDQS5
DQA31 QSA5 DQB31 QSB5 NDQS5 16
D18 C11 NMD32 R1 AB2
DQA32 QSA6 NMD33 DQB32 QSB6
C18 DQA33 QSA7 A10 R2 DQB33 QSB7 AC4
D17 NMD34 T1
DQA34 NMD35 DQB34 R182 1
C17 DQA35 RASA# B18 T2 DQB35 RASB# P4 2 33_0402 NMRAS#
NMRAS# 16
D15 NMD36 V1
DQA36 NMD37 DQB36 R49
C15 DQA37 CASA# A19 V2 DQB37 CASB# R3 1 2 33_0402 NMCAS#
NMCAS# 16
D14 NMD38 W1
DQA38 NMD39 DQB38 R186 1
C14 DQA39 WEA# A18 W2 DQB39 WEB# R4 2 33_0402 NMWE#
NMW E# 16
B17 NMD40 T3
DQA40 DQB40

B
A17 C19 NMD41 T4 P2 R178 1 2 33_0402 NMCS0#
DQA41 CSA0# DQB41 CSB0# NMCS0# 16
B16 NMD42 U3
A

DQA42 NMD43 DQB42


A16 DQA43 CSA1# B19 U4 DQB43 CSB1# P3
B14 NMD44 W3
DQA44 NMD45 DQB44 R48
A14 DQA45 CKEA D19 W4 DQB45 CKEB P1 1 2 0_0402 NMCKE
NMCKE 16
B13 NMD46 Y3
C
DQA46 +2.5VS NMD47 DQB46 C
A13 DQA47 Y4 DQB47
D13 B23 NMD48 Y1 K2 VMCLK0 R35 1 2 0_0402 NMCLK0
DQA48 CLKA0 DQB48 CLKB0 NMCLK0 16
C13 A23 NMD49 Y2 K1 VMCLK 0# R32 1 2 0_0402 NMCLK0#
DQA49 CLKA0# DQB49 CLKB0# NMCLK0 # 16
D12 NMD50 AA1
DQA50 DQB50
1

C12 B22 NMD51 AA2 L2 VMCLK1 R44 1 2 0_0402 NMCLK1


DQA51 CLKA1 DQB51 CLKB1 NMCLK1 16
D10 A22 R147 NMD52 AC1 L1 VMCLK 1# R40 1 2 0_0402 NMCLK1#
DQA52 CLKA1# DQB52 CLKB1# NMCLK1 # 16
C10 NMD53 AC2
DQA53 1K_1%_ 0402 NMD54 DQB53 +1.8VS
D9 DQA54 CLKAFB A21 AD1 DQB54 CLKBFB M2
C9 B21 NMD55 AD2 M1
DQA55 NC5 NMD56 DQB55 NC6 PIR
2

B12 DQA56 AA3 DQB56


A12 D8 MVREF (10 mil) NMD57 AA4 R149 4.7K_04 02
DQA57 VREF NMD58 DQB57
B11 DQA58 AB3 DQB58 MEMVMODE0 B7 1 2
1

A11 B24 NMD59 AB4 B6


DQA59 NC1 DQB59 MEMVMODE1
1

B9 A24 C258 R151 NMD60 AD3


DQA60 NC3 + NMD61 DQB60
A9 DQA61 NC2 B20 AD4 DQB61

1
B8 A20 .1UF_0402 1K_1%_ 0402 NMD62 AE3 C8
DQA62 NC4 NMD63 DQB62 MEMTEST R150
2

A8 DQA63 AE4 DQB63


2

M7-C C260 M7-C 4.7K_04 02


10UF_10V_08 05

2
R152

47_1% _0402

2
D D

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
Custom
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 14 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+1.25V S
G6
U2D
VDDC VDDC F6
VDD_MEMPLL 1.8

10 mil - 15 mA - analog
L26
+1.8VS POWER INTERFACE
H6 VDDC Part 4 of 5 VDDC F7
P6 VDDC VDDC F10

1
+1.25V S 22UF_10V_12 06 10UF_10V_0 805 U6 F11 C259 C248 FBM-11-16080 8-600T_0603
VDDC VDDC

1
V6 F13 + U2E
120 mil - 2.7A VDDC VDDC
W6 VDDC VDDC F14 L10 VSS VSS T10

1
AC6 F18 .1UF_0402 10UF_10V_08 05 L11 Part 5 of 5 T11
C301 C275 C280 C712 + C713 + C714 VDDC VDDC VSS VSS

2
AD6 VDDC VDDC F23 L12 VSS VSS T12
AE6 VDDC VDDC F25 L13 VSS VSS T13
.1UF_0402 .1UF_0402 1UF_10V 10UF_10V_0 805 AF5 M25 L14 T14
+1.25VS VDDC VDDC VSS VSS

2
A F24 VDDC VDDC N25 L15 VSS VSS T15 A
W26 VDDC VDDC P25 L16 VSS VSS T16
AD26 VDDC VDDC V25 L17 VSS VSS T17
AG4 VDDC VDDC W25 L18 VSS VSS T18
C276 C274 C299 C321 C329 C278 AH4 AC25 L19 T19
VDDC VDDC VSS VSS
AJ3 VDDC VDDC AF25 L20 VSS VSS T20
1UF_10V .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 AK3 AE24 L21 T21
VDDC VDDC VSS VSS
AF14 VDDC VDDC AE18 M10 VSS VSS U10
AF15 VDDC VDDC AE17 M11 VSS VSS U11
+2.5VS AE11 AE15 +2.5VS M12 U12
+2.5VS VDDC VDDC VSS VSS
AE10 VDDC VDDC AE14 M13 VSS VSS U13
M14 VSS VSS U14
40 mil - 0.7A 20 mil 10 mil
G5 VDDR1 VDDM/VDDR1 E5 M15 VSS VSS U15
H5 VDDR1 VDDM/VDDR1 E6 M16 VSS VSS U16
C247 C251 C252 J5 E12 M17 U17
VDDR1 VDDM/VDDR1 VSS VSS
J6 VDDR1 VDDM/VDDR1 E13 M18 VSS VSS U18
K5 VDDR1 VDDM/VDDR1 E18 M19 VSS VSS U19
22UF_10V_12 06 .1UF_0402 .1UF_0402 K6 E19 M20 U20
VDDR1 VDDM/VDDR1 VSS VSS
L5 VDDR1 VDDM/VDDR1 E20 M21 VSS VSS U21
M5 VDDR1 VDDM/VDDR1 E26 N10 VSS VSS V10
N5 F26 N11 V11

CORE GND
PLACE DIRECTLY C249 C308 C253 C310 VDDR1 VDDM/VDDR1 VSS VSS
P5 VDDR1 N12 VSS VSS V12
UNDERNEATH CHANNEL R5 E7 10 mil N13 V13
VDDR1 VDDQM/VDDR1 VSS VSS
A SECTION OF ASIC. R6 VDDR1 VDDQM/VDDR1 E8 N14 VSS VSS V14
22UF_10V_12 06 .1UF_0402 .1UF_0402 .1UF_0402 T5 E9 N15 V15
VDDR1 VDDQM/VDDR1 VSS VSS
U5 VDDR1 VDDQM/VDDR1 E10 N16 VSS VSS V16
V5 VDDR1 VDDQM/VDDR1 E11 N17 VSS VSS V17
W5 VDDR1 VDDQM/VDDR1 E14 N18 VSS VSS V18
PLACE DIRECTLY C266 C255 C250 C254 C270 Y5 E15 N19 V19
VDDR1 VDDQM/VDDR1 VSS VSS
UNDERNEATH CHANNEL Y6 VDDR1 VDDQM/VDDR1 E16 N20 VSS VSS V20
B
AA5 E17 +2.5VS N21 V21
B
B SECTION OF ASIC. VDDR1 VDDQM/VDDR1 VSS VSS
22UF_10V_12 06 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 AA6 E21 P10 W10
VDDR1 VDDQM/VDDR1 VSS VSS
AB5 VDDR1 VDDQM/VDDR1 E22 P11 VSS VSS W11
AC5 VDDR1 VDDQM/VDDR1 E23 P12 VSS VSS W12
AD5 VDDR1 VDDQM/VDDR1 E24 P13 VSS VSS W13
C320 C294 C256 C257 C326 J26 E25 L29 P14 W14
VDDR1 VDDQM/VDDR1 VSS VSS
H25 VDDR1 VDDQM/VDDR1 G26 P15 VSS VSS W15
.1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 J25 H26 FBM-11-160 808-121 P16 W16
VDDR1 VDDQM/VDDR1 VSS VSS
F5 VDDR1 P17 VSS VSS W17
F8 F19 VDDRH P18 W18
VDDR1 VDDRH0 VSS VSS
F9 VDDR1 VDDRH1 N6 P19 VSS VSS W19

1
F15 VDDR1 P20 VSS VSS W20

1
F16 F20 + C719 C297 P21 W21
VDDR1 VSSRH0 C290 VSS VSS
F21 VDDR1 VSSRH1 M6 R10 VSS VSS Y10
F22 10UF_10V_0 805 .1UF_0402 .1UF_0402 R11 Y11
VDDR1 VSS VSS

2
R12 VSS VSS Y12
+1.8VS A7 10 mil - 15 mA - analog R13 Y13
MPVDD VDD_MEMPLL 1.8 VSS VSS
MPVSS A6 R14 VSS VSS Y14
R02 PIR7 R15 VSS VSS Y15
F12 AK29 10 mil - 30 mA - analog R16 Y16

CORE & I/O


VDDC18 PVDD VDD_PLL1.8 VSS VSS
F17 VDDC18 PVSS AK30 R17 VSS VSS Y17
G25 VDDC18 R18 VSS VSS Y18
1

+1.8VS LVDDR_1.8 C272 C303 R25 AF6 R19 Y19

POWER
VDDC18 VDDR3 +3VS VSS VSS
1

L32 + AB25 AF7 R20 Y20


10 mil - 3 mA VDDC18 VDDR3 VSS VSS
AB6 VDDC18 VDDR3 AF8 R21 VSS VSS Y21
T6 VDDC18 VDDR3 AF9
FBM-11-1608 08-121 10UF_10V_0 805 .1UF_0402 M7-C
2

L6 VDDC18 VDDR3 AF10


1

C325 AE7
VDDR3
1

+ AE8
C C322 VDDR3 C
VDDR3 AE9
VDDR3 AF26
10UF_10V_0 805 .1UF_0402
2

AK21 LPVDD VDDR3 AE26


5 mil AE16 AE25
LVDDR_18 VDDR3 +1.5VS
AF16 LVDDR_18 VDDR3 AD25
5 mil AG16 LVDDR_18_25
AF17 LVDDR_18_25 30 mil - 20mA
1

C323 C324 K25


VDDP
1

1
+ AJ21 K26
LPVSS VDDP

1
AH16 K27 C306 C307 C284 C279 + C271
LVSSR VDDP
AH17 LVSSR VDDP L25
10UF_10V_0 805 .1UF_0402 .1UF_0402 .01UF_0402 .01UF_0402 .1UF_0402 10UF_10V_08 05
2

AG17 LVSSR VDDP L26


+1.8VS PVDD_1.8

2
AF18 LVSSR VDDP M26
L19 10 mil - 10 mA N26
VDDP
AK11 TPVDD VDDP P26
AJ11 TPVSS VDDP R26
FBM-11-160 808-121 T25 +3VS
VDDP
1

C85 C76 AG12 T26


TXVDDR VDDP
1

+ AG13 U25
TXVDDR VDDP 30 mil - 20mA
AG14 TXVDDR VDDP U26

1
AG15 TXVDDR VDDP V26

1
10UF_10V_0 805 .1UF_0402 C312 C327 C328 C313 + C314
2

AH12 TXVSSR VDDP Y25


AH13 TXVSSR VDDP Y26
AH14 AA25 .1UF_0402 .1UF_0402 .01UF_0402 .01UF_0402 10UF_10V_08 05
TXVSSR VDDP

2
AH15 TXVSSR VDDP AA26
+2.5VS DAC_2.5 AB26
L31 VDDP
10 mil - 5 mA - analog VDDP AC26
AE21 A2VDD VDDP Y27
AF21 A2VDD VDDP Y28 DAC_1.8
1

D FBM-11-1608 08-600T_0603 C311 C318 +1.8VS D


1

+ AJ23 L17
A2VDDQ 10 mil - 10 mA - analog
AF23 AVDD AVDDDI AH23
+1.8VS VDD_PLL1.8 AF24 AF20
AVDD A2VDDDI

1
L18 10UF_10V_0 805 .1UF_0402 C74 C83 FBM-11-1608 08-121
2

10 mil - 30 mA - analog
1

AE19 AF22 +
A2VSSN AVSSQ
AE20 AG23
A2VSSN AVSSDI Compal Electronics, Inc.
1

FBM-11-1608 08-600T_0603 C84 C75 AF19 AE23


A2VSSDI AVSSN
1

+ .1UF_0402 10UF_10V_0 805 Title


2

2
AJ22 A2VSSQ AVSSN AE22

10UF_10V_08 05 .1UF_0402
SCHEMATIC, M/B LA-1302
M7-C Size Document Number Rev
2

401216 1B

Date: Wednesday, May 29, 2002 Sheet 15 of 45


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

NOTE : MA11 CONNECTION REQUIRED DDR SGRAM


FOR 4Mx32 DDR SGRAM ONLY
NDQM0 R175 2 1 33_0402 VDQM0
NDQM1 R184 2 1 33_0402 VDQM1
NDQM2 R180 2 1 33_0402 VDQM2
NDQM3 R183 2 1 33_0402 VDQM3 NMD[0:63]
+2.5VS 14 NMD[0:63]
NDQM4 R30 2 1 33_0402 VDQM4
NDQM5 R36 2 1 33_0402 VDQM5 NMA[0:13]
14 NMA[0:13]
A
NDQM6 R29 2 1 33_0402 VDQM6 A
NDQM7 R41 2 1 33_0402 VDQM7 NDQM[0:7]
14 NDQM[0:7]
NMWE#
14 NMWE#

1
C246 C286 NMCAS#
14 NMCAS#
NMRAS#
10UF_10V_08 05 .1UF_0402 14 NMRAS#
NMCS0#
2 Close to memory 14 NMCS0#
NMCKE
14 NMCKE
NMCLK0
14 NMCLK0
NMCLK0 #
+2.5VS +2.5VS 14 NMCLK0 #
NMCLK1
14 NMCLK1
NMCLK1 #
14 NMCLK1 #
NDQS2
14 NDQS2
1

1
C244 C330 C269 C245 C293 C65 C64 C62 C71 NDQS5
14 NDQS5

1
C37
10UF_10V_08 05 2200PF_0 402 2200PF_0 402 10UF_10V_08 05 2200PF_0 402 2200PF_0 402
2

2
2
.1UF_0402 2200PF_ 0402 +2.5VS .1UF_0402 +2.5VS
2200PF_0 402
1

1
C281 C285 C283 C242 C268 C309 C264 C302 C262 C70 C58 C63 C55 C57 C54 C45 C66 C69

.1UF_0402 .1UF_0402 .1UF_0402 2200PF_0 402 10UF_10V_08 05 .1UF_0402 .1UF_0402 .1UF_0402 2200PF_0 402 10UF_10V_0 805
14
22
59
67
73
79
86
95
15
35
65
96

14
22
59
67
73
79
86
95
15
35
65
96
2
8

2
8
U18 U4
2

2
.1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
.1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
B B

NMA0 31 97 VMD0 4 5 NMD0 NMA0 31 97 VMD63 8 1 NMD63


NMA1 A0 DQ0 VMD1 NMD1 NMA1 A0 DQ0 VMD62 NMD62
32 A1 DQ1 98 3 6 32 A1 DQ1 98 7 2
NMA2 33 100 VMD2 2 7 NMD2 NMA2 33 100 VMD61 6 3 NMD61
NMA3 A2 DQ2 VMD3 NMD3 NMA3 A2 DQ2 VMD60 NMD60
34 A3 DQ3 1 1 8 34 A3 DQ3 1 5 4
NMA4 47 3 VMD4 RP103 4 5 8P4R_33_ 0804 NMD4 NMA4 47 3 VMD59 8 1 NMD59
NMA5 A4 DQ4 VMD5 NMD5 NMA5 A4 DQ4 VMD58 NMD58
48 A5 DQ5 4 3 6 48 A5 DQ5 4 7 2
NMA6 49 6 VMD6 2 7 NMD6 NMA6 49 6 VMD57 6 3 NMD57
NMA7 A6 DQ6 VMD7 NMD7 NMA7 A6 DQ6 VMD56 NMD56
50 A7 DQ7 7 1 8 50 A7 DQ7 7 5 4
NMA8 51 60 VMD31 RP105 4 5 8P4R_33_ 0804 NMD31 NMA8 51 60 VMD32 8 1 NMD32
NMA9 A8(AP) DQ8 VMD30 NMD30 NMA9 A8(AP) DQ8 VMD33 NMD33
45 A9 DQ9 61 3 6 45 A9 DQ9 61 7 2
NMA10 36 63 VMD29 2 7 NMD29 NMA10 36 63 VMD34 6 3 NMD34
+2.5VS NMA11 A10 DQ10 VMD28 NMD28 +2.5VS NMA11 A10 DQ10 VMD35 NMD35
37 A11 DQ11 64 1 8 37 A11 DQ11 64 5 4
NMA13 29 68 VMD27 RP109 4 5 8P4R_33_ 0804 NMD27 NMA13 29 68 VMD36 8 1 NMD36
NMA12 BA0 DQ12 VMD26 NMD26 NMA12 BA0 DQ12 VMD37 NMD37
30 BA1 DQ13 69 3 6 30 BA1 DQ13 69 7 2
71 VMD25 2 7 NMD25 71 VMD38 6 3 NMD38
DQ14 DQ14
2

2
VDQM0 23 72 VMD24 1 8 NMD24 VDQM7 23 72 VMD39 5 4 NMD39
R176 VDQM3 DM0 DQ15 VMD16 RP107 4 8P4R_33_ 0804 NMD16 R42 VDQM4 DM0 DQ15 VMD47 NMD47
56 DM1 DQ16 9 5 56 DM1 DQ16 9 8 1
VDQM2 24 10 VMD17 3 6 NMD17 VDQM5 24 10 VMD46 7 2 NMD46
1K_1%_ 0402 VDQM1 DM2 DQ17 VMD18 NMD18 1K_1% _0402 VDQM6 DM2 DQ17 VMD45 NMD45
57 DM3 DQ18 12 2 7 57 DM3 DQ18 12 6 3
NDQS2 13 VMD19 1 8 NMD19 NDQS5 13 VMD44 5 4 NMD44
(10 NVREF0 DQ19 VMD20 RP106 4 8P4R_33_ 0804 NMD20 (10 NVREF1 DQ19 VMD43 NMD43
1

1
94 DQS DQ20 17 5 94 DQS DQ20 17 8 1
mil) 18 VMD21 3 6 NMD21 mil) 18 VMD42 7 2 NMD42
DQ21 DQ21
2

2
58 20 VMD22 2 7 NMD22 58 20 VMD41 6 3 NMD41
VREF DQ22 VREF DQ22
1

1
+2.5VS +2.5VS R179 C304 52 21 VMD23 1 8 NMD23 +2.5VS +2.5VS R37 C47 52 21 VMD40 5 4 NMD40
MCL DQ23 VMD15 RP110 4 8P4R_33_ 0804 NMD15 MCL DQ23 VMD48 NMD48
93 RFU DQ24 74 5 93 RFU DQ24 74 8 1
1K_1% _0402 75 VMD14 3 6 NMD14 1K_1% _0402 75 VMD49 7 2 NMD49
NMRAS# DQ25 VMD13 NMD13 NMRAS# DQ25 VMD50 NMD50
2

2
27 RAS# DQ26 77 2 7 27 RAS# DQ26 77 6 3
2

2
C NMCAS# VMD12 NMD12 NMCAS# VMD51 NMD51 C
1

1
26 CAS# DQ27 78 1 8 26 CAS# DQ27 78 5 4
R571 .1UF_0402 NMWE# 25 80 VMD11 RP104 4 5 8P4R_33_ 0804 NMD11 R573 NMW E# 25 80 VMD52 8 1 NMD52
NMCS0# WE# DQ28 VMD10 NMD10 .1UF_0402 NMCS0# WE# DQ28 VMD53 NMD53
1K_1% _0402 28 CS# DQ29 81 3 6 1K_1% _0402 28 CS# DQ29 81 7 2
R572 83 VMD9 2 7 NMD9 R574 83 VMD54 6 3 NMD54
NMCKE DQ30 VMD8 NMD8 NMCKE DQ30 VMD55 NMD55
@2K_1 %_0402 53 CKE DQ31 84 1 8 @2K_1 %_0402 53 CKE DQ31 84 5 4
RP102 8P4R_33_ 0804
1

1
NMCLK0 55 38 NMCLK1 55 38 RP14 8P4R_33_ 0804
CK NC CK NC RP10 8P4R_33_ 0804
54 CK# NC 39 54 CK# NC 39
2

2
40 40 RP4 8P4R_33_ 0804
NC NC RP7 8P4R_33_ 0804
87 NC NC 41 87 NC NC 41
R185 88 42 R28 88 42 RP8 8P4R_33_ 0804
180_0402 NC NC 180_0402 NC NC RP6 8P4R_33_ 0804
89 NC NC 43 89 NC NC 43
90 44 90 44 RP9 8P4R_33_ 0804
NMCLK0 # NC NC NMCLK1 # NC NC RP13 8P4R_33_ 0804
1

1
91 NC 91 NC
Place close to DDR SGRAM Place close to DDR SGRAM
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
2

2
R575 R576 R577 R578
@2K_1 %_0402 @2K_1 %_0402 4M32-5_DDR_SGR AM @2K_1 %_0402 @2K_1 %_0402 4M32-5_DDR_SGR AM
11
19
62
70
76
82
92
99
16
46
66
85

11
19
62
70
76
82
92
99
16
46
66
85
5

5
1

D NOTE : Resistors of NDQS0 and NDQS4 closed to D


the 94 pin of every DDR SGRAM

16/32MB DDR 2/4MX32 SGRAM Title


Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
16MB 64 BIT INTERFACE WITH TWO PIECES 2MX32 AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 401216 1B
32MB 64 BIT INTERFACE WITH TWO PIECES 4MX32 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 16 of 45
1 2 3 4 5 6 7 8
A B C D E

+5VS +3VS

D6 D2 D3 D5
DAN217 DAN217 DAN217 +3VS F1 2 1

CRT Connector

1
POLYSWITCH_0.5A RB411D

1
1
C15 R5 R3
2.2K_0402 2.2K_0402
.1UF_0402

2
JP1

2
CRT-15P

1 6 1
L7 MSEN# 11 MSEN#
13,29,34 MSEN#
13 RED 1 2 1
FCM2012C-800_0805 7
L6 12 C27
1 2 2 @10PF_0402
13 GREEN
FCM2012C-800_0805 8
L8 13
13 BLUE 1 2 3
FCM2012C-800_0805 9
14

1
DDC_MD2 4

1
R17 R16 R15 C26 C25 C24 C4 C6 C7 10
75_1% 75_1% 75_1% 15
@22PF_0402 @22PF_0402 @22PF_0402 18PF_0402 18PF_0402 18PF_0402 5

2
Q2

2
L5 2N7002

D
13 HSYNC 3 1 1 2
FBM-11-160808-121 1 3

S
DDCDATA 13
Q5
2N7002 L2

D
2
3 1 1 2 1 3

G
13 VSYNC FBM-11-160808-121

2
Q6 Q3
DDCCLK 13

1
2N7002 C3 C8 C10 C5 C11 2N7002

G
2

2
68PF_0402 68PF_0402 100PF_0402 220PF_0402 220PF_0402

2
1 2
R6 100K_0402 +12VS

+12VS 1 2
2 R24 100K_0402 2
DOCK_VSYNC 34 DOCK_DDCD 34

DOCK_HSYNC 34 DOCK_DDCC 34

DOCK_BLUE 34

DOCK_GREEN 34

DOCK_RED 34

+3VS
TV-Out Connector

3
D10

DAN217 D9 D12
DAN217 DAN217
3 3

1
1 2
C18 47PF_0402
L3
LUMA 1 2
13,34 LUMA
FBM-11-160808-121 S-Video
1 2 JP3
C20 47PF_0402
L4 1
CRMA 2
13,34 CRMA 1 2
FBM-11-160808-121 3
4
1 2
C19 47PF_0402 5
L1 6
COMPS 7
13,34 COMPS 1 2
FBM-11-160808-121 S CONN._FOXCONN
1

1
R12 R8 R13 C23 C21 C22 C13 C14 C12

150PF_0402
75_1% 75_1% 75_1%
2

2
2

270PF_0402 270PF_0402 270PF_0402


150PF_0402

150PF_0402

4 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 17 of 45
A B C D E
A B C D

25,34 AC_SYNC
25,34 AC_SDATAO
34 SDATA_IN1
25 SDATA_IN0 Place closely to
25,34 AC_BITCLK LAD0 29,35,36 ICH3-M
32 ICH_VGATE LAD1 29,35,36
CLK_ICHPCI
4 PM_CPUPERF# LAD2 29,35,36
39 PM_GMUXSEL LAD3 29,35,36

1
13,35 SUS_STAT# LDRQ# 35
R380
LFRAME# 29,35,36
D20 PM_STPPCI#
12 PM_STPPCI#
1 2 ICH_THRM# 1 2 +3VS 10_0402
29 THRM# +3VS 12,39 PM_STPCPU# EXTSMI# 29
R377 10K_0402
29 PM_SLP_S5# SCI# 29

2
RB751V

12
29 PM_SLP_S3# LID_OUT# 29

10K_0402 R373
C551
12,29 PM_SLP_S1#
1 29 RSMRST# 1
GPIO2 1 2 15PF_0402
29 SWI# +3VS
R464 8.2K_0402

2
32 PM_PWROK 1 2
PM_LANPWROK PWRBTN_OUT# R416 10K_0402 GPIO3 1

IDE_PATADET 1
29 PWRBTN_OUT# 2
R465 8.2K_0402

AC_SDATAO
ICH_THRM#
39 PM_DPRSLPVR

SDATA_IN0
SDATA_IN1
AC_BITCLK
GPIO4 1 2

AC_SYNC
20,21,29,34,35 CLKRUN# IRQ14 20,28

AC_RST#

LID_OUT#
EXTSMI#
1 2 1 2 R467 8.2K_0402

PIRQC#
PIRQD#
PIRQA#
PIRQB#
+3VS 13 PM_C3_STAT# IRQ15 20,24

GPIO2
GPIO3
GPIO4
GPIO5
R345 100K_0402 PM_BATTLOW# GPIO5 1 2
29 PM_BATLOW# SERIRQ 20,21,29,35,36

SCI#
C492 .1UF_0402 PM_LANPWROK R466 8.2K_0402
13 AGP_BUSY#
RSMRST# 1 2

AB21

AB14
R344 10K_0402 1 2

W20

W19
AC2
AB3

AB1
AA6
AA1
AA7

AA5
AA2

AA4
AB4
U21

U20

D11

C11

H22
V21

Y20
V19

B11
+3VS

J19
J20
J21
W2

W3
W4
U5

C7

U3

U2

U4
U1

C1

C5
V4
Y5

V5

B7

A7

V1

V2

Y4
Y2

Y3

B1

B2
A2
A6
B5

A5
PIRQA#

T3

T2
U42A 13,20,21,22 PIRQA#
R372 10K_0402 PIRQB#
20,23 PIRQB#
PIRQC#

INT_SERIRQ
INT_PIRQF#/GPIO3
PM_AGPBUSY#/GPIO6

PM_BATLOW#
PM_C3_STAT#/GPIO21

PM_PWRBTN#
PM_CLKRUN#/GPIO24

PM_RI#
PM_RSMRST#
PM_SLP_S1#/GPIO19
PM_SLP_S3#
PM_SLP_S5#
PM_STPCPU#/GPIO20
PM_STPPCI#/GPIO18

PM_SUS_STAT#
PM_THRM#

PM_GMUXSEL/GPIO23
PM_CPUPREF#/GPIO22

AC_RST#
AC_SDATAIN0
AC_SDATAIN1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

GPIO_7
GPIO_8
GPIO_12
GPIO_13
GPIO_25
GPIO_27
GPIO_28

INT_APICD0
INT_APICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#/GPIO2

INT_PIRQG#/GPIO4
INT_PIRQH#/GPIO5
INT_IRQ14
INT_IRQ15
PM_AUXPWROK

PM_PWROK

PM_SUS_CLK

PM_VGATE/VRMPWRGD

AC_BITCLK

AC_SDATAOUT

INT_APICCLK
PM_DPRSLPVR

AC_SYNC
20,34 PIRQC#
PIRQD#
20,34 PIRQD#
21,22,23,34 AD[0..31]

AD0 J2 T5 CLK_ICHPCI
PCI_AD0 PCI_CLK CLK_ICHPCI 12
AD1 K1 M3
PCI_AD1 PCI_DEVSEL# DEVSEL# 20,21,22,23,34
AD2 J4 F1 +3VALW +3VS
PCI_AD2 PCI_FRAME# FRAME# 20,21,22,23,34
AD3 K3 C4
PCI_AD3 PCI_GPIO0/REQA# PCI_REQA# 20
AC_BITCLK SDATA_IN0 AD4 H5 D4
PCI_AD4 PCI_GPIO1/REQB#/REQ5# PCI_REQB# 20
AD5 K4 AC'97 LPC unMUX Interrupt B6

2
AD6 PCI_AD5 PCI_GPIO16/GNTA#
H3 Power Management Geyserville Interface Interface GPIO Interface B3

2
AD7 PCI_AD6 PCI_GPIO17/GNTB#/GNT5#
L1 N3 IRDY# 20,21,22,23,34 R369
AD8 PCI_AD7 PCI_IRDY#
L2 G5 PAR 21,22,23,34 R581
2

AD9 PCI_AD8 PCI_PAR 10K_0402


G2 M2 PERR# 20,21,22,23,34
R483 R474 AD10 PCI_AD9 PCI_PERR# @10K_0402
L4 M1 PLOCK# 20
AD11 PCI_AD10 PCI_LOCK# ICH_PME#

1
10K_0402 10K_0402
H4
PCI_AD11 PCI PCI_PME#
W1
AD12 2 R363 1 33_0402

1
M4
PCI_AD12 Interface PCI_RST#
Y1
PCIRST# 4,6,13,21,22,23,29,34,35,36
AD13 J3 L5
2 PCI_AD13 PCI_SERR# SERR# 20,21,23,34 2
AD14
1

M5 H2 STOP# 20,21,22,23,34

2
AD15 PCI_AD14 STOP#
J1 H1 TRDY# 20,21,22,23,34
AD16 PCI_AD15 PCI_TRDY#
F5 R582
AD17 PCI_AD16
N2
SDATA_IN1 AD18 PCI_AD17 @10K_0402
G4 Y6 SM_INTRUDER# 20
AD19 PCI_AD18 SM_INTRUDER#
P2 AC3 SMLINK0 20
1

AD20 PCI_AD19 SMLINK0

1
G1 System AB2 SMLINK1 20
R463 AD21 PCI_AD20 SMLINK1
P1
PCI_AD21 Managment SMB_CLK AC4 SMB_CLK 12,20
AD22 F2 AB5
10K_0402 AD23 PCI_AD22 Interface SMB_DATA SMB_DATA 12,20
P3 AC5
AD24 PCI_AD23 SMB_ALERT#/GPIO11 SMB_ALERT# 20
F3 PCI
AD25 PCI_AD24
ICH3-M (1/2)
2

R1
PCI_AD25 Interface
AD26 E2 Y22
PCI_AD26 CPU_A20GATE GATEA20 29
AD27 N4 V23
PCI_AD27 CPU_A20M# H_A20M# 4
AD28 D1 AB22
PCI_AD28 CPU_DPSLP# H_DPSLP# 4
AD29 P4 J22 H_FERR#
AD30 PCI_AD29 CPU_FERR# +3VS
E1 AA21 H_IGNNE# 4
AD31 PCI_AD30 CPU_IGNNE#
P5 AB23 H_INIT# 4
PCI_AD31 CPU_INIT#
25,34 AC97_RST# 1 2 AC_RST# CPU AA23 H_INTR 4
(for use if CPU unable
CPU_INTR
Interface CPU_NMI
Y21 H_NMI 4 to support DPSLP#)
R473 33_0402 K2 W23
21,22,23,34 CBE#0 H_PWRGD 4

1
PCI_C/BE#0 CPU_PWRGOOD
21,22,23,34 CBE#1 K5 U22 KBRST# 29
PCI_C/BE#1 CPU_RCIN# R410
21,22,23,34 CBE#2 N1 W21 H_SLP# 4

1
PCI_C/BE#2 CPU_SLP# 301_1%_0402
21,22,23,34 CBE#3 R2 Y23 H_SMI# 4
PCI_C/BE#3 CPU_SMI# R441
U23 H_STPCLK# 4
STPCLK# 470_0402
H_FERR#

2
20,22 GNT#0 A4
PCI_GNT#0 HUB_PD0
20,34 GNT#1 E3 L22
PCI_GNT#1 HUB_PD0 HUB_PD1 1 Q52

2
20,21 GNT#2 D2 M21
PCI_GNT#2 HUB_PD1 HUB_PD2
20,23 GNT#3 D5 M23 2
PCI_GNT#3 HUB_PD2 HUB_PD3
20,34 GNT#4 B4 N20 3
PCI_GNT#4 HUB_PD3
Place closely to P21 HUB_PD4 1 Q58
3 HUB_PD4 HUB_PD5 3904 3
ICH3-M R22 2
HUB_PD5 HUB_PD6
20,22 REQ#0 D3 R20 3
PCI_REQ#0 HUB_PD6 HUB_PD7
20,34 REQ#1 F4
PCI_REQ#1 VSS Clocks LAN EEPROM HubLink HUB_PD7
T23
CLK_ICH14 CLK_ICH48 A3 Interface Interface Interface M19 HUB_PD8 3904
20,21 REQ#2 PCI_REQ#2 HUB_PD8 R440
R4 P19 HUB_PD9
20,23 REQ#3
1

PCI_REQ#3 HUB_PD9 HUB_PD10


20,34 REQ#4 E4 N19 4 H_F_FERR# 1 2

LAN_RSTSYNC
R403 R422 PCI_REQ#4 HUB_PD10

HUB_VSWING

HUB_PSTRB#
HUB_RCOMP
CLK_RTEST#

HUB_PSTRB
EEP_SHCLK
CLK_RTCX1
CLK_RTCX2
470_0402

CLK_VBIAS

EEP_DOUT

HUB_VREF
LAN_RXD2
LAN_RXD1
LAN_RXD0
LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_JCLK

HUB_PAR
@10_0402 10_0402 HUB_PD[0..10]

HUB_CLK
EEP_DIN
HUB_PD[0..10] 6

EEP_CS
CLK_14
CLK_48
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

CLK_ICHHUB
12

12

C578 C599 +ICH_HUBREF

2
AC7
AC6

+VS_HUBVSWING
RTC_VBIASAB7
C14
C15
C16
C17
C18
C19
C20
C21
C22

D13
D16
D17
D20
D21
D22

C10

D10

N22
R19
A13
A16
A17
A20
A23

B10
B13
B14
B15
B18
B19
B20
B22

A10

K19
P23
F19

F20

T19
@15PF_0402 5PF_0402 R383

L19
L20
J23
C3
C6

D9

D7
C9

C8

D8
ICH3-M
A1

B8

E5

RTC_RST# Y7

B9
A9
A8

E8

E9
33_0402
2

CLK_ICHHUB
RTC_X1
RTC_X2

+RTCVCC CLK_ICHHUB 12

1
2
CLK_ICH14 HUB_PSTRB 6 C552
12 CLK_ICH14 HUB_PSTRB# 6
CLK_ICH48 R476 HUB_ICH_RCOMP 1 2 5PF_0402
12 CLK_ICH48
1 2 +R_VBAIS C482 1 2 RTC_VBIAS R401 36.5_1%
R326 1K_0402 .047UF 1 2 @1K_0402
+RTCVCC
RTC_X1

1
RTC_X2 R330 15K_0402

1
1 2 1 2 1 2
1

R329 @22M R338 10M R340 10M C484 C570 C571


1

J1 .01UF_0402 .1UF_0402
X3 32.768KHZ_2MM_10ppm 1UF_10V JOPEN Close to ICH3-M.

2
2

+1.8VS R331
12

Layout note:
HUB Interface VSwing Voltage @2.4M_1%
2

Locate J1 and R751 on bottom side and with


1

R337
1

C491 +1.8VS 1K_0402 easy access through memory door


R295 C490 18PF_0402
4 301_1%_0402 18PF_0402 4
1

R_K HUB Reference Voltage


1

1. Place R_G and R_H in middle of Bus.


R_G R390 Place R_K and R_L
301_1%_0402
2

Closely ICH3
+VS_HUBVSWING
1

+ICH_HUBREF
1

R290 C454 R_L Compal Electronics, Inc.


1

301_1%_0402 .1UF_0402
R384 Title
301_1%_0402
2

R_H SCHEMATIC, M/B LA-1302


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
2

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1B
2

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 18 of 45
A B C D
A B C D

RTC BATT
+VCC_RTC +RTCVCC BATT1 BATT1.1
+3V +5VS +3VS
- 2 1
+
RP148

2
OVCUR#5 1 8 R336 W=15mils
OVCUR#4 2 7 R479 D17 1 2
OVCUR#3 3 6 1K_0402 1SS355 +3VALW ML1220

1
OVCUR#1 4 5 1K_0402
C499 D30
8P4R_10K_0804 .1UF_0402 HSM126S

1
Closely Pin AB6

2
1
1 VCC5REF +RTCVCC CHGRTC 1
C530

1
.1UF_0402

2
C639 C494 W=15mils W=15mils

2
.1UF_0402 1UF_10V
USBP0+ USBP4+

2
31,34 USBP0+ 31 USBP4+
USBP0- USBP4-
31,34 USBP0- 31 USBP4- +3VS
+1.8VS

1 2 1 2 +V1.8_ICHLAN

1
C632 5PF_0402 C643 5PF_0402 L47 +CPU_CORE
1 2 +VCC_RTC R453
USBP2+ +3VS
31,34 USBP2+ +1.8VALW +1.8VALW +3VS +1.8VS
USBP2- BLM21A601SPT 100K_0402
31,34 USBP2-

2
1 2
C633 5PF_0402 Layout note The Cap close to 1 2 ICH_ACIN
29,40 ACIN D28 RB751V
ICH3-M(< 1 inch)

M10

M14
AB6

G18
C13

U18

C23

H18

R18
E13

K12
P10

K10

P14

V22

B23

A21
A22

P12
V15
V16
V17
V18

E11

K18

P18
V10
V14
F14

F15
F16

F10

T21

T18
J18
W8

W5

G6
D6

C2

H6

R6

U6
V6
V7

E6

E7

K6

P6
F7
F8

F9

T1

F6

T6
J6
U42B

VCC_SUS0
VCC_SUS1
VCC_SUS2
VCC_SUS3
VCC_SUS4
VCC_SUS5

VCC_USB0/VCC_SUS6
VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8
VCC_AUX1/VCCLAN1_8
VCC_AUX2/VCCLAN1_8

VCC5REF1
VCC5REF2

VCC5REFSUS1
VCC5REFSUS2

VCCPAUX0/VCCLAN3_3
VCCPAUX1/VCCLAN3_3

VCCPCPU0
VCCPCPU1
VCCPCPU2

VCCUSBBG/VCC_SUS8

VCCUSBPLL/VCC_SUS9

N/C0
N/C1
N/C2
N/C3
N/C4

VSS102
VSS103

VCCPPCI0
VCCPPCI1
VCCPPCI2
VCCPPCI3
VCCPPCI4
VCCPPCI5
VCCPPCI6
VCCPPCI7

VCCP0
VCCP1

VCCPIDE0
VCCPIDE1
VCCPIDE2
VCCPIDE3
VCCPIDE4

VCCPHL0
VCCPHL1
VCCPHL2
VCCPHL3

VCCCORE0
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
VCC_RTC
AC15
+3VS IDE_PDCS1# PDCS1# 28
AB15
USBP0+ IDE_PDCS3# PDCS3# 28
D19 AC21
USB_PP0 IDE_SDCS1# SDCS1# 24
A19 AC22
1

USBP2+ USB_PP1 IDE_SDCS3# SDCS3# 24


E17
R407 USB_PP2
B17 AA14
USBP4+ USB_PP3 IDE_PDA0 PDA0 28
2
D15
USB_PP4 Power IDE_PDA1
AC14
PDA1 28 2
1K_0402 A15 AA15
USBP0- USB_PP5 IDE_PDA2 PDA2 28
D18 AC20
AV_VID4 USB_PN#0 IDE_SDA0 SDA0 24
2

A18 AA19
USBP2- USB_PN#1 IDE_SDA1 SDA1 24
E16 AB20
USB_PN#2 IDE_SDA2 SDA2 24
0=I2C CTRL CPUVID select B16
USB_PN#3 PDD[0..15] 28
USBP4- D14 W12 PDD0
1=Bus switch CPUVID select A14
USB_PN#4 IDE_PDD0
AB11 PDD1
USB_PN#5 IDE_PDD1 PDD2
AA10
IDE_PDD2 PDD3
AC10
OVCUR#0 IDE_PDD3 PDD4
31,34 OVCUR#0 E12 W11
OVCUR#1 USB_OC#0 IDE_PDD4 PDD5
D12 Y9
OVCUR#2 USB_OC#1 IDE_PDD5 PDD6
31 OVCUR#2 C12 AB9
OVCUR#3 USB_OC#2 IDE_PDD6 PDD7
B12 AA9
OVCUR#4 USB_OC#3 IDE_PDD7 PDD8
A12
USB_OC#4 USB IDE_PDD8
AC9
OVCUR#5 A11 Interface Y10 PDD9
USB_OC#5 IDE_PDD9 PDD10
W9
IDE_PDD10 PDD11
Y11
IDE_PDD11 PDD12
28 PIDERST# H20 AB10
USB_LEDA#0/GPIO32 IDE_PDD12 PDD13
24 SIDERST# G22 AC11
USB_LEDA#1/GPIO33 IDE_PDD13 PDD14
F21 AA11
USB_LEDA#2/GPIO34 IDE_PDD14 PDD15
G19 AC12

ICH3-M (2/2)
USB_LEDA#3/GPIO35 IDE_PDD15 SDD[0..15] 24
E22
USB_LEDA#4/GPIO36 IDE
E21 Interface Y17 SDD0
AV_VID4 USB_LEDA#5/GPIO37 IDE_SDD0 SDD1
H21 W17
MB_ID0 USB_LEDG#0/GPIO38 IDE_SDD1 SDD2
G23 AC17
MB_ID1 USB_LEDG#1/GPIO39 IDE_SDD2 SDD3
F23 AB16
USB_LEDG#2/GPIO40 IDE_SDD3 SDD4
30 FLASH# G21 W16
ICH_ACIN USB_LEDG#3/GPIO41 IDE_SDD4 SDD5
D23 Y14
USB_LEDG#4/GPIO42 IDE_SDD5 SDD6
E23 AA13
USB_LEDG#5/GPIO43 IDE_SDD6 SDD7
W15
IDE_SDD7 SDD8
W13
IDE_SDD8 SDD9
B21 Y16
3 USB_RBIAS IDE_SDD9 SDD10 3
Y15
1

IDE_SDD10 SDD11
AC16
IDE_SDD11
* R472
25 SPKR
SPKR H23 Misc AB17 SDD12
18.2_1% SPKR IDE_SDD12 SDD13
AA17
IDE_SDD13 SDD14
Y18
IDE_SDD14 SDD15
+1.8VS U19 AC18
VCCA IDE_SDD15
2

Power
Y13 PDDACK# 28
+3VS IDE_PDDACK#
M/B ID +3VALW F17
VCCPSUS3/VCCPUSB0 IDE_SDDACK#
Y19 SDDACK# 24
F18 AB12 PDDREQ# 28
VCCPSUS4/VCCPUSB1 IDE_PDDREQ
K14 AB18 SDDREQ# 24
VCCPSUS5/VCCPUSB2 IDE_SDDREQ
AC13 PDIOR# 28
IDE_PDIOR#
VSS AC19 SDIOR# 24
1

IDE_SDIOR#
E10 Y12 PDIOW# 28
R429 R436 VCCPSUS0 IDE_PDIOW#
V8 AA18 SDIOW# 24
VCCPSUS1 IDE_SDIOW#
V9 AB13 PDIORDY 28
@10K_0402 @10K_0402 VCCPSUS2 IDE_PIORDY
AB19 SDIORDY 24
IDE_SIORDY

VSS100
VSS101
MB_ID0
2

VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
MB_ID1

AC23
AA22

AA12
AA16
AA20
1

W10
W14
W18
W22

AC1
AC8
M11
M12
M13
M20
M22

AA3
AA8

AB8
G20
H19

N10
N11
N12
N13
N14
N21
N23

R21
R23
E14
E15
E18
E19
E20

K11
K13
K20
K21
K22
K23

P11
P13
P20
P22

V20
F22

T20
T22
L10
L11
L12
L13
L14
L21
L23

W6
W7
G3

N5

R3
R5
ICH3-M

V3

Y8
T4
L3
J5

R421 R431

2.5K_0402 2.5K_0402
Note:
2

R376=22.6_1% for B0(QB63 part)


R376=18.2_1% for B0(QB62 & SL5LF part)

4 4

MB_ID0 MB_ID1
SST 0 0 R411
1 2 SPKR
+3VS
PT 1 0
ST 0 1 @1K_0402 Compal Electronics, Inc.
Title
QT 1 1 Disable Timeout feature SCHEMATIC, M/B LA-1302
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 19 of 45
A B C D
A B C D

+3VS +3VS

RP142
18,21,22,23,34 FRAME# 1 10
18,21,22,23,34 IRDY# 2 9 SERR# 18,21,23,34
18,21,22,23,34 TRDY# 3 8 DEVSEL# 18,21,22,23,34
4 7 +CPU_CORE
18,21,22,23,34 STOP# PERR# 18,21,22,23,34
5 6 PLOCK# 18
10P8R_8.2K

1
1 1

1
+
+3VS +3VS C531 C525 C527
1UF_10V .1UF_0402 .1UF_0402
RP145

2
18 PCI_REQA# 1 10
18 PCI_REQB# 2 9 REQ#2 18,21
18,22 REQ#0 3 8 REQ#3 18,23
18,34 REQ#1 4 7 REQ#4 18,34
5 6 +3VS
SERIRQ 18,21,29,35,36
10P8R_8.2K

1
+3VS +3VS + +
C493 C558 C540 C606 C610 C636 C638 C629 C500 C496 C497 C587 C538 C577
RP146 22UF_10V_1206 22UF_10V_1206 .1UF_0402 .1UF_0402 47PF_0402 .1UF_0402 .1UF_0402 47PF_0402 .1UF_0402 .1UF_0402 47PF_0402 .1UF_0402 .1UF_0402 .1UF_0402

2
18,34 GNT#1 1 10
18,21 GNT#2 2 9 IRQ15 18,24
18,34 PIRQD# 3 8 PIRQA# 13,18,21,22
4 7 +3VS
18,28 IRQ14 PIRQB# 18,23
5 6 PIRQC# 18,34
10P8R_8.2K

1
C541 C628 C627 C637 C613 C580
+3VS 47PF_0402 .1UF_0402 .1UF_0402 47PF_0402 .1UF_0402 .1UF_0402

2
18,22 GNT#0 1 2
R469 8.2K_0402
18,23 GNT#3 1 2
R468 8.2K_0402 +3VALW
2 2
18,34 GNT#4 1 2
R470 8.2K_0402

1
+
C517 C631 C630 C524 C526
+3VS 22UF_10V_1206 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402

2
R356 1 2 10K_0402
18,21,29,34,35 CLKRUN# +1.8VS

1
+
C519 C565 C566 C549 C548 C498 C635 C547
100UF_10V_D2 .1UF_0402 33PF_0402 .1UF_0402 .1UF_0402 33PF_0402 .1UF_0402 .1UF_0402
+3V

2
R362 1 2 10K_0402 +1.8VALW
12,18 SMB_DATA
R353 1 2 10K_0402
12,18 SMB_CLK

1
C654
+3VALW 10UF_10V_0805 C624 C620 C634
.1UF_0402 .1UF_0402 .1UF_0402

2
3 R350 1 2 10K_0402 3
18 SMB_ALERT#

+3VALW

R351 1 2 4.7K_0402
18 SMLINK0
R360 1 2 4.7K_0402
18 SMLINK1

+RTCVCC

R320 1 2 8.2K_0402
18 SM_INTRUDER#

4 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 20 of 45
A B C D
A B C D E

CardBus Socket
+12VALW S1_VCC S1_VPP S1_VCC

U14 JP15AS1
AD[0..31]
18,22,23,34 AD[0..31]

1
C162 TPS2211 C154 C159 C151 C140 C143
13
.1UF_0402 VCC 4.7UF_10V_0805 4.7UF_25V_1206 .01UF_0402 10UF_16V_1206 .1UF_0402
12
VCC

2
9 11
12V VCC S1_VPP S1_VCC CARDBUS HOUSING
+5VALW

1
1 10 C161 +3V_CB C171 C181 1
VPP
C155 5 .1UF_0402 .1UF_0402 .1UF_0402
5V

2
6
.1UF_0402 5V S1_VCC

1
1 VCCD0# C169 C167
VCCD0 VCCD1# S1_A23
2 1 2 +3VS 1 2
+3VALW VCCD1 VPPD0 4.7UF_10V_0805 .1UF_0402 R125 @0_1206 R137 @22K_0402
15
VPPD0 VPPD1 S1_WP

2
14 1 2 +3V 1 2
VPPD1 R111 0_1206 R138 @22K_0402
3
3.3V +3V CLK_PCI_PCM JP15
4 8
3.3V OC
SHDN

C153 VPPD0
GND

1
VPPD1 1 2 A77 B77
.1UF_0402 VCCD0# C158 .1UF_0402 R129 a68 b68
A76 B76
VCCD1# 10_0402 S1_CD2# a34 b34 S1_CD2#
A75 B75
16

S1_WP a67 b67 S1_WP


7

A74 B74
a33 b33
A73 B73

126

138
122
102
S1_D10 GND GND S1_D10

12
74
73

72
71

44
18

90

86
50
30
14

63
A72 B72
G_RST# C170 S1_D2 a66 b66 S1_D2
A71 B71
U16 S1_D9 a32 b32 S1_D9
A70 B70

VCCI
VCCD1#
VCCD0#

VPPD1
VPPD0

VCCP
VCCP

VCCCB
VCCCB

VCCP
VCCP
VCC
VCC
VCC
VCC

VCC
22PF_0402 S1_D1 a65 b65 S1_D1
A69 B69
S1_D8 a31 b31 S1_D8

2
A68 B68
S1_D0 a64 b64 S1_D0
A67 B67
S1_BVD1 a30 b30 S1_BVD1
A66 B66
AD31 S1_D10 a63 b63
3 144 A65 B65
AD30 AD31 CAD31/D10 S1_D9 PCM_RI# S1_A0 GND GND S1_A0
4 142 +3V 1 2 A64 B64
+3V +3V AD29 AD30 CAD30/D9 S1_D1 R319 22K_0402 S1_BVD2 a29 b29 S1_BVD2
5 141 A63 B63
AD28 AD29 CAD29/D1 S1_D8 S1_A1 a62 b62 S1_A1
7 140 A62 B62
AD27 AD28 CAD28/D8 S1_D0 S1_REG# a28 b28 S1_REG#
8 139 A61 B61
AD26 AD27 CAD27/D0 S1_A0 S1_A2 a61 b61 S1_A2
9 129 A60 B60
AD26 CAD26/A0 a27 b27
1

AD25 10 128 S1_A1 S1_INPACK# A59 B59 S1_INPACK#


2 R545 AD24 AD25 CAD25/A1 S1_A2 S1_A3 a60 b60 S1_A3 2
11 127 A58 B58
R114 AD23 AD24 CAD24/A2 S1_A3 S1_VCC a26 b26
22K_0402 15 124 A57 B57
10K_0402 AD22 AD23 CAD23/A3 S1_A4 S1_WAIT# GND GND S1_WAIT#
16 121 A56 B56
AD21 AD22 CAD22/A4 S1_A5 S1_A4 a59 b59 S1_A4
17 120 A55 B55
AD20 AD21 CAD21/A5 S1_A6 S1_RST a25 b25 S1_RST
22

19 118 A54 B54

1
AD19 AD20 CAD20/A6 S1_A25 S1_A5 a58 b58 S1_A5
23 116 A53 B53
AD18 AD19 CAD19/A25 S1_A7 R130 S1_VS2 a24 b24 S1_VS2
24 115 A52 B52
PCM_PMER# AD17 AD18 CAD18/A7 S1_A24 @47K_0402 S1_A6 a57 b57 S1_A6
22,23,29 WAKEUP# 1 3 25 113 A51 B51
AD16 AD17 CAD17/A24 S1_A17 S1_A25 a23 b23 S1_A25
26 98 A50 B50
Q76 AD15 AD16 CAD16/A17 S1_IOWR# a56 b56
38 96 A49 B49
3904 AD14 AD15 CAD15/IOWR# S1_A9 S1_A7 GND GND S1_A7

2
39 97 A48 B48
AD13 AD14 CAD14/A9 S1_IORD# S1_A24 a22 b22 S1_A24
40 93 A47 B47
AD12 AD13 CAD13/IORD# S1_A11 S1_A12 a55 b55 S1_A12
41 95 A46 B46
PIR AD11 43
AD12 CAD12/A11
92 S1_OE# S1_A23 A45
a21 b21
B45 S1_A23
AD10 AD11 CAD11/OE# S1_CE2# S1_A15 a54 b54 S1_A15
45 91 A44 B44
AD9 AD10 CAD10/CE2# S1_A10 S1_A22 a20 b20 S1_A22
46 89 A43 B43
AD8 AD9 CAD9/A10 S1_D15 a53 b53
47 87 A42 B42
AD7 AD8 CAD8/D15 S1_D7 S1_A16 GND GND S1_A16
49 85 A41 B41
AD6 AD7 CAD7/D7 S1_D13 a19 b19
51 82 A40 B40 S1_VPP
AD5 AD6 CAD6/D13 S1_D6 S1_VPP a52 b52
52 83 A39 B39
AD4 AD5 CAD5/D6 S1_D12 a18 b18
53 80 A38 B38
AD3
AD2
54
55
AD4
AD3
AD2
CARDBUS CAD4/D12
CAD3/D5
CAD2/D11
81
77
S1_D5
S1_D11
S1_VCC
S1_A21
A37
A36
a51
a17
a50
b51
b17
b50
B37
B36 S1_A21
S1_VCC

AD1 S1_D4 S1_RDY# S1_RDY#


AD0
56
57
AD1
AD0 CONTROLLER CAD1/D4
CAD0/D3
79
76 S1_D3 S1_A20
S1_WE#
A35
A34
A33
a16
a49
a15
b16
b49
b15
B35
B34
B33
S1_A20
S1_WE#
18,22,23,34 CBE#3 12 125 S1_REG# S1_A19 A32 B32 S1_A19
C/BE3# CCBE3#/REG# S1_A12 S1_A14 a48 b48 S1_A14
18,22,23,34 CBE#2 27 112 A31 B31
C/BE2# CCBE2#/A12 S1_A8 S1_A18 a14 b14 S1_A18
18,22,23,34 CBE#1 37 99 A30 B30
C/BE1# CCBE1#/A8 S1_CE1# S1_A13 a47 b47 S1_A13
18,22,23,34 CBE#0 48 88 A29 B29
+12VS C/BE0# CCBE0#/CE1# a13 b13
A28 B28
S1_RST S1_A17 GND GND S1_A17
4,6,13,18,22,23,29,34,35,36 PCIRST# 20 119 A27 B27
3 PCIRST# CRST#/RESET S1_A23 S1_A8 a46 b46 S1_A8 3
18,20,22,23,34 FRAME# 28 111 A26 B26
PCIFRAME# CFRAME#/A23 S1_A15 S1_IOWR# a12 b12 S1_IOWR#
18,20,22,23,34 IRDY# 29 110 A25 B25
PCIIRDY# CIRDY#/A15 a45 b45
2
G

18,20,22,23,34 TRDY# 31 109 S1_A22 S1_A9 A24 B24 S1_A9


PCITRDY# CTRDY#/A22 S1_A21 S1_IORD# a11 b11 S1_IORD#
18,20,22,23,34 DEVSEL# 32 107 A23 B23
REQ# PCIDEVSEL# CDEVSEL#/A21 S1_A20 a44 b44
18,20 REQ#2 3 1 18,20,22,23,34 STOP# 33 105 A22 B22
PCISTOP# CSTOP#/A20 GND GND
S

34 104 S1_A14 S1_A11 A21 B21 S1_A11


18,20,22,23,34 PERR# PCIPERR# CPERR#/A14 S1_WAIT# S1_VS1 a10 b10 S1_VS1
18,20,23,34 SERR# 35 133 A20 B20
PCISERR# CSERR#/WAIT# S1_A13 S1_OE# a43 b43 S1_OE#
Q28 18,22,23,34 PAR 36 101 A19 B19
REQ# PCIPAR CPAR/A13 S1_INPACK# S1_CE2# a9 b9 S1_CE2#
1 123 A18 B18
PCIREQ# CREQ#/INPACK# S1_WE# S1_A10 a42 b42 S1_A10
+3V 1 2 18,20 GNT#2 2 106 A17 B17
2N7002 R115 10K_0402 CLK_PCI_PCM PCIGNT# CGNT#/WE# S1_A16 a8 b8
12 CLK_PCI_PCM 21 108 1 2 A16 B16
PCIPCLK CCCLK/A16 R135 33_0402 S1_D15 GND GND S1_D15
A15 B15
D8 PCM_PMER# S1_BVD1 S1_CE1# a41 b41 S1_CE1#
1 2 59 135 A14 B14
R120 0_0402 RI_OUT#/PME# CSTSCHNG/BVD1 S1_WP S1_D14 a7 b7 S1_D14
29 PCM_SUSP# 1 2 70 136 A13 B13
SUSPEND# CCLKRUN#/WP S1_D7 a40 b40 S1_D7
A12 B12
RB751V AD20 S1_A19 S1_D13 a6 b6 S1_D13
1 2 13 103 A11 B11
R131 100_0402 IDSEL CBLOCK#/A19 S1_D6 a39 b39 S1_D6
A10 B10
S1_RDY# a5 b5
13,18,20,22 PIRQA# 60 132 A9 B9
MF0 CINT#/READY S1_D12 GND GND S1_D12
61 A8 B8
MF1 S1_D5 a38 b38 S1_D5
64 62 PCM_SPK# 25 A7 B7
MF2 SPKROUT S1_BVD2 S1_D11 a4 b4 S1_D11
18,20,29,35,36 SERIRQ 65 134 A6 B6
PCM_RI# MF3 CAUDIO#/BVD2 S1_D4 a37 b37 S1_D4
34 PCM_RI# 67 A5 B5
MF4 S1_CD2# S1_CD1# a3 b3 S1_CD1#
68 137 A4 B4
MF5 CCD2#/CD2# a36 b36
RSVD/D14
RSVD/A18

69 75 S1_CD1# S1_D3 A3 B3 S1_D3


RSVD/D2

18,20,29,34,35 CLKRUN# MF6 CCD1#/CD1# S1_VS2 a2 b2


117 A2 B2
G_RST# CVS2/VS2# S1_VS1 a35 b35
66 131 A1 B1
GND
GND
GND
GND
GND
GND
GND
GND

29 G_RST# G_RST# CVS1/VS1# a1 b1

78
79
80
81
PCMC154PIN
114
130

100
143
22
42
58
78
94

84

78
79
80
81
CB1410
6

C165 2 C183
S1_D2
4 S1_A18 1000PF_0402 1000PF_0402 4
S1_D14
1

+3V_CB
Compal Electronics, Inc.
1

C157 C179 C182 C180 C156 C173 C172


Title
.1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 SCHEMATIC, M/B LA-1302
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
2

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 21 of 45
A B C D E
A B C D E

IEEE1394 Controller/PHY

1 1

+3VS +3VS +3VS +3VS


18,21,23,34 AD[0..31] AD[0..31] C116
.1UF_0402 C128 C138

.1UF_0402 .1UF_0402
+3VS
.1UF_0402
C118

102
113
125

114
+3VS

20
33
35

24

39
49

50
41

62

59

76

69
U10

1
C144 C147 C136 C119 C145 C149 C148 C130 C146

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDDC2
VDDC1

PVDD1
PVDD2

PGND2
PGND1

VDDATX0

GNDATX0

VDDATX1

GNDATX1
RAMVDD
AD0 28
AD1 AD0 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
27
AD2 AD1

2
23
AD3 AD2
22 90
AD4 AD3 VDDATX2
21
AD5 AD4 C117 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402
19
AD6 AD5 .1UF_0402
18
AD7 AD6
17 83
AD8 AD7 GNDATX2
14 65
AD9 AD8 VDDARX0
13
AD10 AD9 C114
12
AD11 AD10 .1UF_0402
11 64
AD12 AD11 GNDARX0
10 75
AD13 AD12 VDDARX1
7
AD14 AD13 C125
6
AD15 AD14 .1UF_0402
5 68
2 AD16 AD15 GNDARX1 2
120 89
AD17 AD16 VDDARX2
119
AD18 AD17 C115
118
AD19
AD20
AD21
AD22
117
116
112
110
AD18
AD19
AD20
AD21
IEEE 1394 GNDARX2
82

29
.1UF_0402

U5
+3VS

AD23
AD24
AD25
109
106
105
AD22
AD23
AD24 VT6306 EECS
EEDO
SDA/EEDI
30
31
32
EEDI_LAN
EECK_LAN
+3VS
1
2
3
A0
A1
VCC
WC#
8
7
6 EECK_LAN

1
AD26 AD25 SCL/EECK A2 SCL
104 4 5 EEDI_LAN
AD27 AD26 GND SDA R54
101 37 WAKEUP# 21,23,29
AD28 AD27 PME# R96 510
100 42 24C02-27
AD29 AD28 MODE1 1K_0402
99 43
AD30 AD29 MODE0
98
AD31 AD30

2
97 63
AD31 XCPS

18,21,23,34 CBE#0 15 66
CBE0# XREXT R95
18,21,23,34 CBE#1 4
CBE1# XTPB0- 1K_0402
18,21,23,34 CBE#2 122 70
CBE2# XTPB0M XTPB0+
18,21,23,34 CBE#3 107 71
R93 100_0402 CBE3# XTPB0P XTPA0-
72
AD16 XTPA0M XTPA0+
1 2 108 73
IDSEL XTPA0P XTPBIAS0 +3VS R102
18,20,21,23,34 FRAME# 123 74
FRAME# XTPBIAS0 6.34K_1%
18,20,21,23,34 IRDY# 124
126
IRDY#
77 R94 1K_0402
CLOSE TO CHIP
18,20,21,23,34 TRDY# TRDY# XTPB1M C142
127 78 R98 1K_0402
18,20,21,23,34 DEVSEL# DEVSEL# XTPB1P 47PF_0402
128 79 R101 1K_0402
18,20,21,23,34 STOP# STOP# XTPA1M
2 80 R103 1K_0402
18,20,21,23,34 PERR# PERR# XTPA1P
18,21,23,34 PAR 3 81

1
PAR XTPBIAS1
18,20 REQ#0 96

1
REQ# R105 1K_0402 R108 R107 C160
95 84
LINKON/TSIJMP

18,20 GNT#0 GNT# XTPB2M


LREQ/TSOJMP

3 91 85 R109 1K_0402 3
CTL1/PC1JMP
CTL0/PC0JMP

13,18,20,21 PIRQA# INTA# XTPB2P


D6/CMCJMP

92 86 R110 1K_0402 54.9_1% 54.9_1% 0.33UF_25V_1206


D7/PC2JMP

4,6,13,18,21,23,29,34,35,36 PCIRST# PCIRST# XTPA2M


CLK_PCI_1394 R112 1K_0402

2
93 87
LPS/CMC
RAMVSS

12 CLK_PCI_1394 PCICLK XTPA2P

2
88
VSSC2
VSSC1

XTPBIAS2
SCLK
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1

58 XTPBIAS0 JP12
PHYRESET
NC

XO

XTPA0+ R515 0_0402


D5
D4
D3
D2
D1
D0

XI

XTPA0- R516 0_0402 4


XTPB0+ R517 0_0402 3
115

121
111
103
36

34
26
16

94
25

67
57
56
55
54
53
52
51
48
47
46
45
44
40
38

60

61
1

XTPB0- R518 0_0402 2


9
1

R106 VT6306 1
33_0402 X2

1
1394_CONN 4PIN
R99 R100
R88 24.576MHz_30ppm 54.9_1% 54.9_1%
12

C152 2K_1%_0402

22PF_0402

2
C131 R90 C134
2

C137

1
1M_0402

1
27PF_0402 27PF_0402 .1UF_0402 C141 R97
270PF_0402 5.1K_1%

+3VS

2
4 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 22 of 45
A B C D E
A B C D E

PMOS , Rdson = 0.19@Vgs=2.5V


LANIO
Q10
LANIO
SI2301DS LAN Realtek RTL8100

S
D
1 3
Q8 LANVDD R84 @0_0805 +3VALW
3
VCTRL 2
1

G
2
EN_WOL# 29
@PBSS5140T

2
G
1 1

1 3
+2.5VALW

S
Q11

SI2301DS LANIO LANVDD LANVDD

LANIO

1
L16 C133 C132 C93 C124 C91 C127 C92
LANIO_AVDD
10UF_10V_0805 .1UF_0402 .1UF_0402 .1UF_0402 .1UF_0402 10UF_10V_0805 .1UF_0402

2
LANVDD LANVDD LANIO LANIO HB-1M2012-601JT

C89 C86 C87


AD[0..31]
18,21,22,34 AD[0..31] .1UF_0402 .1UF_0402
R77 .1UF_0402 +3VS
5.6K_0402

R60
LAN_LED1

96

51

58

22
90
97
39
34

75
70
59

50
6
U12 1K_0402

VDD25

VDD25

AVDD25

AUX
VDD
VDD
VDD
VDD
VDD
VDD

AVDD
AVDD
AVDD
C101
AD0 45 74 ISOB @10PF_0402
AD1 AD0 ISOLATEB
44
AD2 AD1
42 57 WAKEUP# 21,22,29
AD3 AD2 PMEB R57
41
AD4 AD3
38
AD5 AD4 VCTRL 15K_0402 LAN_LED0
37 55
AD6 AD5 VCTRL
36
AD7 AD6 U8
33
AD8 AD7 EECS C104
2 30 49 1 8 LANIO
2
AD9 AD8 EECS EESK CS VCC @10PF_0402
29 48 2 7
AD10 AD9 EESK EEDI SK NC C121
28 47 3 6
AD11 AD10 EEDI EEDO DI NC
27 46 4 5
AD12 AD11 EEDO DO GND .1UF_0402
26
AD13 AD12 93C46-3GR
25
AD14 AD13
24
AD15 AD14
23 64
AD16 AD15 LWAKE
10 63
AD17 AD16 RTT3
9 JP26
AD18 AD17 MOD_TIP
8 77
AD19 AD18 LED2 MOD_RING 1
5 79 LAN_LED1
AD20 AD19 LED1 2
4 80 LAN_LED0
AD21 AD20 LED0
3
AD22 AD21 MODEM CONN.
1
AD23 AD22
100
AD24 95
AD23
LAN CONTROLLER

2
AD25 AD24 C82
94
AD26 AD25
AD27
AD28
93
92
AD26
AD27 RTL8100BL .1UF_0402

1
AD29
91
89
AD28 RJ45_TXX- 34
JP7
R02
AD29
AD30
AD31
87
AD30 RJ45_TXX+ 34
RJ45_TXX+ 8
TX+ GND1
13 PIR8
86

1
AD31 RJ45_TXX-
RJ45_RXX- 34 7
R62 R61 TX- LAN_LED1
32 16
18,21,22,34 CBE#0
18,21,22,34 CBE#1 21
CBE0B
CBE1B
1:1 RJ45_RXX+ 34
RJ45_RXX+ 6
RX+
CATHODE1
11 49.9_1%_0402 49.9_1%_0402
18,21,22,34 CBE#2 CBE2B U3
98 R154 1 2 75_1% 5
18,21,22,34 CBE#3 CBE3B N/C1 GREEN
2

2
12 71 LAN_TX- 6 11 RJ45_TXX- 4 15 2 1
18,20,21,22,34 FRAME# FRAMEB TXD- TD- TX- N/C2 ANODE1 LANIO
13 72 LAN_TX+ 8 9 RJ45_TXX+
18,20,21,22,34 IRDY# IRDYB TXD+ TD+ TX+
14 7 10 RJ45_RXX- 3 R145 330_0402
18,20,21,22,34 TRDY# TRDYB CT CT RX-
18,20,21,22,34 DEVSEL# 15 5 13
DEVSELB C38 .1UF_0402 NC NC R156 1
18,20,21,22,34 STOP# 17 4 12 2 75_1% 2
STOPB NC NC N/C3 R157
18,20,21,22,34 PERR# 18 1 2 2 15
PERRB LAN_RX- CT CT RJ45_RXX- ACT_CR
18,20,21,34 SERR# 19 67 1 16 1 17 2 1

1
SERRB RXIN- LAN_RX+ RD- RX- RJ45_RXX+ N/C4 CATHODE2 LANIO
18,21,22,34 PAR 20 68 3 14
3 PAR RXIN+ RD+ RX+ R153 R148 330_0402
3
18,20 REQ#3 85

1
REQB MOD_RING
18,20 GNT#3 84 9 YELLOW
AD17 GNTB R25 R19 75_1% 75_1% N/C5
99

1
R89 100_0402 81 IDSEL TS6121C LAN_LED0
18,20 PIRQB# 10 18
INTAB 49.9_1%_0402 49.9_1%_0402 VH1 RING ANODE2

2
82 65

1
4,6,13,18,21,22,29,34,35,36 PCIRST# RSTB RTSET LANGND DSSA-P3100SB 11
TIP

2
CLK_PCI_LAN

2
83
GND
GND
GND
GND
GND
GND
GND
GND
GND

12 CLK_PCI_LAN

1
CLK
NC
NC
NC
NC
NC
NC
NC
NC
NC

12 14
X1

X2

1
N/C6 GND2

2
C43 C261 MOD_TIP C241 C277
16
88
43
31
73
66
62
56

40
35
76
78
54
53
52
69

61

60
2

2
RTL8100BL .1UF_0402 1000PF_2KV_1206 1000PF_0402
CHASSIS GND C295 C296 RJ-45 & RJ-11 1000PF_0402

2
220PF_3KV_1808 220PF_3KV_1808
XTALFB
CLKOUT

CLK_PCI_LAN
R02 R02
1

R71 Y1 25MHz_25ppm PIR8 PIR8


10_0402
CRYSTAL
C90 C88 R63
12

C109
27PF_0402 27PF_0402 5.6K_0402
22PF_0402
2

4 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 23 of 45
A B C D E
A B C D E

+5VCD
To TAS3002 EQ and OZ163 DJ Audio DJ OZ163

2
SDD[0..15]
SDD[0..15] 19
L44
HB-1M2012-601JT
CD_DD[0..15] +5VCD_2
CD_DD[0..15] 28
C554

1
.1UF_0402

C574 C501
.1UF_0402 .1UF_0402
1 1
Q43 R563
U30 1 2 CDROM_L 25
2N7002

44

58
R02 PIR9

9
OZ163 0_0402
1 3 EC_SMD1_CD

VDD

VDD

VDD
4,29,34 EC_SMD2
R564
SDD0 76 77 CD_DD0 INT_CD_L 1 2
HDD0 CDD0 28 INT_CD_L CDROM_LR 25
Q42 SDD1 78 79 CD_DD1
2
SDD2 HDD1 CDD1 CD_DD2 @0_0402
2N7002 81 82
SDD3 HDD2 CDD2 CD_DD3
83 84
EC_SMC1_CD SDD4 HDD3 CDD3 CD_DD4
4,29,34 EC_SMC2 1 3 86 87
SDD5 HDD4 CDD4 CD_DD5
SDD6
90
95
HDD5 CDD5
91
96 CD_DD6
Input to CODEC
SDD7 HDD6 CDD6 CD_DD7
R03 PIR 97
HDD7 CDD7
98
SDD8 CD_DD8
2

R348 2 1 R565
SDD9 HDD8 CDD8 CD_DD9
1 2 +5VALW 4 3 1 2 CDROM_R 25
SDD10 HDD9 CDD9 CD_DD10
100K_0402 8 7
SDD11 HDD10 CDD10 CD_DD11 0_0402
11 10
SDD12 HDD11 CDD11 CD_DD12
R585 15 14
SDD13 HDD12 CDD12 CD_DD13
1 2 +12VALW 18 17
SDD14 HDD13 CDD13 CD_DD14
@100K_0402 20 19 R566
HDD14 CDD14
1

SDD15 22 21 CD_DD15 INT_CD_R 1 2


Q41 HDD15 CDD15 28 INT_CD_R CDROM_RR 25
EN_CDPLAY# 2
25,27 EN_CDPLAY# 2N7002 @0_0402
SDA0 68 69 CD_DA0
19 SDA0 HDA0 CDA0 CD_DA0 28
SDA1 CD_DA1
3

19 SDA1 70 71 CD_DA1 28
SDA2 HDA1 CDA1 CD_DA2
19 SDA2 66 67 CD_DA2 28
X4 HDA2 CDA2
OSC1 OSC2 SDCS1# 63 64 CD_DCS1#
19 SDCS1# HCS0 CCS0 CD_DCS1# 28
SDCS3# 61 62 CD_DCS3#
19 SDCS3# HCS1 CCS1 CD_DCS3# 28
8MHZ

2 R368 1M_0402 SDIOR# CD_DIOR# 2


19 SDIOR# 99 100 CD_DIOR# 28
SDIOW# HDIOR# CDIOR# CD_DIOW#
6 5 CD_DIOW# 28
1

C529 C532 19 SDIOW# HDIOW# CDIOW# CIOCS16#


72 73
SDIORDY HIOCS16# CIOCS16# CD_DIORDY RP144
19 SDIORDY 93 94 CD_DIORDY 28
22PF_0402 22PF_0402 HIORDY CIORDY RP143 SDCS3# CD_DCS3#
1 16
ISCDROM SDCS1# CD_DCS1#
2

1 10 2 15
IRQ15 CD_IRQ15 CD_IRQ15 MODE0 +5VCD SDA2 CD_DA2
18,20 IRQ15 74 75 CD_IRQ15 28 2 9 3 14
SDDREQ# HINTRQ CHINTRQ CD_DDREQ# CDASPN MODE1 SDA0 CD_DA0
19 SDDREQ# 12 13 CD_DDREQ# 28 3 8 4 13
SDDACK# HDMARQ CDMARQ CD_DACK# INTN GPIO_0 SDA1 CD_DA1
19 SDDACK# 88 89 CD_DACK# 28 4 7 5 12
HDMACK# CHDMACK# GPIO_1 SDIOW# CD_DIOW#
+5VCD 5 6 6 11
SDIOR# 7 10 CD_DIOR#
SIDERST# 1 2 24 23 CD_IDERST# 10P8R_10K SDDACK# 8 9 CD_DACK#
19 SIDERST# HRESET# CRESET# CD_IDERST# 28
+5VCD R341 33_0402 59 60 CDASPN
HDASPN CDASPN @16P8R_0
RP138 48 47
PLAYBTN# R361 HSYNC SSYNC CIOCS16# RP136
1 8 53 52 1 2 +5VCD
REVBTN# HBIT_CLK SBIT_CLK R402 47K_0402 SDD0 CD_DD0
2 7 1 2 55 54 1 16
FRDBTN# +5VCD HDATA_OUT SDATA_OUT SDD1 CD_DD1
3 6 50 49 2 15
STOPBTN# 10K_0402 HDATA_IN SDATA_IN SDD2 CD_DD2
4 5 46 45 3 14
D22 HACRSTN SACRSTN RP139 SDD3 CD_DD3
4 13
8P4R_10K_0804 DM_ON 1 2 28 CD_DD0 1 10 +5VCD SDD4 5 12 CD_DD4
PLAYBTN# PAV_EN CD_DD1 CD_DD7 SDD5 CD_DD5
36 51 1 2 +5VCD 2 9 6 11
RB751V FRDBTN# PLAY/PAUSE PWR_CTL CD_DD2 CD_DD6 SDD6 CD_DD6
35 R395 10K_0402 3 8 7 10
REVBTN# FFORWARD CD_DD3 CD_DD5 SDD7 CD_DD7
34 4 7 8 9
STOPBTN# REWIND ISCDROM CD_DD4
37 80 +5VCD 5 6
STOP/EJECT ISCDROM @16P8R_0
C523 1UF_10V 39 GPIO_1 10P8R_4.7K
GPIO[1]/VOL_UP GPIO_0 RP116
2 1 29 40
INTN PCSYSTEM_OFF GPIO[0]/VOL_DN SDD8 CD_DD8
25 16 1
INTN RP117 SDD9 CD_DD9
1 2 30 15 2
+5VCD R355 100K_0402 RESET# MODE0 CD_DD8 SDD10 CD_DD10
56 1 10 +5VCD 14 3
MODE0 MODE1 CD_DD9 CD_DD15 SDD11 CD_DD11
57 2 9 13 4
3 EC_SMD1_CD MODE1 CD_DD10 CD_DD14 SDD12 CD_DD12 3
1 2 26 3 8 12 5
D18 1N4148 SDATA CD_DD11 CD_DD13 SDD13 CD_DD13
4 7 11 6
38 1 2 5 6 CD_DD12 SDD14 10 7 CD_DD14
PAVMODE +5VCD
EC_SMC1_CD 27 R374 10K_0402 SDD15 9 8 CD_DD15
SCLK 10P8R_4.7K
41
CSN @16P8R_0
42
OSC1 INCN
31 43
OSC2 OSCI UDN
32
OSCO
GND
GND
GND
GND
GND

+3VS
EC_SMD1_CD 26
16
33
65
85
92

EC_SMC1_CD 26

1
R357
@4.7K_0402

2 1 +5VCD
R365 1K_0402

2
SDIORDY 1 2 CD_DIORDY
+5VCD R366 @0_0402
+5VCD
IRQ15 1 2 CD_IRQ15
1

+5VALW R397 @0_0402


R437 1 2
1

C600 C608 10K_0402 R343 5.6K_0402


SDDREQ# 1 2 CD_DDREQ#
4.7UF_10V_0805 1UF_25V_0805 U29C R347 @0_0402
DM_ON#
2

2
14

74HCT14 SIDERST# 1 2 CD_IDERST#


1

Q55 R342 @0_0402


4 CD_PLAY_ON# DM_ON 4
5 6 2
+5VALW 30 CD_PLAY_ON# 2N7002
3

+5VALW POWER
7
1

C604 C597

4.7UF_10V_0805 1UF_25V_0805
Compal Electronics, Inc.
2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 24 of 45
A B C D E
A B C D E F G H

29 BEEP#
+5VALW POWER
+3VALW
AC97 Codec
+3VALW +3VALW

1
R273
AVDD
100K_1%_0402

1
C472 U21A +12VALW

1
.1UF_0402 14 C434 14 74LVC14

1
C432

2
R274 R262

1
2 .22UF_X7R R438 +3VCD +12VALW +5VCD
2 3 1 2 1 2 2 1 1 2
10K_0402
R414

1
10K_1%_0402 560_0402 EN_CDPLAY#
7 1UF_10V 100K_0402

1
U28A
1 74LVC125 C603 U53 R501 U40 +5VALW 1

2
100K_0402

2
2 1 +3VALW 8 1 +5VALW 8 1
D S C695 D S
7 2 7 2 C596

1
D S .1UF_0402 D S
1UF_10V 6 3 6 3 .1UF_0402 U29D
R430 D S Q69 D S Q49

14
5 4 5 4
D G 2N7002 D G 2N7002
10K_0402 74HCT14

1
SI4800 SI4800
+3VALW 2 R415 2 8 9 CD_PLAY
C590 EN_CDPLAY# 24,27 CD_PLAY 30
R495

2
MONO_IN 33_0402 33_0402

2
1 2

3
1

12

12

7
1UF_25V_0805
14
C431 R255 1 R423 2 2
3 4 2 1 1 2 2 2.4K_0402
21 PCM_SPK# Q62 Q50
3
U21B 560_0402 2N7002 2N7002

3
1UF_10V
74LVC14

Q47
+3VALW
2SC2411EK

14
C430 R253
5 6 2 1 1 2 VDDC
19 SPKR
U21C 1UF_10V 560_0402 1 2
Some components was reserved
+3VS
for adjustable regulator.

1
74LVC14 R398 0_0805
R251 D16 AVDD=3.3V

1
2 C586 C583 +5VALW +5VCD 2
@10K_0402 RB751V
.1UF_0402 10UF_10V_0805
40 Mil trace AVDD

2
R553 C582 C727
R406 @10K_0402 @.1UF_0402 .1UF_0402
10K_0402

1
AVDD_AC97 AVDD U37
R02

1
1 5
L46 VIN VOUT
PIR4

1
1 2 C589 C595 4
HB-1M2012-121JT BP

2
4.7UF_10V_0805 .1UF_0402

2
R385 3 2
SHDN# GND

2
12 CLK_AC14 C591

1
R405 C656 C605 4.7UF_10V_0805
0_0402 Si9183DT-33
@1M_0402

1
.1UF_0402 10UF_16V_1206
R02 PIR9 C728

2
Y4 .1UF_0402

2
2

2
C651 C657

25
38
U38

1
9
R425 C585 @24.576MHz C584
R424 1000PF_0402 1000PF_0402

VDD
VDD

AVDD
AVDD
33K_0402 @22PF_0402 @22PF_0402 C737

1
34 MOD_AUDIO_MON 2 1
C738 0_0805
2
2

20K_0402 XTL-IN 0_0805


3 35 2 1 LEFT_EQ 26
1

C602 XTL-OUT LINE-OUTL


2 1 36 2 1 RIGHT_EQ 26
.1UF_0402 C579 @15PF_0402 LINE-OUTR MDMIC
37 1 2 MD_MIC 34
MONO-OUT C617 1UF_25V_0805
1

18,34 AC97_RST# 11
RESET# 12DB totally VREF
27 1 2
1 2 6 28 C623 1000PF_0402
18,34 AC_BITCLK for CD channel MIC_REF 27

1
R408 22_0402 BIT-CLK VREFOUT C659 C640
2

R559 18,34 AC_SYNC 10


3 SYNC C641 1000PF_0402 .1UF_0402 3
24 CDROM_LR 1 2 18,34 AC_SDATAO 5 29
SDATA-OUT AFILT1 1UF_10V
@0_0402 18 SDATA_IN0 8 30
SDATA-IN AFILT2

2
C642 1000PF_0402
31
MONO_IN VRAD
R560 12 32
MOD_AUDIO_MONR PC-BEEP VRDA
24 CDROM_L 1 2 1 2 13 33 R557
PHONE CAP1
C594 .1UF_0402 14 34 1 2 1 2
0_0402 R525 AUX-L NC AVDD
2 1 1 2 15 43 R587 0_0402 C650 C649 C648 0_1206
AUX-R JD/SDIN1
R561 3.9K_0402
16
VIDEO-L TEST1
44 R03 PTR 1UF_10V 1UF_10V 1UF_10V
24 CDROM_RR 1 2 C601 17 45 R558
VIDEO-R ID0#
1UF_10V 18 46 1 2
@0_0402 CD-L ID1#
20 47 R409 @0_1206
C612 CD-R EAPD
R562 R528 21 48 1 2 SPDIFO 34
27 MICIN MIC1 SPDIFO
24 CDROM_R 1 2 2 1 1 2 22 39
MIC2 HP-OUT-L 33_0402
3.9K_0402 23 40
1

0_0402 1UF_10V LINE-L NC


24 41
1

1
LINE-R HP-OUT-R
R526 R527
CD-GND

R413 R419
30K_0402 30K_0402 Refer to below figure for upper
AVSS
AVSS

0_0402 @0_0402
VSS
VSS

R02 PIR4 three resistor placement


2

2
19

26
42

ALC202 R413 R419 FREQ. SEL


4
7

Zin 4.5 MB solder side view


X X 24.576MHZ

R556
R443 C609
28 CD_AGND
2 1 CD_GNA 1 2 ON X 14.318MHZ
3.9K_0402 1UF_10V_0603
R557
X ON 48MHZ Digital area Analog
1

4 4
R03 PIR29 area
R448
30K_0402
R558
2

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 25 of 45
A B C D E F G H
A B C D E

R02 PIR DIGITAL EQ

R492
25 RIGHT_EQ 1 2 RIGHT_BYPASS 27
3.9K_0402

2
1 1
C682
@220PF_0402 R496
@10K_0402

1
+3VCD
+3VCD
RP152
R456
5 4 IO0 1 2 LEFT_BYPASS 27

1
IO1 25 LEFT_EQ
6 3

2
7 2 IO2 R454 3.9K_0402
8 1 IO3 10K_0402

1
R455
C619
@10K_0402
8P4R_10K_0804 @220PF_0402

1
RP151
LOW = 68H CS1

2
5 4 IO4 C660
6 3 IO5 HIGH= 6AH +3VCD C626
1UF_10V_0805

1
7 2 1UF_10V_0805
R461

1
8 1
@10K_0402 U45

3
22 1
8P4R_10K_0804 R588 R589 D32 SDIN1 LINA C646
23
SDIN2

2
48 1 2
@10K_0402 RB715F LINB
26 1UF_10V
SDOUT1

2
24
2 R583 SDOUT2 2

1
25 40
0_0402 @10K_0402 SDOUT_ADC RINA
1 2 41 1 2 C675
24 EC_SMC1_CD RINB
19 1UF_10V
LRCLK/O
R584 20 R477
SCLK/O
24 EC_SMD1_CD 1 2 12 47
MCLK_OUT ANLP
C644 1200PF 24.9K
0_0402 46
+3VCD X5 ANLM
24.576MHz_30ppm 13 R488
XTLIN1/MCLK C668
14 42
XTLIN2 ANRP
1200PF 24.9K
1

43
ANRM
R462 C658 C666 15
SCL
10K_0402 27PF_0402 16
27PF_0402 SDA RIGHT
37 RIGHT 27 C696
AOUTR
10UF_10V_0805
2

5 38 EQOUT_VREF 27
+3VCD INPA_ACT VCOM
6
CS1 RST# LEFT
7 39 LEFT 27
CS1 AOUTL
8
1

R471 10K_0402 PWRDWN


9 34
1

1
TEST NC
R498 C653 1 2 11 C684
+3VCD CLK_SEL C625
10K_0402 .1UF_0402 21 36 .1UF_0402
IFM/S NC1
10UF_10V_0805
R497 2 1 @10K_0402
2

2
2
VRFILT
2

D31
44

1
VREFP
1 2 27
27 HPS IO0 ALLPASS
28 45
IO1 IO0 VREFM
RB751V 29
IO2 IO1

2
30 10
3 IO3 IO2 CAP_PLL 3
31
IO4 IO3
32 C647
IO5 IO4
33
IO5 .1UF_0402
35
+3VCD AVDD

C670
.1UF_0402
17 3
DVDD AVSSREF
1

1
C678 18 4 C667 C661 C655
DVSS AVSS
10UF_10V_0805 +3VCD 1UF_10V .1UF_0402
.1UF_0402
2

2
TAS3002CPFB
AVDD

1
2

+5VALW +5VCD L49


R549 @FBM-11-160808-121 R475
0_0603 27.4
C729

2
R567
40 Mil trace @.1UF_0402 EQAVDD
1

C732 @10K_0402 40 Mil trace

1
@.1UF_0402 U58 C645 C622
1

1
1 5 C701 1500PF
VIN VOUT .068UF
1

10UF_10V_0805

2
C731 4
BP
2

2
1

@10UF_10V_0805
3 2 C733
SHDN# GND
2

C730
@.1UF_0402 @4.7UF_10V_0805
C688
@Si9183DT-33
2

4 .1UF_0402 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 26 of 45
A B C D E
A B C D E

AMP & Audio Jack


CHANGE FROM
C706 C705 +5VAMPP
L48 .1UF_0402 220U 07/05
.1UF_0402
+5VAMP 1 2
0_0805

1
1

3
S

1
G
EC_MUTE_L Q61

2
30 EC_MUTE_L 2
+ C674

2
D 2N7002
1 C734 100UF_10V_D2 1

1
@2.2UF_16V_0805 R490

2
13
18
3
8
1 2 U54 EC_MUTE_LINE# 1 2
26 RIGHT_BYPASS +12VALW

VDD1
VDD2
VDD3
VDD4

2
100K_0402
C672
2.2UF_16V_0805 12 1 3 3 1 SPKR+ JP10
RIGHT ROUT+ SPKR+
26 RIGHT 1 2 17 Q63 Q66 1
RLINEIN SI2302DS SI2302DS SPKR- 1
2
SPKR- 2
19
C673 ROUT- Q65 R-SPK CONN.
2.2UF_16V_0805 SI2302DS Q71 SI2302DS
LEFT 1 2 15 2 1 3 3 1 SPKL+ JP9
26 LEFT LLINEIN LOUT+ SPKL+ 1
SPKL- 1
2
SPKL- 2
1 2 9
26 LEFT_BYPASS LOUT- EC_MUTE_LINE# R02 L-SPK CONN

1
+5VALW C735 DIS_ADJVOL 30 PIR10 C39 C40 C41 C42
@2.2UF_16V_0805
+ C690 220PF_0402
+5VAMP

2
1

4
+5VAMP 10UF_16V_1206
R509 16V 220PF_0402 220PF_0402
100K_0402 4 6 2 1 6 5 220PF_0402
HPS R_UP/DOWN# ADJVOL_UP/DW# 30
R508 0_0402
2

+5VAMP POWER
2

7 U57B

1
HP_OUT_PLUG L_UP/DOWN#
1

U57A R507 30dB/20dB# 74AHC125


14 14 2 1
74AHC125 @100K_0402 GAINSEL R491 100K_0402 +5VAMP
1

34 DOCK_HP_OUT_PLUG 2 3

GND1
GND2
GND3
GND4
2 2

2
5 16
R531 MODE SVR
7

1
100K_0402
1

1
2 HPS SI2304 Rds(on) = 0.90 @ Vin = 4.5 V

10
11
20

1
R502 R505 TDA8552TS C679 C680

1
100K_0402 Q73 Id max. = 2.5 A
100K_0402 .1UF_0402 2.2UF_16V_0805 2N7002

3
JP8 Q4

2
SI2304DS
INT_MIC DOCK_MIC
2

1 3 1 DOCK_MIC 34
1
2
+5VALW 2
INT MIC IN CONN.
R586
EC_MUTE_L

22
1 2

1
26 HPS 100K_0402 1M_0402
R510 R155
330_0402
R20 39K

1
34 INTMICOFF# 1 2 1 2
R22 10M +12VS

2
Q74
25 MIC_REF +
NDS352P C36

3
S
G 10UF_16V_1206
2 BT_ON# 30,31
1

C616 C611 16V


1

D
R511

1
10UF_10V_0805 .1UF_0402 2.2K_0402
2

R543
JP24
@4.22K_0402
2

3 2 1 BT_ON/OFF# 30 3
R541 301_0402
4 3 SPKL+
1 2
C618 R590 DOCK_MIC 6 5 SPKR+
1 2
MICIN 8 7 HP_OUT_PLUG
25 MICIN 1 2 1 2
10 9 R542 301_0402 SI2306 Rds(on) = 0.094 @ Vin = 4.5 V

2
1UF_10V 1k_0402 12 11

2
HP/MIC_12PIN C707 Id max. = 3.5 A
1

C742 R544
220PF_0402
@4.22K_0402
+5VALW +5VAMP
2

2
@4700PF_0402 R05
2

1
1 2
C662 22PF_0402 PIR10 C709 C708 R02 PIR15 Q67

1
1 2 220PF_0402 220PF_0402 1 3
R481 82K_0402

1
+5VAMP C700 SI2306DS C687

2
Q59 Q60
U46A 4.7UF_10V_0805 4.7UF_10V_0805
8

TDA1308

2
2N7002 2N7002
LOUT_VREF 3 +
S

1 1 3 3 1 LINEOUTR +3VCD R500


D

LINEOUTR 34
RIGHT 1 2 1 2 2 - 1 2
C677 R484 56K_0402 +12VALW

1
2.2UF_16V_0805 100K_0402
G
G

R504
4

1
EC_MUTE_LINE# @24K_1% C697
Q68 .01UF_0402
1 2 1
C663 22PF_0402

2
26 EQOUT_VREF 1 2 LOUT_VREF 24,25 EN_CDPLAY# 2
1 2 R499 0_0402 3

1
R482 82K_0402
R503 2N7002
4 +5VAMP @75K_1% 4

Q64 Q70
U46B
8

TDA1308
2

2N7002 2N7002
LOUT_VREF 5 +
LINEOUTL
S

7 1 3 3 1
D

LINEOUTL 34
LEFT 1 2 1 2 6 -
C669 R487 56K_0402
2.2UF_16V_0805 Compal Electronics, Inc.
G
G

Title
4

EC_MUTE_LINE# SCHEMATIC, M/B LA-1302


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 27 of 45
A B C D E
5 4 3 2 1

HDD/CD-ROM Module
PDD[0..15]
19 PDD[0..15]

+5VCD_1
L43
D +5VS 1 2 D
+5VCD FBM-L11-322513-151

1
C539 C550 C543
C557
1

1
C689 C698 C694 1000PF_0402 10UF_16V_1206 1UF_25V_0805 .1UF_0402
C702 CD_DD[0..15]

2
24 CD_DD[0..15]
1000PF_0402 10UF_16V_1206 1UF_25V_0805 .1UF_0402
Place component's closely IDE CONN.
2

2
Place component's closely IDE CONN.

R03 PIR16
C237
2 1

10UF_16V_1206
C 1 2 2 1
40 Mil trace C
CD_AGND 25
R386 @10K_0402 R142 10K_0402
JP21 JP23
PIDERST# 1 2 INT_CD_L INT_CD_R
19 PIDERST# 1 2 24 INT_CD_L 1 2 INT_CD_R 24
PDD7 3 4 PDD8 +5VS
PDD6 3 4 PDD9 3 4 CD_DD8
5 5 6 6 24 CD_IDERST# 5 6
PDD5 7 8 PDD10 CD_DD7 CD_DD9
7 8 7 8

1
PDD4 9 10 PDD11 CD_DD6 CD_DD10
PDD3 9 10 PDD12 R460 CD_DD5 9 10 CD_DD11
11 11 12 12 11 12
PDD2 13 14 PDD13 100K_0402 CD_DD4 CD_DD12
PDD1 13 14 PDD14 CD_DD3 13 14 CD_DD13
15 15 16 16 15 16
PDD0 17 18 PDD15 CD_DD2 CD_DD14
17 18 CD_DD1 17 18 CD_DD15

2
19 19 20 20 19 20
19 PDDREQ# PDDREQ# 21 22 CD_DD0
21 22 21 22 CD_DDREQ# 24
PDIOW# 23 24
19 PDIOW# 23 24 23 24 CD_DIOR# 24
PDIOR# 25 26
19 PDIOR# 25 26 24 CD_DIOW# 25 26
PDIORDY 27 28 PCSEL 1 2
19 PDIORDY 27 28 24 CD_DIORDY 27 28 CD_DACK# 24
PDDACK# 29 30 R480 470_0402 24 CD_IRQ15 R404
19 PDDACK# 29 30 29 30 100K_0402
18,20 IRQ14 IRQ14 31 32 24 CD_DA1 PDIAG# 1 2
PDA1 31 32 31 32 +5VCD
19 PDA1 33 33 34 34 24 CD_DA0 33 34 CD_DA2 24
PDA0 35 36 PDA2
19 PDA0 35 36 PDA2 19 24 CD_DCS1# 35 36 W=80mils CD_DCS3# 24
PDCS1# 37 38 PDCS3#
B 19 PDCS1# 37 38 PDCS3# 19 30,32 CDACT_LED# 37 38 +5VCD_1 B
30,32 HDDACT_LED# 39 39 40 40 +5VCD_1 39 40 +5VCD_1
+5VS 41 41 42 42 +5VS +5VCD_1 41 42 +5VCD_1
43 43 44 44 +5VCD 2 1 43 44 2 1
1 2 R396 10K_0402 C533 .1UF_0402
+5VS R494 10K_0402 SEC_CSEL 45 46
HDD CONN 47 48
49 50 1 2 +5VCD

2
R358 100K_0402
R371
470_0402 CD-ROM CONN.

2 PDIORDY

1
+3VS 1
R478 4.7K_0402

A A

Title
Compal Electronics, Inc.
SCHEMATIC, M/B LA-1302
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 28 of 45
5 4 3 2 1
A B C D E

L41
+3VALW
2 1 PC87591

1
C588 C486 C480 C545 C576 EC_AVCC FBM-L11-160808-601LMP +3VALW KBA[0..18]
KBA[0..18] 30

2
+3VS C479 ADB[0..7] I/O Address
ADB[0..7] 30 BADDR1-0 Index Data
22UF_10V_1206 .1UF_0402 .1UF_0402
.1UF_0402 KSI[0..7] 0 0 2E 2F

2
+RTCVCC KSI[0..7] 32 0 1 4E 4F
1000PF_0402

2
.1UF_0402 1 0 (HCFGBAH, HCFGBAL)(HCFGBAH, HCFGBAL)+1

123
136
157
166

161
1
C575 C536 1 1 Reserved

16

34
45

95
U35 1UF_25V_0805
.1UF_0402 R02 R429,433 MOUNTED, R428 NOT

1
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

VBAT
VDD

AVCC
CLK_PCI_EC ADPREF

2
R03 PIR 17 +3VALW
AVBATT_TEMP
7 81 AVBATT_TEMP
1 18,20,21,35,36 SERIRQ SERIRQ AD0 ABATT_TEMP 41 1
THROTTLE 8 82 THROTTLE
LDRQ AD1 THROTTLE 38
1

1
18,35,36 LFRAME# 9 83 AVBATT
AVBATT 38 C736
(ENV1) KBA1 2 1
R400 AVBATT LFRAME AD2 R325 10K_0402
18,35,36 LAD0 15 84 1UF_25V_0805
LAD0 Host interface AD3 (BADDR0) KBA2
18,35,36 LAD1 14 87 ALI/MH# 38,41 2 1

1
@10_0402 LAD1 IOPE0AD4 R324 @10K_0402

2
C485 18,35,36 LAD2 13 88 MSEN# 13,17,34
LAD2 IOPE1/AD5 (BADDR1) KBA3
@2200PF_0402 18,35,36 LAD3 10 89 PROCHOT# 4 THERMDA_591 4 2 1
LAD3 IOPE2/AD6

1
AD Input C481 R323 10K_0402
2

12 CLK_PCI_EC 18 90
LCLK IOPE3/AD7 (SHBM) KBA5
2

2
32 EC_RST# 19 93 2 1
1

LREST DP/AD8 2200PF_0402 R322 10K_0402


22 94 THERMDC_591 4
C581 SMI DN/AD9

2
C487 C483 23
PWUREQ +3VALW +5VALW
@2200PF_0402 99 ADPREF 38
@15PF_0402 @2200PF_0402 DA0
2

100 EN_FAN1 3
C495 DA output DA1
18 SCI# 31 101 IREF 38

1
@2200PF_0402 IOPD3/ECSCI DA2
102 EN_FAN2 3
DA3

1
EC_G20 5 32 R451
GA20/IOPB5 IOPA0/PWM0 INVT_PWM 13 10K_0402
KBRST#_RC 6 33 R418
KBRST/IOPB6 IOPA1/PWM1 BEEP# 25
36 DOT_RS_R 10K_0402
CP5 PWM IOPA2/PWM2

2
37 ACOFF 38 DOT_EN 32
KSI1 KSI0 IOPA3/PWM3
1 8 71 or PORTA 38 PM_BATLOW# 18

1
KSI7 KSI1 KBSIN0 IOPA4/PWM4

2
2 7 72 39 EC_ON 32
KBSIN1 IOPA5/PWM5

1
KSI6 3 6 KSI2 73 40 DOT_EN_R 2 C740
KBSIN2 IOPA6/PWM6 LID_OUT# 18
KSO9 4 5 KSI3 74 43
KBSIN3 IOPA7/PWM7 PCM_SUSP# 21
INT_KBD CONN. 8P4C_100PF
KSI4
KSI5
77
KBSIN4 Q57 @820PF_0402

2
78 153 KSO16 32 2N7002
KSI6 KBSIN5 IOPB0/URXD
79 154 KSO17 32
CP6 KSI7 KBSIN6 Key matrix scan IOPB1/UTXD
80 162 EN_WOL# 23
JP18 KSI4 KBSIN7 IOPB2/USCLK EC_SMC1
1 8 163
KSI1 KSI5 KSO0 PORTB IOPB3/SCL1 EC_SMD1 EC_SMC1 30,41
1 2 7 49 164
1 KSI7 KSO0 KSO1 KBSOUT0 IOPB4/SDA1 PCIRST# EC_SMD1 30,41
2 3 6 50 165 PCIRST# 4,6,13,18,21,22,23,34,35,36
KSI6 2 KSI2 KSO2 KBSOUT1 IOPB7/RING/PFAIL +3VALW +5VALW
3 4 5 51
3 KSO9 KSO3 KBSOUT2
4 52 168 PWRBTN_OUT# 18
2 KSI4 4 8P4C_100PF KSO4 KBSOUT3 IOPC0 2
5 53 169

1
5 KSI5 KSO5 KBSOUT4 IOPC1/SCL2 EC_SMC2 4,24,34
6 56 170
KSO0 6 KSO6 KBSOUT5 IOPC2/SDA2 FANSPEED1 EC_SMD2 4,24,34 R427 R452
7 57 171 FANSPEED1 3
7 KSI2 CP7 KSO7 KBSOUT6 PORTC IOPC3/TA1 WAKEUP# 1.5K_0402
8 58 172 WAKEUP# 21,22,23
KSI3 8 KSI3 KSO8 KBSOUT7 IOPC4/TB1/EXWINT22 THRM# 10K_0402
9 1 8 59 175 THRM# 18
9 KSO5 KSO5 KSO9 KBSOUT8 IOPC5/TA2 EC_ACT#
10 2 7 60 176 EC_ACT# 32
KSO1 10 KSO1 KSO10 KBSOUT9 IOPC6/TB2/EXWINT23

2
11 3 6 61 1 DOT_RS 32
11 KSI0 KSI0 KSO11 KBSOUT10 IOPC7/CLKOUT
12 4 5 64
KSO2 12 KSO12 KBSOUT11
13 65 26 ACIN 19,40 1 Q56
13 KSO4 8P4C_100PF KSO13 KBSOUT12 PORTD-1 IOPD0/RI1/EXWINT20
14 66 29 RING# 34 2
KSO7 14 KSO14 KBSOUT13 IOPD1/RI2/EXWINT21 3904
15 67 30 PM_SLP_S3# 18 3
15 KSO8 CP8 KSO15 KBSOUT14 IOPD2/EXWINT24
16 68
KSO6 16 KSO2 KBSOUT15
17 1 8 2 ON/OFF 32
17 KSO3 KSO4 EC_TINIT# IOPE4/SWIN DOT_RS_R
18 2 7 105 44 PM_SLP_S5# 18
KSO12 18 KSO7 EC_TCK TINT PORTE IOPE5/EXWINT40
19 3 6 106 24
19 KSO13 KSO8 EC_TDO TCK IOPE6/LPCPD/EXWIN45
20 4 5 107 25
KSO14 20 EC_TDI TDO JTAG debug port IOPE7/CLKRUN/EXWINT46 CLKRUN# 18,20,21,34,35
21 108
21 KSO11 8P4C_100PF EC_TMS TDI KBA0
22 109 124
KSO10 22 TMS IOPH0/A0/ENV0 KBA1
23 125
23 KSO15 IOPH1/A1/ENV1 KBA2
24 34 KBD_CLK 110 126
24 PSCLK1/IOPF0 IOPH2/A2/BADDR0 KBA3
34 KBD_DATA 111 127
INT_KB_CONN. PSDAT1/IOPF1 IOPH3/A3/BADDR1 KBA4
34 PS2_CLK 114 128
PSCLK2/IOPF2 PORTH IOPH4/A4/TRIS KBA5
34 PS2_DATA 115 131
PSDAT2/IOPF3 PS2 interface IOPH5/A5/SHBM KBA6 +5VALW
31 TP_CLK 116 132
PSCLK3/IOPF4 IOPH6/A6 KBA7
31 TP_DATA 117 133
PSDAT3/IOPF5 IOPH7/A7
32 LID_SW# 118
+3VALW PSCLK4/IOPF6 ADB0 RP140
32 DJ_ON/OFF# 119 138
RP134 CP9 PSDAT4/IOPF7 IOPI0/D0 ADB1 EC_SMC1
139 1 8
KSI0 KSO6 CRY1 IOPI1/D1 ADB2 EC_SMD1
1 8 1 8 140 2 7
KSI1 KSO3 IOPI2/D2 ADB3 EC_SMC2
2 7 2 7 141 3 6
KSI2 KSO12 CRY2 PORTI IOPI3/D3 ADB4 EC_SMD2
3 6 3 6 1 2 158 144 4 5
KSI3 KSO13 R364 20M 32KX1/32KCLKOUT IOPI4/D4 ADB5
4 5 4 5 145
3 IOPI5/D5 ADB6 8P4R_4.7K_0804 3
2 1 160 146
@8P4R_4.7K_0804 8P4C_100PF R370 121K_0402 32KX2 IOPI6/D6 ADB7
147
IOPI7/D7
1

C520 C528
RP133 CP10 Y3 150 FRD#
PORTJ-1 IOPJ0/RD FRD# 30
KSI4 1 8 KSO14 1 8 10PF_0402 12PF_0402
32.768KHZ_2MM_10ppm 151 FWR#
IOPJ1/WR0 FWR# 30
KSI5 KSO11
2

2 7 2 7
KSI6 3 6 KSO10 3 6 152
SELIO SELIO# 30
KSI7 4 5 KSO15 4 5
18 EXTSMI# 62 41 EN_WOLR# 34
@8P4R_4.7K_0804 8P4C_100PF LAN_PME# IOPJ2/BST0 IOPD4
34 LAN_PME# 63 42 NUMLED# 32
IOPJ3/BST1 PORTD-2 IOPD5
21 G_RST# 69 54 CAPSLED# 32
IOPJ4/BST2 PORTJ-2 IOPD6 MINI_PME#
18 SWI# 70 55 MINI_PME# 34
DOT_EN_R IOPJ5/PFS IOPD7 +3VALW +3VALW +3VALW +3VALW +3VS
75
IOPJ6/PLI
NS 12,18 PM_SLP_S1# 76
IOPJ7/BRKL_RSTO IOPK0/A8
143 KBA8
142 KBA9
RECOMMEND

1
IOPK1/A9 KBA10
33,41 SYSON 148 135
IOPM0/D8 PORTK IOPK2/A10 KBA11 R389 R367 R378 R18 R387
33,34,37,41,42 SUSP# 149 134
IOPM1/D9 IOPK3/A11 KBA12 10K_0402 10K_0402 10K_0402 @10K_0402 10K_0402
33,39 VR_ON 155 130
IOPM2/D10 PORTM IOPK4/A12 KBA13
18 RSMRST# 156 129
VOL_UP# IOPM3/D11 IOPK5/A13/BE0 KBA14
30,32 VOL_UP# 3 121
2

VOL_DW# IOPM4/D12 IOPK6/A14/BE1 KBA15

2
30,32 VOL_DW# 4 120
R339 IOPM5/D13 IOPK7/A15/CBRD WAKEUP# LAN_PME# MINI_PME# MSEN# FANSPEED1
13 ENVEE 27
IOPM6/D14 KBA16
13 ENBKL 28 113
10K_0402 IOPM7/D15 IOPL0/A16 KBA17 JP20
112
FSEL# PORTL IOPL1/A17 KBA18
30 FSEL# 173 104 1 +3VALW
+3VS SEL0 IOPL2/A18 1 EC_TINIT#
1

174 103 2
SEL1 IOPL3/A19 2 EC_TCK
47 48 FSTCHG 38 3
CLK IOPL4/WR1 3 EC_TDO
4
4 EC_TDI
5
2

5
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7

NC10

6 EC_TMS
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

6
R426 R412 7
7 VOL_UP#
10K_0402 10K_0402 8
4 PC87591VPC 8 VOL_DW# 4
122
159
167
137

9
17
35
46

96

11
12
20
21
85
86
91
92
97
98

False 9 THRM#
10
10
1

D24
RB751V @96212-1011S
1 2
2 1 EC_G20 D21 RB751V FBM-L11-160808-601LMP
18 GATEA20
2 1 MINI_PME# L40

D19 RB751V Compal Electronics, Inc.


2 1 KBRST#_RC WAKEUP# 2 1 LAN_PME# Title
18 KBRST#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
D23
RB751V AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 29 of 45
A B C D E
A B C D E

BIOS & I/O Port


ADB[0..7]
29 ADB[0..7]
KBA[0..18] Input Port Output Port
29 KBA[0..18]

+3VALW
+3VALW +5VALW

1
R439
10K_0402

20

20
1 U44 U47 1
DOT_PRES# 2 18 ADB0 ADB0 3 2

VCC

VCC
32 DOT_PRES# 1A1 1Y1 D0 Q0 GATE_RST 32
DRIVER_ACT# ADB1 ADB1

2
4 16 4 5 BT_RST# 31
CONA# 1A2 1Y2 ADB2 ADB2 D1 Q1
34 CONA# 6 14 7 6 BT_DET 31
BT_PRE# 1A3 1Y3 ADB3 +3VALW ADB3 D2 Q2
31 BT_PRE# 8 12 8 9 BT_ON# 27,31
1A4 1Y4 ADB4 ADB4 D3 Q3
11 9 13 12 DOT_R/W# 32
TP_ON/OFF# 2A1 2Y1 ADB5 ADB5 D4 Q4
31 TP_ON/OFF# 13 7 14 15 EC_MUTE_L 27
BT_ON/OFF# 2A2 2Y2 ADB6 ADB6 D5 Q5

14
27 BT_ON/OFF# 15 5 17 16 CD_PLAY 25
D26 1 2A3 2Y3 D6 Q6
32 EC_MUTE# 2 RB751V 17 3 ADB7 U26A ADB7 18 19 CD_PLAY_ON# 24
31 BT_WAKE_UP 2A4 2Y4 KBA2 D7 Q7
1
1 3 AA 11

GND

GND
1G SELIO# LARST# CLK
19 2 1
+3VALW 2G CLR
74LVC244 74LVC32 74HCT273

10

10
7
14
U26B
KBA1 4 C676
6 CC 1 2 1 2
+5VALW
SELIO# 5 R489 20K_0402
29 SELIO# 1UF_25V_0805
74LVC32

7
+5VALW

20
D29 U49
1 ADB0 3 2

VCC
28,32 HDDACT_LED# D0 Q0 TPAD_LED# 31
3 DRIVER_ACT# ADB1 4 5
2 D1 Q1 BACKLIGHT# 32 2
2 ADB2 7 6
28,32 CDACT_LED# D2 Q2 DIS_ADJVOL 27
+3VALW ADB3 8 9
Request by EC 6/20 D3 Q3 ADJVOL_UP/DW# 27
RB717F ADB4 13 12
D4 Q4 DOT_DB4 32
ADB5 14 15
D5 Q5 DOT_DB5 32
ADB6

14
17 16 DOT_DB6 32
U26C ADB7 D6 Q6
18 19 DOT_DB7 32
KBA4 D7 Q7
9
8 BB 11

GND
SELIO# LARST# CLK
10 1
+3VALW CLR
+3VALW RP147 74LVC32 74HCT273

10
CONA#

7
1 8
EE 2 7
VOL_UP# 3 6
29,32 VOL_UP#
U23 VOL_DW# 4 5
29,32 VOL_DW#
KBA18 9 8 8P4R_100K_0804
KBA16 A18 VCC FWE#
10 7
KBA15 A16 WE* KBA17 +3VALW +5VALW
11 6
KBA12 A15 A17 KBA14 RP150
12 5
KBA7 A12 A14 KBA13 AA
13 4 1 8
KBA6 A7 A13 KBA8 CC
14 3 2 7
KBA5 A6 A8 KBA9 BB
15 2 3 6
KBA4 A5 A9 KBA11 TP_ON/OFF#

20
16 1 4 5
KBA3 A4 A11 FRD# U43
17 32
KBA2 A3 OE* KBA10 8P4R_100K_0804 ADB0
18 31 3 2

VCC
A2 A10 D0 Q0 PWR1_LED# 32
KBA1 19 30 FSEL# ADB1 4 5
A1 CE* D1 Q1 PWR2_LED# 32
KBA0 20 29 ADB7 ADB2 7 6
A0 DQ7 D2 Q2 BATT1_LED# 32
ADB0 21 28 ADB6 RP149 +3VALW ADB3 8 9
DQ0 DQ6 D3 Q3 BATT2_LED# 32
ADB1 22 27 ADB5 DOT_PRES# 1 8 ADB4 13 12
DQ1 DQ5 D4 Q4 PLED# 32
ADB2 23 26 ADB4 BT_PRE# 2 7 ADB5 14 15
DQ2 DQ4 D5 Q5 MP3_LED# 32
ADB3 BT_ON/OFF# ADB6

14
24 25 3 6 17 16 MUTELED 32
3 VSS DQ3 DRIVER_ACT# U26D ADB7 D6 Q6 3
4 5 18 19 CDPLAY_LED# 32
KBA6 D7 Q7
12
39F040_TSOP 8P4R_100K_0804 11 EE 11

GND
SELIO# LARST# CLK
13 1
CLR
74LVC32 74HCT273

10
7
C441
2 1
+3VALW +3VALW
4.7UF_10V_0805
1

2 1 +3VALW +5VALW
C443 .1UF_0402 R291 2 1 +5VALW
+12VS
100K_0402 R305 100K_0402
2

1
G

U24 U22
7SH32 5 Q29 2N7002 R428
KBA18 100K_0402
2

1 32 1 1 3 FLASH# 19
KBA16 NC VCC FWE#
2 31 4
D

KBA15 A16 WE* KBA17 U36


3 30 2
KBA12 A15 A17 KBA14 FWR# 29

2
4 29 3 8 1
KBA7 A12 A14 KBA13 VCC A0
5 28 7 2
KBA6 A7 A13 KBA8 WC A1
6 27 29,41 EC_SMC1 6 3
KBA5 A6 A8 KBA9 SCL A2
7 26 5 4
KBA4 A5 A9 KBA11 29,41 EC_SMD1 SDA GND
8 25
A4 A11

1
KBA3 9 24 FRD# NM24C16
KBA2 A3 OE* KBA10 FRD# 29 R388 R420
10 23
KBA1 A2 A10 FSEL# U24AS1 100K_0402 100K_0402
11 22
KBA0 A1 CE* ADB7 FSEL# 29
12 21
ADB0 A0 DQ7 ADB6
13 20
4 ADB1 DQ0 DQ6 ADB5 4

2
14 19
ADB2 DQ1 DQ5 ADB4
15 18
DQ2 DQ4 ADB3
16 17
VSS DQ3
BIOS_PLCC_IC
@29F040/SST39VF040_PLCC

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 30 of 45
A B C D E
A B C D E

Printer Port/USB
Bluetooth Connector
USB A USB Port USB B JP14
USB_AS 30 BT_DET 1 2
USB_A USB_B USB_BS
30 BT_WAKE_UP 3 4
5 6 BT_ON# 27,30
L22 1 2 FBM-11-160808-121
19 USBP4+ 7 8 BT_PRE# 30
L11 L10 JP5 L9 L30 L23 1 2 FBM-11-160808-121
19 USBP4- 9 10
1 2 FBM-11-160808-121 FBM-11-160808-121 2 1
1 FBM-11-451616-800T USBP0- 1 5 USBP2- FBM-11-451616-800T 11 12 1
1 2 1 2 30 BT_RST#
USBP0+ 2 6 USBP2+ 13 14
1 2 1 2

1
L28 3 7 L27 15 16
+5VALW

1
C44 + C46 FBM-11-160808-121 4 8 FBM-11-160808-121 C267 + C273 17 18
+3VALW 19 20
USB CONN.
150UF_6.3V_D2 1000PF_0402 1000PF_0402 150UF_6.3V_D2 AXN420C530P

1
2 C139 C419

2
.1UF_0402 .1UF_0402

2
USB_AS +3VALW

USB_BS

1
+5VALW USBP2- USBP0-
R485 R486 USBP0+
USBP0+ 19,34
USBP0-
USBP0- 19,34
10K_0402 10K_0402 C35 C34 USBP2+
USBP2+ 19,34
U48 @10PF_0402 @10PF_0402 USBP2-
USBP2- 19,34

2
1 8 OVCUR#0 19,34
2 GND OC1# 2
2 7
IN OUT1
3 6
1

C671 EN1# OUT2 USBP2+ USBP0+


4 5 OVCUR#2 19
EN2# OC2#
4.7UF_10V_0805

1
TPS2042 C664 C665 C265 C263
2

@10PF_0402 @10PF_0402
1UF_10V 1UF_10V

2
+5V_PRN +5V_PRN
Parallel Port
D4
+5VS 2 1w=10mils

1
C17 C16

1
LPD[0..7] RB420D
34,35 LPD[0..7] R7 4.7UF_10V_0805 .1UF_0402
2.7K_0402

2
1 2 INIT#
34,35 LPTINIT# R10 33 LPTSTB#
2

1 2
34,35 LPTSTB#
w=10mils

R4 33 JP2
3 1 2 SLCTIN# LPTCN-25 3
34,35 LPTSLCTIN#
R11 33 CP3
1 AFD/3M# 1 8
1 2 AFD/3M# 14 C9 LPTERR# 2 7 +5VS
34,35 LPTAFD# R9 33 FD0 @10PF_0402 INIT#
2 3 6
PIR23 1 2 LPTERR#_ 15 SLCTIN# 4 5 +5VS +5VS
34,35 LPTERR# R14 33 FD1 3
+5V_PRN INIT# 16 8P4C_220PF

1
FD2 4 CP1 JP19
RP2 SLCTIN# 17 LPTACK# 1 8 R141 R140 1 A1
FD0 FD3 LPTBUSY 10K_0402 10K_0402 1 A1
1 10 5 2 7 2 A2
FD1 FD7 LPTPE TP_ON/OFF# 2 A2 TP_ON/OFF#
2 9 18 3 6 30 TP_ON/OFF# 3 A3
FD2 FD6 FD4 LPTSLCT TPAD_LED# 3 A3 TPAD_LED#
3 8 6 4 5 4 A4
FD3 FD5 30 TPAD_LED# 4 A4

2
4 7 19 5 A5
FD4 FD5 8P4C_220PF 29 TP_DATA TP_DATA 5 A5 TP_DATA
+5VS 5 6 7 6 A6
29 TP_CLK TP_CLK 6 A6 TP_CLK
20 7 A7
10P8R_2.7K FD6 7 A7
8 8 A8
RP3 CP4 8 A8
21

1
LPD3 9 8 FD3 FD7 9 FD0 1 8 C236 C235
+5V_PRN LPD2 10 7 FD2 22 FD1 2 7 HEADER 8
RP1 LPD1 11 6 FD1 LPTACK# 10 FD2 3 6 @22PF_0402 @22PF_0402
SLCTIN# LPD0 FD0 34,35 LPTACK# FD3

2
1 10 12 5 23 4 5
INIT# 2 9 LPTACK# LPD7 13 4 FD7 LPTBUSY 11
LPTERR# LPTBUSY LPD6 FD6 34,35 LPTBUSY 8P4C_220PF
3 8 14 3 24
AFD/3M# 4 7 LPTPE LPD5 15 2 FD5 LPTPE 12
5 6 LPTSLCT LPD4 16 1 FD4 34,35 LPTPE 25 CP2
+5VS
LPTSLCT 13 FD4 1 8
10P8R_2.7K 16P8R_33 34,35 LPTSLCT FD5 2 7
FD6 3 6
28
29

FD7 4 5

8P4C_220PF
4 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 31 of 45
A B C D E
A B C D E

+5VALW Dot Matrix LCD/FIR


+3VS

1
C564 C563 Change from +3VS for adding FIR transferring distance to 1m . 90.11.01.
LID Switch

1
1000PF_0402 .01UF_0402 JP22 C562 C556

2
+5VS 1 2 +5VS
SW2 1000PF_0402 .01UF_0402
3 4 +5VALW

2
+5VALW 5 6
+5VS 7 8 +5VALW
29 LID_SW# 2 1 +5VALW
9 10
1 +5VS 11 12 DOT_R/W# 30 1
4 3 29 DOT_EN 13 14 DOT_RS 29
30 DOT_DB4 15 16 DOT_PRES# 30
29 KSO17 17 18
KSI0
KSI0 29 MP3
LID SW MODE KSI1 KSI2 REV +5VALW
29 KSI1 KSI2 29

1
19 20
C553 PLAY 29 KSI3
KSI3
21 22
KSI4
KSI4 29
STOP
FRD 29 KSI5 23 24 VOL_UP# 29,30
.01UF_0402
29,30 VOL_DW# 25 26 EC_MUTE# 30

2
30 MUTELED EC_ACT# 29

1
27 28 51ON# C567 C568
29 DJ_ON/OFF# 29 30
30 MP3_LED# 31 32 CDPLAY_LED# 30 1000PF_0402 .01UF_0402
30 PWR1_LED# 33 34 PWR2_LED# 30

2
28,30 HDDACT_LED# 35 36 BATT1_LED# 30
30 BATT2_LED# 37 38 BACKLIGHT# 30
39 40 IRRX 35
35 IRTXOUT 41 42
35 IRMODE 43 44
45 46
47 48 DOT_DB5 30
30 DOT_DB6 49 50 DOT_DB7 30
CD_PLAYER_50PIN_ACES

+5VS
+5VALW
+5VS JP6
1 2 +5VALW
29 CAPSLED# 3 4
29 NUMLED# 5 6 PLED# 30

1
C32 28,30 CDACT_LED# ON/OFFBTN# C31 C30 C33
2 7 8 2
29 KSO16 9 10
KSI0 BTN1
.01UF_0402 BTN2 KSI1
11 12
KSI2 BTN3 1000PF_0402 .01UF_0402 4.7UF_25V_1206
BTN4 KSI3 KSI4 BTN5

2
13 14
15 16

F_BTN_16PIN

+3VS PWR ON CKT

PWR: +3VALW
1

+3VALW +3VALW
R315
10K_0402
10

U21F U21E
2

14 14
R278 20K_0402 74LVC14 74LVC14
39 VGATE 9 8 1 2 13 12 11 10 PM_PWROK 18
U28C
2

74LVC125 C433
R252
1UF_25V_0805 10K_0402
3 3
1

+3VALW

+3V

M/E OFF Button

1
1

R432
R321 PIR11 100K_0402
10K_0402
4

D25
ON/OFF

2
1 ON/OFF 29
ON/OFFBTN# +3VALW +3VALW
2

5 6 ICH_VGATE 18 3
2 51ON#
51ON# 40
U28B

2
74LVC125 DAN202U 1 2
R2 C2 .1UF_0402
+3VALW 10K_0402
30 GATE_RST
U1

5
7SH32
1

1
SW1

1
2

1
R446 C607 4

1
C EC_RST# 29
+3VS @4.7K_0402 D27 2 1 1
1000PF_0402 RLZ20A

2
R442

2
4 3
2

22K R1
2

2
29 EC_ON 1 2 2
R318 B 10K_0402
0_0402 E RESET BTN
10K_0402 22K
Q54 for ESD 9/14

1
Q51 DTC124EK
1

3
1

4 D 4
34 ME_OFF#
CK408_PWRGD# 12 2
G
R306 100K_0402 Q32 1 S @2N7002
3

1 2 2
3
2

C476 3904
Compal Electronics, Inc.
100PF_0402 Title
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 32 of 45
A B C D E
A B C D E

+5VALW
+5VALW +5VALW
DC/DC Interface & RTC
R02

1
PIR12 R532
100K_0402
U29B

14

14
U29A
74HCT14 74HCT14
SYSON#

2
1 2 VR_ON# SUSP# 3 4 SUSP
29,39 VR_ON

1
D
2 Q75
29,41 SYSON
2N7002

7
G
1 S 1

+2.5V tolerence +- 200 mV


+2.5VALW
+1.8VALW
+2.5VALW +2.5V C544 +3VALW +3V C685 +2.5VS +1.8VS
U33 U51 U34 C569 U27 C475
4.7UF_10V_0805 4.7UF_10V_0805 4.7UF_10V_0805 4.7UF_10V_0805
8 1 8 1 8 1 8 1
D S D S D S D S
7 2 7 2 7 2 7 2
D S D S D S D S
6 3 1 6 3 6 3 6 3

1
D S D S D S D S
5 4 5 4 C699 5 4 C573 5 4 C478
D G D G D G D G
1UF_10V 1UF_10V
1

SI4800 SI4800 1UF_10V SI4800 SI4800


C572
2

2
4.7UF_10V_0805

1
+12VALW
C710

1
2

C542 C537 4.7UF_10V_0805 C686 C555 C560 C477 C474


4.7UF_10V_0805 4.7UF_10V_0805 4.7UF_10V_0805
1

4.7UF_10V_0805 1UF_10V 4.7UF_10V_0805 4.7UF_10V_0805

2
ON_GATE +5VS_GATE +5VS_GATE

2
R379
100K_0402
2

ON_GATE
Q46
1

2 2N7002 D 2
C683 +12VALW To +12VS Transfer
SYSON# 2 .01UF_50V_0805
G
2

S
+12VALW +12VALW
3

1
3VS and 5VS are seperated control to achieve maximum power sequence flexibility
R298

1
C455
+5VALW +5VS C503 C502 +3VALW +3VS C681 C691 100K_0402
C693

3
U31 C518 U52 .1UF_0402
S
1UF_10V 4.7UF_10V_0805 4.7UF_10V_0805 1UF_10V 4.7UF_10V_0805 4.7UF_10V_0805 G Q34

2
8 1 8 1 2
D S D S NDS352P
7 2 7 2
1

1
D S D S
6
D S
3 6
D S
3 D P CHANNEL MOSFET
R299

1
5 4 5 4
D G D G
+12VS
SI4800 SI4800 51K
2

2
1

C534 C704

1
2
4.7UF_10V_0805 4.7UF_10V_0805 C471
4.7UF_25V_1206

1
+12VALW +12VALW D
2

SUSP# Q33

2
2
29,34,37,41,42 SUSP# G 2N7002
2

3
R506 R569
100K_0402 @100K_0402
R570
+5VS_GATE +3VS_GATE
1

2 1
1

3 D 0_0402 D 3
Q72 Q77
R299 can be eliminated ?
2 SUSP 2 SUSP
1

C703 2N7002 G C739 @2N7002 G


S S
.01UF_50V_0805 @1UF_50V_0805
3

3
2

+12VS +5VS +3VS +2.5VS +1.25VS +CPU_CORE


1

R307 R399 R447 R382 R294 R247


100_0402 100_0402 100_0402 100_0402 @100_0402
100_0402

3MM 3MM
12

12

12

12

D D D D
1 1 Q24 JOPEN5 JOPEN2
SUSP 2
G
Q36
2N7002
SUSP 2
G
Q48
2N7002
SUSP 2
G
Q53
2N7002
SUSP 2
G
Q45
2N7002
SUSP 2 Q27
3 2N7002
VR_ON# 2
3 @2N7002
120mil +3VALWP 2 1 +3VALW (5A) 120mil +1.8VALWP 2 1 +1.8VALW (2A)
S S S S
3MM
3

JOPEN6 JOPEN3
120mil +2.5VALWP 2 1 +2.5VALW (3A) 120mil +1.5VP 2 1 +1.5VS (2A)

+3V +2.5V 2MM JOPEN7


+1.8VS +1.5VS JOPEN4
120mil +1.25VP 2 1 +1.25VS (3A)
40mil +12VALWP 2 1 +12VALW (50MA)
1

4 4
1

R316 R376
R317 3MM 2MM
100_0402 100_0402 R332
100_0402 JOPEN8 JOPEN1
100_0402
120mil +5VALWP 2 1 +5VALW (5A) +1.2VP 2 1 +1.2VS (300MA)
2
1

D
2

SYSON# 2 Q35 1 1 Q39 1 Q40


G 2N7002 SYSON# 2
Q44 SUSP 2 SUSP 2
Compal Electronics, Inc.
2N7002 2N7002
S 3 2N7002 3 3 Title
3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 33 of 45
A B C D E
A B C D E

Mini-PCI Slot

+5VS_MINIPCI +3VS_MINIPCI +3.3VAUX


+5VS +5VALW
1

1
C445 C451 C447 C449 C174 C448 C442 C176 C178 C168 C175 C446 C453

1
C287 C289 C291 C288
1 1000PF_0402 .1UF_0402 .1UF_0402 10UF_16V_1206 1000PF_0402 10UF_10V_0805 .1UF_0402 .1UF_0402 10UF_10V_0805 1000PF_0402 .1UF_0402 .1UF_0402 10UF_10V_0805 1
1000PF_0402 .01UF_0402 22UF_10V_1206 .01UF_0402
2

2
AD[0..31]
AD[0..31] 18,21,22,23

31,35 LPD[0..7] LPD[0..7]


JP27
TIP 1 2 RING
1 2
KEY KEY
3 4 +5VS_MINIPCI VIN
3 4
5 6
5 6 JP25
7 8
7 8
9 10 1 2
9 10 1 2
11 12 3 4
PIRQC# R292 2 11 12 3 4
1 @0_0402 13 14 5 6

1
13 14 R297 2 5 6
15 16 1 @0_0402 PIRQD# C28 C29 7 8
PIRQD# R293 2 0_0402 17 15 16 7 8
18,20 PIRQD# 1 18 9 10
W=40mils 17 18 R296 2 9 10
19 20 1 0_0402PIRQC# 1000PF_0402 100PF_0402 11 12
+3VS_MINIPCI 19 20 PIRQC# 18,20 11 12

2
21 22 13 14
18,20 REQ#1 21 22 W=40mils GNT#1 18,20 +3VS_MINIPCI 13 14
23 24 +3.3VAUX 15 16 LPTSLCT 31,35
2 CLK_PCI_MINI 23 24 L25 LPD4 15 16 2
12 CLK_PCI_MINI 25 26 PCIRST# 4,6,13,18,21,22,23,29,35,36 17 18 LPTPE 31,35
25 26 LPD3 17 18
27 28 1 2 +3VS 19 20 LPTBUSY 31,35
REQ#4 27 28 GNT#4 W=40mils FBM-11-160808-121 19 20
29 30 31,35 LPTSLCTIN# 21 22 LPTACK# 31,35
18,20 REQ#4 29 30 GNT#4 18,20 LPD2 21 22 LPD7
31 32 23 24
AD31 31 32 23 24 LPD6
33 34 25 26
AD29 33 34 MINI_PME# 29 31,35 LPTINIT# LPD1 25 26 LPD5
35 36 27 28
35 36 AD30 LAN_PME# 29 27 28
37 38 29 30
R288 AD27 37 38 R02 R255 MOUNTED 31,35 LPTERR# LPD0 29 30
39 40 31 32 EC_SMD2 4,24,29
100_0402 AD25 39 40 AD28 31 32
41 42 33 34 EC_SMC2 4,24,29
AD22 LAN_IDSEL 41 42 AD26 31,35 LPTAFD# 33 34
1 2 43 44 31,35 LPTSTB# 35 36 SUSP# 29,33,37,41,42
43 44 AD24 35 36
18,21,22,23 CBE#3 45 46 37 38
AD23 45 46 MINI_IDSEL AD18 37 38
47 48 1 2 17 DOCK_BLUE 39 40 ME_OFF# 32
47 48 R128 100_0402 39 40
49 50 41 42
AD21 49 50 AD22 41 42
51 52 17 DOCK_GREEN 43 44 DOCK_DDCC 17
AD19 51 52 AD20 43 44
53 54 45 46 DOCK_VSYNC 17
53 54 45 46
55 56 PAR 18,21,22,23 17 DOCK_RED 47 48 DOCK_HSYNC 17
AD17 55 56 AD18 47 48
57 58 49 50 DOCK_DDCD 17
57 58 AD16 49 50
18,21,22,23 CBE#2 59 60 51 52 MSEN# 13,17,29
59 60 13,17 CRMA 51 52
61 62 53 54
18,20,21,22,23 IRDY# 61 62 13,17 LUMA 53 54
63 64 FRAME# 18,20,21,22,23 55 56 DCD1# 35
CLK_PCI_MINI CLKRUN# 63 64 55 56
65 66 TRDY# 18,20,21,22,23 57 58 DSR1# 35
18,20,21,29,35 CLKRUN# 65 66 13,17 COMPS 57 58
67 68 STOP# 18,20,21,22,23 27 DOCK_HP_OUT_PLUG 59 60 TXD1 35
18,20,21,23 SERR# 67 68 59 60
69 70 61 62 RXD1 35
1

69 70 27 INTMICOFF# 61 62
18,20,21,22,23 PERR# 71 72 DEVSEL# 18,20,21,22,23 63 64 DTR1# 35
R287 71 72 63 64
73 74 27 LINEOUTR 65 66 CTS1# 35
10_0402 18,21,22,23 CBE#1 AD14 73 74 AD15 65 66
75 76 27 LINEOUTL 67 68 RTS1# 35
75 76 AD13 67 68
77 78 69 70 RI1# 35
AD12 77 78 AD11 69 70 RIA0
79 80 71 72
AD10 79 80 27 DOCK_MIC 71 72
12

81 82 73 74
C444 81 82 AD9 73 74
83 84 75 76
AD8 83 84 25 SPDIFO 75 76
85 86 77 78
15PF_0402 AD7 85 86 CBE#0 18,21,22,23 77 78 +5VS
87 88 23 RJ45_TXX+ 79 80
3 87 88 AD6 79 80 3
2

89 90 23 RJ45_TXX- 81 82
AD5 89 90 AD4 +3V +3VALW 81 82
91 92 83 84
91 92 AD2 83 84
93 94 23 RJ45_RXX+ 85 86 +5VALW
AD3 93 94 AD0 85 86 PS2_CLK
95 96 23 RJ45_RXX- 87 88 PS2_CLK 29

1
W=30mils 95 96 87 88 PS2_DATA
+5VS_MINIPCI 97 98 89 90 PS2_DATA 29
AD1 97 98 R328 89 90 KBD_CLK
99 100 19,31 USBP2- 91 92 KBD_CLK 29
99 100 100K_0402 91 92 KBD_DATA
101 102 19,31 USBP2+ 93 94 KBD_DATA 29
101 102 Q37 93 94
18,25 AC_SYNC 103 104 95 96

2
103 104 95 96

G
105 106 2N7002 97 98
18 SDATA_IN1 105 106 AC_SDATAO 18,25 19,31 OVCUR#0 97 98 USBP0- 19,31
R289 2 1 22_0402 CONA#

2
18,25 AC_BITCLK 107 108 30 CONA# 99 100 USBP0+ 19,31
107 108 99 100

101
102
103
104
+3.3VAUX 109 110 21 PCM_RI# 3 1
109 110 AC97_RST# 18,25

D
111 112
25 MOD_AUDIO_MON 111 112

101
102
103
104
113 114
2
113 114 +3.3VAUX
G

115 116 MOD_AUDIO_MON


25 MD_MIC 115 116
117 118
1

117 118 MODEM_RI#


119 120 3 1
C450 MODEM_RI# 119 120 DOCKING 100
S

121 122
W=30mils 121 122 W=40mils
+5VS 1 2 123 124 +3.3VAUX
15PF_0402 L24 123 124 Q31 2N7002
2

FBM-11-160808-121 127 129


127 129 29 RING#

+5VS_MINIPCI Mini-PCI SLOT +5VS


1

D
2 RIA0
Q38 G
2N7002 S RP108
+3.3VAUX +3VALW PS2_CLK
3

4 5
1

Q26 PS2_DATA 3 6
R327 KBD_DATA 2 7
SI2301DS 100K_0402 KBD_CLK 1 8
4 4
S
D

1 3
8P4R_10K_0804
2
G
2

EN_WOLR# 29

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 34 of 45
A B C D E
A B C D E

SUPER I/O SMC FDC47N227

1 1

+3VS

1
R392 U32
4.7K_0402 LAD0 20 68 LPD0
18,29,36 LAD0 LAD0 PD0/INDEX# LPD0 31,34
LAD1 21 69 LPD1
18,29,36 LAD1 LAD1 PD1/TRK0 LPD1 31,34
LAD2 22 70 LPD2
18,29,36 LAD2 LAD2 PD2/WRTPRT# LPD2 31,34
LAD3 LPD3

2
18,29,36 LAD3 23 LAD3 PD3/RDATA# 71 LPD3 31,34
72 LPD4
PD4/DSKCHG# LPD4 31,34
LFRAME# 24 73 LPD5
18,29,36 LFRAME# LFRAME# PD5 LPD5 31,34
25 74 LPD6 RP141 +3VS
18 LDRQ# LDRQ# PD6/MTR0# LPD6 31,34
75 LPD7
PD7 LPD7 31,34 INDEX#
4,6,13,18,21,22,23,29,34,36 PCIRST# 26 PCIRST# 1 8
27 79 LPTBUSY RDATA# 2 7
13,18 SUS_STAT# LPCPD# BUSY/MTR1# LPTBUSY 31,34
78 LPTPE DSKCHG# 3 6
PE/WDATA# LPTPE 31,34
+3VS 1 2 10K_0402 50 GPIO12/IO_SMI# SLCT/WGATE# 77 LPTSLCT
LPTSLCT 31,34
WP# 4 5
R349 1 2 17 81 LPTERR#
IO_PME# ERROR#/HDSEL# LPTERR# 31,34
18,20,21,29,36 SERIRQ SERIRQ R394 10K_040230 80 LPTACK# 8P4R_4.7K_0804
SIRQ ACK#/DS1# LPTINIT# LPTACK# 31,34
18,20,21,29,34 CLKRUN# 28 CLKRUN# INIT#/DIR# 66 LPTINIT# 31,34
CLK_PCI_SIO 29 82 LPTAFD# RP137 +3VS
12 CLK_PCI_SIO PCICLK AUTOFD#/DRVDEN0# LPTAFD# 31,34
83 LPTSTB#
STROBE#/DS0# LPTSTB# 31,34
CLK_SIO14 19 67 LPTSLCTIN# CTS2# 1 8
12 CLK_SIO14 CLK14 SLCTIN#/STEP# LPTSLCTIN# 31,34 DSR2# 2 7
48 100 DCD2# 3 6
GPIO10 DTR2# CTS2# RI2#
54 GPIO15 CTS2# 99 4 5
2 55 98 2
GPIO16 RTS2# DSR2#
56 97 8P4R_4.7K_0804
GPIO17 DSR2#
57 GPIO20 TXD2 96
58 95 RXD2 +5VS
GPIO21 RXD2 DCD2# RP135
59 GPIO22 DCD2# 94
1 2 6 92 RI2# DCD1# 4 5
+3VS R334 10K_0402 GPIO24 RI2# DSR1#
32 GPIO30 3 6
33 89 DTR1# CTS1# 2 7
GPIO31 DTR1# CTS1# DTR1# 34 RI1#
34 GPIO32 CTS1# 88 CTS1# 34 1 8
35 87 RTS1#
GPIO33 RTS1# RTS1# 34
36 86 DSR1#
GPIO34 DSR1# DSR1# 34
37 85 TXD1 8P4R_4.7K_0804
GPIO35 TXD1 TXD1 34
38 84 RXD1
GPIO36 RXD1 RXD1 34
39 GPIO37 DCD1# 91 DCD1# 34
40 90 RI1# RXD1 2 1
13 PID0 GPIO40 RI1# RI1# 34
41 R359 1K_0402
13 PID1 GPIO41
13 PID2 42 GPIO42 IRMODE/IRRX3 63 IRMODE 32
43 61 RXD2 1 2
13 PID3 GPIO43 IRRX2 IRRX 32
44 62 R381 1K_0402
13 PID4 GPIO44 IRTX2 IRTXOUT 32
45 GPIO45
46 16 RDATA#
GPIO46 RDATA#
47 GPIO47 WDATA# 10
WGATE# 11
CLK_SIO14 CLK_PCI_SIO 1 2 51 12
R335 10K_0402 GPIO13/IRQIN1 HDSEL#
52 GPIO14/IRQIN2 DIR# 8
2

1 2 64 9 +3VS
R333 10K_0402 GPIO23/FDC_PP STEP# R393 1K_0402
R391 R375 DS0# 5
10_0402 18 13 INDEX# TRACK0# 2 1
@33_0402 +3VS VTR INDEX# +3VS
4 DSKCHG#
DSKCHG#
1

3 WP# 3
53 VCC WRTPRT# 15
TRACK0#
21

21

65 VCC TRK0# 14

2
C559 C546 93 VCC MTR0# 3
R354
2

15PF_0402 @22PF_0402 DRVDEN0 1


7 VSS @1K_0402
1

31 VSS DRVDEN1 2
C488 C535 C561 C489 60 VSS

1
4.7UF_10V_0805 .1UF_0402 .1UF_0402 .1UF_0402 76 VSS GPIO11/SYSOPT 49

1
SMsC LPC47N227 Base I/O Address
* 0 = 02Eh R352
1 = 04Eh 1K_0402

2
4 4

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND SCHEMATIC, M/B LA-1302
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 401216
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, May 29, 2002 Sheet 35 of 45
A B C D E
5 4 3 2 1

+3VS

+3VS SD_CLK

1
2
R124 R123
R243
1M_0402 1M_0402
1 @33_0402 SDLED

1
+3VALW
C164 C163
SDPWCTL# +5VALW

2
.1UF_0402 10UF_10V_0805

1
C427
2

D 2 D
@10PF_0402

36
35
34
33
32
31
30
29
28
27
26
25
U15 U21D

14
14 74LVC14 U29E

SDPWCTL#

SCC4
SCC8

MSPWCTL#
VSS
MSCLK
MS1
MS2
MS3
MS4
SDLED

MSLED
74HCT14
9 8 11 10

+3VALW POWER

7
R122
SD_CLK 1 2 37 24
SD1 SDCLK MS5 CLK_SD48
10_0402 38 SD1 XIN 23 CLK_SD48 12
SD2 39 22 +5VALW
SD2 XOUT +3VS
+3VS 40 VDD3V SCRST# 21
SD3 41 20
SD4 SD3 SCIO +5VS
42 SD4 SCCLK 19

2
SD5

14
43 SD5 SCPSNT 18 U29F
LAD3 44 W83L518D (LPC) 17 R513
18,29,35 LAD3 LAD3 SCPWCTL# R514 74HCT14
LAD2 45 16 10K_0402
18,29,35 LAD2 LAD2 SCLED @10K_0402
LAD1 46 15 13 12
18,29,35 LAD1 LAD1 VDD
LAD0 47 14 1 2
18,29,35 LAD0 LAD0 SCBLED MMC_DET#

1
18,20,21,29,35 SERIRQ 48 SERIRQ SCBPWCTL# 13
C C
SCBLED PIN HIGH FOR 2E

7
CLK_PCI_SD CLK_SD48

RESERVED

SCBPSNT
LFRAME#

SCBRST#
2

SCBCLK
PCICLK

lESET#

SCBC4
SCBC8

SCBIO
PME#
R132 R126

VSS
@33_0402 @33_0402

10
10
11
12
1

1
2
3
4
5
6
7
8
9
C177 C166 9 8
@10PF_0402 @10PF_0402 CLK_PCI_SD
12 CLK_PCI_SD
18,29,35 LFRAME#
4,6,13,18,21,22,23,29,34,35 PCIRST# U57C
+3VS 74AHC125

13
1
8
7
6
5
12 11
B
R121 B
RP17
33K_5%_0402
8P4R_4.7K_0804
U57D

2
+3VS +3VS SD_3VCC
R03 PIR20 74AHC125
1
2
3
4
R568
3.3K_5%_0402 JP16
1

SDLED 1 2 SD_WRPT 10 11
Wr_Pt Wr_Pt_Vss

13
VSS 12
R250 U20 SD4 8
10K_0402 SD3 SD4
7 SD3
3 VIN VOUT 1 6 Vss2 12 11
SD_CLK
2

4 VIN/CE VOUT 5 5 SDCLK


SD2 4
SD1 Vdd
2 GND 3 Vss1 U28D
1

SD5 2 SD2 74LVC125


1

D
RT9701-CB 1 SD1
SDPWCTL# 2 Q20
G 2N7002
2

R127 9 SD5 MMC_DET# 13


S 470K
SD_SOCKET C741
3

C425 FOXCONN SD SOCKET


4.7UF_10V_0805
@1UF_10V_0805
A A

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Custom401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 36 of 45
5 4 3 2 1
A B C D E

5V/3V/12V
+5VALWP B1+
PC12
PC4 PC6 B1+ 2.2UF_0805_16V PR2 PC9 B1+ PC1
@0.1UF_0805_25V 4.7UF_1210_25V 15K_1% 0.1UF_0805_25V @4.7UF_1210_25V
B+ 1 2 PC7

3
0.1UF_0805_25V
PL1 VL DAP202U PC3
1 HI1812V101R-00 8A/100 Ohms PD1 2200PF 1

8
7
6
5

5
6
7
8
PR1

D
D
D
D

D
D
D
D
PC10 PQ2 15K_1%

1
470PF_0805_100V SI4800 PC8 PQ3
PC5 PC11 0.1UF_0805_25V PC14 SI4800 PC2

G
S
S
S

S
S
S
4.7UF_1210_25V 4.7UF_1206_16V 4.7UF_1210_25V
PR3 0.1UF_0805_25V

SNB1
22_1206 PC13

1
2
3
4

4
3
2
1
0.1UF_0805_25V PL2

22

21

25

24

23
1 2 4 1 5VSW 30 16 3VSW 2 1

VREF5

TRIP1

TRIP2
REG5V_IN

VCC
LH1 LH2
PR4 0 PR5 0 SLF12565_10UH
PD2 5VDH 29 17 3VDH

5
6
7
8
EC11FS2 OUT1_U OUT2_U
2 3
SNB2

8
7
6
5
PR6 0 PR7 0

D
D
D
D
28 PU1 18

D
D
D
D
LL1 LL2
PT1 TPS5120

G
S
S
S
PC15 CST12057T_10UH 5VDL 27 19 3VDL
OUT1_D OUT2_D

G
S
S
S
2.2UF_1206_25V PQ1

SKIP/PWM #
SI4810

4
3
2
1
PQ4

1
2
3
4
26 20

5V_STBY
OUTGND1 OUTGND2 PC17 SI4810

SOFT1

SOFT2
STBY1

STBY2

PGOD
PC16 @1000PF

INV1

INV2
GND

SCP
REF
FB1

FB2
@1000PF

CT

10

11

12

13

14

15
1

9
PR9
PU2 PR8 35.7K_1%
2 XC6202-SOT-89 2

SCP
3

PC25
@47UF_D_6.3V_SP 57.6K_1% PR10 PR11 PC29
Vin

+12VALWP 330 330 @47UF_D_6.3V_SP


1 +5VALWP +3VALWP +3VALWP
Vout +5VALWP
GND

1
0.85VREF
PR12 PR13
4.7UF_1206_16V

1
+ + PC21 430 PC26 220 PC22 PD4

1
3300P 2200PF 4700P + + + EP10QY03
PD3 PC19 PC27
2

2
PC30

EP10QY03 PZD1 VL 47P PC20 2200PF

2
RLZ6.2C 0.1UF_16V PC23 +3VALWP PZD2
2

2
10P PC18 RLZ4.3B

MAINP
PC24 PR14 0.01UF
150UF_D_6.3V_TPB 11.5K_1% PC28
0.85VREF @150UF_D_6.3V_TPB
PR17 PR15 PR16 PC155
100K 12.1K_1% @100K 4SP560M
MAINP

+5V : 6.81A ~ 9.03A PC31 0.01UF


+3.3V:Ipeak=9.22A~12.13A
1 PC32
40 B+_READY .047U_16V

1
100K
PC33

2
29,33,34,41,42 SUSP# 2
0.01UF

3 100K PQ5 3
CPU thermal protection at 89 degree C (1.301K Ohms) DTC115EUA
3

Recovery at 44 degree C (5.084K Ohms)

VL
PC34
1

0.1UF_16V D PQ6 VIN


PACIN 2 2N7002
38,40 PACIN
VL G
1

VL S
SCP PC35
3

0.1UF_0805_25V
2

3
PR22
PR20 47K_1% PQ7 2 VL
TP0610T
2K_1% PR23
PR24 47K_1% MAINP PR21
19.1K_1% 10K
8

1
3 +
1 MAINP MAINP 4,40 PR25
2 - 330
10K_1%_0603_SL210021F20 FCE

PU3A RTCVREF
4

LM393M

PR26
100K
4 4
0.22UF_0805_16V

PC36 PR27 VL
1

D
1000PF 2
PH1

100K_1% PQ8 G
PC37

2N7002 S
PR144
3

PR28 D 47K +5VP


100K_1% 2
PQ9 G Compal Electronics, Inc.
2N7002 S Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
3

SCHEMATIC, M/B LA-1302


AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 37 of 45
A B C D E
A B C D E

P2
75W * 10% = 67.5W = 19V * 3.55A
PZD8
RLZ24B Air : 50W/19V*0.025*20=1.3V <--- THROTTLE
Charger
1 2
B++
P3 B+
PQ10 PQ11 PR29 PC38 PC39 PC41 PQ12
FDS4435 FDS4435 0.025_2512_1%
VIN 4.7UF_1210_25V 4.7UF_1210_25V 2200PF FDS4435
8 1 1 8 2 1 1 2 1 8
7 2 2 7 2 7

2
6 3 3 6 3 6

1
5 5 PL3 5
1

1 + HI1812V101R-00 8A/100 Ohms 1

1
+3VALWP

1
PR30 PR31 PC154

4
PR32

1
10K 200K 100UF_EC_25V

2
47K
PD29 1 2
PC135 PC40 VIN
2

@RB751V 4.7UF_1210_25V @0.1UF_0805_25V

2
PR142 PR33 PR34

2
1
PD5 0 PU4 0
MB3887 0
1SS355
PR35 1 2 1 24

3
2
1
ACOFF# 150K 29 THROTTLE -INC2 +INC2 ACOFF#

1
1 2

1
2
2 1 2 23 PC42
PR143 OUTC2 GND
4
29 ADPREF 86.6K_1% PC44 PR36 2200PF
PR37 1 2 0.1UF_16V 10K 3 22 CHG_CS 1 2 PQ13
100K
1

47K D PQ15 +INE2 CS FDS4435 2


2N7002 ACOFF 29
37,40 PACIN 1 2 2 3.33V

1
G PR38 4 21 1 2
-INE2 VCC(o)

1
S @28K_0.5% 100K PQ14
PC43 DTC115EUA
3

5
6
7
8
PR39 0.1UF_0805_25V LXCHRG

3
1 2 1 2 5 20
100K_1% PC47 FB2 OUT PC46
ACON 0.1UF_16V PC45 PR40 0.1UF_16V

2
40 ACON
4700P 4.7K

2
6 19 1 2
VREF VH PC49

1
0.1UF_0805_25V

1
1 2 1 2 7 18 1 2 PL4
PR42 FB1 VCC SLF12565_22UH PR44 PC50 PC53
@24.9K_1% PC48 PR41 0.02_2512_1% 68UF_EC_25V 4.7UF_1210_25V

2
2 2200PF 1K 2
8 17 1 2 2 1 1 2
-INE1 RT
PR45 PR43

2
1 2 9 16 68K ACON 40 VMB
29 IREF +INE1 -INE3

1
+

ACON
1
1M_1% 2 1 10 15 1 2 1 2 PD6
PR48 OUTC1 FB3 EA60QC04

1
499K_1% PR46 PR47 PC51

2
PC54 10K 330K 1500P

3
11 14
0.01uF OUTD CTL
2

2 1 2
12 13 PC52
-INC1 +INC1 4.7UF_1210_25V
IREF=1.201*Icharge PC55
56PF
IREF=0~3.3V
Set charge current 2.74A for LI-ION +INC1
(3960mAH*0.7C=2.77A)
BATT+
2 1 2 1
1

PR52 PR50 PR51


147K_0.1% 316K_0.1%
+3VALWP 324K_0.5%

Charge voltage :
S

D
2

3 1 2 1
1

VL 1 2 (4.25V/Cell)
1

PD7 PQ16 PR53


3 PR55 2N7002 316K_0.1% 3
@RB751V G PC56
LI-4S:17.43V
300K_0.5% 2
22PF
LI-3S:13.22V
8
2

+ 3
29 AVBATT 2 1 1
1

- 2 2 1 VL
VL
PR56 PR58
1

0 LM358 PR57
1

PU9A 100K_0.5% PC57 100K CHG_CS


4
1

1
0.01UF PC58
PR148 0.1UF_16V
2

PQ17 PR159
2

PC59 2.2K DTC115EUA 100K


10UF_1206_6.3V
1
2

2
1
PR59 D
100K
2 LI-3S/LI-4S(NI)# 2
36.5K_1% LI-3S/LI-4S# 29,41 G
1

D
S

1
100K PQ46
2

3
2
G 2N7002
3

S
PQ18 ALI/MH# 29,41
3

100K
2N7002 2 FSTCHG 29

PQ47 100K
DTC115EUA

3
LI-4S:0.1381*BATT+ = AVBATT
4 LI-3S:0.1794*BATT+ = AVBATT 4

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 38 of 45
A B C D E
A B C D E F G H

PM_GMUXSEL 18
CPU-CORE
+3VALWP

PQ19

2
2N7002 B+
PC61 PC63 PC65
3 1 4.7UF_1210_25V 4.7UF_1210_25V 2200PF
CPU_B1+ 1 2
2

1 PR60 1

1
30K 2 1 +3VALWP PL5
HI1812V101R-00 8A/100 Ohms

2
1 PR61
9.31K_1%
1

2
1
PR62
12.7K_1% PR63 +5VALWP
2

5
6
7
8

5
6
7
8
PQ20 10 PC60 PC62 PC64 PC66

1
1

2N7002 4.7UF_1210_25V 4.7UF_1210_25V @4.7UF_1210_25V @0.1UF_0805_25V


3

2
1 2 TG1 4 4
100K
2 PR64 0
PQ21 PQ22 PL16

2
PM_STPCPU# PC67 IR7811A IR7811A ETQP1H0R6BFA
100K 1UF_0805_25V PD8 2 1
EP10QY03
1

PQ23 PU5 SC1474 PL7


3

3
2
1

3
2
1
DTC115EUA PR65 @0R7D-CPI PR66
30.1K_1% CPULX1 CORE1 2

1
38 1 1 2 1 +CPU_CORE
V5_1 DRN1

1
20 2 PQ24 PQ25 1mR

5
6
7
8

5
6
7
8

1
V5_2 TG1 SI4362 SI4362 PR146
2

PC68 3 BST1 1 2 PC69 2.2_1206 PD9


4.7UF_0805_10V BST1 1UF_0805_25V EC31QS04
37 PR67 2.2 BG1 4 4 PD10
PC71 BG1 PC72 SMAL340

2
36
4.7UF_0805_10V PGND1 4.7UF_0805_10V

2
34
ISH1
22
PGND2 PC136
33
CL1 470P
2 2
32
CMP1

3
2
1

3
2
1
PQ27 7 31
2SB1132 OSB CLRF
4 30
+1.2VP SOT-89 VIDFB VCCA
2 3 29 PR68 10K
+ +2.5VALWP CMPRF
+3VALWP 2 1
PC73 25 PR71
GND
1

4.7UF_1210_25V PC74 619_1% 2 1


PR72 10UF_1206_6.3V
1

24 2 1
@10K DAC PR69 332_1%
2 1
5 23
VIDB CORE PR70 475_1%
PC75 PC76
2

16 15
PWRGD SS 1000PF 330PF PR73 475_1%
VGATE 32 PR76 2 1 0 10
VID4 1 2 1
4 CPU_VID4 PC78 PC77
PR77 2 1 0 11 0.1UF_16V 0.01U 2 1
4 CPU_VID3 VID3
2

PR78 2 1 0 12 19 PR74 392_1%


4 CPU_VID2

1
VID2 DRN2
PR79 2 1 0 13 18 PR141 PR75 1K
4 CPU_VID1 VID1 TG2 PC82 PC79 PC80 PC81 51K_1%
PR80 2 1 0 14 17 BST2 330PF 330PF 180PF 180PF
4 CPU_VID0 VID0 BST2
PR81 0 PC83

2
29,33 VR_ON 2 1 35 21
EN BG2 100PF PR85 10K
PR82 2 1 0 6 26 1 2
18 PM_DPRSLPVR DPRSL ISH2
2 1 8 27 2 1
HYS CL2
3 PR83 21.5K_1% 9 28 1 2 PR86 332_1% 3
VDPR CMP2 B+
PQ28 PQ29 PR87 475_1% PC90 PC133
1

IR7811A IR7811A 4.7UF_1210_25V 2200PF


1

PC84 CPU_B2+ 1 2
PR84 PC85 0.1UF_16V

5
6
7
8

5
6
7
8

1
30.9K_1% 0.01U PC86
2

VID4,3,2,1,0 :
PL15
1.30V: 0 1 0 0 1 180PF HI1812V101R-00 8A/100 Ohms
2

2
4 4
1.25V: 0 1 0 1 0
2

1.20V: 0 1 0 1 1 PR88 PC87 PC89


4.7UF_1210_25V 4.7UF_1210_25V PC91 PC134
2.2 PC88 4.7UF_1210_25V @0.1UF_0805_25V
PR89 @4.7UF_1210_25V
TG2 PR90
1

3
2
1

3
2
1
1 2
GMUXSEL CPUSTP# DPRSLPVR VCORE' Offset VCORE +5VALWP 1mR
2 1 0 CPULX2 2 1CORE2 2 1 +CPU_CORE
PM 1 1 0 1.30V 0% 1.30V
PL8

1
PM D-S 1 0 0 4.62% 1.239V PD11 PC92 @0R7D-CPI

1
EP10QY03 1UF_0805_25V PQ30 PQ31 1 2

5
6
7
8

5
6
7
8
BM 0 1 0 1.20V 2.0% 1.176V SI4362 SI4362 PR147 PC94
2.2_1206 PL17 4.7UF_0805_10V
BM D-S 0 0 0 4.62% 1.144V ETQP1H0R6BFA
BG2

2
4 4
PD12

2
Deeper X 0 1 1.0V 0% 1.0V
EC31QS04

PC137
470P
4 4
A1 CPU Silicon set DSoff =1.2V
3
2
1

3
2
1
PR83=13.3K,PR84=39.2K <-------Must fine-tune
A2 CPU Silicon set DSoff =1.0V
PR83=21.5K,PR84=30.9K
For A1,A2 CPU Silicon stepping
PQ19 is nopop, PR61=0, PR62=13K and PR65 is nopop Compal Electronics, Inc.
For B0 CPU Silicon stepping Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
PQ19 is pop, PR61=9.31K,PR62=12.7K and PR65=30.1K SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 39 of 45
A B C D E F G H
A B C D E

VIN
VIN detector
Detector
PL10
PCN1 PD13 PC95 PC96 HI1812V101R-00 8A/100 Ohms
@BYS10-45 100PF 1000PF
16.90 17.55 18.22
1
ADPIN
1 1 2 16.46 17.08 17.72

1
1
3 PR91
2 @10_1206

1
3

1
2
PC97 PR95

2
1 1
SINGATRON 2DC-S026B301 100PF PC98 1M_1%

1
1000PF

2
1 2
1 2 ADPGND 1 2
PZD3 VIN VS VIN
PL11 @RLZ24B
PJP1 @HI1812V101R-00 8A/100 Ohms

1
PR97

1
3MM-NEW PC99 PR96 10k
PR92 0.01UF 10K 1 2
82.5K_1% PU6A ACIN 19,29
PR94 LM393A

2
8
22K

2
1 2 3 +
1
3.2V
PACIN 37,38
2 -

1
1

1
PC100 PR93
1000PF 20K_1% PC101 PZD4 PR98

4
0.1UF_16V RLZ4.3B 10K

2
2

2
PR100
200_1206 2 1 RTCVREF
1 2 VS
PR99
PD14 10K 3.3V
PR101
RLS4148
@200_1206
2 1 1 2
VIN PR145
2
1.5K_1206 2

1 2
2 1
PR102
1.5K_1206

PJP4 VS1 1 2
@
PD15 PR103
RLS4148 1.5K_1206
PD16 2 1 1 2
VIN B+
RB751V

VMB 2 1 PR104
1.5K_1206
+5VP 1 2

PR113
PQ33 10K
TP0610T
CHGRTCP 2 1 3 1 1 2 PR105 PR106
10K 1M_1%
4.4V

1
+5VP 1 2 2 1
1

PZD5 PR107
1

RLZ4.3B 499K_1%
2

PR112 PR114 VS
100K PC106 PZD6
27K PD17
@0.1UF_0805_25V PC107 RLZ5.1B
2

2
RB751V
0.1UF_16V PU6B
2

+ 5
1

32 51ON# 1 2 2 1 7
4,37 MAINP
3
- 6 3

1
PR111 PC105

1
0.1UF_16V
22K LM393A PR108

1
PC104
0.22UF_1206_25V PR110 499K_1% PC102
PD18
PC103 10K PR109 1000PF
RB751V
1000PF 215K_1%

2
2

2
2 1
38 ACON

2
RTCVREF

37 B+_READY
3.3V

1
PR115
47K PACIN 37,38
3.3V 2 2 1 PACIN
CHGRTCP PQ34
RTCVREF 2N7002
PR116

3
PU7

1
S-81233SGUP 200_0805

1 2 1 2 RTCVREF 3 2 100K
1

CHGRTC 3 2
2 +5VALWP
PR137 PR117 PQ35
Precharge detector
1

200 200 PZD7 DTC115EUA


PC109 RLZ16B 100K
4.7UF_1206_16V 15.34 15.90 16.48
1

3
13.13 13.71 14.20
4 4

PC108
1UF_0805_25V

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 40 of 45
A B C D E
A B C D E

+2.5V +-5%

D
PJP3 PQ36 6

S
+3VALWP 2 1 @SI3445DV 4 5
2
1
DDR/Connector

G
PJP2 PD21
+5VALWP @SMAL340 +2.5VALWP

3
2 1
PQ37 PD20 PL12 PC111 +2.5VALWP
SI3445DV SMAL340 @220UF_D_4V_TPB

D
@ 6 LX2.5 2 1 PR118

S
4 5 10

1
2 SLF12565_4R2N5R5 2 1

1
1 + +

1
PR120

1
1 1
PR119 23.2K_1% PC112
1

1
+ PD19 PQ38 2M 150P PC114

2
RB751V HMBT2222A 0.1UF_0805_25V PC116

2
1 16

1
PR121 VCC1 VCC2 0.1UF_0805_25V

2
1
10K
2

2
1 2 2
3 PC110
PR122 220UF_D_4V_TPB

2
2 15 1 2
1

1
1K PVDD1 PVDD2
PC117 VL PC118 PR123 PL13 +1.25VP

1
4700P 0.1UF_16V 11.8K_1% PC120 PD22 TPRH6D38-5R0M
PC113 PC115 4.7UF_1206_16V PU8 @EP10QY03 LX1.25
2

2
3 14 2 1
47UF_D_6.3V_SP 10UF_1210_16V VL1 VL2
PU3B CM8500

2
8

1
LM393M

1
3 + 5 4 13
PQ39 PGND1 PGND2 PD23 + +
2 7
2SA1036K 1 0.85VREF @SMAL340

2
- 6 1 2

1
PR124

2
5 12
PC124 47K AGND1 AGND2

4
4700P PC121 PR126
VL PR125 4.7UF_1206_16V 100K

2
+2.5VALWP 1 2 6 11 2 1
SD VFB

100K +2.5VALWP 1 2 2 1 PC123

1
7 10 @220UF_D_4V_TPB
PR128 VIN/2 VCCQ PR127 PC122

1
@100K PC125 1K 220UF_D_4V_TPB
PR129 1000PF
100K

1
2 @0 PC127 8 9 PC126
29,33,34,37,42 SUSP# AGSEN AGND
1000PF 0.1UF_0805_25V

2
100K
2
2 2

100K

2
1
PQ41 100K PQ40

3
@DTC115EUA DTC115EUA

3
100K
2 SYSON 29,33

100K
PQ42
@DTC115EUA

3
PL14
+3VALWP HI1812V101R-00 8A/100 Ohms BATT+

VL +2.5V
VMB 1 2
PR130
15K
PR131 PCN2
0.1UF_16V

1K BATT+
1

1 8
PC132

PR135 29,38 LI-3S/LI-4S# B/I 2


SDREF 100K_0.5% +3VALWP TS 3
SLD 4
2

PR132 25.5K_1% SLC 5


3
6
2

3
8

PR138 7 9
1
3 0 + 5 1 3
PR133 BATT CONN.
7 PD25 2 PR134
1K

PC128
7,9 SDREF @BAS40-04

0.01UF
- 6 2

PC129
1000PF
1K
1

LM358 PD24
@BAS40-04
PC131 PU9B PR136 PC130
4

10UF_1206_6.3V 100K_0.5% 0.1UF_16V


29 ABATT_TEMP
+5VALWP
2

2 PR139 100

PD27
@BAS40-04
29,30 EC_SMD1
+5VALWP
3

2 PR140 100

PD28
@BAS40-04

4 29,30 EC_SMC1 4

Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
SCHEMATIC, M/B LA-1302
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
B 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC. 401216
Date: Wednesday, May 29, 2002 Sheet 41 of 45
A B C D E
5 4 3 2 1

+1.8V+-5%

+1.8VALWP
PQ45
+5VALW SI3445DV PL18
TPRH6D38-5R0M

D
6 LX18 2 1

S
4 5
2

1
D 1 D

1
PR152

G
11.5K_1% PC143 + PC144
1

1
PD30 PQ44 PC141 470P 150UF_D_6.3V_KO

3
PC138 RB751V PR149 HMBT2222A PD31 0.1UF_16V

2
10UF_1210_25V 1K PR150 SMAL340

2
1
10K
2

2
1 2 2
3

2
1

VL
PC139 PR153

1
2200PF 10K_1%
PR151
2

1
2M
PC140
0.1UF_16V
PU10A

2
8
LM393A
3 + 3 PR154
PQ43 2 1 100K
2SA1036K 1 - 2 2 1 0.85VREF

1
PC142
0.01UF

2
C C

+1.5V+-5%

+1.5VP
PQ50
+5VALW SI3445DV PL19
TPRH6D38-5R0M
D

6 LX15 2 1
S

4 5
2
1 1
2

1
PR163
G

7.87K_1% PC152 + PC153


1

PD32 PQ49 PC150 470P 150UF_D_6.3V_KO


3

PC148 RB751V PR160 HMBT2222A PD33 0.1UF_16V

2
4.7UF_1206_25V 1K PR161 SMAL340
2

2
1
10K
2

1 2 2
3
2
1

PC149 PR164
1

2200PF 10K_1%
B PR162 B
2

VL 2M

PU10B
2
8

LM393A
3 + 5 PR165
PQ48 2 7 100K
2SA1036K 1 - 6 2 1 0.85VREF
4

PC151 VL
0.01UF
2

PR166
1

100K
2

100K
2
1

PQ51 100K
DTC115EUA
3

100K
2 SUSP# 29,33,34,37,41

A 100K A
PQ52
DTC115EUA
3

Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
SCHEMATIC, M/B LA-1302
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC. 401216
Date: Wednesday, May 29, 2002 Sheet 42 of 45
5 4 3 2 1
A B C D E

Voltage Rails
Power Plane Description S1 S3 S5 FUNCTION RELATED POWER NET NAME

VIN Adapter power supply (19V) N/A N/A N/A Pullhigh,Switch,DOCKING,VL,AC IN. VIN1
B+ AC or battery power rail for power circuit. N/A N/A N/A Pullhigh,Switch,B1+,PWR MB3878,PWR MAX1718. B++,B1+,CPU_B1+,CPU_B2+
1 +CPU_CORE Core voltage for CPU ON OFF OFF Pullhigh,Switch,NB,CPU. 1

+2.5VALW 2.5V always on power rail ON ON ON* Pullhigh,Switch,NB,DDR SODIMM. LANVDD


+2.5V 2.5V power rail ON ON OFF Pullhigh,Switch,NB,DDR SODIMM.
+VCCHCK,+VCCMCK,+VCCMDLL,+2.5VRGBPLL,+2.5VRGBDAC,+2.5VSBRAM
+2.5VS 2.5V switched power rail ON OFF OFF Pullhigh,Switch,NB,CLK Buffer,SB,LANVDD. ,+SB_PLLVDD
+3VALW 3.3V always on power rail ON ON ON* Pullhigh,Switch,PCMCIA Switch,LAN,CMOS,KBD CTRL, +3VCD(+3VCD_A), LANIO, +3.3VAUX
SMBus,BIOS,BlueTooth, USB
+3V 3.3V power rail ON ON OFF Pullhigh,Switch,SB,PCMCIA CTRL,CMOS,PANEL. LCDVDD,+3V_CB
+3VS 3.3V switched power rail ON OFF OFF Pullhigh,DJ,Switch,LOGIC,KBD,SIO,LAN,1394, VDDC,+3VS_MINIPCI,LCDVDD(LCDVDD_1),TV_DVDD,LVDS_PLLVCC(LVDS_VCC)
+5VALW 5V always on power rail ON ON ON* Pullhigh,Docking,DJ,Switch,BT,LOGIC,AVDD(Audio),Thermal,FAN. +5VCD(+5VCD_1,+5VCD_2),AVDD(AVDD_AC97),S1_VCC,+5VAMP,INV_B+
+5V 5V power rail ON ON OFF Pullhigh,Switch.
+5VS 5V switched power rail ON OFF OFF Pullhigh,Docking,MiniPCI,+5VALW, +5VFAN1,+5VFAN2,CRTVDD,+5V_PRN,+5VS_MINIPCI,USB_AS(USB_A),
USB,T/P,LPT,DJ,HDD,TV,CRT,Inverter,Switch,VID. USB_BS(USB_B),TV_VDD,TV_AVDD
+12VALW 12V always on power rail ON ON ON* PC CARD,Pullhigh,Switch,MOS
+12VS 12V switched power rail ON OFF OFF Switch,Power MOS.
+RTCVCC RTC power ON ON ON RTC Power.
2 2
+1.25VS 1.25V switched power rail ON OFF OFF Pullhigh,DDR termination. 1.25VP
+1.2VS 1.2V switched power rail ON OFF OFF CPU 1.2VP,+H_VCCA,+HVCCIOPLL

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices VGA LCD PANEL ID LIST


Device IDSEL# REQ#/GNT# Interrupts
LAN AD17 3 PIRQB
CardBus AD20 2 PIRQA
Mini-PCI AD18 4 PIRQD
Mini-PCI LAN AD22 1 PIRQC

3
IEEE-1394 Controller AD16 0 PIRQA 3

AGP VGA PIRQA

EC SM Bus1 address EC SM Bus2 address


Device Device
Smart Battery 0001 011X b AD1032 1001 100X b
EEPROM 1010 000X b OZ163 0011 0100 b
Docking 0011 011X b
EQ TAS3002 0110 011X b

ICH3-M SM Bus address


Device
SODIMM 1010 000X b
Clock Gen 1101 001x b
4 4

P.S:Default Resistor & Capacitor's package are 0603.


Default 8P4R package is 0402. Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 43 of 45
A B C D E
5 4 3 2 1

PIR listing :

PAGE 4 PIR1 CHANGE THERMAL SENSOR FROM MAX6654 TO ADM1032 DEL U11, R78, R86; ADD U56, R519
PAGE 5 PIR2 COST DOWN CPU CAPS DEL C110, C377 ADD DIP 560UF_4V_14m C715, C716; C72, C97, C126 NOT ON
PAGE 6 PIR3 REMOVE AGP_BUS PULLUPS RP111, RP11, RP12, RP15 NOT ON
PAGE 12 CHANGE R284, R285 FROM 33 OHM TO 10 OHM
D D
PAGE 24 PIR4 AUDIO CODEC CHANGED FROM ALC201 TO ALC202 ADD R286 10_0402; U41, C592, C615, C593, R459, R458, C621, R433, R417, C598, R449, R444
PAGE 25 NOT ON; CHANGE R450, R444 TO 0_0402, ADD R522, R523 0_0402
PAGE 13 PIR5 EMI REQUEST TO PULL HIGH ON MK1709 ADD R385 0_0402, RESERVE R405, C585, C584, Y4; ADD 20K_0402 R525, R528 33K_0402 R526,
R527; ADD R413 0_0402, R524 10K_0402, Q75 PDTA114EK
PAGE 15 PIR7 DECREASE THE NOISE ON VDDRH ADD A .1UF_0402 CAP C719
PAGE 23 PIR8 REMOVE LAN CHASIS GROUND PER EMI'S REQUEST DEL C243
PAGE 27 PIR10 MOVE SPKR CAPS TO AUDIO BOARD FOR COST DOWN C692, C711 NOT ON, ADD 0_0805 R531, R532
PAGE 26 PIR11 FOR AUDIO NOISE, ISOLATE LEFT_EQ , GET_EQ , CHANGE C237'S RESERVE R529, R530
GND TO AGND
PAGE 33 PIR12 +3V, +2.5V RISES AS AC_IN, USE 2N7002 AS INVERTER ADD Q75, R532
INSTEAD OF 7414
PAGE 27 PIR13 COST DOWN, USE 74AHC125 TO REPLACED 7SH32 ADD U57, DEL U56, U50
PAGE 25 PIR14 RESERVE A JUMPER FOR AGND TO DGND
C PAGE 27 PIR15 DECREASE EARPHONE'S VOLUME ADD R541, 542, 543, 544 C

PAGE 28 PIR16 Add bead for CD ROM analog grounding option Del C237 , add L50 , change bead connection from Analog to Digital ground
PAGE 29 PIR17 Add capacitor to filter out noise on AVBATT_TEMP to Add C736 1uF capacitor
prevent shut_down bug
PAGE 5 PIR18 EMI team agree to delete all EMI clip Del EMI clip PAD2,4,6,8
Still reserve four clip for backup
PAGE 36 PIR19 Add JAE SD/MMC socket as 2nd source Add JP29
PAGE 36 PIR20 1.Chang R121 from 499 1% 0402 Resistor to 33K 5% Change R121
0402 resistor
2.Add R568 to prevent SDLED signal directly short Add R568 3.3K , 5% , 0402
with Ground while write protect tag enabled.
PAGE 13 PIR21 Some additional RC on SPECTRUM IC was requested Add R547 -> 10 Ohm , R546 -> 10 Ohm , R555 -> 10 Ohm , C720 -> 22p , C721 -> 22p
by EMI to reduce interference .
B B

A A

Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE B 401216 1B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 44 of 45
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Power section Page 1 of 1

Item Reason for change PG# Modify List B.Ver#


1 For thermal teem request that thermal setting point changed 37 PR20 changed from 1.74k into 2k_1%_0603(SD014200101)
D from 96 to 90 degree C. B test BOM D
PR24 changed from 21k into 19.1k_1%_0603(SD014191209)

2 +2.5VALWP is always power plane 41 PQ41,PQ42,PR128 should not be POP B test BOM

3 For cost down issue 37 PC28,PC29 should not be POP B test BOM
PC155 should be POP (CB5600NM000)

4 Prevent PU4 leakage lock pre-charge circuit


38 PU4 pin14 changed from PACIN into ACON B gerber

C C

B B

A A

Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-1302
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401216
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Wednesday, May 29, 2002 Sheet 45 of 45
5 4 3 2 1
www.s-manuals.com

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