Chapter - 2.3 SwitchingMatrix - Inverter
Chapter - 2.3 SwitchingMatrix - Inverter
Chapter - 2.3 SwitchingMatrix - Inverter
DC BUS DC BUS
SINGLE THREE-
PHASE PHASE
1. Half Bridge Single-phase voltage source inverters
VL T/2 T/2
T1 Vd/2
Vdc/2 D1
IL
LOAD -Vd/2 T
Vdc/2 T2
D2 D1 T1 D2 T2 D1 T1 D2 T2
Typical voltage and current wave form (inductive load)
Half bridge single phase inverter
1 T 2Vd 2 dt 2Vd
V01RMS ( sin t ) V
T0 01RMS
2VD 1
iL sin(nt n ) 1 nL
n1 n R 2 (nL) 2 Where; n tan
R
2VD
I 01RMS
R L
2 2
T V I
I S is (t )dt 01 01 cos 1
0
VS
2. Performance Parameters
Vd
V HFn
V0nRMS
2 n
1 1
HFn 0n V01RMS Vd n HFn
V01 n
2
2
2Vd 1 2
2Vd
V0n 2 1
2
n 2 n n 2 n THD
THD
THD n2 2Vd 2Vd n2 n
V01
V 2
02n 1 2
n2 n HD 3
HD n2 n
V01
vao
Vd/2
-Vd/2
p vbo
VS/2 D1 Vd/2
+ T1 T3 -Vd/2
vab
C1 VS
VS a D3
o b
D4 i0 -VS
+ i0 D1 D3 D1
VS/2 C2 T4 D2 T2 D2 D4 D2
T1
T2 T3
n T4
Single-Phase Full Bridge Inverter T/2 T/2
Full bridge inverter typical voltage and current wave
forms (inductive load)
4VS 4VS
v0 sin nt i0 sin(nt n )
n 1,3,5 n n1,3,5 n R nL
2 2
nL
n tan 1
4VS
v01 sin t
R
2 2VS 2 2VS
V01 I 01
R 2 L 2
Instantaneous power of input and output must be equal:-
Vs is V01I 01 sin t sin(t 1 )
V I V I
is 01 01 sin t sin(t 1) 01 01 (cos 1 cos( 2t 1))
Vs Vs
Problem with this type is its weight as the
result of the transformer. On the other hand
Vdc the isolation between the load and the
switching circuit and possibility of using
transformation ratio for desired output
voltage level are advantages.
Center taped transformer (Push-pull ) isolating the load and power supply.
iD P
+ +
Vdc/2 T1 If the capacitors are identical, they can
io
- +v divide the dc-link voltage into two equal
o
Vdc - parts avoiding use of two power sources.
+ T2
Vdc/2
- -
N
T
1
V cos2 ( nt )dt
2
Vrms nm
T 0 n 0
Vn2 Vrms V02 Vn2,rms
Vrms V0
2
n 1 V
n 1 2 Vn,rms n
2
Vrms V02 V01
2
,rms Vn2,rms
n2
2 V 2 V 2
Vrms 0 01,rms Vn,rms V01,rms Vn2,rms
2 2
n2 n2 V02 0 11
Rearranging:-
2 2
Vrms V01,rms Vn2,rms
2 V 2
Vrms 01,rms n,rms
V 2
2
n2
2
n2 V01 ,rms V01,rms
2 V 2
V 2 Vrms 01,rms
VHD n THD 2
2
n2 V1 V01 ,rms
2 V 2
Vrms THD 2V 2
01,rms 01,rms
2 V 2
Vrms THD 2V 2 V 2 V 2 (1 THD 2)
01,rms 01,rms rms 01,rms
V01,rms The RMS value of the fundamental component (first harmonic) voltage.
12
THD Total harmonic distortion of the voltage wave form.
P
+ S1 S3 S5
Each switch conducts for 180 degree or half period of the
output frequency as shown in Fig. Below.
C c
P P P P P
a
P Vdc b
a
a a a a
a 0 0 0 0 0 0
c S6 0
c
c c
b
S2 S4
b c b c b b b
N N N
N N
VaN Vdc
Vdc - N
VbN
Vdc
VcN
VAB
Vdc VAB and VBC are instantaneous
line voltages, respectively,
VBC terminal of phase A voltage with
respect to phase B terminal and
Va0 terminal phase B voltage with
respect to phase C terminal.
S1 ON
S2 ON
S3 ON
S4 ON ON Va0 is phase a voltage with respect
S5
S6
ON
ON
ON
to the neutral point, 0.
2VS
Vn n 1,5,7,...
n
In six step inverters the magnitude of the output voltage can be varied only by
varying the dc input voltage.
The concept of pulse width modulation has been introduced for two main reasons.
One is to control the voltage magnitude while the other is to minimize the
harmonic components.
• Single-Pulse-Width modulation
• Multiple-Pulse-Width modulation
• Sinusoidal-Pulse-Width modulation
• Modified-Pulse-Width modulation
plot(x,abs(sin((3.14-x)/2)),x,1/3*abs(sin(3*(3.14-x)/2)),x,1/5*abs(sin(5*(3.14-x)/2)),x,1/7*abs(sin(7*(3.14-x)/2)),x,1/9*abs(sin(9*(3.14-
x)/2)),x,1/11*abs(sin(11*(3.14-x)/2)),x,1/13*abs(sin(13*(3.14-x)/2)))
v 0 ( t ) b n sin nt
n 0
T
2
bn
T0 v 0 ( t ) sin(nt )dt
a a a
4VDC
2V 2 2
bn S sin(nt )dt sin(nt )dt sin(nt )dt
bn 1 2 sin(n ) n=1, 3, 5, 7, …
0 a a n 2 18
2 2
1.Determine the Fourier series
expansion of the two notch block
PWM inverter and determine the
expression for the performance
parameters. Simulate and
demonstrate the harmonics
amplitude variation as the notch
width varies. Hint: normalized
harmonic amplitude is given by
1 5n na
(1 4 sin sin
h 12 2
where; n=1, 5, 7, 11, …
19
20
5.4 Sine-Triangle Modulation
Assumption:
• The reference voltage remains approximately constant because one carrier
frequency period is very short compared to the reference sine wave period.
• The switch is ideal and switches on or off in no time
1 1
T T T1 T Vm
Vav VDC dt VDC dt VDC dt Vav VDC sin t
T 0 T T1 Vtp
T1
VDC
T1 T T1 T1 T T T1
T
+
V
Vav DC T 4T1 VDC (1 4 1 )
T T Vm sin t
T1 1
T T 4 Vtm
T Vm sin t
1 V sin t
4 Vtm VDC (1 1 m
Vav VDC (1 4 ) )
T Vtm
V sin t
Vav VDC m MVDC sin t
Vtm
The output voltage on three-phase inverter using one triangular wave has two main
components and can be expressed by the following equation according to the works
of H.S. Black ”Modulation Theory” D. Van Nostrand & Co. Princetown N.J., 1953.
VDC 2VDC
V1n M I cos( f t ) J 0 mM I sin(m ) cos(mct )
2 n1 2 2
J mM
2VDC n 2
I
m
m1 n 1
sin ( m n )
2
cos(mc t nf t )
Ta T
Uax a 60 U a 60 x j a Uay a 60 U a 60 y U rx jU ry
T T
T T T T
t Vdc cos t Vdc cos( ) Vr cos a t Vdc sin t Vdc cos in( ) Vr sin a
3 3
3 3
t t t0 1
3
Vr
t cos t cos( ) cos a t cos t cos( ) M cos a
3 Vdc 3
3 3
Vr
t sin t cos in( ) sin a t sin t cos in( ) M sin a
3 Vdc 3
3 3
2
M sin( a )
ta 3 3
t
2
M sin( a )
a 60 3
t0 1
1 M 3 sin( a ) cos( a )
27
Example:- 1. An inverter is supplied from a DC link voltage of 100 volts. It is desired to generate a voltage vector of
50 volts at 90 degrees using space vector modulation. The switching frequency is 500mS.
a. Determine the relative periods the switch is to stay at V60 , V120 and V0.
b. Draw the possible switching pattern in one switching cycle
c. Determine the phase voltage peak and RMS voltages
d. Determine the line peak and RMS voltages
e. Draw the wave form of the three phase voltage during the switching period
2
(U rx sin(a ) U ry cos(a )
y
Ta T60 500mS 3 3 3
Ua Vdc
Ua60
2
U(a60y Ur
Uay (0 sin(a ) 0.5 100 cos( )
600 Ta T60 500mS 3 3 3 3
a/3 100
Ury T60 144.3376 mS, 28.87%
U(a60x Urx Ua x x 2
(U rx sin(a ) U ry cos(a ))
T120 500mS 3
Vm
2
(0 sin(a ) 0.5 100 cos(60))
Ur = 0.5 Vdc T120 500mS 3
Urx = 0 100
Ury = Ur T120 144.3376 mS, 28.87%
T=500mS
Vdc 100V T0 T T60 T120 500 mS 144.3376 mS 144.3376 mS
T0 211.3249, 42.26%
28
T1 T1 T1
T2 T2 T2
T3 T3 T3
211.32mS
144.33mS
211.32mS
144.33mS
144.33mS
144.33mS
T4 T4 T4
T5 T5 T5
0.5T0
0.5T0
T6 T6 T6
T60 T0 T120 T60 T0 T120 T60 T120
3 3
Vr 50Volts Vmp Vr 50Volts Vml
2 2
2 2
Vmp 50Volts 33.33V 50Volts 57.73V Vml
3 3
2 2
Vrms, phase 50Volts 23.57V Vrms,line 50Volts 40.82V
3 3
29
U U T1
V V
0.5T0
0.5T0
W W W
V-W V-W
V-W
0.5T0
0.5T0
W W-U W