Modeling of An ADSL Transceiver Data Transmission Subsystem: Elmustafa Erwa
Modeling of An ADSL Transceiver Data Transmission Subsystem: Elmustafa Erwa
Modeling of An ADSL Transceiver Data Transmission Subsystem: Elmustafa Erwa
+ =
n
n
SNR
b (1)
where the gap I 9.8 dB ,
m
,
c
for a bit error rate of 10
-7
[4]. The quantity ,
c
is coding
gain of the applied code and ,
m
is the margin. The optimum assignment of bits to each
subchannel, which is not necessarily an integer value, is found using bit loading
algorithms [4]. In the case of non integer assignment, bits are truncated or rounded to the
nearest fraction that can be implemented by multidimensional trellis codes.
DMT modulation and demodulation is implemented using the Inverse Discrete
Fourier Transform (IDFT) and Discrete Fourier Transform (DFT). To implement an N/2
subchannel DMT system, an N size IDFT/DFT is required. The size is doubled by
mirroring the data to impose conjugate symmetry in the frequency domain, which results
in real-valued signal in the time domain after applying the IDFT. The general structure of
a DMT system is illustrated in Figure 1, where {X
0
, X
1
, , X
N-1
} are the original
complex QAM symbols, {x
n
} is the modulated data sequence, {y
n
} is the received
sequence, and {Y
0
, Y
1
, , Y
N-1
} are the decoded complex QAM symbols. The IDFT
and DFT are implemented very efficiently using the well known Inverse Fast Fourier
Transform (IFFT) and Fast Fourier Transform (FFT) algorithms.
5
Figure 1. Basic Discrete Multi-tone scheme.
2.4. Initialization and Channel Identification
In order to optimize the bit allocation in the subchannels, the transmitter acquires
an estimate of the channels impulse response and crosstalk noise spectrum before the
data transmission begins. This process is known as the initialization phase if it was before
the first ADSL block symbol. Otherwise, if the estimates are acquired in the middle of
the communication process between the transmitter and receiver, the process is known as
channel identification phase. During these two phases the transmitter and receiver do the
following: 1) Define a common mode of operation and clock and symbol
synchronization, 2) identify the channel, 3) calculate the optimal bit and energy
allocations for each subchannel, and 4) exchange the bit and energy allocation tables [5].
6
Figure 2. A block diagram of an ADSL Transceiver [6]
3. MODELING AND SIMULATION
3.1. ADSL Transmitter
In the ADSL transmitter shown in Figure 2, an input bit stream is first partitioned
into substreams using a serial-to-parallel (S/P) converter. Each substream is then
encoded using quadrature amplitude modulation (QAM), which produces a complex
number representing each encoded bit substream as mentioned in an earlier section. The
outputs of the QAM encoder are mirrored and conjugated before they enter an N point
IFFT, where N/2 is the number of subchannels. The mirroring creates real values at the
output of the IFFT. To mirror the data for M subchannels, N = 2M, the QAM symbols Xi
are given by [1] as
.
parallel to
serial
QAM
decoder
Freq.
domain
EQ
serial to
parallel
QAM
encoder
Input
bit
stream
mirror
data
and
N-IFFT
add
cyclic
prefix
parallel
to serial
DAC and
transmit
filter
N-FFT
and
remove
mirrored
data
serial
to
parallel
remove
cyclic
prefix
ADC, time
domain
EQ, and
receive
filter
channel
Detected
bit
stream
TRANSMITTER
RECEIVER
N/2 channels
N channels
N/2 channels
N channels
7
The IFFT then maps each QAM symbol into orthogonal frequency bins producing a
discrete multitone symbol of N samples. To form a frame, the last v samples of the
symbol, known as the cyclic prefix (CP) are copied and prepended to the symbol. This
provides a buffer against Interblock Interference (IBI), which was discussed earlier.
Unfortunately the addition of the CP decreases the transceiver power efficiency by a
factor of N/(N+ ) [7]. The final two stages serialize the data and convert it to analog via
the parallel-to-serial (P/S) converter and digital-to-analog (DAC) converter respectively.
3.2 ADSL Receiver
An ADSL receiver receives the data through the channel, which is modeled as an
FIR filter. The operation of the receiver is the dual of that of the transmitter, plus the
addition of an equalizer. The equalizer has two tasks: 1) reduce ISI in the time domain
and shorten the channel impulse response to the CP limit, and 2) compensate for
magnitude and phase distortion in the frequency domain [7]. The first task is done by the
time-domain equalizer (TEQ), while the latter is performed by the frequency-domain
equalizer (FEQ).
4. PROPOSED WORK
The three models of computation that can be used to model the ADSL transceiver
are Dynamic Data Flow (DDF), Synchronous Data Flow (SDF), and Timed Synchronous
Dataflow (TSDF). Figure 3 illustrates the model that is used for each of the blocks in the
ADSL transceivers based on the color of the node.
SDF is best for modeling Digital Signal Processing (DSP) communication
systems because of the static number of inputs and outputs in each node, and the
sequential transfer of data from one node to the next in an acyclic graph [8]. DDF is used
8
in this model due to the initialization and channel identification phases, which
dynamically change the bit allocation for each subchannel based on the channel
estimates. TSDF is used to model continuous time after the conversion of data from
digital to analog via the DAC.
My goal for this project is to model and simulate ADSL transceivers using SDF as
the model of computation. If time permits, I will try to extend the modeling to include
DDF and TSDF. In my simulations, I will attempt to evaluate the bit error rate for
different combinations of channel models, TEQs, and bit allocation tables.
Figure 3. Models of Computations
mirrored
data and
N-IFFT
QAM
S
/
P
FEQ
CP
P
/
S
DAC
Channel
TEQ
ADC N-FFT
and
remove
mirrored
data
QAM
S/
P
C
P
P/
S
DDF SDF
TIMED
SDF
9
5. REFERENCES
[1] Thomas Starr, John M. Cioffi, and Peter J. Silverman, Understanding Digital Subscriber Line
Technology (CD-ROM included), Prentice Hall PTR, 1999, ISBN 0-13-780545-4.
[2] P. S. Chow, J. M. Cioffi, and J. A. C. Bingham, "DMT-based ADSL: concept, architecture, and
performance," IEE Colloquium on High speed Access Technology and Services, Oct. 19, 1994.
[3] P. S. Chow, J. M. Cioffi, and J. C. Tu, "A discrete multitone transceiver system for HDSL
applications," IEEE Journal on Selected Areas in Communications, Volume 9, Issue 6, pp. 895-
908, Aug. 1991.
[4] P. S. Chow, J. M. Cioffi, and J. A. C. Bingham, "A practical discrete multitone transceiver loading
algorithm for data transmission over spectrally shaped channels, IEEE Transactions on
Communications, Vol. 43, Issue 2, Part 3, pp. 773-775, Feb.-March-April 1995.
[5] D. Arifler, M. Ding, and Z. Shen, "Modeling and simulation of discretized data transmission in
very high-speed digital subscriber line, Literature Survey for EE 382C Embedded Software
Systems, The University of Texas at Austin, Austin, TX, March 2002.
[6] G. Arslan, "ADSL Transceivers", Presentation for EE 379K-17 Real-Time Digital Signal
Processing Laboratory, The University of Texas at Austin, Austin, TX, November 15, 1999.
[7] P.J.W. Melsa, R.C. Younce, and C.E. Rohrs, Impulse response shortening for discrete multitone
transceivers, IEEE Transactions on Communications, vol. 44, pp. 1662-1672, Dec. 1996.
[8] A. Lee and D. Messerschmitt, "Synchronous data flow", Proceedings of the IEEE, vol. 75, no. 9,
pp. 1235-1245, Sep. 1987.
[9] B. Hirosaki, An orthogonally multiplexed QAM system using the discrete Fourier transform,
IEEE Transactions on Communications, vol. COM-29, pp. 982-989, July 1981.
[10] K. Kerpez and K. Sistanizadeh High bit rate asymmetric digital communications over telephone
loops, IEEE Transactions Communications, vol. 43, June 1995.
[11] B. R. Saltzberg, Performance of an efficient parallel data transmission system, IEEE
Transactions on Communications Technology, vol. COM-15, pp. 805-811, Dec. 1967.
[12] S. Darlington, On digital single-sideband modulators, IEEE Transactions on Circuit Theory,
vol. CT-17, pp. 409-415, Aug. 1970.
[13] J. A. C. Bingham, Multi-carrier Modulation for Data Transmission: An Idea Whose Time Has
Come, IEEE Communication Magazine, vol. 28 no. 5, pp. 5-14, May, 1990.