Experiment No.

13 DESIGN:

MOSFET AMPLIFIER Assume VDD = 12V, VRD = 5V, VDS = 6V, ID = 2 mA

VRD 5
AIM: RD    2.5 kΩ use 2.7 kΩ resistor.
ID 2  10 103
To obtain the frequency response of MOSFET amplifier in common source Now, the voltage across source side resistance VRS  VDD – VDS – VRD  12 – 6 – 5  1 V
configuration with given specifications.
As, IS = ID, (no current flows through the gate),
THEORY: VRS 1
RS    500 Ω use 470 Ω resistor.
The MOSFET structure has become the most important device structure in the I D 2 10 103
electronics industry. It dominates the integrated circuit technology in Very Large Scale
Voltage – divider bias circuit design:
Integrated (VLSI) digital circuits based on n-channel MOSFETs and Complementary n-
channel and p-channel MOSFETs (CMOS). The technical importance of the MOSFET results Assume, R1 = 100 kΩ. By, voltage division rule, R2 can be obtained as,
from its low power consumption, simple geometry, and small size, resulting in very high
packing densities and compatibility with VLSI manufacturing technology. Two of the most R2
VG  VDD 
popular configurations of small-signal MOSFET amplifiers are the common source and R1  R2
common drain configurations. The common source circuit is shown below. The common
sources, like all MOSFET amplifiers, have the characteristic of high input impedance. High Selecting the value of VG as 4V
input impedance is desirable to keep the amplifier from loading the signal source. This high
input impedance is controlled by the bias resistors R1 and R2). Normally the value of the bias R2
4  12  R2  47 kΩ
resistors is chosen as high as possible. However, too big a value can cause a significant voltage 100  10 103  R2
drop due to the gate leakage current. A large voltage drop is undesirable because it can disturb
the bias point. For amplifier operation the MOSFET should be biased in the active region of Design of capacitors:
the characteristics.
Assume impedance of coupling capacitor be < 1.5 kΩ. Therefore,
CIRCUIT DIAGRAM:
1
VDD = 12 V XC1 ≤ 1.5kΩ ie  1.5 kΩ
2 fC1
RD
R1
2.7 kΩ CC 1 μF Given, the frequency of the input signal is 100Hz.
100 kΩ

CC 1 μF C1 = 1.06μf. use 1 μf capacitor.

2N7000
Let C1 = C2 = 1 μf.
820 kΩ

CRO
R2 For the bypass capacitor,
Vin
33 kΩ RS
470Ω CS 1
10 μF XCS ≤ 150Ω ie  150 Ω
2 fCS

CS = 10μf
Fig. 1 Circuit diagram of MOSFET amplifier

Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 1 Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 2

PROCEDURE:

Set up the circuit as shown in the figure with an input signal of 0.2V (peak-to-peak) at
1000 Hz. Observe the output on the CRO. Vary the frequency of the input signal over a range
of values (from 50Hz to a few MHz) to obtain the frequency response which is a graph between
log f (x-axis) and gain in dB (y-axis).

OBSERVATION:

Frequency Input voltage Output voltage Gain Gain

Vo Vo
f Vi Vi 20 log
Vi Vi
Hz V V
- dB

GRAPH (to be obtained):

Fig 2. Frequency response

RESULT:

The required common source MOSFET amplifier was designed and set up to obtain the
required frequency response.

Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 3