Experiment 6 7 8
Experiment 6 7 8
Experiment 6 7 8
Astable Multivibrator
Aim: To design Astable Multivibrator and observe its output waveform.
Theory:
Multivibrators are non-sinusoidal oscillators which are usually two-stage
amplifiers with positive feedback. These circuits are made up of both active and
passive components. Active components include elements such as BJTs (Bipolar
Junction Transistors), FETs (Field Effect Transistors), Vacuum Tubes, Op-
Amps and 555 timer ICs. Passive components include elements like resistors
and capacitors. However while designing them, care must be taken so as to
ensure that the two-stages of the circuit continuously alter their states between
cutoff and saturation regions.
Astable multivibrators are the multivibrators which have no stable state i.e. the
multivibrators in which the output continuously oscillates between two
permissible states. As a result, they produce square-wave at their output and are
regarded to be free-running in-nature. Further, these multivibrators do not
require any kind of external triggering, except the DC supply, due to which they
fall under the category of relaxation oscillators.
Circuit Diagram:
Output Waveform:
Advantages: The advantages of using an astable multivibrator are as follows −
Output Waveform:
Advantages: The advantages of Monostable Multivibrator are as follows -
Output Waveform:
Advantages of Bistable Multivibrator:
It has the ability to store previous output until no any input trigger is
provided.
The circuit design is not complex.
Every time in order to have transition from one stable state to another,
triggering pulse is required.
It is somewhat costly than astable and monostable multivibrator.
𝑉 = 𝐴(𝑉1 − 𝑉2)
Where
These devices are used as motor and/or servo controllers, signal amplifiers,
analog multipliers, switches, volume controllers, automatic gain controllers,
amplitude modulators, etc., and cover a wide range of applications including
those in instrumentation systems, microphones, analog to digital converters and
myriad applications.
Circuit Diagram:
Output Waveform:
Experiment 8(a)
Summing Amplifier
Aim: To design summing amplifier using Operational amplifier (IC741), and
verify the output response.
Theory:
An op amp is an amplifier. But an op amp can also perform summing operation.
We can design an op amp circuit to combine number of input signals and to
produce single output as a weighted sum of input signals.
Summing amplifier is basically an op amp circuit that can combine number of
input signals to a single output that is the weighted sum of all inputs.
In this simple summing amplifier circuit, the output voltage, ( Vout ) now
becomes proportional to the sum of the input voltages, V1, V2, V3, etc. Then we
can modify the original equation for the inverting amplifier to take account of
these new inputs thus:
The Summing Amplifier is a very flexible circuit indeed, enabling us to
effectively “Add” or “Sum” (hence its name) together several individual input
signals. If the inputs resistors, R1, R2, R3 etc, are all equal a “unity gain inverting
adder” will be made. However, if the input resistors are of different values a
“scaling summing amplifier” is produced which will output a weighted sum of
the input signals.
Circuit Diagram:
Using the previously found formula for the gain of the circuit:
We can now substitute the values of the resistors in the circuit as follows:
We know that the output voltage is the sum of the two amplified input signals
and is calculated as:
Output Waveform:
Experiment 8(b)
Unity Follower
Aim: To design unity follower using Operational amplifier (IC741), and verify
the output response.
Theory:
A unity follower (also known as a buffer amplifier, unity-gain amplifier, or
isolation amplifier) is an op-amp circuit whose output voltage is equal to the
input voltage (it “follows” the input voltage). Hence a voltage follower op-amp
does not amplify the input signal and has a voltage gain of 1.
The voltage follower provides no attenuation or amplification—only buffering.
A voltage follower circuit has a very high input impedance. This characteristic
makes it a popular choice in many different types of circuits that require
isolation between the input and output signal.
Circuit Diagram:
Output Waveform:
Experiment 8(c)
Integrator Circuit
Aim: To design integrator circuit using Operational amplifier (IC741), and
verify the output response.
Theory:
The Op-amp Integrator is an operational amplifier circuit that performs the
mathematical operation of Integration, that is we can cause the output to
respond to changes in the input voltage over time as the op-amp integrator
produces an output voltage which is proportional to the integral of the input
voltage.
In other words the magnitude of the output signal is determined by the length of
time a voltage is present at its input as the current through the feedback loop
charges or discharges the capacitor as the required negative feedback occurs
through the capacitor.
But dQ/dt is electric current and since the node voltage of the integrating op-
amp at its inverting input terminal is zero, X = 0, the input current I(in) flowing
through the input resistor, Rin is given as:
Assuming that the input impedance of the op-amp is infinite (ideal op-amp), no
current flows into the op-amp terminal. Therefore, the nodal equation at the
inverting input terminal is given as:
From which we derive an ideal voltage output for the Op-amp Integrator as:
Circuit Diagram:
Output Waveform:
Experiment 8(d)
Differentiator Circuit
Aim: To design differentiator circuit using Operational amplifier (IC741), and
verify the output response.
Theory:
A differentiator circuit is an electronic circuit that produces an output equal to
the first derivative of its input.
An op-amp based differentiator produces an output, which is equal to the
differential of input voltage that is applied to its inverting terminal. The circuit
diagram of an op-amp based differentiator is shown in the following figure −
The input signal to the differentiator is applied to the capacitor. The capacitor
blocks any DC content so there is no current flow to the amplifier summing
point, X resulting in zero output voltage. The capacitor only allows AC type
input voltage changes to pass through and whose frequency is dependant on the
rate of change of the input signal.
At low frequencies the reactance of the capacitor is “High” resulting in a low
gain ( Rƒ/Xc ) and low output voltage from the op-amp. At higher frequencies
the reactance of the capacitor is much lower resulting in a higher gain and
higher output voltage from the differentiator amplifier.
However, at high frequencies an op-amp differentiator circuit becomes unstable
and will start to oscillate. This is due mainly to the first-order effect, which
determines the frequency response of the op-amp circuit causing a second-order
response which, at high frequencies gives an output voltage far higher than what
would be expected. To avoid this the high frequency gain of the circuit needs to
be reduced by adding an additional small value capacitor across the feedback
resistor Rƒ.
Since the node voltage of the operational amplifier at its inverting input terminal
is zero, the current, i flowing through the capacitor will be given as:
The charge on the capacitor equals Capacitance times Voltage across the
capacitor,
from which we have an ideal voltage output for the op-amp differentiator is
given as:
Therefore, the output voltage Vout is a constant –Rƒ*C times the derivative of
the input voltage Vin with respect to time. The minus sign (–) indicates
a 180o phase shift because the input signal is connected to the inverting input
terminal of the operational amplifier.
One final point to mention, the Op-amp Differentiator circuit in its basic form
has two main disadvantages compared to the previous operational amplifier
integrator circuit. One is that it suffers from instability at high frequencies as
mentioned above, and the other is that the capacitive input makes it very
susceptible to random noise signals and any noise or harmonics present in the
source circuit will be amplified more than the input signal itself. This is because
the output is proportional to the slope of the input voltage so some means of
limiting the bandwidth in order to achieve closed-loop stability is required.
Circuit Diagram:
Output Waveform: