Logic Gates PDF
Logic Gates PDF
Logic Gates PDF
The Boolean expression of the NAND gate The Boolean expression of NOR gate is:
is: Y = 𝐴. 𝐵 Y=𝐴 + 𝐵
The truth table of a NAND gate is given as; The truth table of a NOR gate is as
A B Y follows;
0 0 1 A B Y
0 1 0 0 0 1
1 0 0 0 1 1
1 1 0 1 0 1
1 1 0
Exclusive-OR gate (XOR Gate) : Exclusive-NOR Gate (XNOR Gate) :
In an XOR gate, the output of a two-input In the XNOR gate, the output is in state
XOR gate attains state 1 if one adds only 1 when both inputs are the same, that
input attains state 1. is, both 0 or both 1.
The Boolean expression of the XOR gate is: The Boolean expression of the XNOR
𝐴. 𝐵 + 𝐴̅. 𝐵 or Y = A ⨁ B gate
The truth table of an XOR gate is;
A B Y
The truth table of an XNOR gate is given
0 0 0
below;
0 1 1
A B Y
1 0 1
0 0 0
1 1 0
0 1 1
1 0 1
1 1 0
4. Which gates are called as the universal gates? What are its advantages?
A universal gate is a gate which can implement any Boolean function without need to
use any other gate type. The NAND and NOR gates are universal gates. In practice, this
is advantageous since NAND and NOR gates are economical and easier to fabricate and
are the basic gates used in all IC digital logic families.
5. Explain why is a two-input NAND gate called universal gate?
NAND gate is called universal gate because any digital system can be implemented with
the NAND gate. Sequential and combinational circuits can be constructed with these
gates because element circuits like flip-flop can be constructed from two NAND gates
connected back-to-back. NAND gates are common in hardware because they are easily
available in the ICs form. A NAND gate is in fact a NOT-AND gate. It can be obtained
by connecting a NOT gate in the output of an AND gate.
6. Realise the basic gates using universal gates.
Implementation of AND Gate using Universal gates.
a) Using NAND Gates
The AND gate can be implemented by using two NAND gates in the below fashion:
The LHS (left-hand side) of this theorem represents the NAND gate that has
inputs A and B. On the other hand, the RHS (right-hand side) of this theorem
represents the OR gate that has inverted inputs.
The OR gate here is known as a Bubbled OR.
Here is a table that shows the verification of the first theorem of De Morgan:
Theorem 2
The left-hand side of this theorem represents the NOR gate that has inputs A
and B. On the other hand, the right-hand side represents the AND gate that has
inverted inputs.
The AND gate here is known as a Bubbled AND.
Here is a table that shows the verification of the second theorem of De Morgan: